CN112532544B - Method for processing message and switching equipment - Google Patents

Method for processing message and switching equipment Download PDF

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Publication number
CN112532544B
CN112532544B CN202011315159.4A CN202011315159A CN112532544B CN 112532544 B CN112532544 B CN 112532544B CN 202011315159 A CN202011315159 A CN 202011315159A CN 112532544 B CN112532544 B CN 112532544B
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message
source port
header
encapsulated
port
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CN112532544A (en
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洪贵婷
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Ruijie Networks Co Ltd
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Ruijie Networks Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/10—Active monitoring, e.g. heartbeat, ping or trace-route
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/12—Network monitoring probes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2212/00—Encapsulation of packets

Abstract

The invention provides a method for processing messages and switching equipment, wherein the method comprises the following steps: the switching chip receives a message sent by a CPU in the switching equipment, wherein the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop back port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port; the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header; and the loopback port sends the packet to the source port according to the port number of the source port in the second encapsulated packet header and indicates the source port to process the packet which does not contain the first encapsulated packet header and the second encapsulated packet header according to the processing action indication information of the source port. The problem of detection distortion of first-hop equipment is solved.

Description

Method for processing message and switching equipment
Technical Field
The present invention relates to the field of data communications, and in particular, to a method and a switching device for processing a packet.
Background
With the rapid development of network services, more and more devices are deployed at the core layer, the convergence layer and the access layer, and when a fault occurs in a network, it is desirable to provide a method capable of completely simulating the forwarding behavior of a service message on a forwarding plane so as to locate the fault.
As shown in fig. 1, leaf, spine, and Border Leaf form a three-layer architecture (a Leaf-Spine topology network structure). The Leaf, spine and Border Leaf are connected by three-layer Aggregate AP (Aggregate Port) ports to realize traffic load sharing.
Suppose that the current operation and maintenance personnel need to detect a path from the virtual machine VM1 to the virtual machine VM4, the detection path has two paths:
1、VM1->Leaf1->Spine1->Leaf3->VM4。
2、VM1->Leaf1->Spine2->Leaf4->VM4。
the topology in the graph is relatively simple, when the network requirements increase, the topology will be continuously enlarged, and deployment requirements such as ECMP (Equal-cost multi routing) scenarios and the like will also be introduced, and forwarding paths between VM hosts will also increase accordingly, and when a fault occurs between VM hosts, how to accurately and quickly detect a real forwarding path is a necessary requirement.
Aiming at the scene in fig. 1, the switch provides path visualization, so that operation and maintenance personnel can clearly know whether a forwarding path of a specific flow in a network or a path between two network devices, and a route from a source end to a destination end are reachable, and the operation and maintenance personnel can perform fault location conveniently, and the method comprises the following steps:
step one, an SDN controller (for example, a device marked as RG-ONC in fig. 1) constructs a path detection packet according to user configuration information, where a specified source IP address is VM1 and a destination IP address is VM4.
And step two, the SDN controller sends the path detection message to Leaf1 through Packet-out.
And step three, after receiving the Packet-out message, the Leaf1 identifies the path detection message according to the detection identifier in the path detection message, and the Leaf1 forwards the Spine1 according to the outlet information selected by the software. Meanwhile, copying a Packet IN serving as a response message to the SDN controller by CPU software;
and step four, after receiving the message, the Spine1 uploads a part of message to the SDN controller, and simultaneously forwards a part of message to the Leaf3.
And step five, after receiving the message, the Leaf3 uploads a message to the SDN controller, and simultaneously forwards a message to the VM4.
When a Packet IN is sent to the SDN controller from Leaf1, spine1, and Leaf3, the Packet IN carries source port, destination port, and VID information of the Packet, and the SDN controller can completely calculate a detection path according to the information. When a certain device (such as Spine 1) does not respond to a Packet IN message within the detection time set by the SDN controller, it can be accurately located that a failure occurs IN Spine1, and after an abnormal device is determined, the device manufacturer technical staff continues to locate the device.
The Openflow protocol supports Packet IN and Packet-OUT messages. The functions of the Packet-OUT message are: and sending the relevant data of the controller to the Openflow switch. The functions of the Packet IN message are: the data packet arriving at the Openflow switch is sent to the SDN controller.
For convenience of description of subsequent schemes, the devices involved in the detection path in the figure may be further classified:
first hop equipment: leaf1;
intermediate jump equipment: spine1, spine2;
tail jump equipment: leaf3, leaf4;
as shown in fig. 1, leaf1 and Spine are interconnected through an AP port, and if the AP port has a plurality of member ports, a plurality of forwarding paths are provided correspondingly. As shown in fig. 1, vm1 and VM4 have two detection paths, and the forwarding of the first-hop packet is currently performed by acquiring, by CPU software, the egress information according to the destination IP of the packet. And the forwarding of the middle hop and the tail hop is carried out by the switch chip according to the HASH algorithm of the AP for chip balance forwarding.
The HASH equalization algorithm of the AP of the chip is various, and the HASH factors of each kind are not limited to the destination IP address. The most basic algorithm templates include the following, as shown in table 1:
algorithm 1 (Ethernet message) Algorithm 2 (IP message)
Source MAC of message Message source IP
Destination MAC of message Message source and destination IP
Source port of message Message L4 source port number
Message Ethernet type Message L4 destination port number
Message protocol
Newspaper source panel port
TABLE 1
The templates of the equalization algorithm then depend on the user configuration and are then self-equalized by the chip. For the first-hop device, messages need to be sent from the device to the middle-hop device, software cannot sense the HASH algorithm principle of the chip and distinguish different messages to select different algorithms, and the problem of incredibility exists only according to the outlet of the target IP calculation. For example, the forwarding path of the messages from VM1 to VM4 is VM1- > Leaf1- > Spine2- > Leaf4- > VM4, and the detection path may be VM1- > Leaf1- > Spine1- > Leaf3- > VM4, so that detection of the first-hop device has certain distortion.
The above is to analyze the AP scenario, and this is especially true for the ECMP scenario, and the more paths, the more complex the environment, and the more likely the first hop device will detect distortion.
Disclosure of Invention
In order to solve the technical problem, the embodiment of the invention adopts the following technical scheme:
a method for processing message is applied to switching equipment, and comprises the following steps:
the switching chip receives a message sent by a CPU in the switching equipment, wherein the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop-back port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port;
the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header;
and the loopback port sends the packet to the source port according to the port number of the source port in the second encapsulated packet header and indicates the source port to process the packet which does not contain the first encapsulated packet header and the second encapsulated packet header according to the processing action indication information of the source port.
In the alternative,
the switching device is a first hop device in a network, the message is a detection message, and the processing action indication information of the source port indicates the source port to forward the detection message according to a preset input/output pipeline for forwarding the message.
Optionally, the method further includes:
and the exchange chip sends a Packet IN response message to the CPU.
Alternatively to this, the first and second parts may,
the processing action indication information of the source port is any one of the following: whether address learning is needed by an input pipeline after a message enters from a source port is indicated, whether domain processing FP rule matching is needed by the input pipeline after the message enters from the source port is indicated, whether the message is discarded by a message cache management unit in the input pipeline after the message enters from the source port is indicated, and whether the message is discarded by a message output pipeline in the input pipeline after the message enters from the source port is indicated.
Alternatively to this, the first and second parts may,
the step of sending, by the switch chip, the packet that does not include the first encapsulated packet header to the loopback interface according to the loopback interface number in the first encapsulated packet header specifically includes:
and the switching chip sends the message which does not contain the first encapsulated message header to a loopback port through a message cache management unit according to the loopback port number in the first encapsulated message header.
Another aspect of the present invention provides a switching device for processing a packet, including:
the switching chip is used for receiving a message sent by a CPU in the switching equipment, wherein the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port;
the switch chip is further configured to send the packet that does not include the first encapsulated packet header to a loopback port according to a loopback port number in the first encapsulated packet header;
and the loopback port is used for sending the packet to the source port according to the port number of the source port in the second encapsulated packet header and indicating the source port to process the packet which does not contain the first encapsulated packet header and the second encapsulated packet header according to the processing action indication information of the source port.
Alternatively to this, the first and second parts may,
the switching device is a first hop device in a network, the message is a detection message, and the processing action indication information of the source port indicates the source port to forward the detection message according to a preset input/output pipeline for forwarding the message.
In the alternative,
and the switching chip is also used for sending a Packet IN response message to the CPU.
Alternatively to this, the first and second parts may,
the processing action indication information of the source port is any one of the following: the method comprises the steps of indicating whether an input assembly line after a message enters from a source port needs address learning, indicating whether the input assembly line after the message enters from the source port needs field processing FP rule matching, indicating whether the input assembly line after the message enters from the source port caches the message in a message cache management unit to discard the message, and indicating whether the input assembly line after the message enters from the source port discards the message in a message output assembly line.
Alternatively to this, the first and second parts may,
the switch chip is further specifically configured to:
and the switching chip sends the message which does not contain the first encapsulation message header to a loopback port through a message cache management unit according to the loopback port number in the first encapsulation message header.
The embodiment of the invention has the advantages that the message sent by the CPU in the switching equipment is received through the switching chip, the message comprises a first encapsulated message head and a second encapsulated message head, the first encapsulated message head at least comprises a loop back port number, and the second encapsulated message head at least comprises a source port number and processing action indication information of the source port; the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header; and the loopback port sends the packet to the source port according to the port number of the source port in the second encapsulated packet header and indicates the source port to process the packet which does not contain the first encapsulated packet header and the second encapsulated packet header according to the processing action indication information of the source port. The problem of detection distortion of first-hop equipment is solved, the logic that a CPU needs to copy and process a message is reduced, and the expense of a detection function on the CPU is greatly reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art system architecture;
FIG. 2 is a flow chart of a method provided by an embodiment of the present invention;
FIG. 3 is a block diagram of an apparatus according to an embodiment of the present invention;
fig. 4 is a schematic diagram of message flow according to an embodiment of the present invention;
fig. 5 is a schematic diagram of packet flow according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present invention provides a method for processing a packet, which is applied to a switching device, and as shown in fig. 2, the method includes the following steps:
s101, a switching chip receives a message sent by a CPU in the switching equipment, wherein the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of a source port;
s103, the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header;
and S105, the loopback port sends the source port according to the port number of the source port in the second encapsulated message header, and indicates the source port to process the messages which do not contain the first encapsulated message header and the second encapsulated message header according to the processing action indication information of the source port.
Alternatively to this, the first and second parts may,
the switching device is a first hop device in a network, the message is a detection message, and the processing action indication information of the source port indicates the source port to forward the detection message according to a preset input/output pipeline for forwarding the message.
Optionally, the method further includes:
and the exchange chip sends a Packet IN response message to the CPU.
Alternatively to this, the first and second parts may,
the processing action indication information of the source port is any one of the following: the method comprises the steps of indicating whether an input assembly line after a message enters from a source port needs address learning, indicating whether the input assembly line after the message enters from the source port needs field processing FP rule matching, indicating whether the input assembly line after the message enters from the source port caches the message in a message cache management unit to discard the message, and indicating whether the input assembly line after the message enters from the source port discards the message in a message output assembly line.
In the alternative,
the step of sending, by the switch chip, the packet not including the first encapsulated packet header to the loopback interface according to the loopback interface number in the first encapsulated packet header specifically includes:
and the switching chip sends the message which does not contain the first encapsulated message header to a loopback port through a message cache management unit according to the loopback port number in the first encapsulated message header.
The embodiment of the invention has the advantages that the message sent by the CPU in the switching equipment is received through the switching chip, the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop-back port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port; the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header; and the loopback port sends the packet to the source port according to the port number of the source port in the second encapsulated packet header and indicates the source port to process the packet which does not contain the first encapsulated packet header and the second encapsulated packet header according to the processing action indication information of the source port. The problem of detection distortion of first-hop equipment is solved, the logic that a CPU needs to copy and process a message is reduced, and the expense of a detection function on the CPU is greatly reduced.
Another aspect of the present invention provides a switching device for processing a packet, as shown in fig. 3, including:
a switching chip 301, configured to receive a packet sent by a CPU in the switching device, where the packet includes a first encapsulated packet header and a second encapsulated packet header, the first encapsulated packet header at least includes a loop port number, and the second encapsulated packet header at least includes a source port number and processing action indication information of the source port;
the switch chip 301 is further configured to send the packet that does not include the first encapsulated packet header to a loopback port according to a loopback port number in the first encapsulated packet header;
the loopback port 303 is configured to send to the source port according to the port number of the source port in the second encapsulated packet header, and instruct the source port to process the packet that does not include the first encapsulated packet header and the second encapsulated packet header according to the indication information of the processing action of the source port.
Alternatively to this, the first and second parts may,
the switching device is a first-hop device in a network, the message is a detection message, and the processing action indication information of the source port indicates the source port to forward the detection message according to a preset input/output pipeline for forwarding the message.
In the alternative,
the exchange chip is also used for sending a Packet IN response message to the CPU.
Alternatively to this, the first and second parts may,
the processing action indication information of the source port is any one of the following: whether address learning is needed by an input pipeline after a message enters from a source port is indicated, whether domain processing FP rule matching is needed by the input pipeline after the message enters from the source port is indicated, whether the message is discarded by a message cache management unit in the input pipeline after the message enters from the source port is indicated, and whether the message is discarded by a message output pipeline in the input pipeline after the message enters from the source port is indicated.
Alternatively to this, the first and second parts may,
the switch chip is further specifically configured to:
and the switching chip sends the message which does not contain the first encapsulation message header to a loopback port through a message cache management unit according to the loopback port number in the first encapsulation message header.
The embodiment of the invention has the advantages that the message sent by the CPU in the switching equipment is received through the switching chip, the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop-back port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port; the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header; and the loopback port sends the packet to the source port according to the port number of the source port in the second encapsulated packet header and indicates the source port to process the packet which does not contain the first encapsulated packet header and the second encapsulated packet header according to the processing action indication information of the source port. The problem of detection distortion of first-hop equipment is solved, the logic that a CPU needs to copy and process a message is reduced, and the expense of a detection function on the CPU is greatly reduced.
The following further explains an embodiment of the present invention with reference to a specific application scenario, as shown in fig. 4, including the following contents:
a CPU: a first-hop device software CPU sends a detection message;
IP: ingress Pipeline, switching the input Pipeline of the chip;
EP: egress Pipeline, exchange chip output Pipeline;
MMU: memory manager Unit, message buffer management Unit.
The method comprises the following steps:
step one, CPU software sends a detection message, and the software needs to encapsulate the detection message into 2 headers, namely a SoBMH Header and a Loopback Header; the header information may be encapsulated according to table 2 and table 3.
Wherein, soBMH Header: (Stream of Bytes Module Header), stream mode Header, having 16 Bytes, only the fields relevant to this embodiment need to be considered here, as shown in Table 2:
Figure BDA0002791115410000101
TABLE 2
Wherein, the Loopback Header has 20 bytes, and also for this embodiment, only the fields related to this embodiment are concerned, as shown in table 3:
Figure BDA0002791115410000102
TABLE 3
Step two, the CPU inputs the packaged message into an IP (input pipeline) of a switching chip, and the message is sent to a loopback interface according to LOCAL _ DEST _ PORT information (loopback interface information) of a SoBMH head;
step three, before the loopback interface receives the message, the SoBMH head is unpacked;
step four, only the loopback header + message is left in the message received by the loopback interface, then the PP _ PORT and SOURCE fields in the loopback header are analyzed, the message is sent to the SOURCE PORT specified by the loopback interface, the PKT _ PROFILE is the input pipeline logic for determining the incoming message from the SOURCE PORT, and the embodiment is set to 2, which indicates that the message incoming from the SOURCE PORT needs to be forwarded according to the input and output pipeline of the normal message.
In other embodiments, the processing action indication information PKT _ PROFILE of the source port may be any one of the following: the method comprises the steps of indicating whether an input assembly line after a message enters from a source port needs address learning, indicating whether the input assembly line after the message enters from the source port needs field processing FP rule matching, indicating whether the input assembly line after the message enters from the source port caches the message in a message cache management unit to discard the message, and indicating whether the input assembly line after the message enters from the source port discards the message in a message output assembly line.
Step five, through the steps, the detection message can be guided to the source port, and the detection message can be forwarded like a service message by chip assembly lines (IP and EP), as shown in an arrow from the source port to the destination port in fig. 5, so that the problem that the first-hop message detection path may have distortion is solved.
Step six, at the same time, as an arrow from the MMU to the CPU shown IN fig. 5, after the message can travel through the chip pipeline, a message can be sent to the first-hop device CPU as a Packet IN message response, which is changed from the original software behavior after being improved by this embodiment to a hardware behavior, and when the transmission amount of the detection message is large, the overhead to the CPU is greatly reduced.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (8)

1. A method for processing a message, applied to a switching device, includes:
the switching chip receives a message sent by a CPU in the switching equipment, wherein the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop back port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port;
the exchange chip sends the message which does not contain the first encapsulation message header to a loopback port according to a loopback port number in the first encapsulation message header;
the loopback port sends the source port according to the port number of the source port in the second encapsulated message header and indicates the source port to process the message which does not contain the first encapsulated message header and the second encapsulated message header according to the processing action indication information of the source port;
the message is a detection message, and the processing action indication information of the source port is any one of the following: whether address learning is needed by an input pipeline after a message enters from a source port is indicated, whether domain processing FP rule matching is needed by the input pipeline after the message enters from the source port is indicated, whether the message is discarded by a message cache management unit in the input pipeline after the message enters from the source port is indicated, and whether the message is discarded by a message output pipeline in the input pipeline after the message enters from the source port is indicated.
2. The method of claim 1,
the switching device is a first hop device in the network, and the processing action indication information of the source port indicates the source port to forward the detection message according to a preset input/output pipeline for forwarding the message.
3. The method of any of claims 1-2, further comprising:
and the switching chip sends a PacketIN response message to the CPU.
4. The method of claim 1,
the step of sending, by the switch chip, the packet not including the first encapsulated packet header to the loopback interface according to the loopback interface number in the first encapsulated packet header specifically includes:
and the switching chip sends the message which does not contain the first encapsulation message header to a loopback port through a message cache management unit according to the loopback port number in the first encapsulation message header.
5. A switching device for processing messages, comprising:
the switching chip is used for receiving a message sent by a CPU in the switching equipment, wherein the message comprises a first encapsulated message header and a second encapsulated message header, the first encapsulated message header at least comprises a loop port number, and the second encapsulated message header at least comprises a source port number and processing action indication information of the source port;
the switch chip is further configured to send the packet not including the first encapsulated packet header to a loopback port according to a loopback port number in the first encapsulated packet header;
the loopback port is configured to send to the source port according to a source port number in the second encapsulated packet header, and instruct the source port to process the packet that does not include the first encapsulated packet header and the second encapsulated packet header according to processing action instruction information of the source port;
the message is a detection message, and the processing action indication information of the source port is any one of the following: whether address learning is needed by an input pipeline after a message enters from a source port is indicated, whether domain processing FP rule matching is needed by the input pipeline after the message enters from the source port is indicated, whether the message is discarded by a message cache management unit in the input pipeline after the message enters from the source port is indicated, and whether the message is discarded by a message output pipeline in the input pipeline after the message enters from the source port is indicated.
6. The switching device of claim 5,
the switching device is a first hop device in the network, and the processing action indication information of the source port indicates the source port to forward the detection message according to a preset input/output pipeline for forwarding the message.
7. Switching device according to any of the claims 5-6,
and the switching chip is also used for sending a Packet IN response message to the CPU.
8. The switching device of claim 5,
the switch chip is further specifically configured to:
and the switching chip sends the message which does not contain the first encapsulation message header to a loopback port through a message cache management unit according to the loopback port number in the first encapsulation message header.
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