CN112532033B - Inverter with anti-surge suppression function - Google Patents
Inverter with anti-surge suppression function Download PDFInfo
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- CN112532033B CN112532033B CN202011355491.3A CN202011355491A CN112532033B CN 112532033 B CN112532033 B CN 112532033B CN 202011355491 A CN202011355491 A CN 202011355491A CN 112532033 B CN112532033 B CN 112532033B
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- circuit module
- resistor
- module
- chip
- inverter
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J2207/20—Charging or discharging characterised by the power electronics converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention provides an inverter with anti-surge suppression, which comprises a power input module, an input EMC module, a power switch circuit module, a transformer, an inverter bridge circuit module, an output EMC module, an output sampling circuit, an inverter control circuit module, a photoelectric coupler and a PWM control circuit module which are sequentially connected, wherein the power input module is connected with the PWM control circuit module through the input sampling circuit module, the output EMC module is respectively connected with an alternating current load and the output sampling circuit, the PWM control circuit module is connected with the power switch circuit module, the inverter control circuit module is connected with the inverter bridge circuit module, and the input sampling circuit module comprises an input voltage sampling circuit, an input current sampling circuit and an anti-surge suppression circuit. The inverter can not generate sparks at the joint when being connected with a storage battery, and the service life of the connecting wire and the product is long.
Description
Technical Field
The invention relates to an inverter, in particular to an inverter with anti-surge suppression function.
Background
The traditional inverter is directly connected with a main power circuit after being connected with a battery, a large spark can be generated when a battery clamp is connected with the battery, if inflammable substances are around the battery, a fire disaster is easily caused, serious potential safety hazards exist, in addition, a connecting wire is easily damaged when being electrified frequently, and surge current impacts to easily cause accelerated damage of internal elements, so that the service life of a product is also shortened.
Disclosure of Invention
The invention aims to solve the technical problem of providing an inverter with anti-surge suppression, wherein sparks are not generated at a connection part when a storage battery is connected, and the service lives of a connecting line and a product are prolonged.
The invention is realized by the following steps: an inverter with surge suppression comprises a power input module, an input EMC module, a power switch circuit module, a transformer, an inverter bridge circuit module, an output EMC module, an input sampling circuit module, a PWM control circuit module, a photoelectric coupler, an inverter control circuit module and an output sampling circuit module, wherein the power input module is connected with the power switch circuit module through the input EMC module, the input sampling circuit module is respectively connected with the power input module and the PWM control circuit module, the PWM control circuit module is connected with the power switch circuit module, the power switch circuit module is connected with the inverter bridge circuit module through the transformer, the inverter bridge circuit module is connected with an alternating current load through the output EMC module, the output sampling circuit module is respectively connected with the output EMC module and the inverter control circuit module, the inverter control circuit module is connected with the inverter bridge circuit module, the inverter control circuit module is connected with the PWM control circuit module through a photoelectric coupler, and the input sampling circuit module comprises an input voltage sampling circuit, an input current sampling circuit and an anti-surge suppression circuit.
Further, the anti-surge suppression circuit includes a resistor R2, a resistor R3, a resistor R5, a resistor R6, a resistor R7, a resistor R9, a capacitor C1, a diode D1, a MOS transistor Q1, a chip U1 1 and a chip U1, wherein one end of the resistor R1 is connected to a source of the MOS transistor Q1 and a positive electrode and a negative electrode of a power supply, the other end of the resistor R1, a drain of the MOS transistor Q1 and one end of the capacitor C1 are all grounded, the other end of the capacitor C1 and a 1 st pin of the chip U1 are connected to a positive electrode of the power supply, a 2 nd pin of the chip U1 is connected to a positive electrode of the diode D1, a negative electrode of the diode D1 is connected to a negative electrode of the power supply, a 3 rd pin of the chip U1 is connected to one end of the capacitor C1 and a negative electrode of the capacitor C1 are connected to the power supply, one end of the resistor R6 is connected with the gate of the MOS transistor Q1, the other end of the resistor R6 is respectively connected with the anode of the diode D2, the anode of the diode D3 and the 1 st pin of the chip U1A, the cathode of the diode D2 is connected with the PWM control circuit module, the 3 rd pin of the chip U1A is respectively connected with the cathode of the diode D3, one end of the resistor R9 and one end of the resistor R5, the other end of the resistor R9 is connected with the positive electrode of the power supply, the other end of the resistor R5 is grounded, the 2 nd pin of the chip U1A is respectively connected with one end of the resistor R3 and one end of the resistor R7, the other end of the resistor R3 is connected with the negative pole of a power supply, the other end of the resistor R7 is connected with the 3 rd pin of the chip U2, the 4 th pin of the chip U1A is connected with the negative pole of the power supply, the 8 th pin of the chip U1A is connected with one end of the capacitor C2, and the other end of the capacitor C2 is connected with the negative pole of the power supply.
Further, the chip U1A is LM 358.
Further, the model of the chip U2 is LM 7805.
Further, a 12V battery is adopted as a power supply of the power supply input module.
Further, the resistance value of the R2 is 100 ohm, and the power is 5W.
The invention has the advantages that:
1. the high-power resistor is used for surge suppression, so that very small current can be used for charging the internal filter capacitor;
2. the MOS tube and the PWM control circuit are opened by detecting the rising voltage of the capacitor through the operational amplifier, so that the circuit can be prevented from being opened to work when the capacitor is not fully filled, and the surge suppression effect is achieved;
3. by using the MOS tube to short-circuit the surge resistor, the efficiency and the service life of the product are improved.
Drawings
The invention will be further described with reference to the following examples and figures.
Fig. 1 is a schematic diagram of an inverter with surge suppression protection according to the present invention.
Fig. 2 is a circuit diagram of an anti-surge suppression circuit in an inverter with anti-surge suppression according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the structure of the present invention is not limited to the examples.
Referring to fig. 1 to 2, an inverter with anti-surge suppression of the present invention includes a power input module, an input EMC module, a power switch circuit module, a transformer, an inverter bridge circuit module, an output EMC module, an input sampling circuit module, a PWM control circuit module, a photocoupler, an inverter control circuit module and an output sampling circuit module, wherein the power input module is connected to the power switch circuit module through the input EMC module, the input sampling circuit module is respectively connected to the power input module and the PWM control circuit module, the PWM control circuit module is connected to the power switch circuit module, the power switch circuit module is connected to the inverter bridge circuit module through the transformer, the inverter bridge circuit module is connected to an ac load through the output EMC module, and the output sampling circuit module is respectively connected to the output EMC module and the inverter control circuit module (i.e. MCU), the inverter control circuit module is connected with the inverter bridge circuit module, the inverter control circuit module is connected with the PWM control circuit module through a photoelectric coupler, and the input sampling circuit module comprises an input voltage sampling circuit, an input current sampling circuit and an anti-surge suppression circuit.
Preferably, the anti-surge suppression circuit includes a resistor R2, a resistor R3, a resistor R5, a resistor R6, a resistor R7, a resistor R9, a capacitor C1, a capacitor D1, a diode D1, a MOS transistor Q1, a chip U1 1 and a chip U1, one end of the resistor R1 is connected to the source of the MOS transistor Q1 and the positive and negative poles of a power supply, the other end of the resistor R1, the drain of the MOS transistor Q1 and one end of the capacitor C1 are all grounded, the other end of the capacitor C1 and a 1 st pin of the chip U1 are connected to the positive pole of the power supply, a 2 nd pin of the chip U1 is connected to the positive pole of the diode D1, a negative pole of the diode D1 is connected to the negative pole of the power supply, a 3 rd pin of the chip U1 is connected to one end of the capacitor C1 and the negative pole of the capacitor C1 are connected to the negative pole of the power supply, one end of the resistor R6 is connected with the gate of the MOS transistor Q1, the other end of the resistor R6 is respectively connected with the anode of the diode D2, the anode of the diode D3 and the 1 st pin of the chip U1A, the cathode of the diode D2 is connected with the PWM control circuit module, the 3 rd pin of the chip U1A is respectively connected with the cathode of the diode D3, one end of the resistor R9 and one end of the resistor R5, the other end of the resistor R9 is connected with the anode of the power supply, the other end of the resistor R5 is grounded, the 2 nd pin of the chip U1A is respectively connected with one end of the resistor R3 and one end of the resistor R7, the other end of the resistor R3 is connected with the negative pole of a power supply, the other end of the resistor R7 is connected with the 3 rd pin of the chip U2, the 4 th pin of the chip U1A is connected with the negative pole of the power supply, the 8 th pin of the chip U1A is connected with one end of the capacitor C2, and the other end of the capacitor C2 is connected with the negative pole of the power supply.
Preferably, the chip U1A has model LM358, and LM358 is a dual operational amplifier, and the other amplifier can be used for other purposes.
Preferably, the model of the chip U2 is LM7805, namely a three-terminal regulator.
In a preferred embodiment, the power supply of the power input module adopts a 12V battery, the resistance value of the R2 is 100 ohms, and the power is 5W.
In the embodiment, the battery is designed according to a 12V battery, and in practical application, the resistance of the R2R5R9 is adjusted according to the voltage of the battery.
The inverter of the invention works according to the following principle:
the power input module is connected to the power switch circuit module through input EMC circuit module, input sampling circuit conveys the input signal of telecommunication of sample to PWM control circuit module, PWM control circuit module output PWM to the power switch circuit module, produce the alternating current behind the contravariant bridge module circuit after stepping up through the transformer, be connected to alternating current load through output EMC circuit, output sampling circuit samples to the contravariant control circuit module, adjust the work of contravariant bridge circuit module through the contravariant control circuit module, the contravariant control circuit module transmits preceding stage PWM control circuit module through photoelectric coupler simultaneously, adjust preceding stage PWM waveform.
The working principle of the anti-surge suppression circuit is as follows:
a power supply circuit: the battery voltage B + is filtered through a capacitor C1 and is stabilized to +5V through a chip U2 and a diode D1 to supply power to the chip U1A and the chip U2, and the capacitor C4 and the capacitor C5 are filtered by + 5V;
when the battery input is electrified, the positive electrode of a voltage C1 is charged to the negative electrode of the battery through a resistor R2, when the positive electrode B + of the battery is divided through a resistor R9 and a resistor R5 and sent to a 3 rd pin of a chip U1A, a 2 nd pin of the chip U1A is divided by +5V through a resistor R7 and a resistor R3 to generate a reference voltage, the voltage of the 3 rd pin of the chip U1A is higher than the reference voltage of the 2 nd pin, the 1 st pin of the chip U1A is high-potential and sent to a 3 rd pin through a diode D3 to achieve the high-potential locking, the voltage is sent to a MOS transistor Q1 through a resistor R6 to enable the MOS transistor Q1 to be conducted, at the moment, the MOS transistor Q1 short-circuits the resistor R2, the MOS transistor Q1 supplies power to a main circuit, meanwhile, the 1 st pin of the chip U1A sends a network signal BF to a PWM control circuit through a diode D2, and the PWM circuit is started after the BF signal is detected by the PWM control circuit, and the PWM circuit is started to work normally.
The invention adopts the high-power resistor to suppress the surge, so that very small current can be used for charging the internal filter capacitor, and the resistance value of the specific resistor is adjusted according to the voltage of the battery; the MOS tube and the PWM control circuit are opened by detecting the rising voltage of the capacitor through the operational amplifier, so that the circuit can be prevented from being opened to work when the capacitor is not fully filled, and the surge suppression effect is achieved; through coming the short circuit surge resistance with the MOS pipe, make product efficiency and life-span improve, solve traditional surge simultaneously and resist and adopt the relay to come the short circuit surge resistance, contact resistance is big, the short-lived problem.
It should be noted that the surge suppression circuit in the present invention can be applied to various designs related to surge suppression circuits.
Although specific embodiments of the invention have been described above, it will be understood by those skilled in the art that the specific embodiments described are illustrative only and are not limiting upon the scope of the invention, and that equivalent modifications and variations can be made by those skilled in the art without departing from the spirit of the invention, which is to be limited only by the appended claims.
Claims (3)
1. An inverter with anti-surge suppression is characterized in that: the power input module is connected with the power switch circuit module through the input EMC module, the input sampling circuit module is respectively connected with the power input module and the PWM control circuit module, the PWM control circuit module is connected with the power switch circuit module, the power switch circuit module is connected with the inverter bridge circuit module through the transformer, the inverter bridge circuit module is connected with an alternating current load through the output EMC module, the output sampling circuit module is respectively connected with the output EMC module and the inverter control circuit module, and the inverter control circuit module is connected with the inverter bridge circuit module, the inverter control circuit module is connected with the PWM control circuit module through a photoelectric coupler, and the input sampling circuit module comprises an input voltage sampling circuit, an input current sampling circuit and an anti-surge suppression circuit;
the anti-surge suppression circuit comprises a resistor R2, a capacitor C2, a diode D2, a MOS tube Q2, a chip U1 2 and the chip U2, wherein the model of the chip U1 2 is LM358, the model of the chip U2 is LM7805, one end of the resistor R2 is respectively connected with the source and the negative electrode of a power supply of the MOS tube Q2, the other end of the resistor R2, the drain of the MOS tube Q2 and one end of the capacitor C2 are all grounded, the other end of the capacitor C2 and the 1 st pin of the chip U2 are respectively connected with the positive electrode of the power supply, the 2 nd pin of the chip U2 is connected with the positive electrode of the diode D2, the negative electrode of the diode D2 is connected with the negative electrode of the power supply, the first pin of the chip U2 and the other end of the capacitor C2 are respectively connected with the negative electrode of the capacitor C2, one end of the resistor R6 is connected with the gate of the MOS transistor Q1, the other end of the resistor R6 is respectively connected with the anode of the diode D2, the anode of the diode D3 and the 1 st pin of the chip U1A, the cathode of the diode D2 is connected with the PWM control circuit module, the 3 rd pin of the chip U1A is respectively connected with the cathode of the diode D3, one end of the resistor R9 and one end of the resistor R5, the other end of the resistor R9 is connected with the positive electrode of the power supply, the other end of the resistor R5 is grounded, the 2 nd pin of the chip U1A is respectively connected with one end of the resistor R3 and one end of the resistor R7, the other end of the resistor R3 is connected with the negative pole of a power supply, the other end of the resistor R7 is connected with the 3 rd pin of the chip U2, the 4 th pin of the chip U1A is connected with the negative pole of the power supply, the 8 th pin of the chip U1A is connected with one end of the capacitor C2, and the other end of the capacitor C2 is connected with the negative pole of the power supply.
2. The inverter with surge suppression protection as claimed in claim 1, wherein: the power supply of the power supply input module adopts a 12V battery.
3. The inverter with surge suppression protection as claimed in claim 2, wherein: the resistance value of the resistor R2 is 100 ohms, and the power is 5W.
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6151225A (en) * | 1997-12-31 | 2000-11-21 | Samsung Electronics, Co., Ltd. | Switching mode power supply |
CN203734517U (en) * | 2013-12-04 | 2014-07-23 | 山东兆宇电子技术有限公司 | Integrated composite power supply system |
US20150077892A1 (en) * | 2013-09-18 | 2015-03-19 | Hon Hai Precision Industry Co., Ltd. | Protection circuit and related method |
CN204258636U (en) * | 2014-09-03 | 2015-04-08 | 石家庄极能科技有限公司 | A kind of small-sized DC inputs ultralow ripple switch power supply |
CN105471242A (en) * | 2016-01-07 | 2016-04-06 | 广东工业大学 | Novel power-on surge current suppression circuit |
CN206077034U (en) * | 2016-08-31 | 2017-04-05 | 江西华兴信息产业有限公司 | A kind of electronic stop plate charged integrated power-supply system |
-
2020
- 2020-11-27 CN CN202011355491.3A patent/CN112532033B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6151225A (en) * | 1997-12-31 | 2000-11-21 | Samsung Electronics, Co., Ltd. | Switching mode power supply |
US20150077892A1 (en) * | 2013-09-18 | 2015-03-19 | Hon Hai Precision Industry Co., Ltd. | Protection circuit and related method |
CN203734517U (en) * | 2013-12-04 | 2014-07-23 | 山东兆宇电子技术有限公司 | Integrated composite power supply system |
CN204258636U (en) * | 2014-09-03 | 2015-04-08 | 石家庄极能科技有限公司 | A kind of small-sized DC inputs ultralow ripple switch power supply |
CN105471242A (en) * | 2016-01-07 | 2016-04-06 | 广东工业大学 | Novel power-on surge current suppression circuit |
CN206077034U (en) * | 2016-08-31 | 2017-04-05 | 江西华兴信息产业有限公司 | A kind of electronic stop plate charged integrated power-supply system |
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Denomination of invention: An inverter with anti surge suppression Effective date of registration: 20230428 Granted publication date: 20220913 Pledgee: Agricultural Bank of China Co.,Ltd. Yingtan Yujiang Sub branch Pledgor: JIANGXI BAIYING HIGH-TECH CO.,LTD. Registration number: Y2023980039648 |