CN112527718B - Control method and device of multi-way selection switch, electronic equipment and storage medium - Google Patents
Control method and device of multi-way selection switch, electronic equipment and storage medium Download PDFInfo
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- CN112527718B CN112527718B CN202011578380.9A CN202011578380A CN112527718B CN 112527718 B CN112527718 B CN 112527718B CN 202011578380 A CN202011578380 A CN 202011578380A CN 112527718 B CN112527718 B CN 112527718B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application discloses a control method and device of a multi-way selector switch, electronic equipment and a storage medium. The method is used for solving the problem that the communication address of the I2C and SMBUS multi-way selection switch conflicts with the communication address of one I2C and SMBUS device connected below the multi-way selection switch. In the embodiment of the application, when the I2C and SMBUS multi-way selection switches conflict with the addresses of the lower hanging slave devices, the conflicts can be avoided by configuring the configurable addresses of the I2C and SMBUS multi-way selection switches.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for controlling a multi-way selector switch, an electronic device, and a storage medium.
Background
In the related art, according to the protocol specification of a synchronous serial Bus (I2C) and a System Management Bus (SMBUS), each I2C and SMBUS slave device connected to the same group of I2C and SMBUS buses must have a unique communication address, address bits of the device have 7 bits (bit), but at present, the I2C and SMBUS multi-way selection switch on the market often has only the last 2-3 bits for a user to configure, and the first several bits of address bits are fixedly set before leaving the factory, so that at most, 4 or 8 slave devices can be connected to the I2C and SMBUS multi-way selection switch of the same address type on the same group of I2C and SMBUS buses.
When 8I 2C and SMBUS devices with the same address type as the I2C and SMBUS multi-way selection switches are hung under the I2C and SMBUS multi-way selection switches, the communication addresses of the I2C and SMBUS multi-way selection switches conflict with the communication address of one I2C and SMBUS device connected below the I2C and SMBUS multi-way selection switches. In the related art, a hardware engineer can expand the number of I2C and SMBUS buses and replace the I2C and SMBUS multi-way selection switches with other address types to solve the problems. Therefore, not only the development difficulty and complexity of the hardware circuit are increased, but also the cost of the product is increased.
Disclosure of Invention
The application aims to provide a control method and device of a multi-way selector switch, electronic equipment and a storage medium, and is used for solving the problem that the development difficulty of a hardware circuit is increased and the cost is high when geological conflict occurs in the multi-way selector switch.
In a first aspect, an embodiment of the present application provides a method for controlling a multi-way selector switch, including:
acquiring an address configuration instruction, wherein the address configuration instruction carries a user-defined address;
setting the configurable address of a multiplexer switch to the custom address in response to the address configuration indication; the multi-path selection switch is a multi-path selection switch of a synchronous serial bus and a system management bus;
and controlling the multi-way selection switch based on the self-defined address.
In one embodiment, said setting said configurable address of the multiplexer to said custom address comprises:
reading address information of the configurable address of the multiplexer;
and if the address information of the configurable address is a preset initial address, resolving the self-defined address from the acquired first data, and setting the configurable address as the self-defined address.
In one embodiment, after the setting the configurable address of the multiplexer switch to the custom address, the method further comprises:
and in response to a channel switching instruction for the multi-way selection switch, controlling the multi-way selection switch to a channel required by the channel switching instruction.
In one embodiment, before controlling the multi-way selection switch to the channel required by the channel switching indication in response to the channel switching indication for the multi-way selection switch, the method further comprises:
determining that the custom address of the multi-way selector switch is in effect.
In one embodiment, after said determining that said custom address for said multi-way selector switch has been validated, said method further comprises:
obtaining the channel switch indication according to the following method:
and analyzing the channel switching indication from the acquired second data after the address configuration indication is acquired.
In one embodiment, the method further comprises:
and if the multi-way selection switch is not switched to the channel required by the channel switching indication within a first specified time length, determining that the configurable address of the multi-way selection switch is not successfully set as the self-defined address.
In one embodiment, before the setting the address of the multiplexer to the custom address, the method further comprises:
setting the multiplexer switch to an address configurable state in response to a state switch indication.
In a second aspect, the present application also provides a control apparatus for a multi-way selector switch, the apparatus comprising:
the configuration instruction acquisition module is used for acquiring an address configuration instruction, and the address configuration instruction carries a user-defined address;
an address configuration module for setting the configurable address of a multiplexer switch to the custom address in response to the address configuration indication; the multi-path selection switch is a multi-path selection switch of a synchronous serial bus and a system management bus;
and the control module is used for controlling the multi-way selection switch based on the self-defined address.
In one embodiment, the address configuration module includes:
the address information reading unit is used for reading the address information of the configurable address of the multi-way selection switch;
and the address analysis unit is used for analyzing the user-defined address from the acquired first data and setting the configurable address as the user-defined address if the address information of the configurable address is a preset initial address.
In one embodiment, the apparatus further comprises:
and the channel switching module is used for responding to a channel switching instruction aiming at the multi-way selector switch after the configurable address of the multi-way selector switch is set as the self-defined address, and controlling the multi-way selector switch to be switched to a channel required by the channel switching instruction.
In one embodiment, the apparatus further comprises:
and the address confirmation module is used for responding to the channel switching indication aiming at the multi-way selection switch, and determining that the self-defined address of the multi-way selection switch is effective before the multi-way selection switch is controlled to be switched to the channel required by the channel switching indication.
In one embodiment, the apparatus further comprises:
a switching module, configured to obtain the channel switching indication according to the following method after determining that the custom address of the multi-way selector switch has come into effect:
reading the self-defined address of the multi-way selection switch;
and if the custom address is the custom address analyzed from the first data, analyzing the channel switching indication from the acquired second data.
In one embodiment, the apparatus further comprises:
the address configuration failure confirming module is used for determining that the address configuration of the multi-path selection switch fails if the multi-path selection switch is not switched to a channel required by the channel switching indication within the first preset time;
and the channel switching failure confirmation module is used for determining that the channel switching failure of the multi-channel selection switch is caused if the channel switching failure confirmation module does not switch the multi-channel selection switch to the channel required by the channel switching indication within the second preset time.
In one embodiment, the apparatus further comprises:
and the state setting module is used for setting the multi-way selector switch to be in an address configurable state in response to a state switching indication before setting the address of the multi-way selector switch to be the self-defined address.
In a third aspect, another embodiment of the present application further provides an electronic device, including at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method for extracting video subtitles provided by the embodiment of the application.
In a fourth aspect, another embodiment of the present application further provides a computer storage medium, where the computer storage medium stores a computer program, and the computer program is used to enable a computer to execute the method for extracting video subtitles in the embodiments of the present application.
According to the control method of the multi-way selector switch, the problem that the communication addresses of the multi-way selector switch and the lower hanging device conflict is solved by configuring the address of the multi-way selector switch; the difficulty of hardware development is reduced, and the cost is saved.
Additional features and advantages of the present application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the present application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a diagram of an apparatus of a multi-way selector switch provided in an embodiment of the present application;
fig. 2 is a flowchart of a multi-way selector switch provided in an embodiment of the present application;
fig. 3 is a flowchart of address configuration of a multi-way selector switch according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of an apparatus of a multi-way selector switch provided in an embodiment of the present application;
fig. 5 is a schematic diagram of an electronic device of a multi-way selector switch according to an embodiment of the present disclosure.
Detailed Description
In order to make the technical solutions of the present application better understood by those of ordinary skill in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.
It should be noted that the terms "first," "second," and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein. The implementations described in the following exemplary examples do not represent all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the application, as detailed in the appended claims.
According to the protocol specification of I2C and SMBUS, each I2C and SMBUS slave device connected with the same group of I2C and SMBUS buses must have a unique communication address, the address bits of the devices have 7 bits in total, however, the address bits which can be configured by a user of the I2C and SMBUS multi-path selection switch on the market at present are only the last 2-3 bits, and the first bit address bits are fixedly set before leaving a factory, so that the I2C and SMBUS multi-path selection switch with the same address type on the same group of I2C and SMBUS buses can only be connected with 4 or 8 slave devices at most.
The inventor researches and discovers that when 8I 2C and SMBUS devices of the same address type as the I2C and SMBUS multi-way selection switches are connected to the I2C and SMBUS multi-way selection switches, the communication addresses of the I2C and SMBUS multi-way selection switches conflict with the communication address of one I2C and SMBUS device connected to the I2C and SMBUS multi-way selection switches. In the related art, hardware engineers can expand the number of I2C and SMBUS buses and replace I2C and SMBUS multi-way selection switches with other address types to solve the problems. However, this method may result in increased difficulty and complexity in developing hardware circuits, and also increases the cost of the product.
In view of the above, the present application provides a method and an apparatus for controlling a multi-way selector switch, an electronic device, and a storage medium, which are used to solve the above problems. The inventive concept of the present application can be summarized as follows: when conflicts with I2C and SMBUS multiple selection switches and the addresses of the slave devices hanging down, the conflicts can be avoided by configuring the configurable addresses of the I2C and SMBUS multiple selection switches.
For easy understanding, the structure of the I2C and SMBUS multi-way selection switch proposed in the embodiment of the present application is first described, as shown in fig. 1, where fig. 1 includes: an I2C master 201, an I2C bus controller 202, wherein: an I2C address 203 is set in the I2C bus controller 202, and the I2C address includes a default address 204 and a configurable address 205.
The last three bits of the initial communication address of the I2C and SMBUS multi-way selection switch are still determined by hardware pins, the address is the default initial communication address of the I2C and SMBUS multi-way selection switch, and the default initial communication address is stored in the default address 204 when the switch is powered on; if a new communication address does not need to be configured for the I2C and SMBUS multi-path selection switch, after the switch is electrified and starts to work, the I2C main control 201 uses the default address 204 to carry out communication reading and writing and switch control on the I2C and SMBUS switches.
In the embodiment of the application, when the communication address reconfiguration needs to be performed on the I2C and SMBUS multi-way selector switches, after the switches are powered on, in response to a state switching instruction, the multi-way selector switches are set to the address configurable state, that is, the address of the multi-way selector switch is switched from the default address 204 to the configurable address 205. The I2C main control 201 uses the address configuration instruction to configure the communication address of the I2C and SMBUS multi-path selection switch; wherein the address configuration indication is issued by those skilled in the art when there is an address configuration requirement. As shown in fig. 2, an overall flow of a control method of a multi-way selector switch provided in the embodiment of the present application is as follows:
in step 201: acquiring an address configuration instruction, wherein the address configuration instruction carries a user-defined address;
in step 202: setting a configurable address of the multiplexer switch to a custom address in response to an address configuration indication;
in step 203: and controlling the multi-way selection switch based on the self-defined address.
In the embodiment of the present application, when the configurable address of the multi-way selector switch is set as the custom address, the steps shown in fig. 3 may be implemented as follows:
in step 301: reading address information of a configurable address of a multi-way selection switch;
in the embodiment of the application, the address information in the configurable address is a default value, that is, a preset initial address, before the custom address is not set, and since the transmission mode of the I2C protocol is to transmit the address of 1 pen first and then transmit data, where 8 bits of data are in 1 pen. Thus in step 302: if the address information of the configurable address is a preset initial address, a user-defined address is analyzed from the acquired first data, and the configurable address is set as the user-defined address.
An address is transmitted first, and data is transmitted after address configuration is successful, so that the problem of resource waste caused by data transmission under the condition of invalid address is effectively solved.
In one embodiment, after the configurable address of the multi-way selector switch is switched to the custom address, whether the custom address of the multi-way selector switch is effective needs to be detected; since the first data carries the data of the self-defined address, and the upper device and the lower device of the multi-path selection switch can communicate after the switch is successfully switched, the channel switching indication is stored in the second data. Since there are multiple under-hung devices of the multi-way selector switch, in order to determine the under-hung device to be turned on, the channel switching instruction needs to be analyzed from the acquired second data. And controlling the multi-way selector switch to the channel required by the channel switching instruction according to the channel switching instruction aiming at the multi-way selector switch.
In the embodiment of the present application, in order to determine the reason when the switch is not successfully switched to the designated channel, two designated times are set: and if the multi-path selection switch is not switched to the channel required by the channel switching indication within the first specified time length, determining that the configurable address of the multi-path selection switch is not successfully set as the self-defined address. And if the multi-path selection switch is not switched to the channel required by the channel switching indication within the second specified time length, determining that the configurable address of the multi-path selection switch is successfully set as the self-defined address, but the channel indication acquisition fails. The specified time lengths of the two points can be determined empirically by those skilled in the art.
In one embodiment, in the process of powering on the switch, if the configurable address needs to be changed, the nth data is acquired, the changed custom address is analyzed in the data, and the configurable address is set as the changed custom address. If the channel needs to be changed, the channel switching instruction is analyzed from the obtained mth data, and the multi-path selection switch is switched to the channel required by the channel switching instruction according to the channel switching instruction. In the implementation, n and m are determined according to the specific number of data strokes in switching.
As shown in fig. 4, based on the same inventive concept, a control apparatus 400 of a multi-way selector switch is provided, which includes:
a configuration indication obtaining module 4001, configured to obtain an address configuration indication, where the address configuration indication carries a custom address;
an address configuration module 4002 configured to set the configurable address of a multiplexer switch to the custom address in response to the address configuration indication; the multi-path selection switch is a multi-path selection switch of a synchronous serial bus and a system management bus;
and the control module 4003 is used for controlling the multi-way selection switch based on the self-defined address.
In one embodiment, the address configuration module includes:
the address information reading unit is used for reading the address information of the configurable address of the multi-way selection switch;
and the address analysis unit is used for analyzing the self-defined address from the acquired first data and setting the configurable address as the self-defined address if the address information of the configurable address is a preset initial address.
In one embodiment, the apparatus further comprises:
and the channel switching module is used for responding to a channel switching instruction aiming at the multi-way selector switch after the configurable address of the multi-way selector switch is set as the self-defined address, and controlling the multi-way selector switch to be switched to a channel required by the channel switching instruction.
In one embodiment, the apparatus further comprises:
and the address confirmation module is used for responding to the channel switching instruction aiming at the multi-way selection switch, and determining that the self-defined address of the multi-way selection switch is effective before the multi-way selection switch is controlled to be switched to the channel required by the channel switching instruction.
In one embodiment, the apparatus further comprises:
a switching module, configured to obtain the channel switching indication according to the following method after determining that the custom address of the multi-way selector switch has come into effect:
reading the self-defined address of the multi-way selector switch;
and if the custom address is the custom address analyzed from the first data, analyzing the channel switching indication from the acquired second data.
In one embodiment, the apparatus further comprises:
the address configuration failure confirming module is used for determining that the address configuration of the multi-path selection switch fails if the multi-path selection switch is not switched to a channel required by the channel switching indication within the first preset time;
and the channel switching failure confirmation module is used for determining that the channel switching failure of the multi-channel selection switch is caused if the channel switching failure confirmation module does not switch the multi-channel selection switch to the channel required by the channel switching indication within the second preset time.
In one embodiment, the apparatus further comprises:
and the state setting module is used for setting the multi-way selector switch to be in an address configurable state in response to a state switching indication before setting the address of the multi-way selector switch to be the self-defined address.
Having described the method and apparatus for controlling a multiswitch according to an exemplary embodiment of the present application, an electronic device according to another exemplary embodiment of the present application will be described next.
As will be appreciated by one skilled in the art, aspects of the present application may be embodied as a system, method or program product. Accordingly, various aspects of the present application may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.
In some possible embodiments, an electronic device according to the present application may include at least one processor, and at least one memory. Wherein the memory stores program code which, when executed by the processor, causes the processor to perform the steps of the method of controlling a multiswitch according to various exemplary embodiments of the present application described above in the present specification.
The electronic device 130 according to this embodiment of the present application is described below with reference to fig. 5. The electronic device 130 shown in fig. 5 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.
As shown in fig. 5, the electronic device 130 is represented in the form of a general electronic device. The components of the electronic device 130 may include, but are not limited to: the at least one processor 131, the at least one memory 132, and a bus 133 that connects the various system components (including the memory 132 and the processor 131).
The memory 132 may include readable media in the form of volatile memory, such as Random Access Memory (RAM) 1321 and/or cache memory 1322, and may further include Read Only Memory (ROM) 1323.
The electronic device 130 may also communicate with one or more external devices 134 (e.g., keyboard, pointing device, etc.), with one or more devices that enable a user to interact with the electronic device 130, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 130 to communicate with one or more other electronic devices. Such communication may occur via input/output (I/O) interfaces 135. Also, the electronic device 130 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via the network adapter 136. As shown, network adapter 136 communicates with other modules for electronic device 130 over bus 133. It should be understood that although not shown in the figures, other hardware and/or software modules may be used in conjunction with electronic device 130, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.
In some possible embodiments, the aspects of a control method of a multi-way selector switch provided by the present application may also be implemented in the form of a program product comprising program code means for causing a computer device to carry out the steps of a control method of a multi-way selector switch according to various exemplary embodiments of the present application described above in this specification, when the program product is run on a computer device.
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The program product for control of the multi-way selector switch of the embodiments of the present application may employ a portable compact disk read only memory (CD-ROM) and include program code, and may be run on an electronic device. However, the program product of the present application is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the consumer electronic device, partly on the consumer electronic device, as a stand-alone software package, partly on the consumer electronic device and partly on a remote electronic device, or entirely on the remote electronic device or server. In the case of remote electronic devices, the remote electronic devices may be connected to the consumer electronic device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to external electronic devices (e.g., through the internet using an internet service provider).
It should be noted that although in the above detailed description several units or sub-units of the apparatus are mentioned, such a division is merely exemplary and not mandatory. Indeed, the features and functions of two or more of the units described above may be embodied in one unit, according to embodiments of the application. Conversely, the features and functions of one unit described above may be further divided into embodiments by a plurality of units.
Further, while the operations of the methods of the present application are depicted in the drawings in a particular order, this does not require or imply that these operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (6)
1. A method of controlling a multiplexing switch, the multiplexing switch including a default address and a configurable address, the method comprising:
acquiring an address configuration instruction, wherein the address configuration instruction carries a user-defined address;
setting the configurable address of a multiplexer switch to the custom address in response to the address configuration indication; the multi-path selection switch is a multi-path selection switch of a synchronous serial bus and a system management bus; the setting the configurable address of the multiplexer to the custom address comprises: reading address information of the configurable address of the multiplexer; if the address information of the configurable address is a preset initial address, the user-defined address is analyzed from the acquired first data, and the configurable address is set as the user-defined address;
in response to a channel switching instruction for the multi-way selection switch, controlling the multi-way selection switch to a channel required by the channel switching instruction;
and controlling the multi-way selection switch based on the self-defined address.
2. The method of claim 1, wherein before controlling the multi-way switch to the channel required by the channel switching indication in response to the channel switching indication for the multi-way switch, the method further comprises:
determining that the custom address of the multi-way selector switch is in effect.
3. The method of claim 2, wherein after determining that the custom address of the mux switch has been validated, the method further comprises:
obtaining the channel switch indication according to the following method:
and analyzing the channel switching indication from the acquired second data after the address configuration indication is acquired.
4. The method according to any one of claims 1-3, further comprising:
and if the multi-path selection switch is not switched to the channel required by the channel switching indication within a first specified time length, determining that the configurable address of the multi-path selection switch is not successfully set as the self-defined address.
5. The method of claim 1, wherein prior to setting the address of the multiplexer to the custom address, the method further comprises:
setting the multiplexer switch to an address configurable state in response to a state switch indication.
6. An address configuration apparatus for a switch, wherein a multiplexing switch includes a default address and a configurable address, the apparatus comprising:
the configuration instruction acquisition module is used for acquiring an address configuration instruction, and the address configuration instruction carries a user-defined address;
an address configuration module for setting the configurable address of the multi-way selector switch to the custom address in response to the address configuration indication; the multi-path selection switch is a multi-path selection switch of a synchronous serial bus and a system management bus;
wherein, the address configuration module comprises: the address information reading unit is used for reading the address information of the configurable address of the multi-way selection switch; the address analysis unit is used for analyzing the self-defined address from the acquired first data and setting the configurable address as the self-defined address if the address information of the configurable address is a preset initial address;
the channel switching module is used for responding to a channel switching instruction aiming at the multi-way selector switch after the configurable address of the multi-way selector switch is set as the self-defined address, and controlling the multi-way selector switch to be switched to a channel required by the channel switching instruction;
and the control module is used for controlling the multi-way selection switch based on the self-defined address.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6745270B1 (en) * | 2001-01-31 | 2004-06-01 | International Business Machines Corporation | Dynamically allocating I2C addresses using self bus switching device |
| CN104115137A (en) * | 2012-01-12 | 2014-10-22 | 英特尔公司 | PCIe SMBus slave address self-selection |
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| CN103246628B (en) * | 2013-05-15 | 2016-03-16 | 杭州华三通信技术有限公司 | SMI interface managerial method and programmable logic device (PLD) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6745270B1 (en) * | 2001-01-31 | 2004-06-01 | International Business Machines Corporation | Dynamically allocating I2C addresses using self bus switching device |
| CN104115137A (en) * | 2012-01-12 | 2014-10-22 | 英特尔公司 | PCIe SMBus slave address self-selection |
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