CN112509996A - GaN device structure and preparation method - Google Patents

GaN device structure and preparation method Download PDF

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CN112509996A
CN112509996A CN202110158040.9A CN202110158040A CN112509996A CN 112509996 A CN112509996 A CN 112509996A CN 202110158040 A CN202110158040 A CN 202110158040A CN 112509996 A CN112509996 A CN 112509996A
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layer
diamond
graphene layer
graphene
gan
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CN112509996B (en
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赵绪然
陈鹏
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Zhejiang Gongshang University
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Zhejiang Gongshang University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732—Diamonds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors

Abstract

The invention provides a GaN device structure and a preparation method thereof, wherein the preparation of the GaN device comprises the following steps: providing a semiconductor substrate, forming a graphene layer, forming an etching groove in the graphene layer, growing a diamond column in the etching groove, forming a GaN functional layer with the upper surface higher than that of the diamond column on the graphene layer, and preparing a barrier layer. The semiconductor substrate and the graphene layer can be further stripped, and the graphene layer and the upper structure are transferred to a working substrate. According to the invention, the graphene layer and the diamond are effectively integrated in the GaN device, so that the problem of effective heat dissipation of the GaN device is solved, the thermal resistance of materials is reduced, the heat dissipation effect is improved, the process is simple, the substrate can be recycled, and the cost is reduced.

Description

GaN device structure and preparation method
Technical Field
The invention belongs to the technical field of GaN device preparation, and particularly relates to a GaN device structure and a preparation method thereof.
Background
The research and application of GaN materials are leading edge and hot spot of the current global semiconductor research, are novel semiconductor materials for developing microelectronic devices and optoelectronic devices, and are known as the third generation semiconductor materials following the first generation Ge, Si semiconductor materials, the second generation GaAs and InP compound semiconductor materials. The material has the properties of wide direct band gap, strong atomic bond, high thermal conductivity, good chemical stability (hardly corroded by any acid) and the like, and strong irradiation resistance, and has wide prospects in the application aspects of photoelectrons, high-temperature high-power devices and high-frequency microwave devices.
At present, if the traditional heat dissipation method is used, namely a heat sink is pasted on the back of the device (through back thinning, back gold and bonding with a metal heat sink), the heat dissipation of the device needs to pass through a GaN channel, an AlGaN buffer layer, an AlN nucleating layer, a SiC or Si substrate, the thermal resistance of corresponding materials (and the interface thermal resistance among different materials) is increased through the material of each layer, and the heat dissipation effect is poor. Considering different application scenes of the GaN device, after the GaN device on the traditional substrate is prepared, the substrate needs to be thinned or removed, and the structural material device above the substrate is transferred to other functional substrates, but the traditional method has a complex process, and the substrate etching process brings problems of cost and reliability.
Therefore, how to provide a GaN device and a manufacturing method thereof is necessary to solve the problem of effective heat dissipation of the GaN device.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention is directed to a GaN device and a method for manufacturing the same, which are used to solve the problems of the prior art that it is difficult to effectively dissipate heat of the GaN device.
To achieve the above and other related objects, the present invention provides a method for fabricating a GaN device structure, the method comprising the steps of:
providing a semiconductor substrate;
forming a graphene layer on the semiconductor substrate;
preparing a diamond column formed in a manner including: forming a plurality of etching grooves in the graphene layer, growing diamond columns in the etching grooves, and enabling the height of the diamond columns to be larger than the depth of the etching grooves; or forming a growth substrate layer on the graphene layer, and growing the diamond columns on the growth substrate layer;
epitaxially growing a GaN functional layer on the structure on which the diamond column is formed, wherein the upper surface of the GaN functional layer is higher than that of the diamond column;
preparing a barrier layer on the surface of the GaN functional layer, and preparing a source electrode, a drain electrode and a grid electrode of a device;
separating the semiconductor substrate from the structures on the graphene layer by the graphene layer;
and transferring the graphene layer and the structure formed on the graphene layer to a working substrate.
Optionally, the method of separating the semiconductor substrate from the graphene layer comprises the steps of:
forming a passivation auxiliary layer on the barrier layer covering the source electrode, the drain electrode and the gate electrode;
and arranging a pickup structure on the passivation auxiliary layer, applying a peeling force to the interface of the semiconductor substrate and the graphene layer based on the pickup structure, wherein the peeling force is greater than the bonding force between the graphene layer and the auxiliary epitaxial layer, so that the semiconductor substrate is separated from the graphene layer under the action of the peeling force.
Optionally, the semiconductor base includes a semiconductor substrate and an auxiliary epitaxial layer formed on the semiconductor substrate, and the graphene layer is formed on a surface of the auxiliary epitaxial layer.
Optionally, the working substrate comprises at least one of a metal substrate, a diamond substrate, and a flexible substrate.
Optionally, when the diamond column is grown in the etching groove, the unetched graphene layer includes at least two graphene unit layers, and at most two graphene unit layers remain at the bottom of the etching groove after etching.
Optionally, the thickness of the graphene layer is less than 10nm, the thickness of the remaining graphene layer at the bottom of the etched groove is less than 1nm, the thickness of the diamond column is between 100 and 500nm, and the GaN functional layer is 50-100nm higher than the diamond column.
Optionally, when the diamond column is grown on the growth substrate, the diamond column is formed in a manner including:
depositing the growth base layer on the graphene layer, the growth base layer comprising a SiN layer;
a modified photoresist layer containing diamond seeds is spin-coated on the growth base layer, and a plurality of modified photoresist units are formed on the modified photoresist layer through photoetching so as to define the growth positions of the diamond columns;
growing the diamond column on the modified photoresist unit;
and etching to remove the growth base layer around the diamond column to the graphene layer.
Optionally, the growth mode of the diamond column comprises using methane, hydrogen and oxygen as gas sources, and the growth temperature is between 700 and 750 ℃; and/or removing the modified photoresist layer on which the diamond columns do not grow further comprises the following steps of performing chemical adsorption on the graphene layer, specifically, performing physical desorption removal by using oxygen plasma, and thus, etching the graphene layer.
Optionally, the step of forming the GaN functional layer includes: performing GaN nucleation at a first temperature, the first temperature being between 980 ℃ and 1020 ℃; and then carrying out film growth at a second temperature, wherein the second temperature is 1050-1110 ℃.
The invention also provides a GaN device structure, wherein the GaN device is preferably prepared by the preparation method of the GaN device, of course, other methods can be adopted for preparation, and the GaN device structure comprises:
a work substrate;
the graphene layer is positioned on the working substrate;
the diamond columns are grown in the etching grooves in the graphene layer, and the height of each diamond column is larger than the depth of each etching groove; or, growing on a growth substrate formed on the surface of the graphene layer;
the GaN functional layer is epitaxially grown on the graphene layer, and the upper surface of the GaN functional layer is higher than that of the diamond column;
a barrier layer on the GaN functional layer; and
and the source electrode, the drain electrode and the grid electrode of the device are positioned above the device substrate.
Optionally, the graphene layer includes at least two graphene unit layers, and at most two graphene unit layers remain at the bottom of the etched groove after etching; and/or the etching grooves are arranged in an array, and the number of the etching grooves between the grid electrode and the drain electrode is larger than that of the etching grooves between the grid electrode and the source electrode.
Optionally, the thickness of the graphene layer is less than 10nm, the thickness of the remaining graphene layer at the bottom of the etched groove is less than 1nm, the thickness of the diamond column is between 100 and 500nm, and the GaN functional layer is 50-100nm higher than the diamond column.
Optionally, the growth base layer includes a plurality of growth units, each growth unit corresponds to one of the diamond columns, and the GaN functional layer is formed on the surface of the graphene layer and extends to cover the diamond columns.
As described above, according to the GaN device structure and the preparation method thereof, the graphene layer and the diamond are effectively integrated in the GaN device, so that the problem of effective heat dissipation of the GaN device is solved, the thermal resistance of materials is reduced, the heat dissipation effect is improved, the process is simple, a heat dissipation path can be guided based on the diamond, and meanwhile, the thickness of the device can be effectively reduced based on the scheme of the invention.
Drawings
FIG. 1 shows a flow chart of a fabrication process for a GaN device structure of the invention.
Fig. 2 shows a schematic structure diagram of a semiconductor substrate provided in the fabrication of an exemplary GaN device structure of the present invention.
Fig. 3 is a schematic diagram illustrating the formation of a graphene layer in the fabrication of an exemplary GaN device structure according to the present invention.
Fig. 4 is a schematic diagram illustrating the formation of etched recesses in a graphene layer during fabrication of an exemplary GaN device structure according to the present invention.
Fig. 5 is a schematic structural diagram illustrating the formation of diamond pillars in the fabrication of an exemplary GaN device structure according to the present invention.
Fig. 6 shows a top view of a diamond pillar formed in the fabrication of an exemplary GaN device structure of the present invention.
Fig. 7 shows a top view of another diamond pillar formed in the fabrication of an exemplary GaN device structure of the present invention.
FIG. 8 is a schematic structural diagram illustrating the formation of a GaN functional layer in the fabrication of an exemplary GaN device structure of the invention.
FIG. 9 is a schematic diagram illustrating the formation of a barrier layer in the fabrication of an exemplary GaN device structure of the invention.
FIG. 10 is a schematic diagram of the formation of an epitaxial cap layer in the fabrication of an exemplary GaN device structure of the invention.
FIG. 11 is a schematic diagram illustrating the formation of source, drain and gate electrodes in the fabrication of an exemplary GaN device structure of the invention.
FIG. 12 is a schematic diagram illustrating the formation of a passivation auxiliary layer in the fabrication of an exemplary GaN device structure of the invention.
FIG. 13 is a schematic diagram illustrating the formation of a pickup structure in the fabrication of an exemplary GaN device structure of the invention.
Fig. 14 shows a schematic diagram of graphene layer transfer to a working substrate in fabrication of an exemplary GaN device structure of the present invention.
FIG. 15 is a schematic structural view illustrating the formation of a growth substrate in the fabrication of another exemplary GaN device structure of the invention.
FIG. 16 is a schematic view showing the formation of a modified photoresist layer in the fabrication of another exemplary GaN device structure of the invention.
Fig. 17 is a schematic structural view illustrating the formation of diamond pillars in the fabrication of another exemplary GaN device structure according to the present invention.
Fig. 18 shows a schematic representation of the etch removal of photoresist to a graphene layer in the fabrication of another exemplary GaN device structure of the present invention.
Description of the element reference numerals
100. 300-a semiconductor base, 101, 301-a semiconductor substrate, 102, 302-an auxiliary epitaxial layer, 103, 303-a graphene layer, 103 a-an etched groove, 104-a diamond column, 105-a GaN functional layer, 106-a barrier layer, 107-an in-situ passivation layer, 108-a source, 109-a drain, 110-a gate, 111-a passivation auxiliary layer, 112-a pickup structure, 200-a working substrate, 304-a growth base layer, 304 a-a growth unit, 305-a modified photoresist layer, 305a modified photoresist unit, 306-a diamond column, and S1-S8.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. In addition, "between … …" as used herein includes both endpoints.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed freely, and the layout of the components may be more complicated.
The first embodiment is as follows:
as shown in fig. 1, the present invention provides a method for fabricating a GaN device structure, the method comprising the steps of:
s1, providing a semiconductor substrate;
s2, forming a graphene layer on the semiconductor substrate;
s3, etching the graphene layer to form a plurality of etching grooves in the graphene layer;
s4, growing a diamond column in the etching groove, wherein the height of the diamond column is larger than the depth of the etching groove;
s5, epitaxially growing a GaN functional layer on the graphene layer, wherein the upper surface of the GaN functional layer is higher than that of the diamond column;
s6, preparing a barrier layer on the surface of the GaN functional layer, and preparing a source electrode, a drain electrode and a grid electrode of the device;
s7, separating the semiconductor substrate from the structure on the graphene layer through the graphene layer;
s8, transferring the graphene layer and the structure formed on the graphene layer to a working substrate.
The following will describe the fabrication method of the GaN device structure of the present invention in detail with reference to the accompanying drawings, wherein it should be noted that the above sequence does not strictly represent the fabrication sequence of the fabrication method of the GaN device structure protected by the present invention, and those skilled in the art can change the sequence according to the actual process steps, and fig. 1 shows only the fabrication steps of the GaN device structure in one example.
First, as shown in S1 of fig. 1 and fig. 2, step S1 is performed to provide the semiconductor substrate 100. The semiconductor substrate 100 may be a substrate used in a GaN device using process, or may be a substrate used only in GaN device preparation, and the formed functional material layer is transferred to a device in practical application. The semiconductor substrate 100 may be a single material layer or a stacked structure composed of multiple material layers.
In one example, the semiconductor base 100 includes a semiconductor substrate 101 and an auxiliary epitaxial layer 102 formed on the semiconductor substrate 101. So as to be beneficial to the stripping of the subsequent graphene layer and be recycled after the stripping. In an optional example, the semiconductor substrate 101 is a SiC substrate, and the auxiliary epitaxial layer 102 is a GaN layer, which is beneficial to improving the recycling value of the semiconductor substrate 100 after being peeled off. Of course, the semiconductor substrate 100 may be formed of only a Si substrate or a SiC substrate, depending on the actual choice.
Next, as shown in S2 in fig. 1 and fig. 3, step S2 is performed to form the graphene layer 103 on the semiconductor substrate 100. The graphene layer 103 may be formed on the semiconductor substrate 100 by epitaxial growth, for example, in an example, the graphene layer 103 is epitaxially grown on the surface of the GaN auxiliary epitaxial layer 102. Of course, a thin film transfer technique may also be used to transfer the graphene thin film onto the semiconductor substrate 100.
The graphene is adopted, on one hand, the subsequent film transfer is favorably realized, namely, the finished GaN epitaxial device is transferred to other substrates, the heat sink heat dissipation process is realized by the conventional process through the processes of substrate thinning, etching, metal deposition, bonding and the like, the film transfer can be easily realized only through stripping two-dimensional materials such as the graphene and the like, the graphene is used as the surface of the two-dimensional material without a dangling bond, the surface is Van der Waals force, and the bonding force with the substrate is much smaller than the covalent bonding force between the two-dimensional material and the conventional three-dimensional material, so that the stripping of an upper layer material structure from the graphene can be realized through an adhesive tape, and if the two-dimensional material is the conventional three-dimensional material. On the other hand, graphene and diamond are high-heat-conduction materials, and can play a good heat dissipation role for the GaN device.
Next, as shown in S3 in fig. 1 and fig. 4, in step S3, the graphene layer 103 is etched to form a plurality of etched grooves 103a in the graphene layer. Specifically, the etched groove 103a is formed in the graphene layer 103 to facilitate the formation of the diamond column 104, so as to facilitate the heat dissipation of the device based on the diamond column 104.
Among them, the shape of the top view of the etched groove 103a can be referred to the shape of the diamond pillar 104 already formed in fig. 6 and 7. In an example, the etching grooves 103a are arranged in an array, and the number of the etching grooves 103a between the gate and the drain is greater than the number of the etching grooves 103a between the gate and the source. The arrangement rule of the etching grooves 103a between the gate and the drain may be the same as or different from the arrangement rule of the etching grooves 103a between the gate and the source, and preferably, the arrangement rule and the arrangement rule are different, so that heat dissipation can be flexibly performed according to different regional characteristics. Of course, the arrangement of the etched grooves 103a formed in the graphene layer 103 may also be non-uniform. In addition, the top view shape of each etched groove 103a may be circular, square, or the like, or may be irregular, and the size may also be changed according to the requirement. The scheme of the invention is beneficial to flexible heat dissipation of the device aiming at different areas, and the position and the size of the etching groove (diamond column) can be flexibly adjusted according to the actual situation.
In one example, referring to fig. 7, the etched groove 103a at the edge is in communication with the outside. Through the design of this example, it is possible to communicate the subsequent diamond columns 104 with the outside, so that the heat of the front surface can be dissipated from the side, and the heat can be prevented from being transferred downward from the front surface through the whole device (such as a channel, a buffer layer, a substrate, etc.) as in the prior art. In addition, the shape of the etching groove 103a can be set to other required shapes, so that heat dissipation and drainage can be realized based on diamond.
Next, as shown in S4 of fig. 1 and fig. 5-7, step S4 is performed to grow a diamond pillar 104 in the etched groove 103a, wherein the height of the diamond pillar 104 is greater than the depth of the etched groove 103 a. Therefore, the heat dissipation of the device can be realized based on the diamond columns 104, the problem that in the prior art, the heat dissipation needs to pass through multiple device material layers from top to bottom, and the heat resistance of corresponding materials and the interface heat resistance among different materials are increased through each layer of material, so that the heat dissipation effect is poor is solved, further, the graphene heat conduction is more than 2000W/mK, the diamond heat conduction is more than 2200W/mK, and the graphene and the diamond are combined to be formed in the graphene etching groove, so that the heat dissipation is enhanced. In addition, the invention also selects diamond for preparing the GaN device, and the GaN channel with the diamond can reduce or absorb the defects generated in the traditional buffer layer (buffer layer) in the working process of the device and the current collapse effect caused by the defects, so that the reliability of the device is higher.
In one example, the diamond columns 104 are formed by epitaxial growth. In a specific example, the etching manner of the graphene layer 103 includes a monoatomic layer etching process.
As an example, the graphene layer 103 includes at least two graphene unit layers (not shown in the figure), and after etching, at most two graphene unit layers remain at the bottom of the etched groove 103 a. Facilitating the subsequent growth of the diamond column 104. In an alternative example, the graphene layer 103 is smaller than 10nm, for example, may be between 1.75 nm and 5.25nm, and the graphene layer 103 may include 5 to 15 graphene unit layers, for example, 8 layers, 10 layers, 12 layers, etc. may be selected, where the graphene unit layers may be the meaning of the existing single-layer graphene, and the single-layer graphene may be 0.345nm thick.
Further, in an example, the remaining graphene layer is selectively etched to be smaller than 1nm, and at most two graphene unit layers, for example, one or two graphene unit layers, remain at the bottom of the etched groove 103a after etching, so that the remaining graphene layer at the bottom of the etched groove 103a is beneficial to diamond growth. The partial material layer can be influenced by surface heat dissipation in the subsequent diamond growth process, namely the partial material layer is influenced by a semiconductor substrate (such as an auxiliary epitaxial layer GaN layer) with a lower graphene layer, so that the problem that the surface of graphene has no dangling bond and is not beneficial to nucleation is solved.
Next, as shown in S5 in fig. 1 and fig. 8, step S5 is performed to epitaxially grow a GaN functional layer 105 on the graphene layer 103, wherein the upper surface of the GaN functional layer 105 is higher than the upper surface of the diamond column 104.
Specifically, the GaN functional layer 105 may be formed by epitaxial growth. The GaN grows in a graphene area where the diamond film is not deposited, and when the growth time is prolonged and the thickness of the GaN is higher than that of the diamond film, the GaN grows transversely and is sewn to form a complete film, so that the GaN functional layer 105 is obtained.
As an example, the thickness of the graphene layer 103 is less than 10nm, and may be, for example, between 1.75 nm and 5.25nm, the thickness of the remaining graphene layer at the bottom of the etched groove 103a is less than 1nm, the thickness (height) of the diamond pillar 104 is between 100 μm and 1 μm, and may be, for example, 120nm, 200nm, 300nm, and 500nm, and the GaN functional layer 105 is higher than the diamond pillar by 50 nm to 100nm, and may be, for example, 55nm, 60nm, 65nm, and 80 nm. One of the advantages of the design based on the invention is that a thinner GaN film can be grown to prepare a device, thereby facilitating heat dissipation, in the conventional method, due to mismatch of lattice, heat, force and the like, the AlGaN/GaN film layer is generally 3-5um, and in the present application, the GaN functional layer 105 passes through the graphene layer, and the epitaxially stitched film layer can be very thin, thereby facilitating heat dissipation. In another example, the design for the diamond column 104 may also be that the diamond column 104 may have a length to width aspect ratio between 1:1:1 and 1:1:10, e.g., may be 1:1:5, 1:1: 8.
Finally, as shown in S6 in fig. 1 and fig. 9 to 11, step S6 is performed to prepare a barrier layer 106 on the surface of the GaN functional layer 105 to form a two-dimensional electron gas in the GaN functional layer. And a source 108, a drain 109 and a gate 110 of the device are prepared. Illustratively, the barrier layer 106 has a thickness of between 15-30nm, such as 20nm, 25 nm.
Specifically, in one example, the method further comprises the step of preparing an in-situ passivation layer 107 on the barrier layer 106, which can be formed by in-situ deposition. The material of the in-situ passivation layer 107 includes, but is not limited to, SiN. By way of example, the in-situ passivation layer 107 may have a thickness of between 50-300nm, such as 100nm, 200nm, 300 nm. In an example, the GaN functional layer 105, the barrier layer 106 (including but not limited to AlGaN), and the in-situ passivation layer 107 may be epitaxial once in the same MOCVD, for example, GaN/AlGaN/SiN once in the same MOCVD.
In one example, the step of forming the GaN functional layer includes: performing GaN nucleation at a first temperature between 980 ℃ and 1020 ℃, e.g., 1000 ℃; the film growth is then carried out at a second temperature between 1050 ℃ and 1110 ℃, for example 1070 ℃, 1090 ℃. Further, the reaction chamber pressure during nucleation and growth of GaN to form a GaN functional layer is maintained between 90 and 110mbar, which may be 100mbar, for example. In addition, in one example, GaN/AlGaN (GaN functional layer/barrier layer) epitaxial layer growth is performed using MOCVD. TMAl, TMGa and NH3 are used as gas sources of Al, Ga and N, respectively.
In addition, for the preparation of the source electrode 108, the drain electrode 109 and the gate electrode 110, the in-situ passivation layer 107 (SiN) may be directly etched away to stay on the surface of the barrier layer 106 (ALGaN), or the barrier layer 106 may be continuously etched after the passivation layer 107 is etched to stop on the surface of the two-dimensional electron gas. Of course, other ways may also be present.
As shown in fig. 12-14, the method further includes, for example, after the source, the drain and the gate are prepared:
first, as shown in S7 in fig. 1 and fig. 13, the semiconductor substrate 100 is separated from the structure on the graphene layer 103 by the graphene layer 103 to peel off the semiconductor substrate 100; next, as shown in S8 in fig. 1 and fig. 14, the graphene layer and the structure formed on the graphene layer are transferred to a working substrate 200.
The working substrate 200 includes at least one of a metal substrate, a diamond substrate, and a flexible substrate, as an example. The working substrate 200 may be a heat-dissipating substrate including at least one of a metal substrate and a diamond substrate, for example. Based on the scheme of the invention, the nondestructive transfer can be realized without etching, and the structure on the substrate can be transferred to any required working substrate, such as a heat dissipation substrate or a flexible substrate, according to the requirements of application scenes.
Specifically, in this step, the semiconductor substrate 100 may be peeled off, so that the graphene layer 103 and the structure formed thereon are transferred onto the working substrate 200, a manufacturing process of each material layer of the device is performed on the semiconductor substrate 100, and then the device is transferred onto the working substrate 200, thereby obtaining a working GaN device. The working substrate 200 may be any desired substrate and may be any high thermal dissipation heat sink (Cu, Au, diamond, etc.). For example, the temperature in the device preparation process is 1000-1100 ℃, the metal heat sink cannot resist the high temperature, meanwhile, GaN cannot be extended on the structure of graphene/metal heat sink, and the semiconductor substrate (such as GaN, SiC and sapphire substrate) can be recycled, so that the cost is reduced.
In one example, separating the semiconductor substrate 100 from the graphene layer 103 includes the steps of:
first, as shown in fig. 12, a passivation auxiliary layer 111 covering the source electrode 108, the drain electrode 109, and the gate electrode 110 is formed on the barrier layer 106. The material of the passivation auxiliary layer 111 includes, but is not limited to, SiN. On the one hand, the whole device can be passivated, and on the other hand, separation of the graphene layer 103 and the semiconductor substrate 100 can also be facilitated.
Next, as shown in fig. 13, a pickup structure 112 is disposed on the passivation auxiliary layer 111, and a peeling force is applied to an interface between the semiconductor substrate 100 and the graphene layer 103 based on the pickup structure 112, and the peeling force is greater than a bonding force between the graphene layer 103 and the semiconductor substrate 100 (in an example, the auxiliary epitaxial layer 102) so as to separate the semiconductor substrate 100 from the graphene layer 103 under the peeling force.
In an example, the pickup structure 112 may be an adhesive tape that is laid on the passivation auxiliary layer 111. The GaN device is separated from the semiconductor substrate (such as the SiC/GaN base epitaxial layer) at the graphene by using an adhesive tape, and the adhesive tape is spread on the SiN (on the passivation auxiliary layer 111) on the surface of the completed device, and the separation occurs at the graphene/GaN because the adhesive force of the adhesive tape to the SiN is greater than the van der waals force between the graphene and GaN. In addition, a step of removing the pick-up structure 112 after peeling, such as device surface tape (chemical reagent dissolving and cleaning), to complete device fabrication is also included. By the method, the substrate can be recycled, and a subsequent process and a bonding heat sink are not needed. And the heat dissipation is carried out on the GaN layer by utilizing the graphene and the diamond with high heat dissipation, so that the thermal resistance superposition of multiple layers of materials is avoided, and the heat dissipation performance is better.
In addition, the invention also provides a GaN device structure, wherein the GaN device is preferably prepared by adopting the preparation method of the GaN device, and of course, other methods can also be adopted for preparation. The characteristics and descriptions of the related material layers in the GaN device structure can be referred to the descriptions in the GaN device preparation method, and are not repeated herein.
The GaN device structure includes:
a work substrate 200;
a graphene layer 103 located on the working substrate 200, wherein an etching groove 103a is formed in the graphene layer 103;
a diamond column 104 grown in the etched groove 103a, wherein the height of the diamond column 104 is greater than the depth of the etched groove 103 a;
a GaN functional layer 105 epitaxially grown on the graphene layer 103, wherein an upper surface of the GaN functional layer 105 is higher than an upper surface of the diamond column 104;
a barrier layer 106 on the GaN functional layer 105;
the source 108, drain 109 and gate 110 of the device are located above the working substrate.
The working substrate 200 includes at least one of a metal substrate and a diamond substrate, as an example.
As an example, the graphene layer 103 includes at least two graphene unit layers, and at most two graphene unit layers remain at the bottom of the etched groove after etching.
As an example, the etching grooves 103a are arranged in an array, and the number of the etching grooves between the gate and the drain is greater than the number of the etching grooves between the gate and the source.
As an example, the etched groove 103a at the edge communicates with the outside.
For example, the thickness of the graphene layer 103 is less than 10nm, the thickness of the remaining graphene layer 103 at the bottom of the etched groove 103a is less than 1nm, the thickness of the diamond column 104 is between 100 and 500nm, and the GaN functional layer 105 is higher than the diamond column 10450 and 100 nm.
Example two:
as shown in fig. 15 to 18, the present invention further provides another method for manufacturing a GaN device structure, where the difference between the second embodiment and the first embodiment is that the position of the diamond column is different, in this embodiment, the diamond column is formed on the growth substrate on the surface of the graphene, and the description of the first embodiment can be referred to otherwise. The following will explain the embodiments of the present invention in detail with reference to the accompanying drawings:
first, as shown in fig. 15, a semiconductor substrate 300 and a graphene layer 303 are formed as described in the first embodiment. In an example, the semiconductor base 300 includes a semiconductor substrate 301 and an auxiliary epitaxial layer 302. Next, a graphene layer 303 is formed on the semiconductor substrate 300. Further, in this embodiment, a growth base layer 304 is formed on the graphene layer 303.
Specifically, the growth substrate 304 includes, but is not limited to, a silicon nitride layer. In one example, 5-20nm thick SiN is deposited on the graphene, based on which further facilitates diamond growth, with the growth substrate 304 having a thickness of, for example, 10nm, 15 nm.
Next, as shown in fig. 16, a modified photoresist layer 305 is spun on the growth base layer, and then by photolithography, a diamond growth position is defined, and the remaining portion of the photoresist is removed, so that the modified photoresist layer includes modified photoresist units 305a containing diamond seeds for the subsequent growth of the diamond column. In one example, it is equivalent to forming growth grooves around the modified photoresist units 305a, which penetrate the modified photoresist layer to expose the surface of the growth base layer 304.
Specifically, in one example, a photoresist is spin-coated on SiN, the photoresist contains diamond seeds, which is beneficial to diamond growth, the diamond growth is carried out by firstly spreading the diamond seeds and then growing the diamond seeds, the seed carrier is the photoresist, and the preparation position and size can be defined by photolithography to obtain the final diamond growth mask.
Next, as shown in fig. 17, a diamond column 306 is grown on the diamond seed layer-containing modified photoresist units 305a, that is, the diamond column 306 is grown on the modified photoresist units 305a, wherein the modified photoresist units 305a containing the diamond seeds are transformed together to form the diamond column 306 during the growth process. In one specific example, a diamond film is deposited on the diamond seed by hot filament cvd (hfcvd) to obtain the diamond pillar 306; methane, hydrogen and oxygen can be used as gas sources; in addition, the growth temperature is selected to be 700 ℃ and 750 ℃, for example, 720 ℃ and 730 ℃.
Next, as shown in fig. 18, the growth base layer (e.g., SiN layer) 304 around the diamond pillars 306 is etched away until the graphene layer is revealed. The growth base layer after etching comprises a plurality of growth units 304a, each growth unit 304a corresponds to the diamond column 306 one by one, and the GaN functional layer is formed on the surface of the graphene layer and extends to cover the diamond column.
In an example, after the etching of the growth substrate 304, the step of etching the graphene layer 303 is further included, which specifically includes: and firstly, carrying out chemical adsorption by adopting oxygen plasma, and then carrying out physical analysis removal by adopting argon ions so as to realize etching of the uppermost atomic layer of the graphene layer and ensure that the GaN grows on the surface of the high-quality graphene. In a specific example, oxygen ions (O2 +/O +) are firstly used for chemical adsorption, which can be low-energy oxygen ions (O2 +/O +), and then low-energy Ar + ions (10 eV-12 eV) are used for physical desorption removal, so that single-layer graphene etching is realized, and meanwhile, residual impurities on the surface of graphene are removed.
The subsequent processes can be performed as described in example one. Wherein, in one example, the step of forming the GaN functional layer comprises: performing GaN nucleation at a first temperature between 980 ℃ and 1020 ℃, e.g., 1000 ℃; the film growth is then carried out at a second temperature between 1050 ℃ and 1110 ℃, for example 1070 ℃, 1090 ℃. Further, the reaction chamber pressure during nucleation and growth of GaN to form a GaN functional layer is maintained between 90 and 110mbar, which may be 100mbar, for example. In addition, in one example, GaN/AlGaN (GaN functional layer/barrier layer) epitaxial layer growth is performed using MOCVD. TMAl, TMGa and NH3 are used as gas sources of Al, Ga and N, respectively.
In addition, the invention also provides a GaN device structure, wherein the GaN device is preferably prepared by adopting the preparation method of the GaN device, and of course, other methods can also be adopted for preparation. The characteristics and descriptions of the related material layers in the GaN device structure can be referred to the descriptions in the GaN device preparation method, and are not repeated herein.
The GaN device includes:
a work substrate;
a graphene layer 303 on the working substrate;
a diamond column 306, which grows on a growth base layer 307 formed on the surface of the graphene layer 303, and it can be understood that the material layer in the structure is the growth base layer after etching;
the GaN functional layer is epitaxially grown on the graphene layer, and the upper surface of the GaN functional layer is higher than that of the diamond column;
a barrier layer on the GaN functional layer; and
and the source electrode, the drain electrode and the grid electrode of the device are positioned above the device substrate.
As an example, the growth substrate layer includes several growth units 304a, each growth unit 304a corresponds to one of the diamond columns 306, and the GaN functional layer is formed on the surface of the graphene layer and extends to cover the diamond columns.
In summary, according to the GaN device structure and the preparation method thereof, the graphene layer and the diamond are effectively integrated in the GaN device, so that the problem of effective heat dissipation of the GaN device is solved, the thermal resistance of materials is reduced, the heat dissipation effect is improved, the process is simple, a heat dissipation path can be guided based on the diamond, and meanwhile, the thickness of the device can be effectively reduced based on the scheme of the invention. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (12)

1. A preparation method of a GaN device structure is characterized by comprising the following steps:
providing a semiconductor substrate;
forming a graphene layer on the semiconductor substrate;
preparing a diamond column formed in a manner including: forming a plurality of etching grooves in the graphene layer, growing diamond columns in the etching grooves, and enabling the height of the diamond columns to be larger than the depth of the etching grooves; or forming a growth substrate layer on the graphene layer, and growing the diamond columns on the growth substrate layer;
epitaxially growing a GaN functional layer on the structure on which the diamond column is formed, wherein the upper surface of the GaN functional layer is higher than that of the diamond column;
preparing a barrier layer on the surface of the GaN functional layer, and preparing a source electrode, a drain electrode and a grid electrode of a device;
separating the semiconductor substrate from the structures on the graphene layer by the graphene layer;
and transferring the graphene layer and the structure formed on the graphene layer to a working substrate.
2. The method of claim 1, wherein the step of separating the semiconductor substrate from the graphene layer comprises the steps of:
forming a passivation auxiliary layer on the barrier layer covering the source electrode, the drain electrode and the gate electrode;
and arranging a pickup structure on the passivation auxiliary layer, applying a peeling force to the interface of the semiconductor substrate and the graphene layer based on the pickup structure, wherein the peeling force is greater than the bonding force between the graphene layer and the semiconductor substrate, so that the semiconductor substrate is separated from the graphene layer under the action of the peeling force.
3. The method of claim 1, wherein the semiconductor substrate comprises a semiconductor substrate and an auxiliary epitaxial layer formed on the semiconductor substrate, and the graphene layer is formed on the surface of the auxiliary epitaxial layer; and/or the working substrate comprises at least one of a metal substrate, a diamond substrate and a flexible substrate.
4. The method of claim 1, wherein the graphene layer comprises at least two graphene unit layers when the diamond pillar is grown in the etched groove, and at most two graphene unit layers remain at the bottom of the etched groove after etching.
5. The method as claimed in claim 1, wherein the thickness of the graphene layer is less than 10nm, the thickness of the remaining graphene layer at the bottom of the etched groove is less than 1nm, the thickness of the diamond pillar is between 100 and 500nm, and the GaN functional layer is 50-100nm higher than the diamond pillar.
6. The method of claim 1, wherein the diamond pillar is formed by a process comprising, when the diamond pillar is grown on the growth substrate:
depositing the growth base layer on the graphene layer, the growth base layer comprising a SiN layer;
a modified photoresist layer containing diamond seeds is spin-coated on the growth base layer, and a plurality of modified photoresist units are formed on the modified photoresist layer through photoetching so as to define the growth positions of the diamond columns;
growing the diamond column on the modified photoresist unit;
and etching to remove the growth base layer around the diamond column to the graphene layer.
7. The method of claim 6, wherein the growth of the diamond pillar comprises using methane, hydrogen and oxygen as gas sources, and the growth temperature is between 700-750 ℃; and/or removing the modified photoresist layer on which the diamond columns do not grow, and further comprising the step of etching the graphene layer, wherein the step of chemically adsorbing the graphene layer by oxygen plasma firstly and physically desorbing the graphene layer by argon ions to realize the etching of the graphene layer.
8. The method of any of claims 1-7, wherein the step of forming the GaN functional layer comprises: performing GaN nucleation at a first temperature, the first temperature being between 980 ℃ and 1020 ℃; and then carrying out film growth at a second temperature, wherein the second temperature is 1050-1110 ℃.
9. A GaN device structure, comprising:
a work substrate;
the graphene layer is positioned on the working substrate;
the diamond columns are grown in the etching grooves in the graphene layer, and the height of each diamond column is larger than the depth of each etching groove; or, growing on a growth substrate formed on the surface of the graphene layer;
the GaN functional layer is epitaxially grown on the graphene layer, and the upper surface of the GaN functional layer is higher than that of the diamond column;
a barrier layer on the GaN functional layer; and
and the source electrode, the drain electrode and the grid electrode of the device are positioned above the device substrate.
10. The GaN device structure of claim 9, wherein the graphene layer comprises at least two graphene unit layers and at most two graphene unit layers remain at the bottom of the etched groove after etching; and/or the etching grooves are arranged in an array, and the number of the etching grooves between the grid electrode and the drain electrode is larger than that of the etching grooves between the grid electrode and the source electrode.
11. The GaN device structure of claim 9, wherein the thickness of the graphene layer is less than 10nm, the thickness of the remaining graphene layer at the bottom of the etched groove is less than 1nm, the thickness of the diamond column is between 100 and 500nm, and the GaN functional layer is 50-100nm higher than the diamond column.
12. The GaN device structure of claim 9 wherein the growth substrate comprises a plurality of growth units, each growth unit corresponds to one of the diamond columns, and the GaN functional layer is formed on the surface of the graphene layer and extends to cover the diamond columns.
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