CN112491762B

CN112491762B - Signal quality optimization method, device and system based on PCS and MII separation

Info

Publication number: CN112491762B
Application number: CN202011476971.5A
Authority: CN
Inventors: 段有楠; 邱建峰; 戚晨希
Original assignee: Suzhou Centec Communications Co Ltd
Current assignee: Suzhou Centec Communications Co Ltd
Priority date: 2020-12-15
Filing date: 2020-12-15
Publication date: 2022-08-12
Anticipated expiration: 2040-12-15
Also published as: CN112491762A; WO2022127715A1

Abstract

The invention relates to a signal quality optimization method, a device and a system based on PCS and MII separation, wherein the method comprises the following steps: step 1: setting the initialization state of a system port and preventing the transmission of MAC data; step 2: performing equalizer adjustment control based on separation of PCS and MII of the physical coding sublayer; and step 3: the port state is checked and the MAC data is transmitted when the port connection link up state is set. According to the invention, after the PCS layer link is established, the link up state of the port is temporarily hidden based on the operation of the MII layer, then the system is informed to carry out equalizer tuning, the state is opened after the tuning is completed, and the receiving and sending of user data are started, so that the link fluctuation caused by the adjustment of the equalizer is avoided.

Description

Signal quality optimization method, device and system based on separation of PCS and MII

Technical Field

The invention relates to the technical field of Ethernet, in particular to a signal quality optimization method, a signal quality optimization device and a signal quality optimization system based on separation of PCS and MII.

Background

The IEEE802.3 standard defines the implementation of the PCS (Physical Coding Sublayer) and MII (Media Independent Interface) sublayers. The PCS and MII at different rates are substantially similar in structure. For example, at 10G rate, the PCS and MII structure is shown in FIG. 1. According to 802.3 chapter 49, 10G BASE-R PCS encodes the signal 64B/66B, can perform error detection, and sends the encoded data to a lower layer PMA (Physical media access attachment) module, and further to a transmission medium to the opposite end. It can determine whether the link status has been established and notify the upper management system. According to chapter 46 of 802.3, XGMII (10Gigabit Media Independent Interface) is a 10Gb Media Independent Interface, an optional layer, which exists in the sense of bridging the PHY (Physics physical layer) at the bottom (including PCS) to the MAC (Media Access Control) at the upper layers.

In an ethernet communication system, due to different medium conditions of connections between ports, various losses or distortions may exist in a signal acquired by a receiver SerDes (SERializer/DESerializer for short) compared with an original signal, and if the loss is large to a certain extent, the receiver cannot recover a data signal, which may cause an error code or loss of data. Therefore, after the ethernet link is established, the equalizer parameter of the receiving end must be adjusted and optimized, so that the loss of the signal on the link is reasonably compensated, and the system error rate is reduced.

Since whether the link state is established or not is judged by the PCS layer, once the link state is established, the upper layer system senses the link state, and the user is allowed to receive and transmit data. If the equalizer tuning is performed again, the link quality may fluctuate during the execution due to the difference of the tuning algorithm, resulting in error generation. Therefore, the most safe way to adjust the equalizer is to perform the adjustment before the user data is transmitted and received, and once the user data transmission and reception are started, the equalizer is fixed.

The prior art adjusts the equalizer to a fixed position before the PCS link-up is complete. Once the PCS link is established, the upper layer system immediately starts to receive and transmit data without adjustment. In the current common design, the performance of the Se des receiving end is closely related to the transmitted code pattern, and if the received code pattern is not random enough, the C DR (Clock Data Recovery) is difficult to recover the user Data, so that the equalizer tuning is inaccurate. That is, before the PCS link is established, it is practically impossible to determine what code pattern is on the link, and if the code pattern is not sufficiently random (e.g., 8180 codes), the result of equalizer tuning is not ideal.

After the ethernet PCS layer determines that the link is established, the user data starts to be transmitted and received, and at this time, the equalizer is adjusted to reduce the error, which may cause the link quality to fluctuate during the execution period, resulting in the generation of error.

Disclosure of Invention

The invention mainly aims to overcome the defects of the prior art and provides a signal quality optimization method, a device and a system based on separation of PCS and MII.

According to an aspect of the present application, there is provided a signal quality optimization method based on PCS and MII separation, including:

step 1: setting the initialization state of a system port and preventing the transmission of MAC data;

step 2: performing equalizer adjustment control based on separation of PCS and MII of the physical coding sublayer;

and step 3: the port state is checked and the MAC data is transmitted when the port connection link up state is set.

In an embodiment, the preventing the transmission of the MAC data specifically includes:

and the MII sending end sends the far-end fault to the opposite-end MII receiving end so as to prevent the opposite end from sending the MAC data.

In an embodiment, the setting of the initialization state of the system port in step 1 specifically includes:

step 1.1: the PCS transmitting end is reset;

step 1.2: the MII sending end is reset;

step 1.3: MAC solution reset;

step 1.4: the MII sending end sends a far-end fault to an opposite-end MII receiving end;

step 1.5: and the PCS receiving end is reset.

In an embodiment, the performing of the equalizer adjustment control in step 2 specifically includes:

and acquiring the current PCS synchronization state and the reset state of the MII receiving end, and adjusting and controlling the equalizer according to the synchronization state and the reset state.

In an embodiment, the performing of the equalizer adjustment control according to the synchronization state and the reset state specifically includes:

if the PCS is synchronized and the MII receiving end is reset, polling whether the equalizer is adjusted and storing the polling result in a temporary variable is _ rxeq _ tuning, and if is _ rxeq _ tuning is 1 and the equalizer adjustment is finished, entering step 3;

if the PCS is not synchronous and the MII receiving end is reset, the MII receiving end is reset again, a far-end fault is sent to the MII receiving end at the opposite end again, the is _ rxeq _ tuning is set to be 0, and the equalizer is adjusted again when the is _ rxeq _ tuning is 1 in the next time;

if the PCS is not synchronized and the MII receiving end is reset, the equalizer is restored to a default value, the is _ rxeq _ tuning is set to be 0, and the PCS is waited to be synchronized successfully;

if the PCS is synchronized and the MII receiving terminal is unset, the is _ rxeq _ tuning is set to 0, and the step 3 is entered.

In an embodiment, the checking the port status in step 3 specifically includes:

step 3.1: judging whether PCS synchronization is finished, if so, entering a step 3.2, and if not, continuing to perform the current step;

step 3.2: judging whether the MII receiving end is reset or not, if so, entering a step 3.3, otherwise, skipping to the step 3.1;

step 3.3: and judging whether the local end fault exists, if not, setting the port state as link up, starting to transmit user data, and if so, skipping to the step 3.1.

The application also provides a signal quality optimization device based on PCS and MII separation, which comprises:

the port initialization setting module is used for setting the initialization state of a system port and preventing the data transmission of a medium independent interface MII receiving end;

the equalizer adjustment control module is used for separately executing equalizer adjustment control based on the PCS and MII of the physical coding sublayer;

and the port state checking module is used for checking the port state and starting to transmit the user data when the port connection link up state is set.

In one embodiment, the port initialization setting module includes:

the port de-resetting unit is used for de-resetting the PCS transmitting end, the MII transmitting end, the MAC port and the PCS receiving end;

and the far-end fault sending unit is used for controlling the MII sending end to send the far-end fault to the opposite-end MII receiving end.

In one embodiment, the equalizer adjustment control module comprises:

the first state acquisition unit is used for acquiring the current PCS synchronization state and the reset state of the MII receiving end;

the equalizer adjustment control unit is used for carrying out equalizer adjustment control according to the synchronous state and the reset state; and/or the presence of a gas in the gas,

the port status checking module includes:

the second state acquisition unit is used for acquiring the current PCS synchronization state and the reset state of the MII receiving end;

and the link up state setting unit is used for setting the port state as the link up and starting to transmit the MAC data when the PCS synchronization is finished, the MII receiving end is reset and no local end fault exists.

The present application further provides an ethernet communication system comprising the signal quality optimization apparatus as described above.

The invention prevents MAC data transmission when the port is initialized, and combines the steps of equalizer adjustment control and port link up state check, under the condition that the user does not sense, the invention performs silent optimization on the equalizer at the SerDes receiving end, and ensures that the link quality is the best once the user data is started to be transmitted and received, thereby avoiding error codes caused by equalizer adjustment and reducing the error code rate of the system.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a block diagram of an Ethernet communication system;

FIG. 2 is a flow chart of a signal quality optimization method of the present invention;

FIG. 3 is a flow chart of a method of setting the initialization state of a system port in accordance with the present invention;

FIG. 4 is a flow chart of a method of performing equalizer adjustment control in accordance with the present invention;

FIG. 5 is a flow chart of a method of checking link up status according to the present invention;

fig. 6 is a block diagram of the signal quality optimizing apparatus of the present invention.

Detailed Description

In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Fig. 1 is a block diagram of an ethernet communication system.

The PCS layer contains a Block Synchronization function, for example at 10G rate, and standard section 49.2.2 describes the process of Block Synchronization, when Synchronization is complete, the PCS will continuously monitor the signal quality via BER monitor, and if it is synchronized and has few errors, the PCS's receive channel will start to continuously receive the encoded data Block. In principle, the user data can already be transmitted and received at this time.

But since the BER monitor of PCS is a more relaxed condition than the requirement of user data for the error rate, even if PCS is synchronized, the user data will have error codes for a long time. The lower layer SerDes receive-side equalizer needs to be adjusted to compensate for signal loss.

The MII layer above the PCS may control the issuance of Link fault signaling according to standard 46.3.4. If the fault is received, the bottom-layer PHY module considers that a local fault is generated, meanwhile, the MII stops sending the MAC data packet and starts sending a remote fault to the opposite end, and the opposite end also senses the link abnormity.

In order to make the user not to perceive the influence of packet loss and the like caused by the adjustment of the equalizer, the invention utilizes the MII layer to hide the established state of the PCS link. The method is that the concept of link up is abstracted from the MII layer, and the following conditions are required to be met: (1) the PCS is synchronously finished; (2) the MII receiving end is enabled; (3) there is no local fault. Transmission of user data is only started if the port is seen to be link up on the system.

After PCS synchronization is completed, the MII receiving end is not enabled manually, but the equalizer adjusting module works to improve the signal quality, and the MII receiving end is not enabled until the equalizer adjusting module works. Meanwhile, another process can repeatedly judge whether the three conditions are met or not, and once all the conditions are met, the link up state is reported to the system.

Fig. 2 is a flow chart of a method of signal quality optimization in accordance with the present invention. As can be seen from fig. 2, it comprises:

step 1: setting the initialization state of a system port, and preventing the transmission of MAC data;

Each step is described in detail below.

FIG. 3 is a flow chart of a method for setting the initialization state of a system port according to the present invention. The deassertion of the port in FIG. 3 essentially allows it to be enabled and operational. The resetting the port includes: the PCS transmitting end is reset; the MII sending terminal is reset; MAC solution reset; the PCS receiving end is reset. All modules, except the MII receiver, are enabled here. Besides enabling, the MII sending end also needs to send a remote fault to the opposite MII receiving end, because the opposite end cannot perceive that the link establishment is completed, and if the remote fault is not sent at this time, the opposite end may think that the PCS is completed synchronously and may start to send data, but actually, the equalizer is not yet adjusted. If a remote fault is sent, according to the section 46.3.4 of the IEEE802.3 standard, the peer stops sending MAC packets, thereby blocking user data, and does not start sending packets until the equalizer is tuned out.

FIG. 4 is a flow chart of a method of performing equalizer adjustment control in accordance with the present invention; the equalizer adjustment control flow is arranged in a separate process, which is repeated during system operation.

In a specific equalizer adjustment control, the current PCS synchronization state and the reset state of the MII receiving end are acquired first. It is divided into 4 cases:

if PCS is synchronized, the MII receiving end is reset. This situation means that the link is about to be established and equalizer adjustments are needed, which is a typical scenario where a switch in a communication system is first plugged and begins to establish a link. Since the equalizer adaptation is done in its own process, it is necessary that each poll is done or not and saved in the temporary variable is _ rxeq _ tuning. If the is _ rxeq _ tuning is found to be 1 and has been adjusted, it means that the link up direction is further toward the link up, so that the MII receiver can be released, and the Remote fault is stopped, and another process is waited to check the link up.

If the PCS is not synchronous, the MII receiving end is reset. This situation means that once in the link up state, the PCS is initially in sync, but later out of sync. I.e., the link has undergone a process of degradation, a typical scenario here is to unplug the cable suddenly after the link has been established. In this case, the MII receiving end needs to restore the reset, and send a Remote fault to the MII receiving end at the opposite end again, and wait for the state 1 to readjust the equalizer next time.

If the PCS is not synchronous, the MII receiving end is reset. In this case, the link is not established continuously, and no valid signal (PCS encoded signal) is coming from the opposite end, and it is impossible to transmit user data, in a typical scenario, for example, after a switch in the communication system is started, the port is not plugged. The matter to do at this point is to restore the equalizer to the default value, waiting for the PCS synchronization to succeed.

If PCS is synchronized, the MII receiving end is reset. This situation means that all actions have been done, which is a typical scenario in a communication system, e.g. a switch has completed a link establishment action and waits for a link up before user data can be transmitted. At this time, it is only necessary to clear the is _ rxeq _ tuning and wait for another process to check the link up.

With respect to equalizer adjustment, different systems differ in their implementation details, but SerDes receiver performance is closely related to the transmitted pattern, and equalizer adjustment is therefore inaccurate if the received pattern is not sufficiently random. Since the tuning balance can only occur after the PCS synchronization is completed, the code pattern at the beginning of tuning is the PCS Idle code which is randomly distributed, so that the tuning is ensured to be completed on a stable and available code pattern.

FIG. 5 is a flow chart of a method for checking port status according to the present invention. The set-up of the port connection link up state must simultaneously satisfy the following conditions: (1) the PCS is synchronously finished; (2) the MII receiving end is enabled; (3) there is no local fault at the home terminal.

The link up status poll is also in its own separate process, and the delay can be adjusted by delay _ time 1. The specific status polling process is as follows: judging whether PCS synchronization is finished, if so, entering the next step, and if not, continuing to perform the current step; judging whether the MII receiving end is reset or not, if so, entering the next step, and otherwise, jumping to the previous step; and judging whether a local fault is received, if not, setting the port state as link up, starting to transmit user data, and if so, continuing to start state polling. Transmission of user data is only started if the port is seen to be link up on the system.

Through the arrangement, after the PCS is synchronized, the user data transmission is not carried out immediately, a time gap is manufactured through the reset and remote fault operation of the MII layer, the equalizer is optimized in the time gap, and then the user data transmission is carried out. Therefore, error codes caused by the adjustment of the equalizer are avoided, and the error rate of the system is reduced.

The invention also provides a signal quality optimization device. Fig. 6 is a block diagram of the signal quality optimizing apparatus of the present invention. As can be seen from fig. 6, the apparatus comprises: the port initialization setting module is used for setting the initialization state of a system port and preventing the transmission of MAC data; the equalizer adjustment control module is used for separately executing equalizer adjustment control based on the PCS and MII of the physical coding sublayer; and the port state checking module is used for checking the port state and transmitting the MAC data when the port connection link up state is set.

Further, the port initialization setting module includes: the port de-resetting unit is used for de-resetting the PCS transmitting end, the MII transmitting end, the MAC port and the PCS receiving end; and the Remote Fault sending unit is used for controlling the MII sending end to send the Remote Fault to the opposite-end MII receiving end.

Further, the equalizer adjustment control module comprises: the first state acquisition unit is used for acquiring the current PCS synchronization state and the reset state of the MII receiving end; and the equalizer adjustment control unit is used for carrying out equalizer adjustment control according to the synchronous state and the reset state.

Further, the port status checking module includes: the second state acquisition unit is used for acquiring the current PCS synchronization state and the reset state of the MII receiving end; and the link up state setting unit is used for setting the port state as the link up and starting to transmit the user data when the PCS synchronization is finished, the MII receiving end is reset and no local fault exists.

The specific working method flow of the device is as above, which is not described herein.

In addition, the invention also provides an Ethernet communication system which comprises the signal quality optimization device.

According to the invention, after the PCS layer link is established, the link up state of the port is temporarily hidden based on the operation of the MII layer, then the system is informed to carry out equalizer tuning, the state is opened after the tuning is completed, and the receiving and sending of user data are started, so that the link fluctuation caused by the adjustment of the equalizer is avoided.

The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions.

For convenience of description, the above devices are described as being divided into various modules by functions, and are described separately. Of course, the functionality of the various modules may be implemented in the same one or more pieces of software and/or hardware in implementing one or more embodiments of the present description.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

As will be appreciated by one skilled in the art, embodiments of one or more embodiments of the present description may be provided as a method, system, or computer program product. Accordingly, one or more embodiments of the present description may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, one or more embodiments of the present description may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

One or more embodiments of the present description may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. One or more embodiments of the specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. A signal quality optimization method based on PCS and MII separation is characterized by comprising the following steps:

and step 3: checking the port state, and transmitting MAC data when the port connection link up state is set;

the preventing of the transmission of the MAC data specifically includes:

the MII sending end sends a far-end fault to the MII receiving end of the opposite end to prevent the opposite end from sending MAC data;

the step 1 of setting the initialization state of the system port specifically includes:

step 1.1: the PCS transmitting end is reset;

step 1.2: the MII sending terminal is reset;

step 1.3: MAC solution reset;

step 1.5: and the PCS receiving end is reset.

2. The signal quality optimization method of claim 1, wherein the step 2 of performing equalizer adjustment control specifically comprises:

3. The signal quality optimization method according to claim 2, wherein the performing the equalizer adjustment control according to the synchronization state and the reset state specifically comprises:

if the PCS is synchronized and the MII receiving terminal is reset, polling whether the equalizer adjustment is completed or not is performed, and a polling result is stored in a temporary variable is _ rxeq _ tuning, and if is _ rxeq _ tuning =1 and the equalizer adjustment is completed, the procedure goes to the step 3;

if the PCS is not synchronous and the MII receiving end is reset, the MII receiving end is reset again, a far-end fault is sent to the MII receiving end at the opposite end again, the is _ rxeq _ tuning is set to be 0, and the equalizer is adjusted again when the is _ rxeq _ tuning = 1;

4. The signal quality optimization method according to claim 2 or 3, wherein the checking of the port status in step 3 specifically comprises:

step 3.3: and judging whether the local end fault exists, if not, setting the port state as link up, starting to transmit the MAC data, and if so, skipping to the step 3.1.

5. A signal quality optimization apparatus based on PCS and MII separation, comprising:

the port initialization setting module is used for setting the initialization state of the system port and preventing the transmission of the MAC data;

the port state checking module is used for checking the port state and transmitting the MAC data when the port connection link up state is set;

wherein, the port initialization setting module comprises:

6. The signal quality optimization apparatus of claim 5, wherein the equalizer adjustment control module comprises:

the port status checking module includes:

and the port state setting unit is used for setting the port state as link up and starting to transmit MAC data when the PCS synchronization is finished, the MII receiving end is reset and no local end fault exists.

7. An ethernet communication system, characterized in that it comprises a signal quality optimization device according to one of claims 5 to 6.