CN112486455B - Hardware computing system for solving complex N times of root numbers based on CORDIC method and computing method thereof - Google Patents
Hardware computing system for solving complex N times of root numbers based on CORDIC method and computing method thereof Download PDFInfo
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Abstract
The invention provides a hardware computing system for solving a complex number of N times of root opening numbers based on a CORDIC method and a computing method thereof, wherein the system comprises the following components: the control unit controls the operation flow of the whole system by using a state machine mode; the plane coordinate conversion polar coordinate calculation unit is used for converting the complex number to be solved from a plane coordinate form to a polar coordinate form; the module length calculating unit is used for calculating N times of root opening numbers of the module length in the polar coordinate form of the complex number to be solved; a phase angle calculation unit for calculating one-nth of the phase angle in the polar form of the complex to be solved; the polar coordinate conversion plane coordinate calculation unit is used for converting the obtained complex number from a polar coordinate form into a plane coordinate form and outputting the complex number. The system effectively expands the input range by expanding the convergence domain of the used CORDIC calculation unit, and can flexibly adjust the calculation accuracy by adjusting the forward iteration times. Has wide application in the fields of signal processing, wireless communication and the like.
Description
Technical Field
The invention relates to the field of complex computing, in particular to a hardware computing system for solving complex N times of root numbers based on a CORDIC method and a computing method thereof.
Background
The transcendental function is evaluated by a common method, such as approximation of the objective function by using a polynomial, for example, using taylor's spreading, and the objective function can be approximated infinitely as long as the order is large enough. When we apply this method to some special machines, problems are quickly found: taylor expansion involves a large number of complex floating point operations, which for machines without hardware floating point units can only be implemented by software floating point.
The presence of CORDIC (Coordinate Rotation Digital Computer) solves this problem. The algorithm can be calculated by using an iterative approximation method only through addition/subtraction and shift operation, and is greatly convenient for machine realization. CORDIC algorithms are widely used, such as discrete fourier transforms, discrete cosine transforms, discrete Hartley transforms, chirp-Z transforms, various filters, and singular value decomposition of matrices. In a broad sense, the CORDIC algorithm provides an approximation method of mathematical calculations. It is well suited for hardware implementation because it can ultimately be broken down into a series of add-subtract and shift operations. For example, the CORDIC algorithm may be used in the engineering field to implement a direct digital frequency synthesizer.
For the calculation of the complex number N times of root number, a large amount of calculation and a large amount of consumption are required if other methods are adopted, and if the convergence domain is not expanded for the CORDIC algorithm, the range of the complex number is limited, so that the application is limited.
Disclosure of Invention
The invention aims to: an objective is to provide a hardware computing system for solving a plurality of N root-opening numbers based on the CORDIC method, so as to solve the above-mentioned problems in the prior art. It is a further object to propose a calculation method based on the above system.
The technical scheme is as follows: the hardware computing system for solving a plurality of N times of root opening numbers based on a CORDIC method mainly comprises: the device comprises a plane coordinate conversion polar coordinate calculation unit, a module length calculation unit, a phase angle calculation unit, a polar coordinate conversion plane coordinate calculation unit and a control unit.
Plane coordinate conversion polar coordinate calculation unit: the input complex number is converted into a polar coordinate form from a plane coordinate form to obtain a module length rho and a phase angle theta of the input complex number, and the unit is used for completing calculation mainly through a circular vector mode CORDIC (CORDIC_C_V). A module length calculation unit: obtaining the modulus rho of the input complex numberTo the power of->The unit mainly comprises a hyperbolic vector mode CORDIC (CORDIC_H_V), a linear vector mode CORDIC (CORDIC_L_V) and a hyperbolic rotation mode CORDIC (CORDIC_H_R).
A phase angle calculation unit: phase angle findingI.e. < ->The unit is mainly calculated by a linear vector mode CORDIC (cordic_l_v).
Polar coordinate conversion plane coordinate calculation unit: the complex number is converted from a polar coordinate form to a plane coordinate form, and the unit is mainly calculated by a circular rotation mode CORDIC (CORDIC_C_R).
And a control unit: and reading the configuration information N, calling each calculation unit through a loop state machine structure, and controlling the whole operation flow of the hardware calculation system for solving a plurality of N times of root opening numbers.
The hardware computing system for solving a plurality of N times of root numbers based on the CORDIC method is further designed in that: the calculation principle of the complex number N times of root opening numbers is as follows:
for any complex number there are:
Z＝p+jq＝ρcosθ+jρsinθ＝ρe j(2kπ+θ)
wherein:
the 1/N power of the complex number is calculated:
it is understood that the 1/N power of the modulus is taken, while the phase angle is divided into N equal parts after adding 2k pi.
The calculation can then be made:
the system only finds the value when k=0 for the sake of simple calculation process, and the other cases are the same.
Wherein the method comprises the steps ofCan be calculated from the following equation:
in a further embodiment, the hardware computing system inputs the following 3 variables: a real part p_in of the complex number to be solved; an imaginary part q_in of the complex number to be calculated; n in the N times root opening number; and outputs the following 2 variables: obtaining a real part p_out of the complex number; a complex number imaginary part q_out is obtained.
A hardware calculation method for solving a complex number N times of root opening numbers based on a CORDIC method comprises the following steps:
step 1, inputting configuration information N, and inputting a real part p_in and an imaginary part q_in to be calculated;
step 2, configuring initial input of CORDIC_C_V in a planar coordinate transformation polar coordinate calculation unit;
step 3, calculating the module length and phase angle of the input complex module length;
and 4, transmitting the output of the module length calculating unit and the output of the phase angle calculating unit to the polar coordinate conversion plane coordinate calculating unit, and outputting a calculating result to the outside.
In a further embodiment, step 2 comprises configuring an initial input, i.e. X, of CORDIC_C_V within the planar coordinate transformation polar coordinate calculation unit 10 ,Y 10 ,Z 10 Set to p_in, q_in,0, respectively; according to the output value X 1n ,Y 1n ,Z 1n The input complex numbers are converted into polar representation.
In a further embodiment, step 3 comprises: step 3-1, converting the plane coordinates into the module length output X of the polar coordinate calculation unit 1n Transmitting to a modular length calculation unit, configuring initial inputs X of CORDIC_H_V in the unit in sequence 20 ,Y 20 ,Z 20 Respectively X 1n +1,X 1n -1,0, the output of which is X 2n ,Y 2n ,Z 2n The method comprises the steps of carrying out a first treatment on the surface of the Initial input X of CORDIC_L_V 30 ,Y 30 ,Z 30 Respectively N, Z 2n *2+ln (p), 0, the output of which is X 3n ,Y 3n ,Z 3n The method comprises the steps of carrying out a first treatment on the surface of the Initial input X of CORDIC_H_R 40 ,Y 40 ,Z 40 Respectively is Z 3n Ln (k) with output X 4n ,Y 4n ,Z 4n Y finally obtained 4n To the power 1/N of the modulo rho of the complex number, i.e. +.>
Step 3-2, converting the plane coordinates into phase angle output Z of the polar coordinate calculation unit 1n Transmitting to phase angle calculating unit, multiplexing CORDIC_L_V in module length calculating unit, and configuring initial input X of CORDIC_L_V 50 ,Y 50 ,Z 50 Respectively N, Z 1n 0, its output is X 5n ,Y 5n ,Z 5n Finally obtainSo far, the polar coordinate expression form of the N times of root numbers to be solved is obtained after the whole step 3 is completed->
In a further embodiment, step 4 comprises: the outputs of the modular length calculating unit and the phase angle calculating unit are transmitted to a polar coordinate conversion plane coordinate calculating unit, and the initial input X of the CORDIC_C_R inside the unit is configured 60 ,Y 60 ,Z 60 Respectively Y 4n ，0，Z 5n The output is X 6n ,Y 6n ,Z 6n The unit converts the result of the polar coordinate expression into a planar coordinate formAnd outputs the calculation result to the outside.
In a further embodiment, the tan h that occurs in the calculation -1 (2 -i )，tan -1 (2 -i )， Constant, look-up table is used to pre-store these values and look up them.
The beneficial effects are that: the invention realizes a hardware computing system for solving a plurality of N times of root numbers based on the CORDIC method, adopts a fixed-point data format, effectively expands the input range by expanding the convergence domain of the used CORDIC computing unit, and can flexibly adjust the computing precision. In the hardware implementation, only through shift and addition and subtraction operations, the hardware calculation of any complex number N times of root opening numbers can be completed under low area consumption, and the method has wide application in the fields of signal processing, wireless communication and the like.
Drawings
FIG. 1 is a block diagram of a hardware computing system for complex N-degree root-counting based on the CORDIC method of the present invention.
Fig. 2 is a schematic workflow diagram of the present system.
Fig. 3 is a simulation diagram of the number of forward iterations and the calculation accuracy of the present system.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the invention may be practiced without one or more of these details. In other instances, well-known features have not been described in detail in order to avoid obscuring the invention.
The output and input relationships of each CORDIC model required by the computing system are as follows: assuming that the inputs of each model are X, Y, and Z, the outputs are as follows:
CORIC_C_R:
Xn＝K(X·cosZ-Y·sinZ)
Yn＝K(Y·cosZ+X·sinZ)
Zn＝0
CORIC_C_V:
Yn＝0
CORIC_L_V:
Xn＝X
Yn＝0
CORIC_H_R:
Xn＝K * (X·coshZ-Y·sinhZ)
Yn＝K * (Y·coshZ+X·sinhZ)
Zn＝0
CORIC_H_V:
Yn＝0
for the calculation of the complex number N times of root number, a large amount of calculation and a large amount of consumption are required if other methods are adopted, and if the convergence domain is not expanded for the CORDIC algorithm, the range of the complex number is limited, so that the application is limited. The CORDIC-based method provided by the invention meets the requirement of solving the root number N times by using a large-range input with low area consumption under the wide convergence domain, can be suitable for more practical application scenes, and has certain reference significance and application prospect.
The hardware computing system for solving a complex number of N times of root opening numbers based on the CORDIC method in the embodiment mainly comprises: the device comprises five units, namely a planar coordinate conversion polar coordinate calculation unit, a module length calculation unit, a phase angle calculation unit, a polar coordinate conversion planar coordinate calculation unit and a control unit, which are shown in fig. 1.
Plane coordinate conversion polar coordinate calculation unit: the input complex number is converted into a polar coordinate form from a plane coordinate form to obtain a module length rho and a phase angle theta of the input complex number, and the unit is used for completing calculation mainly through a circular vector mode CORDIC (CORDIC_C_V).
A module length calculation unit: obtaining the modulus rho of the input complex numberTo the power of->The unit mainly comprises a hyperbolic vector mode CORDIC (CORDIC_H_V), a linear vector mode CORDIC (CORDIC_L_V) and a hyperbolic rotation mode CORDIC (CORDIC_H_R).
A phase angle calculation unit: phase angle findingI.e. < ->The unit is mainly composed of a linear vector mode CORDIC (COR)Dic_l_v) completes the calculation.
Polar coordinate conversion plane coordinate calculation unit: the complex number is converted from a polar coordinate form to a plane coordinate form, and the unit is mainly calculated by a circular rotation mode CORDIC (CORDIC_C_R).
And a control unit: and reading the configuration information N, calling each calculation unit through a loop state machine structure, and controlling the whole operation flow of the hardware calculation system for solving a plurality of N times of root opening numbers.
The hardware computing system for solving a complex number N times of root numbers based on the CORDIC method has the following computing principle:
for any complex number there are:
Z＝p+jq＝ρcosθ+jρsinθ＝ρe j(2kπ+θ)
wherein:
the 1/N power of the complex number is calculated:
it is understood that the 1/N power of the modulus is taken, while the phase angle is divided into N equal parts after adding 2k pi.
The calculation can then be made:
the system only finds the value when k=0 for the sake of simple calculation process, and the other cases are the same.
Wherein the method comprises the steps ofCan be calculated from the following equation:
the low-consumption calculation process of the system can be completed by utilizing the characteristics of complex operations such as logarithmic operation, division operation, exponential operation and the like by using a CORDIC calculation method only through simple addition and shift calculation.
The hardware computing system for solving a complex number N times of root numbers based on the CORDIC method is provided with 3 variables: one is the real part p_in of the complex to be found, the other is the imaginary part q_in of the complex to be found, and N in the N-degree root number. The output has two variables: one is to find the real part p_out of complex numbers, and the other is to find the imaginary part q_out of complex numbers.
The specific implementation flowchart of the hardware computing system for solving the complex number N times of root numbers based on the CORDIC method in this example is shown in fig. 2, and the specific steps are as follows:
step 1) inputting configuration information N, and inputting a real part p_in and an imaginary part q_in to be calculated.
Step 2) configuring initial input of CORDIC_C_V in planar coordinate transformation polar coordinate unit, i.e. X 10 ,Y 10 ,Z 10 The input complex number can be converted into a polar coordinate representation based on the output value.
Configuration:
X 10 ＝p,Y 10 ＝q,Z 10 ＝0
and obtaining output:
Y1n＝0,/>
where K is the size shrinkage factor in the circumferential pattern.
Step 3-1) according to the output of step 2, successively configuring the initial input X of CORDIC_H_V in the modular length calculation unit 20 ,Y 20 ,Z 20 Initial input X of CORDIC_L_V 30 ,Y 30 ,Z 30 Initial input X of CORDIC_H_R 40 ,Y 40 ,Z 40 The 1/N power of the modulus ρ of the complex number can be obtained from the output value of CORDIC_H_R.
Configuration:
X 20 ＝Kρ+1,Y 20 ＝Kρ-1,Z 20 ＝0
and obtaining output:
subtracting the obtained Z2n fromAnd shifting 1 bit back and left to obtain ln (ρ).
Configuration:
X 30 ＝N,Y 30 ＝ln(ρ),Z 30 ＝0
the method comprises the following steps:
Z3n＝ln(ρ)/N
first look-up table to obtainAdding Z3n to it with an adder to obtain +.>
Configuration:
the method comprises the following steps:
wherein K is * Is the size shrinkage factor in a hyperbolic system.
Step 3-2) initial input X of configuration phase angle calculation unit CORDIC_L_V 50 ,Y 50 ,Z 50 ObtainingAccording to the output value, the polar coordinate expression form of the given complex number N times of root opening numbers can be obtained>
Configuration:
X 50 ＝N,Y 50 ＝θ,Z 50 ＝0
the method comprises the following steps:
step 4) configuring the input X of CORDIC_C_R in the polar coordinate conversion planar coordinate unit 60 ,Y 60 ,Z 60 The result of the polar coordinate expression form can be converted into a plane coordinate form according to the output value And outputs the calculation result to the outside.
Configuration:
Y 60 ＝0,Z 60 ＝θ 0
the method comprises the following steps:
the method for expanding the convergence domain of the hardware computing system for solving a complex number of N times of root numbers based on the CORDIC method is as follows:
the cordic_h_v calculation unit expands the original i=0, 1,2, …, N to i= -m, -m+1, …,0,1,2, …, N, while the expression needs to be expressed by the original 2 -i Change to 1-2 -2-i+1 I is less than or equal to 0. The iterative formula is:
x i+1 ＝x i -sign(y i )(1-2 -2-i+1 )y i
y i+1 ＝y i -sign(y i )(1-2 -2-i+1 )x i
z i+1 ＝z i +sign(y i )tanh -1 (1-2 -2-i+1 )
at this time, HV corresponds to K * The expression of (2) is updated to
The cordic_h_r calculation unit expands the original i=0, 1,2, …, N to i= -2, -1,0,1,2, …, N, while the expression needs to be changed from the original 2 -i Change to 1-2 -2-i+1 I is less than or equal to 0. The iterative formula is:
x i+1 ＝x i +sign(z i )(1-2 -2-i+1 )y i
y i+1 ＝y i +sign(z i )(1-2 -2-i+1 )x i
z i+1 ＝z i -sign(z i )tanh -1 (1-2 -2-i+1 )
at this time, HV corresponds to K * The expression of (2) is updated to
The CORDIC_L_V calculation unit expands the original i=0, 1,2, … and N into i= -2, -1,0,1,2, … and N
The CORDIC_C_R calculation unit expands the original i=0, 1,2, … and N into i= -2, -1,0,1,2, … and N, and the iterative expression is unchanged.
The CORDIC_C_V calculation unit expands the original i=0, 1,2, … and N into i= -2, -1,0,1,2, … and N, and the iterative expression is unchanged.
Calculation of the tan h present -1 (2 -i )，tan -1 (2 -i )， And the like, a look-up table method is used for searching after real pre-storage in an algorithm.
In the above special case, in MATLAB, n=2, 3,4 are simulated, the real part and the imaginary part of the input complex number are randomly sampled at [ -100,100], 10000 times are repeatedly sampled, the relation between the simulation precision result and the forward iteration number is shown in fig. 3, the simulation precision result is encoded by using Verilog hardware description language, two cases are sampled for verification, 31-bit fixed point numbers are adopted in hardware calculation, wherein 1-bit sign bit, 10-bit integer bit and 20-bit decimal bit are adopted, and the verification conditions are shown in table 1. The performance indexes shown in Table 2 can be obtained by integrating the materials under the process library with the station electricity of 27 nm.
Table 1: accuracy verification case table
| Case(s) | Input device | Number of times of opening root number N | MATLAB simulation accuracy | Verilog implementation accuracy |
| Case 1 | 2+3i | 2 | 4.4317×10 -5 | 7.9186×10 -5 |
| Case 2 | -3+2i | 3 | 4.5198×10 -5 | 9.6117×10 -5 |
Table 2: comprehensive performance index table
| Frequency of | Area of | Power consumption |
| 1GHz | 6275.3um 2 | 2.6176mW |
| 1.5GHz | 6561.2um 2 | 3.9549mW |
In summary, in the hardware computing system based on the CORDIC method for obtaining the complex number N times of root numbers in this embodiment, the input range is extended by expanding the convergence domain of the CORDIC computing unit used, and as can be seen from fig. 3, the computing accuracy can be flexibly adjusted. In the hardware implementation, only through shift and addition and subtraction operations, the hardware calculation of any complex number N times of root opening numbers can be completed under low area consumption, and the method has low calculation complexity, low hardware cost and high hardware utilization rate, and simultaneously shows great potential for practical application.
As described above, although the present invention has been shown and described with reference to certain preferred embodiments, it is not to be construed as limiting the invention itself. Various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. A hardware computing system for solving a plurality of N root numbers based on a CORDIC method, comprising:
a planar coordinate conversion polar coordinate calculation unit for converting the input complex number from a planar coordinate form to a polar coordinate form;
a module length calculation unit for calculating an input complex module length;
a phase angle calculation unit for calculating a phase angle of the input complex number;
invoking a control unit of each computing unit through a loop state machine structure;
the plane coordinate conversion polar coordinate calculation unit converts the input complex number from a plane coordinate form to a polar coordinate form to obtain the modular length of the input complex numberAnd phase angle>Completing calculation through a circumferential vector mode;
the module length calculating unit is further used for calculating the module length of the input complex numberIs->Power of: />The calculation is completed by a hyperbolic vector mode, a linear vector mode and a hyperbolic rotation mode;
the phase angle calculation unit is further used for calculating phase angle：/>Completing calculation by a linear vector mode;
the polar coordinate conversion plane coordinate calculation unit is further used for converting a complex number from a polar coordinate form to a plane coordinate form and completing calculation by a circumferential rotation mode;
the control unit is further used for reading the configuration information N, calling each calculation unit through the circulation state machine structure, and controlling the whole operation flow of the hardware calculation system for solving the root number for a plurality of N times.
2. The hardware computing system for solving a complex number of N root-openings based on the CORDIC method of claim 1, wherein the hardware computing system inputs the following 3 variables: real part of complex to be solvedThe method comprises the steps of carrying out a first treatment on the surface of the Imaginary part of complex number to be solved->The method comprises the steps of carrying out a first treatment on the surface of the N in the N times root opening number; and outputs the following 2 variables: find the real part of complex number->The method comprises the steps of carrying out a first treatment on the surface of the Find the imaginary part of complex number->。
3. A hardware computing method for solving a plurality of N times of root opening numbers based on a CORDIC method is characterized by comprising the following steps:
step 1, inputting configuration information N, and inputting a real part p_in and an imaginary part q_in to be calculated;
step 2, configuring initial input of a circular vector mode CORDIC in a plane coordinate transformation polar coordinate calculation unit;
step 3, calculating the module length and phase angle of the input complex module length;
step 4, transmitting the output of the module length calculating unit and the phase angle calculating unit to a polar coordinate conversion plane coordinate calculating unit, and outputting a calculating result to the outside;
the plane coordinate conversion polar coordinate calculation unit converts the input complex number from a plane coordinate form to a polar coordinate form to obtain the modular length of the input complex numberAnd phase angle>Completing calculation through a circumferential vector mode;
the module length calculating unit is further used for obtaining the module length of the input complex numberIs->Power of: />The calculation is completed by a hyperbolic vector mode, a linear vector mode and a hyperbolic rotation mode;
the phase angle calculating unit is further used for calculating phase angle：/>Completing calculation by a linear vector mode;
the polar coordinate conversion plane coordinate calculation unit is further used for converting the complex number from a polar coordinate form to a plane coordinate form and completing calculation by a circumferential rotation mode;
and (3) calling each calculation unit through a loop state machine structure by reading the configuration information N, and controlling the overall operation flow of the hardware calculation system for solving the root number of the plurality of N times.
4. The hardware computing method for complex N-degree root-counting based on CORDIC method as recited in claim 3, wherein step 2 further comprises configuring initial input of the circular vector mode CORDIC in the planar coordinate transformation polar coordinate computing unit, namelySet to p_in, q_in,0, respectively; according to the output value +.>The input complex numbers are converted into polar representation.
5. The method for computing a complex number of N root-openings based on the CORDIC method of claim 3, in which step 3 further includes:
step 3-1, converting the plane coordinates into the module length output of the polar coordinate calculation unitTransmitting to a module length calculating unit, and successively configuring the initial input +.A hyperbolic vector mode CORDIC in the unit>Respectively->,/>0, its output is +.>The method comprises the steps of carrying out a first treatment on the surface of the Initial input of linear vector mode CORDIC +.>N, respectively->0, its output is +.>The method comprises the steps of carrying out a first treatment on the surface of the Initial input +.f. of hyperbolic rotation mode CORDIC>Respectively->，/>，/>Its output is +.>Finally determined->Is a complex number of modes->To the 1/N power of (i.e.)>；
Step 3-2, converting the plane coordinates into phase angle output of the polar coordinate calculation unitTransmitting to phase angle calculating unit, multiplexing the linear vector mode CORDIC in the modular length calculating unit, and configuring the initial input of the linear vector mode CORDIC +.>N, respectively->0, its output is +.>Finally obtain->The method comprises the steps of carrying out a first treatment on the surface of the So far, the polar coordinate expression form of the N times of root numbers to be solved is obtained after the whole step 3 is completed>。
6. A method for computing a complex number of N root-openings based on the CORDIC method of claim 3, in which step 4 further includes: the outputs of the module length calculating unit and the phase angle calculating unit are transmitted to the polar coordinate conversion plane coordinate calculating unit, and the initial input of the circular rotation mode CORDIC inside the unit is configuredRespectively->，0，/>Its output is +.>The unit converts the result of the polar coordinate expression into a planar coordinate formAnd outputs the calculation result to the outside.
7. A method for computing a complex number of N root-openings based on the CORDIC method of claim 3 in which the computing occurs，/>，/>，/>Constant, look-up table is used to pre-store these values and look up them.
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| CN113778379A (en) * | 2021-09-27 | 2021-12-10 | 南京宁麒智能计算芯片研究院有限公司 | CORDIC-based low-complexity hardware system and application method |
| CN113778378B (en) * | 2021-09-27 | 2024-09-10 | 南京宁麒智能计算芯片研究院有限公司 | Device and method for solving complex N times square root |
| CN116679988B (en) * | 2023-08-02 | 2023-10-27 | 武汉芯必达微电子有限公司 | Hardware acceleration unit, hardware acceleration method, chip and storage medium |
| CN117348685B (en) * | 2023-10-25 | 2024-05-10 | 灿芯半导体(成都)有限公司 | Signal processing method of DDS generator |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062540A (en) * | 2018-06-06 | 2018-12-21 | 北京理工大学 | A kind of restructural floating-point operation device based on cordic algorithm |
| CN111984227A (en) * | 2020-08-26 | 2020-11-24 | 南京大学 | Approximate calculation device and method for complex square root |
| CN111984226A (en) * | 2020-08-26 | 2020-11-24 | 南京大学 | Cube root solving device and solving method based on hyperbolic CORDIC |
-
2020
- 2020-11-27 CN CN202011357034.8A patent/CN112486455B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062540A (en) * | 2018-06-06 | 2018-12-21 | 北京理工大学 | A kind of restructural floating-point operation device based on cordic algorithm |
| CN111984227A (en) * | 2020-08-26 | 2020-11-24 | 南京大学 | Approximate calculation device and method for complex square root |
| CN111984226A (en) * | 2020-08-26 | 2020-11-24 | 南京大学 | Cube root solving device and solving method based on hyperbolic CORDIC |
Non-Patent Citations (6)
| Title |
|---|
| "Low-Latency Low-Complexity Method and Architecture for Computing Arbitrary Nth Root of Complex Numbers";Ruiqi Wu;《IEEE》;20220315;2529-2541 * |
| "Hyperbolic CORDIC-Based Architecture for Computing Logarithm and Its Implementation";Hui Chen等;《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS》;20220206;2652-2656 * |
| CORDIC算法研究及其硬件实现;丁晓红;;甘肃科技纵横;20100815(第04期);34-35 * |
| 一种基于CORDIC算法的复乘模块设计及其FFT应用;岳鸿鹏;王和明;任;;微电子学;20100820(第04期);73-76 * |
| 基于FPGA的CORDIC算法通用IP核设计;张俊涛;王红仓;;微计算机信息;20080725(第21期);244-246 * |
| 张俊涛 ; 王红仓 ; .基于FPGA的CORDIC算法通用IP核设计.微计算机信息.2008,(第21期),244-246. * |
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