CN1124677C

CN1124677C - HF voltage-type power converter and its control method

Info

Publication number: CN1124677C
Application number: CN 00137767
Authority: CN
Inventors: 蔡嘉明
Original assignee: FEIRUI Co Ltd
Current assignee: FEIRUI Co Ltd
Priority date: 2000-12-29
Filing date: 2000-12-29
Publication date: 2003-10-15
Anticipated expiration: 2020-12-29
Also published as: CN1361585A

Abstract

The present invention relates to an HF voltage type power converter and a control method thereof. Input voltage and output voltage are fed back respectively by a microprocessor through a voltage reduction unit; then, the input voltage and the output voltage are compared and calculated with a cut-off time table which is preset in the microprocessor according to the conditions of the input voltage and the output voltage; a time pulse signal and an analogue output voltage signal are outputted to control the cut-off time of a voltage type pulse width modulation controller of the power converter; further, the output voltage is controlled to response in a stable state, and the waveforms of input current can be effectively improved. Further, the efficiency of the power converter is enhanced, and the problem of heat radiation is effectively reduced.

Description

HF voltage-type power converter and control method thereof

The present invention relates to a kind of HF voltage-type power converter and control method thereof.

General voltage pattern PDM keyer (Voltage PWM Controller), its operation principle is when wherein oscillator begins to produce triangular wave, PDM keyer also drives the active switch of a primary side of power converter simultaneously, error amplifier in the middle of the output voltage of power converter directly feeds back to PDM keyer, to produce an error signal, and when can be with the triangular wave that oscillator produces tangent, promptly close initiatively switch, produce the suitable work period whereby, and with the power conversion of primary side to primary side.

Yet, in voltage pattern control method, often be subject to and there is no current feedback in the PDM keyer to the control closed-loop control, system responses is determined by output voltage fully, cross slow and dwindle output voltage stable state pulsatile change in order to prevent the output voltage transient response, often the frequency range of the voltage control closed loop in the middle of the PDM keyer is designed than the high several times of input equipment frequency even tens of times, in case voltage control closed loop frequency range is excessively improved, can cause the input current waveform distortion to become big, the input current root-mean-square value also increases thereupon, the input voltage pulsation increases, and causes intake to increase, and efficient reduces and heat dissipation capacity increases problem greatly.

On the contrary, if the frequency range of Voltage Feedback control closed loop in the reduction PDM keyer, the input current waveform distortion factor is reduced, yet but must pay the slack-off and big cost of output voltage stable state pulsation change of output voltage transient response, yet the influence that the output voltage transient response is produced, be not only the output load and can't bear low transient voltage, produce the effect of outage, simultaneously, portion of element such as electrochemical capacitor and semiconductor also are subject to withstand voltage specification in the power converter, can't bear too high transient voltage, and the excursion of output voltage stable state pulsation also usually needs to meet the product regulation.

If the PDM keyer that changes with average current or peak current drives initiatively switch, then must add a current control loop, determine the characteristic of input current and output voltage jointly by the frequency response of voltage control loop and current control loop, in addition, also must add a current transformer (Current Transformer), adopt magnetic element such as CT and corresponding control circuit to improve complexity, volume and the cost of circuit greatly.

Therefore, the object of the present invention is to provide a kind of high frequency voltage power converter and control method thereof of controlling deadline, the deadline of its may command one PDM keyer is to control its output voltage transient response.

For achieving the above object, a kind of HF voltage-type power converter of controlling deadline of the present invention comprises a power input unit, one active drive unit is connected with this power input unit, one high frequency power transducer is connected in this active drive unit, one output unit is connected with the high frequency power transducer, described power input unit and output unit see through an input pressure unit separately and an output buck unit feeds back to a microprocessor with input voltage and output voltage, by the condition of this microprocessor according to input and output voltage, export a clock pulse to control the deadline of a PDM keyer, control described active drive unit by this PDM keyer.

For achieving the above object, the method for control HF voltage-type power converter of the present invention may further comprise the steps: set up table deadline; Read input and output voltage values; Judge input and output voltage values,, then carry out next step if input voltage differs from the input voltage preset value or output voltage is lower than the output voltage preset value; Show to read deadline from aforementioned deadline according to input and output voltage; Utilize and control PDM keyer this deadline.

Adopt the present invention to roll over foregoing circuit structure and control method, may command output voltage transient response is improved input current waveform, and then improves the efficient of power converter, and reduces heat dissipation capacity.Simultaneously, also have the following advantages: 1. since output voltage sees through the output buck unit feed back to microprocessor after, send an analog output signal to PDM keyer by microprocessor, but not output voltage is directly fed back to PDM keyer, therefore, the filter that output voltage sees through in little reason device can be eliminated assorted signal, responds to improve output voltage frequency, and simplifies the circuit of this PDM keyer.2. because the clock signal and the analog output signal of PDM keyer all are to be provided by microprocessor, therefore higher resolution can be provided, deadline can be controlled more accurately.

For can further clearer understanding purpose of the present invention, characteristics and advantage described in detail below with reference to accompanying drawings:

Fig. 1 is a circuit block diagram of the present invention;

Fig. 2 is an input interrupt handling routine flow chart of the present invention;

Fig. 3 is an output interrupt handling routine flow chart of the present invention;

Fig. 4 is the detailed circuit diagram of power input unit of the present invention, high frequency power transducer and output unit;

Fig. 5 is the detailed circuit diagram of active drive unit of the present invention;

Fig. 6 is the detailed circuit diagram of input pressure unit of the present invention, output buck unit and microprocessor;

Fig. 7 is the detailed circuit diagram of PDM keyer of the present invention.

Relevant HF voltage-type power converter proposed by the invention and control method thereof see also Fig. 1, the circuit block diagram of power converter shown in the figure, and as shown in the figure, it comprises:

One power input unit 10, its detailed circuit please refer to shown in Figure 4;

One active drive unit 20, it is connected to this power input unit 10, and its detailed circuit please refer to shown in Figure 5, in embodiment illustrated in fig. 5 is to be made of a pulse wave transformer;

One high frequency power transducer 30, it is connected to this active drive unit 20, and its detailed circuit please refer to shown in Figure 4, and this high frequency power transducer 30 can be a full-bridge converters (as shown in FIG.), a half-bridge transducer or a push pull converter;

One output unit 40, it is connected to described high frequency power transducer 30, and its detailed circuit please refer to shown in Figure 4;

This power input unit 10 sees through an input pressure unit 50 respectively with output unit 40 and an output buck unit 60 feeds back to a microprocessor 70 with input voltage and output voltage after step-down, its detailed circuit please refer to shown in Figure 6, again by this microprocessor 70 output one clock pulse signals and analog output signal to a PDM keyer 80 (its detailed circuit please refer to shown in Figure 7) to control its deadline, again by PDM keyer 80 these active drive unit 20 of control.

Wherein, this microprocessor 70 be provided with two sample time different interrupt handling routines, in different interrupt handling routines, by the condition of input with output voltage, after comparing and calculate with default table deadline (preset dead-time table), export the deadline of a clock pulse signal controlling PDM keyer 80, in other words, the effective operable time of oscillator in the middle of the control PDM keyer 80, under different inputs and output voltage situation, limit its maximal duty cycle.

How to determine the method for table deadline, details are as follows for its principle:

When 30 work of high frequency power transducer, if select the suitable primary side influence value of transducer, can be so that transducer be operated under the continuous current pattern continuous modecondition, calculate with the shunt voltage on the primary side inductance, then the relation of input voltage, output voltage and work period is as described in equation (1), (2):

L_{\sec} \cdot \frac{{di}_{L}}{D_{ON}} \cdot f_{S} = \frac{N_{2}}{N_{1}} V_{IN} - V_{O} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (1)

L_{\sec} \cdot \frac{{di}_{L}}{1 - D_{ON}} \cdot f_{S} = V_{O} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (2)

Above-mentioned two equation through conversion, can be obtained common equation (3):

\frac{N_{2}}{N_{1}} \cdot V_{IN} \cdot D_{ON} = V_{O} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (3)

By equation (3), can find that when output voltage one timing, when input voltage hanged down, the work period became big, even can reach the maximal duty cycle that controller provides; Yet, when input voltage is higher, because the pulsation of voltage increases with load, under the voltage control closed loop feedback, produce the inhomogenous work period, become greatly so its peak current may increase with work period and input voltage, its principle is as described in the equation (4):

L_{pri} \cdot \frac{{di}_{SW}}{dt} = V_{IN} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (4)

L wherein _PriFor high frequency power transducer primary side inductance is sensed the influence value of primary side, with the relation of primary side influence value as described in the equation (5):

L_{pri} = \frac{N_{1}^{2}}{N_{2}^{2}} \cdot L_{\sec} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (5)

In the same work period, equation (4) can be transferred to equation (6) again:

L_{pri} \cdot \frac{{ΔI}_{SW}}{D_{ON}} \cdot f_{S} = V_{IN} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (6)

Can find out by equation (6), under same duty cycle, when input supply voltage is higher, promptly can cause the primary side switch current change quantity to increase thereupon; And input current provides the primary side switch energy via the electric capacity of importing the power supply parallel connection, so input current also increases thereupon.

Relation between input current and the efficient is as described in equation (7), (8):

η = \frac{W_{OUT}}{W_{IN}} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (7)

W_{IN} = \frac{1}{T_{S}} {&Integral;}_{0}^{T_{S}} v_{IN} \cdot i_{IN} dt \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (8)

V wherein _INWith i _INBeing the function of time and input voltage, is not definite value usually, T _SBe the work period, f _SBe operating frequency, its relation is as described in the equation (9):

T_{S} = \frac{1}{f_{S}} \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot \cdot (9)

Can be found out that by equation (8) when input current is big more, input power can increase thereupon, efficient just can reduce, and this high frequency power transducer 30 can produce great heat simultaneously, often needs more heat abstractor, can cause the increase of cost like this.

Generally speaking, because input voltage can't change fast, belong to steady-state response, so sample time can be longer, therefore be to handle with long input interrupt handling routine of sampling time, its major control means are for as shown in Figure 2, required average duty cycle when calculating earlier maximum input current, consider the component error permissible value, can improve the minimum deadline of input current waveform again, by the table deadline in the different input voltage write-in programs (), read input voltage value again, judge whether input voltage is too high, if input voltage is too high microprocessor 70 can by read one deadline A, this deadline, A built on table deadline (), and A can raise and strengthen along with input voltage deadline.

And another sample time, short output interrupt handling routine was to be responsible for handling the output voltage transient response, when input voltage is higher, originally may be unable to cope with the load change of generation suddenly long deadline causes output voltage to reduce, when output voltage was reduced to when low, this interrupt handling routine can dwindle deadline, and improves output voltage whereby.Its control device system as shown in Figure 3, read output voltage values earlier, judge whether output voltage low excessively, if low excessively, then microprocessor 70 can in table two deadline read one deadline B, and with this deadline of B output with control PDM keyer 80, therefore suitably reply deadline, in the deadline of microprocessor 70 table two, when output voltage is low more, its deadline, B will be short more, to improve the utilance of high frequency power transducer 30.

This microprocessor 70 utilizes above-mentioned two different interrupt handling routines, different according to input voltage with the output voltage condition, and by separately interrupt handling routine and corresponding deadline table compare and calculate, export the deadline of a clock pulse signal controlling one PDM keyer 80.And another analog output signal system feeds back to microprocessor 70 with output voltage behind aforementioned output buck unit 60, reaches by these microprocessor 70 filtering and slightly reduces frequency range after amplifier output.

Claims

1. HF voltage-type power converter is characterized in that it comprises:

One power input unit;

One active drive unit, it is connected with this power input unit;

One high frequency power transducer, it is connected with this active drive unit;

One output unit, it is connected to this high frequency power transducer;

One microprocessor, it receives input voltage signal and output voltage signal respectively by this power input unit and output unit, and export a clock pulse signal and analog output signal controlling the deadline of a PDM keyer according to input voltage signal and output voltage signal, and control described active drive unit by this PDM keyer by this microprocessor.

2. HF voltage-type power converter as claimed in claim 1 is characterized in that,

Establish an input pressure unit between this power input unit and microprocessor, input voltage is delivered to microprocessor after step-down is handled;

Establish the output buck unit between this output unit and microprocessor, output voltage is delivered to microprocessor after step-down is handled.

3. HF voltage-type power converter as claimed in claim 1 is characterized in that, this high frequency power transducer is a full-bridge converters.

4. HF voltage-type power converter as claimed in claim 1 is characterized in that, this high frequency power transducer is a half-bridge transducer.

5. HF voltage-type power converter as claimed in claim 1 is characterized in that, this high frequency power transducer is a push pull converter.

6. HF voltage-type power converter as claimed in claim 1 is characterized in that, this active drive unit is a pulse wave transformer.

7. HF voltage-type power converter as claimed in claim 1 is characterized in that, is provided with an amplifier with the analog output signal amplification between this microprocessor and PDM keyer.

8. a method of controlling the HF voltage-type power converter of claim 1 is characterized in that, this method may further comprise the steps:

Set up table deadline;

Read input and output voltage values;

Judge input and output voltage values,, then carry out next step if input voltage differs from the input voltage preset value or output voltage is lower than the output voltage preset value;

Show to read deadline from aforementioned deadline according to input and output voltage;

Utilize and control PDM keyer this deadline.