CN112467514B - Distributed feedback semiconductor laser with wide working temperature range - Google Patents
Distributed feedback semiconductor laser with wide working temperature range Download PDFInfo
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- CN112467514B CN112467514B CN202011250138.9A CN202011250138A CN112467514B CN 112467514 B CN112467514 B CN 112467514B CN 202011250138 A CN202011250138 A CN 202011250138A CN 112467514 B CN112467514 B CN 112467514B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
- H01S5/0607—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying physical parameters other than the potential of the electrodes, e.g. by an electric or magnetic field, mechanical deformation, pressure, light, temperature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
- H01S5/0607—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying physical parameters other than the potential of the electrodes, e.g. by an electric or magnetic field, mechanical deformation, pressure, light, temperature
- H01S5/0612—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying physical parameters other than the potential of the electrodes, e.g. by an electric or magnetic field, mechanical deformation, pressure, light, temperature controlled by temperature
Abstract
The invention discloses a semiconductor device with wide working temperature range, belonging to the field of semiconductor devices and comprising: the device comprises a device region and a stress compensation region, wherein the device region comprises an active region which is of a multi-quantum well structure, and the thermal expansion coefficients of the device region and the stress compensation region are not equal; the stress compensation region is used to provide stress to the device region when the temperature of the semiconductor device is higher than an initial temperature to compensate for a threshold current increase and a differential gain decrease generated in the device region by the temperature increase. The device can work in a wide temperature range by utilizing the difference between the thermal property and the mechanical property of the materials of the device area and the stress compensation area and applying stress to the device area through the stress compensation area to compensate the influence of temperature rise on the threshold current and the differential gain of the device, and the constant threshold current and the high modulation bandwidth are ensured in the wide temperature range, so that the device has low energy consumption and reduced operation cost under the high temperature condition.
Description
Technical Field
The invention belongs to the field of semiconductor devices, and particularly relates to a semiconductor device with a wide working temperature range.
Background
Semiconductor lasers have the advantages of low cost, small size, mass production and the like, and have become important light sources in low-cost optical fiber communication applications. Under the huge demand of 5G communication networks and data centers, the distributed feedback semiconductor laser has become a core light source. The optical signal modulated and outputted by the laser is accompanied by waveform distortion, frequency chirp and the like. Meanwhile, as the temperature rises, the differential gain of the laser is rapidly reduced, the Auger recombination is rapidly enhanced, so that the threshold current of the chip is rapidly increased, the power consumption is increased, and an obvious modulation bandwidth bottleneck appears. The same is true for other semiconductor devices. How to increase the modulation bandwidth of a semiconductor device and improve the high-temperature characteristics of the semiconductor device is an important technical challenge facing the semiconductor device.
Optimization measures for the modulation bandwidth of semiconductor lasers typically include: the device impedance is reduced, the quantum well structure is optimized, the passive structure is integrated to reduce the length of the active region, and the buried heterojunction structure is adopted to reduce the width of the active region. Optimization measures for high temperature characteristics of semiconductor devices generally include: AlGaInAs material with good temperature characteristic and high differential gain is adopted, and the spatial hole burning effect is improved by adopting the asymmetric period modulation structure grating. The method makes the high temperature characteristic and the low temperature characteristic of the semiconductor device have obvious difference, and usually needs an additional temperature compensation circuit to avoid transmission errors caused by temperature change, so that the structure is complex.
Disclosure of Invention
In view of the defects and the improved requirements of the prior art, the present invention provides a semiconductor device with a wide operating temperature range, which aims to apply stress to a device region through a stress compensation region and compensate the influence of temperature rise on the threshold current and differential gain of the device, thereby realizing a semiconductor device with a wide operating temperature range, high bandwidth and low energy consumption without arranging an additional temperature compensation circuit.
In order to achieve the above object, according to an aspect of the present invention, there is provided a semiconductor device with a wide operating temperature range, including a device region and a stress compensation region, wherein the device region includes an active region, the active region is a multiple quantum well structure, and thermal expansion coefficients of the device region and the stress compensation region are not equal to each other; when the temperature of the semiconductor device is higher than the initial temperature, the stress compensation region is used for providing stress for the device region so as to compensate threshold current increase and differential gain reduction generated in the device region by temperature increase.
Furthermore, the device region sequentially comprises an n-surface electrode, a substrate, an n-type lower cladding layer, a lower limiting layer, the active region, an upper limiting layer, a grating layer, a p-type upper cladding layer, a ridge waveguide and a p-surface electrode from bottom to top, and three-level stepped structures are formed on two sides of the device region; the stress compensation region is arranged on the first step with the largest cross section size and comprises two parts which are positioned on two sides of the device region and have the same width.
Furthermore, the top layer of the first step is any one of the substrate, the n-type lower cladding layer and the lower limiting layer, the product of the thermal expansion coefficient and the Young modulus of the stress compensation region is larger than the product of the thermal expansion coefficient and the Young modulus of the device region, and the stress is compressive stress.
Further, the compressive stress is:
wherein ε is the compressive stress, E1And E2Young's modulus of the device region and the stress compensation region, 2W1And W2The widths of the device region and the stress compensation region, alpha1And alpha2The thermal expansion coefficients of the device region and the stress compensation region, T is the temperature of the semiconductor device, T0Is the initial temperature.
Furthermore, the top layer of the first step is the upper limiting layer, the thermal expansion coefficient of the stress compensation region is smaller than that of the device region, and the stress is compressive stress.
Furthermore, the top layer of the first step is the upper limiting layer, the thermal expansion coefficient of the stress compensation region is greater than that of the device region, and the stress is tensile stress.
Further, the semiconductor device is a laser, and the width W of the device region between the two parts of the stress compensation region2＞6μm。
Still further, the stress is determined by a material of the stress compensation region, a width of the stress compensation region, and a width of the device region.
Further, the higher the temperature of the semiconductor device, the greater the stress.
Generally, by the above technical solution conceived by the present invention, the following beneficial effects can be obtained: by utilizing the difference of the thermal and mechanical properties of the materials of the device region and the stress compensation region, stress is applied to the device region through the stress compensation region, and the influence of temperature rise on the threshold current and differential gain of the device is compensated, so that the device can work in a wide temperature range; the semiconductor device can ensure constant threshold current, slope efficiency and high modulation bandwidth in the wide temperature range, and a temperature compensation circuit is not required to be additionally arranged for the device, so that the complexity of the device is reduced; the semiconductor device can still keep lower energy consumption under the high-temperature condition, and the operation cost is reduced.
Drawings
FIG. 1 is a schematic structural diagram of a device region before a stress compensation region is provided;
FIG. 2 is a schematic structural diagram of a semiconductor device with a wide operating temperature range according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a semiconductor device with a wide operating temperature range according to another embodiment of the present invention.
The same reference numbers will be used throughout the drawings to refer to the same or like elements or structures, wherein:
1 is a device region, 2 is a stress compensation region, 10 is an n-face electrode, 11 is a substrate, 12 is an n-type lower cladding layer, 13 is a lower limiting layer, 14 is an active region, 15 is an upper limiting layer, 16 is a grating layer, 17 is a p-type upper cladding layer, 18 is a ridge waveguide, and 19 is a p-face electrode.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In the present application, the terms "first," "second," and the like (if any) in the description and the drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
The present invention provides a semiconductor device with a wide operating temperature range, and the semiconductor device with a wide operating temperature range in this embodiment is described in detail with reference to fig. 1 to 3.
The semiconductor device with the wide working temperature range comprises a device region 1 and a stress compensation region 2, wherein the thermal expansion coefficients of the device region 1 and the stress compensation region 2 are not equal. The device region 1 includes an active region 14, and the active region 14 has a multiple quantum well structure. When the temperature of the semiconductor device is higher than the initial temperature, the temperature rise may cause the threshold current of the device region 1 to rise and the differential gain to fall, and the stress compensation region 2 provides stress to the device region 1 to compensate the threshold current and the differential gain of the device region 1, so that the threshold current and the differential gain of the device region 1 are kept constant.
Examples of the semiconductor device include a distributed feedback semiconductor laser, an FP laser, a vertical surface Emitting laser, an optical amplifier, a Light Emitting Diode (LED), and the like. Taking a distributed feedback semiconductor laser as an example, current is injected into the device region 1 to provide gain for the laser, and meanwhile, an optical field is limited in the device region 1; the stress compensation region 2 is far away from the center of the device region 1 so as to ensure that the influence of the stress compensation region on partial current transport and light field of the device region can be ignored; the stress applied to the device region 1 by the stress compensation region 2 gradually increases with the temperature rise, and the increase of the threshold current and the decrease of the differential gain caused by the temperature rise can be compensated.
According to the embodiment of the invention, the device region 1 comprises an n-face electrode 10, a substrate 11, an n-type lower cladding layer 12, a lower limiting layer 13, an active region 14, an upper limiting layer 15, a grating layer 16, a p-type upper cladding layer 17, a ridge waveguide 18 and a p-face electrode 19 from bottom to top in sequence, the active region 14 is of a multi-quantum well structure, and two sides of the device region 1 are formed into a three-stage stepped structure. The stress compensation region 2 is disposed on the first step with the largest cross-sectional dimension and includes two portions with equal width on both sides of the device region 1. The three-level stepped structure means that each layer in the device region 1 has three different cross-sectional sizes, and the sizes are gradually reduced from bottom to top. The device region grating is a lambda/4 phase shift grating, so that the semiconductor device has good single mode characteristics. It should be noted that, in this embodiment, the compensation function can be realized by ensuring that the thermal expansion coefficients of the stress compensation region 2 and the multiple quantum well structure of the active region 14 are different, and the thermal and mechanical properties of other layers in the device region 1 are similar to those of the multiple quantum well structure, so that the compensation function can also be realized by ensuring that the thermal expansion coefficients of the device region 1 and the stress compensation region 2 are different.
In an embodiment of the present invention, the top layer of the first step is any one of the substrate 11, the n-type lower cladding layer 12, and the lower limiting layer 13, the stress compensation region 2 is disposed on the any one of the layers, a product of a thermal expansion coefficient and a young modulus of the stress compensation region 2 is greater than a product of a thermal expansion coefficient and a young modulus of the device region 1, and the stress compensation region 2 is configured to provide compressive stress for the device region 1. Taking the top layer of the first step as an n-type lower cladding layer 12 as an example, the stress compensation region 2 is located on the n-type lower cladding layer 12, as shown in fig. 2.
In the embodiment shown in fig. 2, due to the difference between the thermal and mechanical properties of the materials in the device region 1 and the stress compensation region, the introduced compressive stress epsilon of the multiple quantum wells in the device region is:
wherein E is1And E2Young's modulus of the device region 1 and the stress compensation region 2, 2W1And W2The widths, alpha, of the device region 1 and the stress compensation region 2, respectively1And alpha2The thermal expansion coefficients of the device region 1 and the stress compensation region 2, T is the temperature of the semiconductor device, T0Is the initial temperature. Due to E2α2＞E1α1Therefore, when the device temperature is higher than the initial temperature, the stress compensation region 2 may apply a compressive stress to the device region 1, and the larger the difference between the two products, the larger the compressive stress introduced.
In another embodiment of the present invention, the top layer of the first step is an upper confinement layer 15, and the stress compensation region 2 is disposed on the upper confinement layer 15, as shown in fig. 3. In this embodiment, the thermal expansion coefficient of the stress compensation region 2 is smaller than that of the device region 1, the stress compensation region 2 is used to provide compressive stress to the device region 1, and the larger the difference between the two thermal expansion coefficients is, the larger the compressive stress is introduced.
In another embodiment of the present invention, the top layer of the first step is an upper confinement layer 15, and the stress compensation region 2 is disposed on the upper confinement layer 15, as shown in fig. 3. In this embodiment, the thermal expansion coefficient of the stress compensation region 2 is greater than that of the device region 1, the stress compensation region 2 is used to provide tensile stress to the device region 1, and the larger the difference between the two thermal expansion coefficients is, the larger the tensile stress is introduced.
In the embodiment of the present invention, before the stress compensation region 2 is disposed, the structure of the device region 1 is as shown in fig. 1. The device region 1 comprises an n-surface electrode 10, a substrate 11, an n-type lower cladding layer 12, a lower limiting layer 13, an active region 14, an upper limiting layer 15, a grating layer 16, a p-type upper cladding layer 17, a ridge waveguide 18 and a p-surface electrode 19 from bottom to top in sequence; the cross sections of the n-face electrode 10, the substrate 11, the n-type lower cladding layer 12, the lower limiting layer 13, the active region 14, the upper limiting layer 15, the grating layer 16 and the p-type upper cladding layer 17 are the same in size and the largest in size; the dimensions of the ridge waveguide 18 and the p-face electrode 19 are minimal. In an embodiment of the present invention, the multiple quantum well structure of the active region shown in fig. 1 is changed, the stress compensation regions 2 are disposed on two sides of the multiple quantum well structure, and the finally formed semiconductor device structure is as shown in fig. 2, it should be noted that in this embodiment, the heights and positions of the stress compensation regions 2 on two sides of the multiple quantum well structure are not specifically limited, that is, the positions of two ends of the top and bottom of the stress compensation region 2 are not limited, and the stress compensation regions are located on two sides of the multiple quantum well structure. In another embodiment of the present invention, without changing the multiple quantum well structure of the active region shown in fig. 1, the stress compensation region 2 is disposed above the multiple quantum well structure, specifically above the upper limiting layer 15 on the multiple quantum well structure, and the finally formed semiconductor device structure is as shown in fig. 3, where it is to be noted that the height of the stress compensation region 2 above the multiple quantum well structure is not specifically limited.
In the embodiment of the present invention, when the semiconductor device is a laser, the width W of the device region 1 between the two portions of the stress compensation region 22> 6 μm. For the structure shown in FIG. 2, the width W of n-type under-cladding layer 122More than 6 μm; for the structure shown in FIG. 3, the width W of grating layer 162Is more than 6 microns, so as to ensure that the stress compensation region 2 is far away from the center of the device region 1, and the influence of the stress compensation region 2 on the current transport and the optical field of the device region 1 can be ignored.
When the semiconductor device is a laser, the ridge waveguide 18 has a height of, for example, 1.7 μm and a width of, for example, 2 μm, and current is injected from the ridge waveguide 18 into the device region. Under this condition, the optical field is mainly confined to the multi-quantum well region below the ridge waveguide, and the current transport is mainly confined to the device region with a width of 4 μm.
In the embodiment of the present invention, the stress is determined by the material of the stress compensation region 2, the width of the stress compensation region 2, and the width of the device region 1. The wider the stress compensation region, the greater the stress applied to the device region; the narrower the device region is, the greater the stress applied to the device region by the stress compensation region is; based on the relationship and the relationship between the thermal and mechanical properties and the stress, the material of the stress compensation region 2, the width of the stress compensation region 2, and the width of the device region 1 are designed to completely compensate the increase of the threshold current and the decrease of the differential gain caused by the temperature increase. In addition, the higher the temperature of the semiconductor device is, the larger the stress is, the larger the compensation of the semiconductor device is, so that the semiconductor device can keep constant threshold current, slope efficiency and high modulation bandwidth in a wide temperature range, the wide working temperature range is ensured, and an additional temperature compensation circuit is not required.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (4)
1. A distributed feedback semiconductor laser with a wide working temperature range is characterized by comprising a device region (1) and a stress compensation region (2), wherein the device region (1) comprises an active region (14), the active region (14) is of a multi-quantum well structure, and the thermal expansion coefficients of the device region (1) and the stress compensation region (2) are unequal;
the device region (1) sequentially comprises an n-face electrode (10), a substrate (11), an n-type lower cladding layer (12), a lower limiting layer (13), the active region (14), an upper limiting layer (15), a grating layer (16), a p-type upper cladding layer (17), a ridge waveguide (18) and a p-face electrode (19) from bottom to top, and three-stage stepped structures are formed on two sides of the device region; the stress compensation region (2) is arranged on a first-stage step with the largest cross section size and comprises two parts which are positioned at two sides of the device region (1) and have the same width;
the top layer of the first-stage step is the upper limiting layer (15), and the thermal expansion coefficient of the stress compensation region (2) is larger than that of the device region (1);
the stress compensation region (2) is configured to provide tensile stress to the device region (1) to compensate for a threshold current increase and a differential gain decrease in the device region (1) caused by a temperature increase when the temperature of the distributed feedback semiconductor laser is higher than an initial temperature.
2. The wide operating temperature range distributed feedback semiconductor laser as claimed in claim 1 wherein the width of the device region (1) between the two portions of the stress compensation region (2) is greater than 6 μm.
3. The wide operating temperature range distributed feedback semiconductor laser as defined in claim 1 wherein the stress is determined by the material of the stress compensation region (2), the width of the stress compensation region (2) and the width of the device region (1).
4. A distributed feedback semiconductor laser having a wide operating temperature range as in any of claims 1-3 wherein said stress is greater the higher the temperature of said distributed feedback semiconductor laser.
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