CN112463715A - Inter-core communication method and device based on virtual data bus - Google Patents
Inter-core communication method and device based on virtual data bus Download PDFInfo
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/177—Initialisation or configuration control
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
- G06F9/4451—User profiles; Roaming
Abstract
An inter-core communication method based on a virtual data bus is characterized by comprising the following steps: step 1, defining data topology information of inter-core communication based on a multi-core processor, and generating a multi-core resource configuration file according to the data topology information; step 2, guiding a master core to analyze the multi-core resource configuration file, and creating a data exchange pipeline in a shared space between the master core and a plurality of slave cores based on the analysis; and 3, instructing the virtual data bus controller to realize the communication interaction of the inter-core communication data based on the data exchange pipeline and the service data type of the inter-core communication. Based on the method, the service data of the inter-core communication can be divided according to types, and the routing table of the inter-core communication is constructed through unified modeling, so that the communication interaction is realized.
Description
Technical Field
The present invention relates to inter-core communication of a multi-core processor, and more particularly, to an inter-core communication method and apparatus based on a virtual data bus.
Background
At present, with the continuous improvement of various services on the performance requirements of a CPU, a single-core processor cannot meet the service requirements because a large amount of heat generation and performance reduction are caused by the high-speed operation of a single-core chip of the single-core processor. Therefore, multi-core processors are increasingly used in various industries. In the power industry, because a power grid has stricter requirements on real-time performance and safety of communication in the operation process, a Multi-core processor in the power industry generally operates in an AMP (Asymmetric Multi-processing) mode, different applications can be independently operated among a plurality of cores, and the different applications can be operated without an operating system, so that the real-time performance and the reliability of program operation are ensured.
However, although such isolated design of the application running using the independent cores can improve the security of the application, the difficulty of data communication between the cores is increased. Developers need to know a target core and a source core of inter-core communication, know how to divide shared memory resources, and how to realize inter-core application program communication by using the shared memory. For the above reasons, the difficulty of the overall design of the application program increases, and due to the absence of a unified multi-core communication framework, the program cannot flexibly cope with the business change. In addition, when the service data changes, the data communicated between cores also changes, which also causes the un-portability of the communication program. At present, application programs in a multi-core processor running in an AMP mode all implement multi-core communication based on a shared memory and an inter-core interrupt mode, however, this mode can only meet basic communication requirements of multi-core communication, and cannot simultaneously implement the requirements of inter-core rapid deployment and inter-core communication flexible configuration of power secondary equipment.
Therefore, a new method and apparatus for inter-core communication based on virtual data bus is needed.
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide a method and a device for inter-core communication based on a virtual data bus, which can divide service data of inter-core communication according to types and construct a routing table of inter-core communication through unified modeling, thereby realizing communication interaction.
The invention adopts the following technical scheme. The invention relates to a virtual data bus-based inter-core communication method, which comprises the following steps: step 1, defining data topology information of inter-core communication based on a multi-core processor, and generating a multi-core resource configuration file according to the data topology information; step 2, guiding a master core to analyze the multi-core resource configuration file, and creating a data exchange pipeline in a shared space between the master core and a plurality of slave cores based on the analysis; and 3, instructing the virtual data bus controller to realize the communication interaction of the inter-core communication data based on the data exchange pipeline and the service data type of the inter-core communication.
Preferably, step 1 further comprises: the data topology information of the inter-core communication is obtained based on the deployment requirement definition of the application service deployed in the master core or the slave core; the data topology information of the inter-core communication comprises: receiving the pipeline information of the data, the data type of the inter-core communication, and the subscription relationship between the pipeline and the data type of the inter-core communication.
Preferably, step 2 further comprises: the master core and the slave core are divided from a homogeneous multi-core processor which runs in an asymmetric multiprocessing mode; the master core is used for analyzing the multi-core resource configuration file, generating inter-core shared configuration information and starting a slave core of the homogeneous multi-core processor; and the master core and the slave core generate a data exchange pipeline based on the shared configuration information between the cores.
Preferably, step 2 further comprises: the pipeline is created in a data sharing memory area of the homogeneous multi-core processor based on information in the multi-core resource configuration file; each pipeline occupies a memory space with a preset size in the data sharing memory area of the homogeneous multi-core processor.
Preferably, step 3 further comprises: each master core and each slave core are respectively provided with a virtual data bus controller corresponding to the master core and each slave core; and the virtual data bus controller reads the inter-core sharing configuration information acquired by the main core through analyzing the multi-core resource configuration file, and constructs a data forwarding routing table based on the inter-core sharing configuration information.
Preferably, step 3 further comprises: the virtual data bus controller detects inter-core communication data existing in the pipeline in a polling mode; when the virtual data bus controller is in a data receiving state and inter-core communication data existing in the pipeline are detected, triggering current received data interruption; or, when the virtual data bus controller is in a data receiving state and detects inter-core communication data existing in the pipeline, triggering the inter-core communication data to suspend and wait.
Preferably, step 3 further comprises: the virtual data bus controller inquires the data forwarding routing table and acquires a sending pipeline of service data; and screening the current data based on the filtering rule of the service data sending pipeline, and sending the screened service data to the sending pipeline.
Preferably, step 3 further comprises: and copying the screened current data to a ring queue of the sending pipeline, and realizing data sending according to the state information of the sending pipeline.
The second aspect of the present invention relates to an inter-core communication device based on a virtual data bus, including a multi-core processor, a plurality of virtual data bus controllers, and a virtual data bus, characterized in that: the multi-core processor is a homogeneous multi-core processor which operates based on an asymmetric multiprocessing mode, and the processor comprises a main core and a plurality of slave cores; one end of each of the plurality of virtual data bus controllers is connected with each core in the multi-core processor, and the other end of each of the plurality of virtual data bus controllers is connected with the virtual data bus; and the virtual data bus occupies a memory space with a preset size in the data sharing memory area of the homogeneous multi-core processor.
Preferably, the virtual data bus controller comprises a routing table generating module, a sending module and a receiving module, wherein the sending module and the receiving module are composed of a routing forwarding submodule and a filtering submodule; the routing table generating module is configured to construct a routing table according to the received inter-core sharing configuration information, and forward the routing table to the sending module; the routing forwarding submodule in the sending module is used for inquiring a corresponding pipeline of a corresponding core or a plurality of cores subscribing the service data in a routing table according to the type of the service data to be sent; the filtering submodule in the sending module is used for acquiring the filtering rule of the corresponding pipeline according to the corresponding pipeline inquired by the routing forwarding submodule, screening the service data based on the filtering rule, and sending the screened service data to the sending pipeline; the receiving module is used for detecting and receiving the inter-core communication data existing in the pipeline.
Compared with the prior art, the inter-core communication method and device based on the virtual data bus can divide service data of inter-core communication according to types, and construct a routing table of inter-core communication through unified modeling, so that communication interaction is realized.
The beneficial effects of the invention also include:
1. by adopting a publishing and subscribing framework, application program decoupling between a data communication sending core and a receiving core among multiple cores is realized, the management difficulty of shared data among the cores during application development is reduced, the complicated and repeated communication development work among the cores is avoided, and the technical reusability is improved;
2. by adopting the unified virtual bus controller, the difficulty of managing shared data among the cores when multi-core application development is carried out on different cores and the development difficulty of multi-core programs are reduced, and the inter-core communication efficiency is improved.
Drawings
FIG. 1 is a schematic method flow diagram of a virtual data bus based inter-core communication method and apparatus according to the present invention;
FIG. 2 is a schematic diagram of an overall apparatus for inter-core communication based on a virtual data bus according to the present invention;
FIG. 3 is a schematic diagram of a virtual data bus controller in the method and apparatus for inter-core communication based on a virtual data bus according to the present invention.
Detailed Description
The present application is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present application is not limited thereby.
Fig. 1 is a schematic method flow diagram of a virtual data bus-based inter-core communication method and apparatus according to the present invention. As shown in fig. 1, a first aspect of the present invention relates to a virtual data bus-based inter-core communication method, which includes steps 1 to 3.
Step 1, defining data topology information of inter-core communication based on a multi-core processor, and generating a multi-core resource configuration file according to the data topology information.
In an embodiment of the present invention, a power secondary device may be adopted, and a multi-core processor may be adopted to operate in an AMP manner, where each core operates a different application. The invention can make the deployment scheme of the multi-core processor according to the application service and distribute the application program to be operated for each core. Meanwhile, the memory space of each core can be defined, the memory reservation position is reserved for the shared memory among the cores, and the memory address is defined. In addition, data topology information of multi-core communication can be defined according to service requirements of application, so that abstract modeling can be performed on application service data needing inter-core communication.
It is worth mentioning that, according to the predefined application service requirement, the service data abstract modeling of the inter-core communication of the multi-core application program can be performed to form the topological relation of the inter-core forwarding of the application service data. Meanwhile, the data pipe configuration information may be defined according to data reception requirements predefined by the application.
Specifically, the data topology information of inter-core communication is obtained based on the deployment requirement definition of the application service deployed in the master core or the slave core; the data topology information of the inter-core communication comprises: receiving the pipeline information of the data, the data type of the inter-core communication, and the subscription relationship between the pipeline and the data type of the inter-core communication.
The pipe information of the received data may include contents such as a slave core definition, a pipe depth, a memory space occupied by the pipe, a data type defined by the pipe, and a filtering rule of the data type defined by the pipe.
By generating data topology information of inter-core communication on an application service space, a multi-core resource configuration file can be generated. In general, the generated multi-core resource profile may be deployed in a primary core of the multi-core processor.
And 2, guiding the master core to analyze the multi-core resource configuration file, and creating a data exchange pipeline in the inter-core shared space of the master core and the plurality of slave cores based on analysis.
Specifically, the master core and the slave core are divided from a homogeneous multi-core processor which runs in an asymmetric multiprocessing mode; the master core is used for analyzing the multi-core resource configuration file, generating shared configuration information among cores and starting the slave cores of the homogeneous multi-core processor; the master core and the slave core generate a data exchange pipeline based on shared configuration information between the cores.
When a main core of the multi-core processor is started, the multi-core resource configuration file is firstly analyzed. As a resource management core, the master core may allocate spaces for different resources in a pre-planned shared memory space between cores according to resource configuration information included in the multi-core resource configuration file. The process of allocating space is essentially the process of creating a pipeline in a pre-planned data sharing memory area and determining the memory space occupied by the pipeline. In general, the process of allocating the space needs to ensure that the address space occupied by each pipeline is independent.
Preferably, the pipeline is created in a data sharing memory area of the homogeneous multi-core processor based on information in the multi-core resource configuration file; each pipeline occupies a memory space with a preset size in a data sharing memory area of the homogeneous multi-core processor.
And generating a data structure of the whole topology configuration information of the inter-core communication in a configuration shared memory area predefined among the cores according to the subscription relationship between the pipelines and the inter-core communication data types in the multi-core resource configuration file.
After the master core finishes analyzing the multi-core resource configuration file, all shared memory resources can be distributed, meanwhile, the slave core processors deployed by other applications are started, and the whole topology configuration information data structure of the inter-core communication can be obtained from the shared memory after the slave core processors are started.
And 3, instructing the virtual data bus controller to realize the communication interaction of the inter-core communication data based on the data exchange pipeline and the service data type of the inter-core communication.
Preferably, each master core and each slave core respectively have a virtual data bus controller corresponding to the master core and each slave core; and the virtual data bus controller reads the inter-core sharing configuration information acquired by the main core through analyzing the multi-core resource configuration file, and constructs a data forwarding routing table based on the inter-core sharing configuration information.
In general, the data forwarding routing table has a correspondence relationship between inter-core communication data and a receiving pipe. In the data forwarding routing table, a key value table can be constructed by using the inter-core communication data type as a key value and using the pipeline number as a numerical value. Wherein one type of inter-core communication data may be sent into a particular one or more data channels.
When the master core and the slave core successfully acquire the inter-core communication overall topology configuration information, the virtual data bus controller independently running on each core can be initialized. Typically, each core is responsible for starting a virtual data bus controller interconnected with the core. The virtual data bus controller can read the inter-core sharing configuration information in the predefined shared memory area, generate a multi-core communication data forwarding routing table of the virtual data bus controller, and complete initialization of the virtual data bus controller. And the virtual data bus controller is responsible for receiving and transmitting the inter-core communication data transmitted on the virtual data bus after being started.
In the invention, the virtual data bus controller operated by each core can generate different types of inter-core communication data core pipeline mapping tables according to the multi-core resource configuration file, so that the routing forwarding of inter-core data can be realized, and one-to-one, many-to-many or many-to-one data interaction among multiple cores can be completed.
Preferably, the virtual data bus controller detects inter-core communication data existing in the pipeline in a polling mode; when the virtual data bus controller is in a data receiving state and detects inter-core communication data existing in a pipeline, triggering current data receiving interruption; or, when the virtual data bus controller is in a data receiving state and detects inter-core communication data existing in the pipeline, suspending and waiting the inter-core communication data is triggered.
Typically, as a consumer of the pipeline, the virtual data bus controller may retrieve data from the pipeline and is responsible for maintaining the read status in the pipeline status information to complete the actual dequeue operation of the data. The virtual data bus controller can provide an interrupt trigger mode for data reception, and provides an application program with the capability of rapidly acquiring data. When receiving data, the application program can adopt two programming modes of polling and interrupting according to the requirement of service for receiving data.
The polling mode refers to querying a data receiving pipeline needing to receive service data through a receiving module, checking whether new data needs to be received, and realizing data polling receiving. Interrupt mode refers to the process of creating a task to receive data and suspending, i.e., blocking, new data waiting on the data reception pipe. When new data arrives on the pipeline, the virtual data bus controller can generate data receiving interrupt, and the application can wake up the task for receiving the data to execute by responding to the interrupt, and process the received data.
It should be noted that the virtual data bus controller may also query whether the pipeline is configured with the interrupt trigger flag, and if the interrupt trigger flag is configured, may trigger the inter-core soft interrupt corresponding to the pipeline, and notify the virtual bus controllers of other cores to trigger the reception of the data interrupt.
Preferably, the virtual data bus controller queries a data forwarding routing table and acquires a transmission pipeline of the service data; and screening the current data based on the filtering rule of the service data sending pipeline, and sending the screened service data to the sending pipeline.
Preferably, the filtered current data may be copied to a ring queue of the sending pipe, and data sending may be implemented according to the status information of the sending pipe. Specifically, the data is transmitted in a ring queue mode, and the transmission and the reception of the side length data can be better supported. Typically, both the pipe state information and the actual data are stored in shared memory. Sending data to the pipe is actually copying the data to the ring queue corresponding to the pipe. The sending module as the producer of the pipeline can copy the sent data into the pipeline and update the writing state of the pipeline state information at the same time so as to complete the actual enqueue operation of the data.
The invention relates to a virtual data bus-based inter-core communication device, which comprises a multi-core processor, a plurality of virtual data bus controllers and a virtual data bus. The multi-core processor is a homogeneous multi-core processor which operates based on an asymmetric multiprocessing mode, and comprises a main core and a plurality of slave cores; one end of each of the plurality of virtual data bus controllers is connected with each core in the multi-core processor, and the other end of each of the plurality of virtual data bus controllers is connected with the virtual data bus; and the virtual data bus occupies a memory space with a preset size in the data sharing memory area of the isomorphic multi-core processor.
As shown in fig. 1 and fig. 2, the virtual data bus controller, as an important inter-core communication component, can normally operate regardless of whether an operating system exists in the multi-core processor, and thus has good portability.
Preferably, the virtual data bus controller comprises a routing table generating module, a sending module and a receiving module, wherein the sending module and the receiving module are composed of a routing forwarding submodule and a filtering submodule; the routing table generating module is used for constructing a routing table according to the received inter-core sharing configuration information and forwarding the routing table to the sending module; a routing forwarding submodule in the sending module, configured to query, according to a type of service data to be sent, a corresponding pipeline of one or more cores in the routing table, where the corresponding pipeline is subscribed to the service data; the filtering submodule in the sending module is used for acquiring the filtering rule of the corresponding pipeline according to the corresponding pipeline inquired by the routing forwarding submodule, screening the service data based on the filtering rule and sending the screened service data to the sending pipeline; and the receiving module is used for detecting the inter-core communication data existing in the pipeline and receiving the inter-core communication data.
Compared with the prior art, the inter-core communication method and device based on the virtual data bus can divide service data of inter-core communication according to types, and construct a routing table of inter-core communication through unified modeling, so that communication interaction is realized.
The beneficial effects of the invention also include:
1. by adopting a publishing and subscribing framework, application program decoupling between a data communication sending core and a receiving core among multiple cores is realized, the management difficulty of shared data among the cores during application development is reduced, the complicated and repeated communication development work among the cores is avoided, and the technical reusability is improved;
2. by adopting the unified virtual bus controller, the difficulty of managing shared data among the cores when multi-core application development is carried out on different cores and the development difficulty of multi-core programs are reduced, and the inter-core communication efficiency is improved.
The present applicant has described and illustrated embodiments of the present invention in detail with reference to the accompanying drawings, but it should be understood by those skilled in the art that the above embodiments are merely preferred embodiments of the present invention, and the detailed description is only for the purpose of helping the reader to better understand the spirit of the present invention, and not for limiting the scope of the present invention, and on the contrary, any improvement or modification made based on the spirit of the present invention should fall within the scope of the present invention.
Claims (10)
1. An inter-core communication method based on a virtual data bus is characterized by comprising the following steps:
step 1, defining data topology information of inter-core communication based on a multi-core processor, and generating a multi-core resource configuration file according to the data topology information;
step 2, guiding a master core to analyze the multi-core resource configuration file, and creating a data exchange pipeline in a shared space between the master core and a plurality of slave cores based on the analysis;
and 3, instructing the virtual data bus controller to realize the communication interaction of the inter-core communication data based on the data exchange pipeline and the service data type of the inter-core communication.
2. The method for inter-core communication based on virtual data bus according to claim 1, wherein the step 1 further comprises:
the data topology information of the inter-core communication is obtained based on the deployment requirement definition of the application service deployed in the master core or the slave core;
the data topology information of the inter-core communication comprises: receiving the pipeline information of the data, the data type of the inter-core communication, and the subscription relationship between the pipeline and the data type of the inter-core communication.
3. The method for inter-core communication based on virtual data bus according to claim 1, wherein the step 2 further comprises:
the master core and the slave core are divided from a homogeneous multi-core processor which runs in an asymmetric multiprocessing mode; and the number of the first and second electrodes,
the master core is used for analyzing the multi-core resource configuration file, generating inter-core shared configuration information and starting a slave core of the homogeneous multi-core processor;
and the master core and the slave core generate a data exchange pipeline based on the shared configuration information between the cores.
4. The method for inter-core communication based on virtual data bus according to claim 3, wherein the step 2 further comprises:
the pipeline is created in a data sharing memory area of the homogeneous multi-core processor based on information in the multi-core resource configuration file;
each pipeline occupies a memory space with a preset size in the data sharing memory area of the homogeneous multi-core processor.
5. The method for inter-core communication based on virtual data bus as claimed in claim 1, wherein said step 3 further comprises:
each master core and each slave core are respectively provided with a virtual data bus controller corresponding to the master core and each slave core; and the number of the first and second electrodes,
and the virtual data bus controller reads the inter-core sharing configuration information acquired by the main core through analyzing the multi-core resource configuration file, and constructs a data forwarding routing table based on the inter-core sharing configuration information.
6. The method for inter-core communication based on virtual data bus according to claim 5, wherein the step 3 further comprises:
the virtual data bus controller detects inter-core communication data existing in the pipeline in a polling mode;
when the virtual data bus controller is in a data receiving state and inter-core communication data existing in the pipeline are detected, triggering current received data interruption; alternatively, the first and second electrodes may be,
and when the virtual data bus controller is in a data receiving state and detects inter-core communication data existing in the pipeline, triggering the inter-core communication data to be suspended and waiting.
7. The method for inter-core communication based on virtual data bus according to claim 5, wherein the step 3 further comprises:
the virtual data bus controller inquires the data forwarding routing table and acquires a sending pipeline of service data;
and screening the current data based on the filtering rule of the service data sending pipeline, and sending the screened service data to the sending pipeline.
8. The method for inter-core communication based on virtual data bus according to claim 7, wherein the step 3 further comprises:
and copying the screened current data to a ring queue of the sending pipeline, and realizing data sending according to the state information of the sending pipeline.
9. The virtual data bus based inter-core communication device according to any one of claims 1 to 8, comprising a multi-core processor, a plurality of virtual data bus controllers, and a virtual data bus, wherein:
the multi-core processor is a homogeneous multi-core processor which operates based on an asymmetric multiprocessing mode, and the processor comprises a main core and a plurality of slave cores;
one end of each of the plurality of virtual data bus controllers is connected with each core in the multi-core processor, and the other end of each of the plurality of virtual data bus controllers is connected with the virtual data bus;
and the virtual data bus occupies a memory space with a preset size in the data sharing memory area of the homogeneous multi-core processor.
10. A virtual data bus based inter-core communication apparatus as claimed in claim 9, wherein:
the virtual data bus controller comprises a routing table generating module, a sending module and a receiving module, wherein the sending module and the receiving module are composed of a routing forwarding submodule and a filtering submodule; and the number of the first and second electrodes,
the routing table generating module is used for constructing a routing table according to the received inter-core sharing configuration information and forwarding the routing table to the sending module;
the routing forwarding submodule in the sending module is used for inquiring a corresponding pipeline of a corresponding core or a plurality of cores subscribing the service data in a routing table according to the type of the service data to be sent;
the filtering submodule in the sending module is used for acquiring the filtering rule of the corresponding pipeline according to the corresponding pipeline inquired by the routing forwarding submodule, screening the service data based on the filtering rule, and sending the screened service data to the sending pipeline;
the receiving module is used for detecting and receiving the inter-core communication data existing in the pipeline.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114338515A (en) * | 2021-12-09 | 2022-04-12 | 中汽创智科技有限公司 | Data transmission method, device, equipment and storage medium |
| CN114398299A (en) * | 2021-12-24 | 2022-04-26 | 北京四方继保工程技术有限公司 | Data processing method of four-core cooperative measurement and control processor and processor |
| CN117234761A (en) * | 2023-11-16 | 2023-12-15 | 苏州萨沙迈半导体有限公司 | Multi-core system, chip and vehicle processor |
| CN114398299B (en) * | 2021-12-24 | 2024-05-10 | 北京四方继保工程技术有限公司 | Data processing method of four-core cooperative measurement and control processor and processor |
-
2020
- 2020-12-09 CN CN202011431431.5A patent/CN112463715A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114338515A (en) * | 2021-12-09 | 2022-04-12 | 中汽创智科技有限公司 | Data transmission method, device, equipment and storage medium |
| CN114338515B (en) * | 2021-12-09 | 2023-08-22 | 中汽创智科技有限公司 | Data transmission method, device, equipment and storage medium |
| CN114398299A (en) * | 2021-12-24 | 2022-04-26 | 北京四方继保工程技术有限公司 | Data processing method of four-core cooperative measurement and control processor and processor |
| CN114398299B (en) * | 2021-12-24 | 2024-05-10 | 北京四方继保工程技术有限公司 | Data processing method of four-core cooperative measurement and control processor and processor |
| CN117234761A (en) * | 2023-11-16 | 2023-12-15 | 苏州萨沙迈半导体有限公司 | Multi-core system, chip and vehicle processor |
| CN117234761B (en) * | 2023-11-16 | 2024-02-02 | 苏州萨沙迈半导体有限公司 | Multi-core system, chip and vehicle processor |
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