CN112462675B - Cascaded dual-index nuclear pulse signal generating device and control method thereof - Google Patents
Cascaded dual-index nuclear pulse signal generating device and control method thereof Download PDFInfo
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Abstract
The invention discloses a cascade dual-index nuclear pulse signal generating device and a control method thereof, which can simulate nuclear pulse signals capable of being compatible with outputs of different types of detectors. The device takes a CPU, an FPGA and a high-speed digital-to-analog conversion chip as cores and comprises a current-voltage conversion module, a baseline offset adjustment module, a signal amplitude adjustment module, a high-frequency filter network and an output drive enhancement module. The control method of the device comprises the steps that a CPU receives relevant parameters from a PC or a handheld terminal, a cascade type double-exponential nuclear pulse signal is generated according to an algorithm formula, a high-speed digital-to-analog conversion chip DAC is controlled by an FPGA to generate double-exponential nuclear pulse signals with different pulse amplitudes and widths, the pulse leading edge integral time constant and the pulse trailing edge differential time constant are adjustable, and a single or periodic nuclear pulse signal can be generated. The nuclear radiation signal calibration device is particularly suitable for nuclear radiation signal measurement, test, calibration and other work under the condition that no actual radionuclide source exists.
Description
Technical Field
The invention relates to a pulse signal generating device, in particular to a cascade dual-index nuclear pulse signal generating device and a control method thereof.
Background
In recent physical experiments and related scientific research and instrument development, a radiation detector is generally required to convert radiation emitted from a standard radionuclide source into electric pulse signals, and then the electric pulse signals are used for research and processing, and information carried in a radioactive source and a detector is expected to be obtained from the pulse signals without distortion as much as possible. The standard radioactive source is increasingly used in the working processes of scientific research, production and the like, the strong radiation of the radioactive source is considered, long-time contact can cause radiation injury of different degrees to related personnel, meanwhile, the radiation protection preparation work at each time is time-consuming and labor-consuming, the operation is complex, and great trouble is brought to a plurality of works needing frequent testing. Of course, in most cases, the auxiliary test can be performed by means of a periodic pulse signal generated by a standard signal generator, but the method has a great limitation because the actual nuclear signal has randomness of characteristics such as pulse amplitude, pulse width, front and back edge time, pulse self distribution along with time and the like.
To reduce the practical operation of the radionuclide source, the artificial nuclear pulse signal with the real nuclear signal characteristic can be generated by electronic means. Therefore, the radioactive hazard generated when the radioactive nuclide source is directly used for generating the nuclear signal can be avoided, various parameters of the nuclear signal can be flexibly adjusted, and various testing requirements in the development process of the nuclear radiation detecting instrument can be met. In regard to the technical research on the artificial nuclear pulse signal generator, a large number of people have conducted constructive research and practice at home and abroad, but much attention is paid to the gaussian characteristic of the large-scale nuclear pulse signal in the amplitude distribution and the negative exponential characteristic of the large-scale nuclear pulse signal in the time distribution, the research on the characteristics of a single pulse is less, and the single pulse signal is simply taken as a single-exponential signal or a double-exponential signal with fixed parameter characteristics by individual documents.
The ideal nuclear pulse signal output by the nuclear radiation detector is a negative index pulse signal (the ray can be regarded as a unit impulse signal), when a detector with a fast reaction (such as a semiconductor detector) is selected, the integral time constant is small, and the nuclear pulse output by the detector is similar to the negative index signal, so that a plurality of documents at home and abroad directly adopt a single negative index to simulate the ideal nuclear pulse signal. In fact, the radiation is converted into a double-exponential pulse signal through the radioactive probe (such as a crystal, a semiconductor, a gas and the like) and the matching components (such as a photomultiplier and the like) thereof, but the decay time of the leading edge and the trailing edge of the nuclear pulse output by different types of detectors is different, namely the decay time is regarded as different integral and differential time constants, and the decay time is equivalent to the integral and differential process of the impulse response in electronics. When a detector with large light decay time (such as a crystal detector of NaI, BGO and the like) is selected, the integral time constant of the detector is large, the nuclear pulse output by the detector is similar to a Gaussian waveform, and therefore relevant researchers simulate the nuclear pulse signal through a Gaussian-like function.
The method is used for simulating the condition that other types of detectors (such as crystal detectors with faster light attenuation time, like LaBr 3) output nuclear pulse signals, and is also used for simulating the nuclear pulse signals capable of being compatible with the outputs of different types of detectors. The invention provides a cascade dual-index nuclear pulse signal generating device and a control method thereof, which can simulate a radioactive source and nuclear pulse signals output by the radiation detector through generating different types of pulse signals, provide the nuclear pulse signals to a signal input part of a nuclear radiation measuring instrument, and meet the requirements of instrument developers and product testers on testing, debugging, calibration and the like.
Disclosure of Invention
The invention aims to provide a cascade dual-index nuclear pulse signal generating device and a control method thereof, which can simulate nuclear pulse signals capable of being compatible with outputs of different types of detectors. The device can generate a cascade dual-index nuclear pulse signal according to an algorithm formula, can control the pulse amplitude and width, and can realize single-time or periodic dual-index nuclear pulse signal output, wherein the pulse front-edge integral time constant and the pulse back-edge differential time constant are adjustable. The method is suitable for nuclear radiation signal measurement, test, calibration and other works under the condition of no actual radionuclide source.
The technical scheme adopted by the invention is as follows: a cascade dual-index nuclear pulse signal generating device comprises a CPU, an FPGA, a high-speed digital-to-analog conversion chip DAC, a current-voltage conversion module, a baseline offset adjustment module, a signal amplitude adjustment module, a high-frequency filter network, an output drive enhancement module, a USB communication interface and a power module.
Further, the CPU calculates the complete pulse waveform data of the cascade dual-exponential nuclear pulse signal according to the amplitude information, the integral time constant and the differential time constant of the analog standard nuclear pulse signal received from the USB communication interface, certainly, the CPU can also directly receive the pulse waveform data calculated by a PC or a handheld terminal, the CPU is responsible for transmitting the pulse waveform data to the FPGA, the FPGA sends data to a high-speed digital-analog conversion chip DAC according to the appointed frequency, the DAC converts the digital signal into an analog current pulse signal, a current-voltage conversion module converts the current pulse signal output by the DAC into a voltage pulse signal, meanwhile, a baseline offset adjustment module can realize the direct current baseline adjustment of the voltage pulse signal, eliminate the baseline deviation in the conversion process, and then the further amplification or attenuation of the pulse amplitude is realized through the signal amplitude adjustment module, and eliminating step burrs generated in the DAC conversion process by the high-frequency filter network, and finally, improving the output driving capability of the signal by the output driving enhancement module and outputting the signal.
A kind of cascade type dual-exponential nuclear pulse signal generating device, the stated cascade type dual-exponential nuclear pulse signal is realized in the way of multiplication cascade through a negative exponential function and a negative exponential function of reversal, among them the negative exponential function of reversal is mainly used for realizing the leading edge of the pulse, equivalent to the integral process of the analog nuclear pulse signal, the negative exponential function is mainly used for realizing the trailing edge of the pulse, equivalent to the differential process of the analog nuclear pulse signal, the cascade type dual-exponential nuclear pulse signal can be expressed by the formula (1):
wherein:yfor the calculated cascade type double-exponential nuclear pulse signal,Ais the amplitude of the bi-exponential nuclear pulse signal,kis a constant that can be derived from the scale,
is the differential time constant of the bi-exponential nuclear pulse,
is the integral time constant of the double-exponential nuclear pulse;
because of the constantkNeed to be calibrated to obtain the waveformA、
、
When any parameter in (3) is changed, the pair is requiredkRescaling to eliminate the data in formula (1)kThe parameter calibration process is omitted, the formula (1) can be improved and optimized, and two negative exponential functions are obtained to obtain a dual-exponential nuclear pulse signal which is cascaded in a subtraction mode and is represented by the formula (2):
wherein:yfor the calculated cascade type double-exponential nuclear pulse signal,Ain order to be the amplitude of the pulse signal,
is the differential time constant of the pulse and,
is the integration time constant of the pulse; because of the fact that
And
are all given values received by the CPU from the USB communication interface, therefore
Has no unknown quantity, canAnd directly calculating.
A control method of a cascade dual-exponential nuclear pulse signal generating device comprises the following steps:
step one, CPU receives the amplitude information, integral time constant and differential time constant of the double-exponential nuclear pulse signal from USB communication interface through formula
Complete pulse waveform data of the cascade double-exponential nuclear pulse signal is obtained through calculation, and the CPU can also directly receive the complete pulse waveform data calculated by a PC or a handheld terminal;
step two, the CPU transmits the double-exponential nuclear pulse waveform data to a buffer area of the FPGA, controls the FPGA to send corresponding pulse waveform data to a high-speed digital-to-analog conversion chip DAC according to specified frequency, converts the pulse waveform data into an analog double-exponential nuclear pulse signal through the DAC, and the amplitude of the output double-exponential nuclear pulse signal is a parameterAThe integration time constant of the leading edge of the pulse is
The differential time constant of the trailing edge of the pulse is
；
Step three, the CPU sends pulse width control information to the FPGA, and the FPGA obtains the time interval for sending data to the DAC through calculation, so that the time width control of the pulse signal is realized;
step four, the CPU controls the FPGA to send double-exponential pulse waveform data to the DAC for one time or periodically, and further generates a single-time or periodic double-exponential nuclear pulse signal;
regulating the direct current baseline of the output nuclear pulse signal through a precise adjustable resistor of the baseline offset regulation module, and eliminating baseline deviation in the conversion process;
and step six, adjusting the amplitude of the output nuclear pulse signal through a precise adjustable resistor of the signal amplitude adjusting module to realize further amplification or attenuation.
In conclusion, the invention has the advantages that: the method has the characteristics of simple operation, controllable pulse amplitude and width, realization of single pulse signals or periodic pulse signals and the like, and is particularly suitable for nuclear radiation signal measurement, test, calibration and other works under the condition without actual radionuclide sources.
Drawings
FIG. 1 is a block diagram of the apparatus of the present invention;
FIG. 2 is a schematic circuit diagram of an exemplary embodiment of the present invention;
FIG. 3 is a diagram of a multiplication cascade type double-exponential pulse die simulation according to an exemplary embodiment of the present invention;
fig. 4 is a diagram of a comparison of two cascaded dual-exponential pulsed dies embodying the present invention.
Detailed Description
The invention is described in more detail below with reference to the figures and the detailed description.
Referring to fig. 1-4, the cascade dual-exponential nuclear pulse signal generating device comprises a CPU, an FPGA, a high-speed digital-to-analog conversion chip DAC, a current-voltage conversion module, a baseline offset adjustment module, a signal amplitude adjustment module, a high-frequency filter network, an output drive enhancement module, a USB communication interface, and a power module, and is characterized in that: the CPU receives related parameters from a PC or a handheld terminal through a USB interface and transmits pulse waveform data to the FPGA, the FPGA sends data to a high-speed digital-to-analog conversion chip DAC, the output of the high-speed digital-to-analog conversion chip DAC is connected to a current-voltage conversion module and a baseline offset adjustment module, the high-speed digital-to-analog conversion chip DAC is connected to a high-frequency filter network through a signal amplitude adjustment module, and finally a nuclear pulse signal is output after the high-speed digital-to-analog conversion chip DAC passes through an output drive enhancement module, and.
Further, the CPU calculates the complete pulse waveform data of the cascade dual-exponential nuclear pulse signal according to the amplitude information, the integral time constant and the differential time constant of the analog standard nuclear pulse signal received from the USB communication interface, certainly, the CPU can also directly receive the pulse waveform data calculated by a PC or a handheld terminal, the CPU is responsible for transmitting the pulse waveform data to the FPGA, the FPGA sends data to a high-speed digital-analog conversion chip DAC according to the appointed frequency, the DAC converts the digital signal into an analog current pulse signal, a current-voltage conversion module converts the current pulse signal output by the DAC into a voltage pulse signal, meanwhile, a baseline offset adjustment module can realize the direct current baseline adjustment of the voltage pulse signal, eliminate the baseline deviation in the conversion process, and then the further amplification or attenuation of the pulse amplitude is realized through the signal amplitude adjustment module, and eliminating step burrs generated in the DAC conversion process by the high-frequency filter network, and finally, improving the output driving capability of the signal by the output driving enhancement module and outputting the signal.
A kind of cascade type dual-exponential nuclear pulse signal generating device, the stated cascade type dual-exponential nuclear pulse signal is realized in the way of multiplication cascade through a negative exponential function and a negative exponential function of reversal, among them the negative exponential function of reversal is mainly used for realizing the leading edge of the pulse, equivalent to the integral process of the analog nuclear pulse signal, the negative exponential function is mainly used for realizing the trailing edge of the pulse, equivalent to the differential process of the analog nuclear pulse signal, the cascade type dual-exponential nuclear pulse signal can be expressed by the formula (1):
wherein:yfor the calculated cascade type double-exponential nuclear pulse signal,Ais the amplitude of the bi-exponential nuclear pulse signal,kis a constant that can be derived from the scale,
is the differential time constant of the bi-exponential nuclear pulse,
is the integral time constant of the double-exponential nuclear pulse;
because of the constantkNeed to be calibrated to obtain the waveformA、
、
When any parameter in (3) is changed, the pair is requiredkRescaling to eliminate the data in formula (1)kThe parameter calibration process is omitted, the formula (1) can be improved and optimized, and two negative exponential functions are obtained to obtain a dual-exponential nuclear pulse signal which is cascaded in a subtraction mode and is represented by the formula (2):
wherein:yfor the calculated cascade type double-exponential nuclear pulse signal,Ain order to be the amplitude of the pulse signal,
is the differential time constant of the pulse and,
is the integration time constant of the pulse; because of the fact that
And
are all given values received by the CPU from the USB communication interface, therefore
Has no unknown quantity, and can be directly calculated.
As can be seen from fig. 4, the cascade-type double-exponential nuclear pulse signals obtained by the two methods of formula (1) and formula (2) are substantially identical.
A control method of a cascade dual-exponential nuclear pulse signal generating device comprises the following steps:
step one, CPU receives the amplitude information, integral time constant and differential time constant of the double-exponential nuclear pulse signal from USB communication interfaceEquation of formula
Complete pulse waveform data of the cascade double-exponential nuclear pulse signal is obtained through calculation, and the CPU can also directly receive the complete pulse waveform data calculated by a PC or a handheld terminal;
step two, the CPU transmits the double-exponential nuclear pulse waveform data to a buffer area of the FPGA, controls the FPGA to send corresponding pulse waveform data to a high-speed digital-to-analog conversion chip DAC according to specified frequency, converts the pulse waveform data into an analog double-exponential nuclear pulse signal through the DAC, and the amplitude of the output double-exponential nuclear pulse signal is a parameterAThe integration time constant of the leading edge of the pulse is
The differential time constant of the trailing edge of the pulse is
；
Step three, the CPU sends pulse width control information to the FPGA, and the FPGA obtains the time interval for sending data to the DAC through calculation, so that the time width control of the pulse signal is realized;
step four, the CPU controls the FPGA to send double-exponential pulse waveform data to the DAC for one time or periodically, and further generates a single-time or periodic double-exponential nuclear pulse signal;
regulating the direct current baseline of the output nuclear pulse signal through a precise adjustable resistor of the baseline offset regulation module, and eliminating baseline deviation in the conversion process;
and step six, adjusting the amplitude of the output nuclear pulse signal through a precise adjustable resistor of the signal amplitude adjusting module to realize further amplification or attenuation.
The circuit connection diagram of the invention is shown in fig. 2, wherein a CPU can adopt STM32F405, an FPGA can adopt A3P250, a high-speed analog-to-digital conversion chip can adopt DAC904, a current-voltage conversion module, a baseline offset adjustment module, a signal amplitude adjustment module, and a high-speed operational amplifier used by an output drive enhancement module can adopt LT1818, a high-frequency low-pass filter network is formed by an RC circuit, the first-stage high-speed operational amplifier is used for converting an analog current signal into an analog voltage signal and controlling the adjustment of an output pulse dc baseline, the second-stage high-speed operational amplifier is used for the gain adjustment of a signal to realize amplification or attenuation, and the third-stage high-speed operational amplifier is used for improving the output drive capability of the.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (2)
1. A CPU in the signal generating device receives related parameters from a PC or a handheld terminal through a USB communication interface and transmits pulse waveform data to an FPGA (field programmable gate array), the FPGA sends data to a high-speed digital-to-analog conversion chip DAC, the output of the high-speed digital-to-analog conversion chip DAC is connected to a current-voltage conversion module and a baseline offset adjusting module, then the high-frequency filter network is connected to a high-frequency filter network through a signal amplitude adjusting module, and finally a nuclear pulse signal is output after an output drive enhancing module, and a power supply module is responsible for supplying power to the whole device; the method is characterized in that:
the CPU calculates and obtains complete pulse waveform data of the cascade dual-exponential nuclear pulse signal according to amplitude information, an integral time constant and a differential time constant of an analog standard nuclear pulse signal received from the USB communication interface; or the CPU directly receives pulse waveform data calculated by a PC or a handheld terminal, the CPU is responsible for transmitting the pulse waveform data to the FPGA, the FPGA sends data to a high-speed digital-to-analog conversion chip DAC according to a specified frequency, the high-speed digital-to-analog conversion chip DAC converts a digital signal into an analog current pulse signal, a current-voltage conversion module converts the current pulse signal output by the DAC into a voltage pulse signal, meanwhile, a base line bias adjustment module is used for realizing direct-current base line adjustment of the voltage pulse signal, eliminating base line deviation in the conversion process, then a signal amplitude adjustment module is used for realizing further amplification or attenuation of pulse amplitude, a high-frequency filter network is used for eliminating step burrs in the DAC conversion process, and finally, an output driving enhancement module is used for improving the output driving capability of the signal and outputting the signal;
the cascade double-exponential nuclear pulse signal is realized in a multiplication cascade mode through a negative exponential function and a reverse negative exponential function, wherein the reverse negative exponential function is mainly used for realizing a pulse leading edge and is equivalent to an integration process of a simulation nuclear pulse signal, the negative exponential function is mainly used for realizing a pulse trailing edge and is equivalent to a differentiation process of the simulation nuclear pulse signal, and the cascade double-exponential nuclear pulse signal can be represented by a formula (1):
wherein:yfor the calculated cascade type double-exponential nuclear pulse signal,Ais the amplitude of the bi-exponential nuclear pulse signal,kis a constant that can be derived from the scale,
is the differential time constant of the bi-exponential nuclear pulse,
is the integral time constant of the double-exponential nuclear pulse;
because of the constantkNeed to be calibrated to obtain the waveformA、
、
When any parameter in (3) is changed, the pair is requiredkRescaling to eliminate the data in formula (1)kThe parameter calibration process is omitted, the formula (1) can be improved and optimized, and two negative exponential functions are obtained to obtain a dual-exponential nuclear pulse signal which is cascaded in a subtraction mode and is represented by the formula (2):
wherein:yfor the calculated cascade type double-exponential nuclear pulse signal,Ain order to be the amplitude of the pulse signal,
is the differential time constant of the pulse and,
is the integration time constant of the pulse; because of the fact that
And
are all given values received by the CPU from the USB communication interface, therefore
Has no unknown quantity, and can be directly calculated.
2. A control method of a cascade-type bi-exponential nuclear pulse signal generating apparatus, which is applied to the bi-exponential nuclear pulse signal generating apparatus according to claim 1, characterized by comprising the steps of:
step one, CPU receives the amplitude information, integral time constant and differential time constant of the double-exponential nuclear pulse signal from USB communication interface through formula
Calculating to obtain the cascade dual-index nuclear pulseThe complete pulse waveform data of the impulse signal or the CPU directly receives the complete pulse waveform data calculated by the PC or the handheld terminal;
step two, the CPU transmits the double-exponential nuclear pulse waveform data to a buffer area of the FPGA, controls the FPGA to send corresponding pulse waveform data to a high-speed digital-to-analog conversion chip DAC according to specified frequency, converts the pulse waveform data into an analog double-exponential nuclear pulse signal through the DAC, and the amplitude of the output double-exponential nuclear pulse signal is a parameterAThe integration time constant of the leading edge of the pulse is
The differential time constant of the trailing edge of the pulse is
；
Step three, the CPU sends pulse width control information to the FPGA, and the FPGA obtains the time interval for sending data to the DAC through calculation, so that the time width control of the pulse signal is realized;
step four, the CPU controls the FPGA to send double-exponential pulse waveform data to the DAC for one time or periodically, and further generates a single-time or periodic double-exponential nuclear pulse signal;
regulating the direct current baseline of the output nuclear pulse signal through a precise adjustable resistor of the baseline offset regulation module, and eliminating baseline deviation in the conversion process;
and step six, adjusting the amplitude of the output nuclear pulse signal through a precise adjustable resistor of the signal amplitude adjusting module to realize further amplification or attenuation.
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