CN112447776A - CMOS image sensor pixel manufacturing method capable of reducing charge backflow - Google Patents

CMOS image sensor pixel manufacturing method capable of reducing charge backflow Download PDF

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Publication number
CN112447776A
CN112447776A CN201910801787.4A CN201910801787A CN112447776A CN 112447776 A CN112447776 A CN 112447776A CN 201910801787 A CN201910801787 A CN 201910801787A CN 112447776 A CN112447776 A CN 112447776A
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China
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ppd
image sensor
cmos image
floating diffusion
diffusion node
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CN201910801787.4A
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徐江涛
王瑞硕
史兴萍
夏梦真
李凤
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Tianjin University Marine Technology Research Institute
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Tianjin University Marine Technology Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689MOS based technologies

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

A CMOS image sensor pixel manufacturing method capable of reducing charge backflow includes the steps that P-type ions are implanted twice before a grid is formed, the implantation dosage is gradually reduced from a PPD end to a floating diffusion node end, a P-type doping area with gradient concentration change is formed, more charges in a channel flow to one end of the floating diffusion node, the phenomenon that the charges flow back to the PPD end is effectively reduced, and charge transfer efficiency and imaging quality are greatly improved.

Description

CMOS image sensor pixel manufacturing method capable of reducing charge backflow
Technical Field
The invention relates to the field of CMOS image sensors, in particular to a CMOS image sensor pixel manufacturing method capable of reducing charge backflow.
Background
A clamped photodiode (PPD) was originally used in a CCD image sensor, and was used in a CMOS image sensor over twenty years later. Fig. 1 is a PPD-based 4T pixel structure. The 4T pixel is composed of a PPD, a transmission tube, a reset tube, a row gate tube and a floating diffusion node. When light is incident on the semiconductor surface, a portion of the incident light is reflected and the remainder is absorbed by the semiconductor. When the photon energy entering the semiconductor is not lower than the forbidden bandwidth of the semiconductor material, the semiconductor material absorbs the energy with a certain probability, so that electron-hole pairs, namely photon-generated carriers, are generated. After illumination integration is completed, the transmission tube is conducted, photo-generated charges are transferred to the floating diffusion node from the photodiode region under the action of an electric field, namely, the charge-voltage information conversion process is completed, and finally, optical signals stored in the floating diffusion node are read out line by line through the line gate tube and the column-level reading circuit.
Aiming at the problem of charge backflow existing beyond the existing method for improving the charge transfer efficiency by reducing or eliminating potential barrier potential wells in the charge transfer process, namely that in the process of transferring photo-generated charges from PPD to FD in the state that a transfer tube is opened, due to the fact that strong light generates a large signal, the photo-generated charges overflow from an FD region to a channel under a transfer gate, as shown in fig. 2, when the transfer tube is in the conversion process from the opened state to the closed state, a part of the photo-generated charges stored under the gate flows back to the PPD, incomplete transfer of the charges is caused, and finally, an image tailing phenomenon is caused, and the imaging quality of an image sensor is reduced.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a CMOS image sensor pixel manufacturing method for reducing charge backflow, which comprises the steps of injecting P-type ions twice before forming a grid, gradually reducing the injection dosage from a PPD end to a floating diffusion node end, forming a P-type doping area with gradient concentration change, and enabling more charges in a channel to flow to one end of the floating diffusion node, thereby effectively reducing the phenomenon that the charges flow back to the PPD end, and greatly improving the charge transfer efficiency and the imaging quality.
A CMOS image sensor pixel manufacturing method for reducing charge backflow is disclosed, and connection and doping conditions of a PPD, a transmission gate and a floating diffusion node portion are shown in figure 3. Firstly, injecting P-type ions into a photosensitive area to form a P + clamping layer before forming a grid; after the transmission gate is formed, N-type ions are implanted by adopting a self-alignment technology to form an N-photosensitive area and an FD area of PPD. Compared with the traditional 4T active pixel, the pixel structure provided by the patent needs to implant P-type ions under the grid twice before the grid is formed, and the implantation dosage is gradually reduced from a PPD end to a floating diffusion node end and is respectively marked as PPPD_TGAnd PTG_FD
The pixel manufacturing method of the P-type ion gradient doping under the grid provided by the invention enables the potential in the channel under the grid to be gradually increased from the PPD end to the floating diffusion end in the charge transfer process, so that more charges stored under the grid are transferred to the floating diffusion node end due to drift motion in the process of transferring the transfer tube from conduction to disconnection, the phenomenon that the charges flow back to the PPD end is effectively reduced, the charge transfer efficiency and the imaging quality are greatly improved, and the performance of a large input optical signal CMOS image sensor is improved.
Drawings
Fig. 1 is a basic structure diagram of a 4T pixel:
FIG. 2 is a diagram illustrating a charge backflow phenomenon; (transfer pipe in conducting state)
FIG. 3 is a two-dimensional pixel layout with two under-gate P-type ion implantations;
fig. 4 is a graph of the potential distribution with 2P-type ion implantations under the gate (the transfer tube is in the on state).
Detailed Description
The present invention will be described in detail below with reference to the drawings and examples.
The invention is formed by introducing two times of non-uniform P-type ion implantation into the channel under the transmission transistor gate before the gate is formedP PPD_TGAndP TG_FDand the area is formed by the area, so that more charges in the channel flow to the floating diffusion node end under the action of an electric field in the transition process of the transmission tube from the on state to the off state, the non-ideal effect of light-generated charges flowing back to PPD is equivalently reduced, the charge transfer efficiency of the pixel is effectively increased, and the imaging quality of the image sensor is improved.
A CMOS image sensor pixel manufacturing method capable of reducing charge backflow is suitable for pixels with low illumination and high conversion gain. By adopting the pixel structure provided by the patent, the quantity of photo-generated charges flowing back to a PPD area can be effectively reduced. For example, for a pixel with PPD size of 2 μm 5 μm, floating diffusion node conversion gain of 14 μ V/e-, and transfer tube gate length of 0.6 μm, P-type formed by doping with B ions of 1e13/cm2P PPD_TGRegion, P-type formed by B ion doping of 3e12/cm2P TG_FDThe implantation energy of the region is 80KeV, the implantation angle tilt is 7 degrees,P PPD_TGion implantation of regions andP TG_FDthe length of the overlapping region of the ion implantation mask of the region is 0.1 μm. The P-type doping concentration in the channel under the transmission tube gate formed according to the process conditions is gradually reduced from the PPD end to the floating diffusion node end, so that when the transmission tube is changed from a conducting state to a cutting-off state, the potential from the PPD end to the floating diffusion node end is gradually increased, the non-ideal effect that charges in the channel flow back to the PPD can be well reduced, and the charge transfer efficiency and the imaging quality of the image sensor are improved.
By adopting the pixel structure, structural optimization based on a PPD structure can be realized, and the pixel unit design for improving charge transfer efficiency by lower charge backflow is realized on the basis of ensuring high sensitization.

Claims (1)

1. A CMOS image sensor pixel manufacturing method for reducing charge backflow is characterized in that: firstly, before forming a grid, injecting P-type ions into a photosensitive area twice to form a P + clamping layer, wherein the injection dosage is gradually reduced from a PPD end to a floating diffusion node end and is respectively marked as PPPD_TGAnd PTG_FD(ii) a After the transmission gate is formed, N-type ions are implanted by adopting a self-alignment technology to form an N-photosensitive area and an FD area of PPD.
CN201910801787.4A 2019-08-28 2019-08-28 CMOS image sensor pixel manufacturing method capable of reducing charge backflow Pending CN112447776A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114141795A (en) * 2021-06-08 2022-03-04 天津大学 Manufacturing process of high conversion gain pixel

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CN103400793A (en) * 2006-05-31 2013-11-20 先进模拟科技公司 Isolation structure for integrated circuit and modular method of forming same
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US4498013A (en) * 1981-03-30 1985-02-05 Matsushita Electric Industrial Co., Ltd. Solid state image sensor exhibiting reduced image smearing effects
US4468852A (en) * 1982-04-08 1984-09-04 Sgs-Ates Componenti Elettronici S.P.A. Process for making CMOS field-effect transistors with self-aligned guard rings utilizing special masking and ion implantation
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CN102007594A (en) * 2008-05-30 2011-04-06 美商豪威科技股份有限公司 Globally reset image sensor pixels
CN102324430A (en) * 2011-09-20 2012-01-18 天津大学 Four-tube active pixel of rapid charge transfer and making method thereof
CN102695008A (en) * 2012-05-07 2012-09-26 天津大学 CMOS image sensor pixel structure for fast transfer of large-size pixel charge
CN103915457A (en) * 2014-03-14 2014-07-09 复旦大学 Silicon-based CMOS image sensor and method of the silicon-based CMOS image sensor for restraining photon-generated carrier surface trap recombination
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Publication number Priority date Publication date Assignee Title
CN114141795A (en) * 2021-06-08 2022-03-04 天津大学 Manufacturing process of high conversion gain pixel

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Application publication date: 20210305