CN112420689A - Integrated circuit with a plurality of transistors - Google Patents
Integrated circuit with a plurality of transistors Download PDFInfo
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- CN112420689A CN112420689A CN201911376500.4A CN201911376500A CN112420689A CN 112420689 A CN112420689 A CN 112420689A CN 201911376500 A CN201911376500 A CN 201911376500A CN 112420689 A CN112420689 A CN 112420689A
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- 239000002184 metal Substances 0.000 claims description 76
- 239000004020 conductor Substances 0.000 claims description 72
- CNQCVBJFEGMYDW-UHFFFAOYSA-N lawrencium atom Chemical compound [Lr] CNQCVBJFEGMYDW-UHFFFAOYSA-N 0.000 description 7
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 7
- 238000010586 diagram Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
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- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention discloses an integrated circuit, which comprises a first power rail line and a second power rail line which are parallel to a first axial direction; a first electrical connection element having a first connection portion and a second connection portion, the second connection portion being coupled to the first power rail; a second electrical connection element having a third connection and a fourth connection, wherein the fourth connection is coupled to the second power rail, and the second connection and the fourth connection overlap in a second axial direction; the first power wire and the second power wire are respectively coupled to the first connecting portion and the third connecting portion, and the first power wire and the second power wire are respectively powered to the first power rail and the second power rail through the first electrical connecting element and the second electrical connecting element.
Description
Technical Field
The present invention relates to an integrated circuit.
Background
According to standard cell design rules, a lower metal layer of an integrated circuit is configured with a first power rail and a second power rail parallel to each other. Fig. 1 is a schematic top view of a prior art power distribution network of integrated circuits. A first power rail P1 and a second power rail G1 that are parallel to each other are disposed on the integrated circuit. The first power rail P1 and the second power rail G1 are parallel to the axial direction X. A standard cell circuit (not shown) may be disposed between the first power rail line P1 and the second power rail line G1. Therefore, the first power trace P1 and the second power trace G1 are adapted to be coupled to the standard cell circuit to supply power to the standard cell circuit.
The first power strip P2 and the second power strip G2 are parallel to the axial direction Y. The first power bar P2 and the second power bar G2 are disposed on the first power trace P1 and the second power trace G1, wherein the first power bar P2 and the second power bar G2 are electrically connected to the first power trace P1 and the second power trace G1 (as shown in fig. 1) through via plugs (via plugs), respectively. The third power bar P3 and the fourth power bar G3 are parallel to the axial direction X. The third power bar P3 and the fourth power bar G3 are disposed on the first power bar P2 and the second power bar G2, wherein the third power bar P3 and the fourth power bar G3 are electrically connected to the first power bar P2 and the second power bar G2 (as shown in fig. 1) through via plugs (via plugs), respectively. Thus, the system voltage Vdd may be transmitted from the third power bar P3 to the first power rail P1 via the first power bar P2, and the reference voltage Vss may be transmitted from the fourth power bar G3 to the second power rail G1 via the second power bar G2.
For the metal layer where the first power bar P2 and the second power bar G2 are located, this metal layer is used to provide an axial Y routing resource (i.e., a vertical routing resource). Based on the power plan density (power plan density) requirement, a plurality of first power strips P2 and second power strips G2 are disposed in the metal layer. The large number of first power bars P2 and second power bars G2 occupy the vertical routing resources of this metal layer.
Disclosure of Invention
The invention provides an integrated circuit to increase routing resources without reducing power plan density (power plan density) or to increase power plan density without reducing routing resources.
The integrated circuit of the present invention includes a first power rail, a second power rail, a first electrical connection element, a second electrical connection element, a first power conductor, and a second power conductor. The first power track and the second power track are disposed on the first metal layer and adapted to be coupled to a standard cell (standard cell) to supply power to the standard cell, wherein the first power track and the second power track are parallel to the first axis. The first electrical connection element has a first connection portion and a second connection portion, wherein the second connection portion is coupled to the first power rail. The second electrical connection element includes a third connection portion and a fourth connection portion, wherein the fourth connection portion is coupled to the second power rail, and the second connection portion and the fourth connection portion are located on the same first axis (a second axis of the first axis is different from the first axis). The first power wire and the second power wire are disposed on the second metal layer, wherein the second connection portion and the fourth connection portion are located between the first power wire and the second power wire, the first power wire is coupled to the first connection portion, the second power wire is coupled to the third connection portion, and the first power wire and the second power wire are respectively powered to the first power rail and the second power rail through the first electrical connection element and the second electrical connection element.
In an embodiment of the invention, the first axis is substantially perpendicular to the second axis.
In an embodiment of the invention, the first and second electrical connection elements are disposed on the third metal layer, and the third metal layer is located between the first and second metal layers.
In an embodiment of the invention, the second connection portion and the fourth connection portion are disposed on the third metal layer, the first connection portion and the third connection portion are disposed on the fourth metal layer, and the third metal layer and the fourth metal layer are located between the first metal layer and the second metal layer.
In an embodiment of the invention, the third metal layer is located between the first metal layer and the second metal layer, and the fourth metal layer is located between the third metal layer and the second metal layer.
In an embodiment of the invention, in the vertical projection of the integrated circuit, the first connection portion and the third connection portion are located between the first power trace and the second power trace.
In an embodiment of the invention, the first power rail and the second power rail are two power lines conforming to the standard cell design rule, the first power rail is configured to transmit a system voltage of the first power conductor to the standard cell, and the second power rail is configured to transmit a reference voltage of the second power conductor to the standard cell.
In an embodiment of the invention, the first power line and the second power line are parallel to the second axial direction
In an embodiment of the invention, the second electrical connecting element further has a fifth connecting portion coupled to the second power trace, and the integrated circuit further includes a third electrical connecting element having a sixth connecting portion and a seventh connecting portion, wherein the seventh connecting portion is coupled to the first power trace, and the fifth connecting portion and the seventh connecting portion are located on the same second axis (the second axis is parallel to the second axial direction); and a third power line disposed on the second metal layer, wherein the second power line is located between the first power line and the third power line, the fifth connection portion and the seventh connection portion are located between the second power line and the third power line, the third power line is coupled to the sixth connection portion, and the third power line supplies power to the first power rail via the third electrical connection element.
In an embodiment of the invention, the third power conducting wire is parallel to the second axial direction.
Based on the above, the integrated circuit according to the embodiment of the invention includes the second connection portion and the fourth connection portion located on the same axis. The first and second power conductors may supply power to the first and second power rails through the second and fourth connections. Without reducing power plan density (power plan density), routing resources of the integrated circuit may be increased; alternatively, the integrated circuit may increase power plan density without reducing routing resources.
In order to make the aforementioned and other features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a schematic top view of a prior art power distribution network of integrated circuits;
FIG. 2A is a schematic diagram of an integrated circuit according to an embodiment of the present invention;
FIG. 2B is a perspective view of an integrated circuit according to an embodiment of the invention;
FIG. 3 is a schematic top view of an integrated circuit according to another embodiment of the present invention;
FIG. 4A is a schematic diagram of a top view of an integrated circuit according to yet another embodiment of the present invention;
FIG. 4B is a perspective view of an integrated circuit according to another embodiment of the present invention;
FIG. 5 is a schematic diagram of a top view of an integrated circuit according to yet another embodiment of the present invention;
FIG. 6 is a top view of an integrated circuit according to a further embodiment of the present invention.
Description of the symbols
10. 20, 30, 40, 50: integrated circuit with a plurality of transistors
100. 200, 300, 400, 500: first power rail
101. 201, 301, 401, 501: second power rail
102. 202, 302, 402, 502: first electrical connection element
103. 203, 303, 403, 503: second electrical connection element
404: third electrical connection element
104. 204, 304, 405, 504: first power conductor
105. 205, 305, 406, 505: second power conductor
407: third power conductor
1021. 2021, 3021, 4021: first connecting part
1022. 2022, 4022: second connecting part
1031. 2031, 3031, 4031: third connecting part
1032. 2032, 4032: the fourth connecting part
4033: the fifth connecting part
4041: the sixth connecting part
4042: the seventh connecting part
3021A: first extension part
3021B: second extension part
3031A, 4031A: third extension part
3031B, 4031B: the fourth extension part
4031C: the fifth extension part
AA ', BB': axial line
G1: second power rail
G2: second power strip
G3: fourth power strip
L1: first axial direction
L2: second axial direction
M1, M2, M3, M4, M5, M6: metal layer
P1: first power rail
P2: first power strip
P3: third power strip
V11, V12, V31, V32, V33: via plug
Vdd: system voltage
Vss: reference voltage
W1, W2: width of
X, Y: axial direction
Detailed Description
The term "coupled" as used throughout this specification, including the claims, may refer to any means for directly or indirectly connecting. For example, if a first device couples (or connects) to a second device, it should be construed that the first device may be directly connected to the second device or the first device may be indirectly connected to the second device through some other device or some connection means. Further, wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts. Elements/components/steps in different embodiments using the same reference numerals or using the same terms may be referred to one another in relation to the description.
Fig. 2A is a top view of an integrated circuit 10 according to an embodiment of the invention. Integrated circuit 10 includes a first power rail 100, a second power rail 101, a first electrical connection element 102, a second electrical connection element 103, a first power conductor 104, and a second power conductor 105. The first power rail 100 and the second power rail 101 are two power lines that meet the standard cell design rule. In detail, the first power trace 100 and the second power trace 101 are disposed in a metal layer on the integrated circuit 10. The first power track 100 and the second power track 101 are parallel to a first axis L1 (e.g., horizontal axis of fig. 2A). A standard cell (not shown) may be disposed between the first power trace 100 and the second power trace 101. The first power rail 100 and the second power rail 101 are adapted to be coupled to the standard cell to supply power to the standard cell. First power rail 100 may transmit the voltage of first power conductor 104 (e.g., system voltage Vdd) to a standard cell (not shown), and second power rail 101 may transmit the voltage of second power conductor 105 (e.g., reference voltage Vss) to a standard cell (not shown).
Fig. 2B is a perspective view of the integrated circuit 10 shown in fig. 2A. It is noted that fig. 2B does not show some elements of fig. 2A. One skilled in the art can readily analogize to the rest of the elements in fig. 2A by the layout structure shown in fig. 2B. Integrated circuit 10 has multiple metal layers. In the embodiment shown in FIG. 2B, the integrated circuit 10 has six metal layers M1-M6.
Please refer to fig. 2A and fig. 2B. The first power trace 100 and the second power trace 101 are disposed on the metal layer M1. The first electrical connection element 102 and the second electrical connection element 103 are disposed on the metal layer M5. In other embodiments, the first electrical connection element 102 and the second electrical connection element 103 may be disposed on other metal layers according to design requirements. The first electrical connection element 102 has a first connection portion 1021 and a second connection portion 1022. The second electrical connection element 103 has a third connection part 1031 and a fourth connection part 1032. The second connection portion 1022 is electrically coupled to the first power line 100 via a via plug (via plug) V11, and the fourth connection portion 1032 is electrically coupled to the second power line 101 via another via plug.
From the vertical projection of the integrated circuit 10, the second connection portion 1022 of the first electrical connection element 102 and the fourth connection portion 1032 of the second electrical connection element 103 are disposed between the first power conductor 104 and the second power conductor 105. The second connecting portion 1022 and the fourth connecting portion 1032 are located on the same axis AA ', wherein the axis AA' is parallel to the second axial direction L2 (e.g., vertical axis in fig. 2A). The first axial direction L1 is substantially perpendicular to the second axial direction L2.
The first power conductor 104 and the second power conductor 105 are parallel to the second axial direction L2. The first power wire 104 and the second power wire 105 are disposed on the metal layer M6. The metal layer M5 is located between the metal layer M1 and the metal layer M6. In other embodiments, the first power line 104 and the second power line 105 may be disposed on other metal layers according to design requirements. The first power wire 104 covers a portion of the first connection portion 1021, and the first power wire 104 is coupled (electrically connected) to the first connection portion 1021 via the via plug V12. The second power wire 105 covers a portion of the third connection portion 1031, and the second power wire 105 is coupled (electrically connected) to the third connection portion 1031 via another via plug. First power conductor 104 and second power conductor 105 are respectively powered to first power rail 100 and second power rail 101 via first electrical connection element 102 and second electrical connection element 103.
In the integrated circuit 10, a first power conductor 104 may be electrically connected to the first power rail 100 by a first electrical connection 102, and a second power conductor 105 may be electrically connected to the second power rail 101 by a second electrical connection 103. As such, the voltage of the first power conductor 104 (e.g., the system voltage Vdd) may be transmitted to the first power rail 100, and the voltage of the second power conductor 105 (e.g., the reference voltage Vss) may be transmitted to the second power rail 101.
Fig. 3 is a top view of an integrated circuit 20 according to another embodiment of the invention. Integrated circuit 20 shown in fig. 3 includes a first power rail 100, a second power rail 101, a first electrical connection element 202, a second electrical connection element 203, a first power conductor 104, and a second power conductor 105. The first power rail 100, the second power rail 101, the first power conductor 104 and the second power conductor 105 shown in fig. 3 can refer to the related descriptions of the first power rail 100, the second power rail 101, the first power conductor 104 and the second power conductor 105 shown in fig. 2A and fig. 2B, and therefore, the description is omitted. The first electrical connecting element 202 and the second electrical connecting element 203 shown in fig. 3 can be analogized by referring to the related description of the first electrical connecting element 102 and the second electrical connecting element 103 shown in fig. 2A and 2B.
In the embodiment shown in fig. 3, the first electrical connection element 202 has a first connection portion 2021 and a second connection portion 2022, and the second electrical connection element 203 has a third connection portion 2031 and a fourth connection portion 2032. In the present embodiment, the first connection portion 2021 and the second connection portion 2022 of the first electrical connection element 202 are disposed on different metal layers, and the third connection portion 2031 and the fourth connection portion 2032 of the second electrical connection element 203 are disposed on different metal layers. For example, the second connection portion 2022 and the fourth connection portion 2032 are disposed on the metal layer M4, and the first connection portion 2021 and the third connection portion 2031 are disposed on the metal layer M5. Metal layers M4 and M5 are located between metal layers M1 and M6, metal layer M5 is located between metal layers M1 and M6, and metal layer M5 is located between metal layers M4 and M6. In other embodiments, the first connection portion 2021, the second connection portion 2022, the third connection portion 2031 and/or the fourth connection portion 2032 may be disposed on other metal layers according to design requirements.
In a vertical projection of integrated circuit 20, first connection 2021 and third connection 2031 are located between first power rail 100 and second power rail 101. The second connecting portion 2022 and the fourth connecting portion 2032 are located on the axis AA '(the axis AA' is parallel to the second axial direction L2). As shown in fig. 3, the first connection portion 2021 is coupled (electrically connected) to the second connection portion 2022 via a via plug, and the third connection portion 2031 is coupled (electrically connected) to the fourth connection portion 2032 via another via plug.
The first power line 104 is electrically connected to the first connection portion 2021 via a via plug, and the second connection portion 2022 is electrically connected to the first power trace 100 via another via plug. Thus, first power conductor 104 may be connected to first power rail 100 through first connection 2021 and second connection 2022. The second power line 105 is electrically coupled to the third connection 2031 via a via plug, and the fourth connection 2032 is electrically coupled to the second power trace 101 via another via plug. Thus, the second power conductor 105 may be connected to the second power rail 101 through the third connection 2031 and the fourth connection 2032. Thus, the voltage of the first power conductor 104 (e.g. the system voltage Vdd) may be transmitted to the first power rail 100 via the first electrical connection element 202, and the voltage of the second power conductor 105 (e.g. the reference voltage Vss) may be transmitted to the second power rail 101 via the second electrical connection element 203.
Fig. 4A is a top view of an integrated circuit 30 according to another embodiment of the invention. Integrated circuit 30 shown in fig. 4A includes first power rail 100, second power rail 101, first electrical connection element 302, second electrical connection element 303, first power conductor 104, and second power conductor 105. The first power rail 100, the second power rail 101, the first power conductor 104 and the second power conductor 105 shown in fig. 4A can refer to the related descriptions of the first power rail 100, the second power rail 101, the first power conductor 104 and the second power conductor 105 shown in fig. 2A and fig. 2B, and therefore, the description is omitted.
In the embodiment shown in fig. 4A, the first electrical connection element 302 has a first connection portion 3021 and a second connection portion 2022, and the second electrical connection element 303 has a third connection portion 3031 and a fourth connection portion 2032. The first connection portion 3021 is coupled (electrically connected) to the second connection portion 2022 via the via plug. The first electrical connection element 302, the first connection portion 3021 and the second connection portion 2022 shown in fig. 4A can be analogized by referring to the related descriptions of the first electrical connection element 202, the first connection portion 2021 and the second connection portion 2022 shown in fig. 3. The third connection portion 3031 is coupled (electrically connected) to the fourth connection portion 2032 via another via plug. The second electrical connection element 303, the third connection portion 3031 and the fourth connection portion 2032 shown in fig. 4A can be analogized by referring to the description of the second electrical connection element 203, the third connection portion 2031 and the fourth connection portion 2032 shown in fig. 3.
In the embodiment shown in fig. 4A, the first connection portion 3021 has a first extension portion 3021A and a second extension portion 3021B. The third connection portion 3031 includes a third extension portion 3031A and a fourth extension portion 3031B. The first extension portion 3021A and the third extension portion 3031A have substantially the same width W1, and the second extension portion 3021B and the fourth extension portion 3031B have substantially the same width W2. The first power conductor 104 covers a portion of the first extension 3021A.
Fig. 4B is a perspective view of the integrated circuit 30 shown in fig. 4A. It is noted that fig. 4B does not show some elements of fig. 4A. One skilled in the art can readily analogize to the rest of the elements in fig. 4A by the layout structure shown in fig. 4B. The integrated circuit 30 has multiple metal layers. In the embodiment shown in FIG. 4B, the integrated circuit 40 has seven metal layers M1-M7.
Please refer to fig. 4A and fig. 4B. The first power trace 100 and the second power trace 101 are disposed on the metal layer M1. The first electrical connection element 302 has a first connection portion 3021 and a second connection portion 2022. The second electrical connection member 303 has a third connection portion 3031 and a fourth connection portion 2032. The second connection portion 2022 and the fourth connection portion 2032 are disposed on the metal layer M5. The first connection portion 3021 and the third connection portion 3031 are disposed in the metal layer M6. In other embodiments, the first connection portion 3021, the second connection portion 2022, the third connection portion 3031 and the fourth connection portion 2032 may be disposed on other metal layers according to design requirements. The second connection portion 2022 is electrically coupled to the first power trace 100 via a via plug (via plug) V31, and the fourth connection portion 2032 is electrically coupled to the second power trace 101 via another via plug. The first connection portion 3021 is coupled (electrically connected) to the second connection portion 2022 via a via plug V32, and the third connection portion 3031 is coupled (electrically connected) to the fourth connection portion 2032 via another via plug. The first power line 104 is coupled (electrically connected) to the first connection 3021 through a via plug V33, and the second power line 105 is coupled (electrically connected) to the third connection 3031 through another via plug.
Therefore, in the integrated circuit 30 of the present invention, the first connection portion 3021 and the third connection portion may have the same width W1 and extend along the first axial direction L1. Thus, routing resources of the integrated circuit 30 can be saved, and thus routing resources can be increased without reducing power planning density, or power planning density can be increased without reducing routing resources.
Fig. 5 is a top view of an integrated circuit 40 according to still another embodiment of the invention. Integrated circuit 40 includes a first power trace 400, a second power trace 401, a first electrical connection element 402, a second electrical connection element 403, a third electrical connection element 404, a first power conductor 405, a second power conductor 406, and a third power conductor 407. First power rail 400, second power rail 401, first power conductor 405, second power conductor 406, and third power conductor 407 shown in fig. 5 may refer to the related descriptions of first power rail 100, second power rail 101, first power conductor 104, and second power conductor 105 shown in fig. 2A and fig. 2B, and therefore, the description thereof is omitted. The third power conductor 407 shown in fig. 5 may be analogized with reference to the description relating to the first power conductor 405.
In the embodiment shown in fig. 5, the first electrical connection element 402 includes a first connection portion 4021 and a second connection portion 4022. The first connection portion 4021 is coupled (electrically connected) to the second connection portion 4022 through a via plug. The first electrical connection element 402, the first connection portion 4021 and the second connection portion 4022 shown in fig. 5 can be analogized by referring to the related descriptions of the first electrical connection element 302, the first connection portion 3021 and the second connection portion 2022 shown in fig. 4A, and therefore, the description thereof is omitted. The second electrical connection element 403 includes a third connection portion 4031, a fourth connection portion 4032 and a fifth connection portion 4033. The third connection 4031 is coupled (electrically connected) to the fourth connection 4032 via a via plug, and the third connection 4031 is coupled (electrically connected) to the fifth connection 4033 via another via plug. The second electrical connection element 403, the third connection portion 4031 and the fourth connection portion 4032 shown in fig. 5 can be analogized with the related descriptions of the second electrical connection element 303, the third connection portion 3031 and the fourth connection portion 2032 shown in fig. 4A, and therefore, the description thereof is omitted. The fifth connection 4033 shown in fig. 5 is coupled (electrically connected) to the second power trace 401 via a via plug. The fifth connection 4033 can be analogized with the description of the fourth connection 4032, and thus the description thereof is omitted.
In the embodiment shown in fig. 5, the third connecting portion 4031 includes a third extending portion 4031A, a fourth extending portion 4031B and a fifth extending portion 4031C. The third extension 4031A extends along the first axial direction L1 and connects the fourth extension 4031B and the fifth extension 4031C on both sides of the second power conductor 405. The third extension 4031A and the fourth extension 4031B shown in fig. 5 can be analogized with the description of the third extension 3031A and the fourth extension 3031B shown in fig. 4A, and therefore, the description thereof is omitted.
In the embodiment shown in fig. 5, the third electrical connecting element 404 includes a sixth connecting portion 4041 and a seventh connecting portion 4042. In the present embodiment, the sixth connection portion 4041, the seventh connection portion 4042, and the third power wire 407 are provided at different metal layers. For example, the seventh connection portion 4042 is disposed on the metal layer M4, the sixth connection portion 4041 is disposed on the metal layer M5, and the third power wire 407 is disposed on the metal layer M6. In other embodiments, the sixth connection portion 4041, the seventh connection portion 4042 and/or the third power wire 407 may be disposed on other metal layers according to design requirements. The seventh connection portion 4042 is coupled (electrically connected) to the first power trace 400 via a via plug, the sixth connection portion 4041 is coupled (electrically connected) to the seventh connection portion 4042 via another via plug, and the third power wire 407 is coupled (electrically connected) to the sixth connection portion 4041 via another via plug.
From a vertical projection of the integrated circuit 40, the first power conductor 405, the second power conductor 406, and the third power conductor 407 are parallel to the second axis L2, and the second power conductor 406 is located between the first power conductor 405 and the third power conductor 407. The second connection portion 4022 and the fourth connection portion 4032 are disposed between the first power lead 405 and the second power lead 406, and the second connection portion 4022 and the fourth connection portion 4032 are both located on an axis AA '(the axis AA' is parallel to the second axial direction L2). The fifth and seventh connection portions 4033 and 4042 are disposed between the second and third power conductors 406 and 407, and the fifth and seventh connection portions 4033 and 4042 are both located on the axis BB '(the axis BB' is parallel to the second axial direction L2). Furthermore, first connector 4021, third connector 4031 and sixth connector 4041 are located between first power rail 400 and second power rail 401.
The first power track 400 may be connected to a first power conductor 405 by a first electrical connection element 402 and to a third power conductor 407 by a third electrical connection element 404. The second power track 401 may be connected to a second power conductor 406 by a second electrical connection element 403. Thus, the voltage of the first power conductor 405 and the third power conductor 407 (e.g. the system voltage Vdd) may be transferred to the first power rail 400 via the first electrical connection element 402 and the third electrical connection element 404, and the voltage of the second power conductor 406 (e.g. the reference voltage Vss) may be transferred to the second power rail 401 via the second electrical connection element 403.
Fig. 6 is a top view of an integrated circuit 50 according to a further embodiment of the present invention. Integrated circuit 50 shown in fig. 6 includes first power rail 100, second power rail 101, first electrical connection element 302, second electrical connection element 303, first power conductor 104, and second power conductor 105. The first power trace 100, the second power trace 101, the first electrical connecting element 302, the second electrical connecting element 303, the first power conductor 104, and the second power conductor 105 shown in fig. 6 can be described with reference to fig. 4A, and thus are not described again.
In summary, the integrated circuit according to the embodiments of the present invention has a first power rail and a second power rail adapted to supply power to the standard cell. The via plugs of the first power trace and the via plugs of the second power trace are located on the same axis (i.e., the second connection portion and the fourth connection portion are located on the same axis), so that routing resources can be increased. Without reducing power plan density (power plan density), routing resources of the integrated circuit may be increased; alternatively, the power plan density of the integrated circuit may be increased without reducing routing resources.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, and that various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. An integrated circuit, comprising:
a first power trace and a second power trace disposed in the first metal layer and adapted to be coupled to a standard cell for supplying power to the standard cell, wherein the first power trace and the second power trace are parallel to a first axis;
a first electrical connection element having a first connection portion and a second connection portion, wherein the second connection portion is coupled to the first power rail;
a second electrical connection element having a third connection portion and a fourth connection portion, wherein the fourth connection portion is coupled to the second power rail, and the second connection portion and the fourth connection portion are both located on the same first axis and a second axis of the first axis is different from the first axis; and
a first power line and a second power line disposed on a second metal layer, wherein the second connection portion and the fourth connection portion are located between the first power line and the second power line, the first power line is coupled to the first connection portion, the second power line is coupled to the third connection portion, and the first power line and the second power line respectively supply power to the first power rail and the second power rail through the first electrical connection element and the second electrical connection element.
2. The integrated circuit of claim 1, wherein the first axis is substantially perpendicular to the second axis.
3. The integrated circuit of claim 1, wherein the first electrical connection element and the second electrical connection element are disposed in a third metal layer, and the third metal layer is located between the first metal layer and the second metal layer.
4. The integrated circuit of claim 1, wherein the second connection portion and the fourth connection portion are disposed in a third metal layer, the first connection portion and the third connection portion are disposed in a fourth metal layer, and the third metal layer and the fourth metal layer are located between the first metal layer and the second metal layer.
5. The integrated circuit of claim 4, wherein the third metal layer is located between the first metal layer and the second metal layer, and the fourth metal layer is located between the third metal layer and the second metal layer.
6. The integrated circuit of claim 4, wherein the first connection and the third connection are located between the first power trace and the second power trace in a vertical projection of the integrated circuit.
7. The integrated circuit of claim 1, wherein the first power rail and the second power rail are two power lines that comply with standard cell design rules, the first power rail configured to transmit a system voltage of the first power conductor to the standard cell, and the second power rail configured to transmit a reference voltage of the second power conductor to the standard cell.
8. The integrated circuit of claim 1, wherein the first power conductor and the second power conductor are parallel to the second axis.
9. The integrated circuit of claim 1, wherein the second electrical connection element further has a fifth connection coupled to the second power rail, and further comprising:
a third electrical connection element having a sixth connection portion and a seventh connection portion, wherein the seventh connection portion is coupled to the first power rail, and the fifth connection portion and the seventh connection portion are located on a same second axis and the second axis is parallel to the second axis; and
a third power line disposed on the second metal layer, wherein the second power line is located between the first power line and the third power line, the fifth connection and the seventh connection are located between the second power line and the third power line, the third power line is coupled to the sixth connection, and the third power line supplies power to the first power rail via the third electrical connection element.
10. The integrated circuit of claim 9, wherein the third power conductor is parallel to the second axial direction.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW108130259A TWI733171B (en) | 2019-08-23 | 2019-08-23 | Integrated circuit |
| TW108130259 | 2019-08-23 |
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| CN112420689A true CN112420689A (en) | 2021-02-26 |
| CN112420689B CN112420689B (en) | 2024-05-14 |
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| CN (1) | CN112420689B (en) |
| TW (1) | TWI733171B (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| TW202109737A (en) | 2021-03-01 |
| TWI733171B (en) | 2021-07-11 |
| CN112420689B (en) | 2024-05-14 |
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