CN112416849A - double-CPU data interaction method, device and system - Google Patents

double-CPU data interaction method, device and system Download PDF

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Publication number
CN112416849A
CN112416849A CN202011342105.7A CN202011342105A CN112416849A CN 112416849 A CN112416849 A CN 112416849A CN 202011342105 A CN202011342105 A CN 202011342105A CN 112416849 A CN112416849 A CN 112416849A
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data
operation authority
shared memory
cpu
station cpu
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宋振新
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Hangzhou Hollysys Automation Co Ltd
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Hangzhou Hollysys Automation Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/31—User authentication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/64—Protecting data integrity, e.g. using checksums, certificates or signatures

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  • Computer Hardware Design (AREA)
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Abstract

The invention discloses a double-CPU data interaction method, which can realize the data interaction between a control station CPU and a DP master station CPU by sending a corresponding instruction and alternately acquiring the operation authority of a shared memory, and can avoid the data from being tampered by other equipment which cannot acquire the operation authority when writing and reading the data into the shared memory, thereby greatly reducing the risk of data leakage and effectively improving the safety of data transmission. The invention also provides a double-CPU data interaction device and a double-CPU data interaction system, and the double-CPU data interaction device and the double-CPU data interaction system also have the beneficial effects.

Description

double-CPU data interaction method, device and system
Technical Field
The invention relates to the technical field of computers, in particular to a double-CPU data interaction method, a double-CPU data interaction device and a double-CPU data interaction system.
Background
With the progress of science and technology, industrial automation has been greatly developed. In the field of industrial automation, it is generally necessary to set up peripheral devices to perform acquisition and the like of data, and the peripheral devices are generally set up in a distributed manner. A DP (distributed peripheral) master station is usually set in the field for collecting parameters of peripheral devices; and meanwhile, a control station is arranged and can interact with the DP master station, so that the parameters of each field device are collected and relevant operation is carried out.
However, when the CPU (central processing unit) of the control station interacts with the CPU of the DP master station at the present stage, there is a risk of data leakage, and therefore how to provide a dual-CPU data interaction method with high security is a problem that needs to be solved urgently by those skilled in the art.
Disclosure of Invention
The invention aims to provide a double-CPU data interaction method which has higher safety; another objective of the present invention is to provide a dual-CPU data interaction device and a dual-CPU data interaction system, which have higher security.
In order to solve the above technical problem, the present invention provides a dual-CPU data interaction method, applied to a control station CPU, comprising:
acquiring the operation authority of the shared memory; the control station CPU and the DP master station CPU share the same shared memory;
sending a data input instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to the shared memory according to the operation authority;
after a data input instruction is sent to the DP master station CPU and the operation authority is released, the operation authority released by the DP master station CPU is obtained, and the input data is read from the shared memory according to the operation authority;
computing the input data to obtain output data;
storing and outputting data to the shared memory according to the operation authority;
after storing output data in the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
Optionally, the obtaining the operation permission of the shared memory includes:
and when the operation period is reached, acquiring the operation authority of the shared memory.
Optionally, after storing output data in the shared memory according to the operation permission, sending a data output instruction to the DP central station CPU and releasing the operation permission, so that the DP central station CPU obtains the operation permission according to the data output instruction, and reading the output data stored in the shared memory according to the operation permission includes:
after storing output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction, reads the output data stored in the shared memory according to the operation authority, and releases the operation authority after the DP master station CPU reads the output data.
Optionally, the input data is data collected by the DP central station CPU through each field device.
Optionally, the usage record of the operation permission is stored in a configuration parameter area of the shared memory.
The invention also provides a double-CPU data interaction device, which is applied to the control station CPU and comprises:
a first obtaining module: the method comprises the steps of obtaining operation permission of a shared memory; the control station CPU and the DP master station CPU share the same shared memory;
an input instruction module: the data processing system is used for sending a data input instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to the shared memory according to the operation authority;
a second obtaining module: the shared memory is used for acquiring the operation authority released by the DP master station CPU after sending a data input instruction to the DP master station CPU and releasing the operation authority, and reading the input data from the shared memory according to the operation authority;
an operation module: the device is used for calculating the input data to obtain output data;
a storage module: the shared memory is used for storing and outputting data to the shared memory according to the operation authority;
an output instruction module: and after storing output data in the shared memory according to the operation authority, sending a data output instruction to the DP central station CPU and releasing the operation authority, so that the DP central station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
The invention also provides a double-CPU data interaction method, which is applied to the DP master station CPU and comprises the following steps:
acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction; the DP master station CPU and the control station CPU share the same shared memory; the data input instruction is an instruction sent when the control station CPU releases the operation authority;
writing input data into the shared memory according to the operation authority;
releasing the operation authority after writing input data into the shared memory;
acquiring a data output instruction and acquiring the operation authority according to the data output instruction; the data output instruction is an instruction sent by the control station CPU after writing output data into the shared memory according to the acquired operation authority, and the output data is output data obtained by the control station CPU through operation according to the input data;
and reading the output data stored in the shared memory according to the operation authority.
Optionally, after the reading the output data stored in the shared memory according to the operation permission, the method further includes:
and releasing the operation authority.
The invention also provides a double-CPU data interaction device, which is applied to the DP master station CPU and comprises the following components:
a third obtaining module: the shared memory access control system is used for acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction; the DP master station CPU and the control station CPU share the same shared memory; the data input instruction is an instruction sent when the control station CPU releases the operation authority;
a writing module: the shared memory is used for writing input data into the shared memory according to the operation authority;
a releasing module: the shared memory is used for storing input data, and releasing the operation authority after the input data is written into the shared memory;
a fourth obtaining module: the system is used for acquiring a data output instruction and acquiring the operation authority according to the data output instruction; the data output instruction is an instruction sent by the control station CPU after writing output data into the shared memory according to the acquired operation authority, and the output data is output data obtained by the control station CPU through operation according to the input data;
a reading module: and the output data is used for reading the output data stored in the shared memory according to the operation authority.
The invention also provides a double-CPU data interaction system, which comprises a control station CPU and a DP master station CPU, wherein the control station CPU and the DP master station CPU share the same shared memory;
the control station CPU is used for:
acquiring the operation authority of the shared memory;
sending a data input instruction to the DP master station CPU and releasing the operation authority;
after a data input instruction is sent to the DP master station CPU and the operation authority is released, the operation authority released by the DP master station CPU is obtained, and the input data is read from the shared memory according to the operation authority;
computing the input data to obtain output data;
storing and outputting data to the shared memory according to the operation authority;
after storing and outputting data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority;
the DP head station CPU is used for:
acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction;
writing input data into the shared memory according to the operation authority;
releasing the operation authority after writing input data into the shared memory;
acquiring a data output instruction and acquiring the operation authority according to the data output instruction;
and reading the output data stored in the shared memory according to the operation authority.
The invention provides a double-CPU data interaction method, which is applied to a control station CPU and comprises the steps of obtaining the operation authority of a shared memory; the control station CPU and the DP master station CPU share the same shared memory; sending a data input instruction to a DP master station CPU and releasing an operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to a shared memory according to the operation authority; after sending a data input instruction to a DP master station CPU and releasing the operation authority, acquiring the operation authority released by the DP master station CPU, and reading input data from a shared memory according to the operation authority; calculating input data to obtain output data; storing and outputting data to the shared memory according to the operation authority; and after storing the output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
The method has the advantages that the interaction of data between the control station CPU and the DP master CPU can be realized by sending corresponding instructions and alternately acquiring the shared memory operation permission, and meanwhile, when data are written in and read from the shared memory, other devices which cannot acquire the operation permission can be prevented from tampering the data, so that the risk of data leakage can be greatly reduced, and the safety of data transmission is effectively improved.
The invention also provides a double-CPU data interaction device and a double-CPU data interaction system, which also have the beneficial effects and are not repeated herein.
Drawings
In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
Fig. 1 is a flowchart of a dual-CPU data interaction method according to an embodiment of the present invention;
fig. 2 is a block diagram of a dual-CPU data interaction apparatus according to an embodiment of the present invention;
fig. 3 is a flowchart of a specific dual-CPU data interaction method according to an embodiment of the present invention;
fig. 4 is a block diagram of a specific dual-CPU data interaction apparatus according to an embodiment of the present invention;
fig. 5 is a block diagram of a dual-CPU data interaction system according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide a double-CPU data interaction method. In the prior art, data communication is usually performed in a mailbox mode, that is, a control station CPU puts data into a mailbox address and then notifies a DP master station CPU to read the data, and at this time, the control station CPU waits for a DP master station CPU to feed back a response in an inquired mode to confirm whether the DP master station CPU receives mailbox data; the DP master station CPU also puts data into a mailbox address, then informs the control station CPU to read the data, and waits for a feedback response of the control station CPU in a queried manner so as to confirm whether the control station CPU receives mailbox data; thereby completing one beat of aperiodic data communication. However, this communication method involves a risk of data leakage when the CPU of the control station interacts with the CPU of the DP master station.
The double-CPU data interaction method provided by the invention is applied to a control station CPU and comprises the steps of obtaining the operation authority of a shared memory; the control station CPU and the DP master station CPU share the same shared memory; sending a data input instruction to a DP master station CPU and releasing an operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to a shared memory according to the operation authority; after sending a data input instruction to a DP master station CPU and releasing the operation authority, acquiring the operation authority released by the DP master station CPU, and reading input data from a shared memory according to the operation authority; calculating input data to obtain output data; storing and outputting data to the shared memory according to the operation authority; and after storing the output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
The method has the advantages that the interaction of data between the control station CPU and the DP master CPU can be realized by sending corresponding instructions and alternately acquiring the shared memory operation permission, and meanwhile, when data are written in and read from the shared memory, other devices which cannot acquire the operation permission can be prevented from tampering the data, so that the risk of data leakage can be greatly reduced, and the safety of data transmission is effectively improved.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart illustrating a dual-CPU data interaction method according to an embodiment of the present invention.
In the embodiment of the invention, the dual-CPU data interaction method is particularly applied to the control station CPU, and the method provided by the embodiment of the invention is particularly a specific interaction mode between the control station CPU and the DP master station CPU.
Referring to fig. 1, the dual-CPU data interaction method includes:
s101: and acquiring the operation authority of the shared memory.
In the embodiment of the present invention, the control station CPU and the DP master station CPU share the same shared memory. The use record of the operation authority, for example, information about which component is specifically the currently acquired operation authority, is usually stored in a preset configuration parameter area of the shared memory, and only the device acquiring the operation authority in the embodiment of the present invention may perform operations such as data reading and data writing on the shared memory. The shared memory is a shared memory of the control station CPU and the DP central station CPU, and is usually only allowed to be operated by the control station CPU or the DP central station CPU, so as to ensure security during data transmission.
In this step, the control station CPU specifically acquires the operation permission of the shared memory, so as to ensure that the DP master station CPU can acquire the operation permission in the subsequent process. For the details of the operation authority, reference may be made to the prior art, and details thereof are not repeated herein.
The step may specifically be: and when the operation period is reached, acquiring the operation authority of the shared memory. Namely, the embodiment of the present invention is particularly applicable to an application scenario of performing "periodic data communication" between the control station CPU and the DP central station CPU, that is, the triggering condition of this step is that the following procedure is executed whenever a time limit of an operation period is reached, so that the control station CPU can operate on data collected by the DP central station CPU. The specific duration of the operation period may be set according to actual conditions, and is not limited in any way.
Of course, the data interaction method provided by the embodiment of the present invention is also applicable to "aperiodic data communication", that is, the interaction condition is event-triggered interaction, that is, data interaction is performed only in some specific control scenarios, and data interaction cannot be performed in other times. The corresponding trigger condition of this step may be a preset trigger condition, so as to be applicable to the communication scenario of "aperiodic data communication".
S102: and sending a data input instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to the shared memory according to the operation authority.
In this step, the control station CPU sends a data input instruction to the DP central station CPU and releases the operation permission, so that when the DP central station CPU receives the data input instruction, the DP central station CPU can obtain the operation permission of the shared memory according to the data input instruction, and further write input data into the shared memory according to the operation permission, typically to a specific input data area preset in the shared memory.
The input data is generally data acquired by the DP central station CPU through each field device in the embodiment of the present invention, that is, the DP central station CPU usually acquires data of each field device as input data periodically, and in the embodiment of the present invention, the control station CPU can acquire the input data by sharing a memory. The specific content of the input data may be set according to the actual situation, and is not limited specifically herein.
S103: and after sending a data input instruction to the DP master station CPU and releasing the operation authority, acquiring the operation authority released by the DP master station CPU, and reading input data from the shared memory according to the operation authority.
It should be noted that, after the DP master station CPU writes the input data into the shared memory, the operation permission of the shared memory needs to be released, and in this step, the control station CPU specifically acquires the operation permission released by the DP master station CPU, and then further reads the input data from the shared memory according to the operation permission, so as to implement interaction of the input data from the DP master station CPU to the control station CPU.
S104: and calculating the input data to obtain output data.
In this step, the control station CPU specifically performs an operation on the input data, and the operation takes the result of the operation as output data. The specific process related to the above operation may be set according to actual conditions, and is not limited specifically herein.
S105: and storing and outputting data to the shared memory according to the operation authority.
It should be noted that, in S104, the control station CPU usually does not release the operation authority, so in this step, the output data may be further written into the shared memory according to the operation authority, and usually into the preset output data area of the shared memory.
S106: and after storing the output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
In this step, after writing the output data into the shared memory, the control station CPU sends a data output instruction to the DP central station CPU and releases the operation authority, and then the DP central station CPU obtains the operation authority after receiving the data output instruction and reads the output data from the shared memory according to the operation authority. Further, the DP central station CPU may control each field device according to the output data.
In general, after the DP central station CPU reads the output data, the operation authority of the shared memory needs to be released, so as to control the execution of data interaction between the station CPU and the DP central station CPU next time. Namely, the step is usually embodied as follows: after storing output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction, reads the output data stored in the shared memory according to the operation authority, and releases the operation authority after the DP master station CPU reads the output data.
In the embodiment of the present invention, the configuration parameter area usually further stores common information of a data attribute, where the data attribute usually includes identification information used for indicating a data flow direction in the shared memory, such as a transmission direction of the input data, the output data, and the like, and is used for implementing data interaction between the control station CPU and the DP central station CPU.
According to the double-CPU data interaction method provided by the embodiment of the invention, the interaction of data between the control station CPU and the DP master CPU can be realized by sending the corresponding instruction and alternately acquiring the shared memory operation permission between the control station CPU and the DP master CPU, and meanwhile, when data is written into and read from the shared memory, other devices which cannot acquire the operation permission can be prevented from tampering the data, so that the risk of data leakage can be greatly reduced, and the safety of data transmission is effectively improved.
In the following, the dual-CPU data interaction device provided by the embodiment of the present invention is introduced, and the dual-CPU data interaction device described below and the dual-CPU data interaction method described above may be referred to correspondingly.
Fig. 2 is a block diagram of a dual-CPU data interaction device according to an embodiment of the present invention, where the dual-CPU data interaction device is applied to a control station CPU to implement interaction between the control station CPU and a DP central station CPU.
Referring to fig. 2, the dual CPU data interaction apparatus may include:
the first obtaining module 100: the method comprises the steps of obtaining operation permission of a shared memory; and the control station CPU and the DP master station CPU share the same shared memory.
The input instruction module 200: and the data processing device is used for sending a data input instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to the shared memory according to the operation authority.
The second obtaining module 300: and the shared memory is used for acquiring the operation authority released by the DP master station CPU after sending a data input instruction to the DP master station CPU and releasing the operation authority, and reading the input data from the shared memory according to the operation authority.
The operation module 400: and the data processing unit is used for operating the input data to obtain output data.
The storage module 500: and the shared memory is used for storing and outputting data to the shared memory according to the operation authority.
The output instruction module 600: and after storing output data in the shared memory according to the operation authority, sending a data output instruction to the DP central station CPU and releasing the operation authority, so that the DP central station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
Preferably, in the embodiment of the present invention, the first obtaining module 100 is specifically configured to:
and when the operation period is reached, acquiring the operation authority of the shared memory.
Preferably, in the embodiment of the present invention, the output instruction module 600 is specifically configured to:
after storing output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction, reads the output data stored in the shared memory according to the operation authority, and releases the operation authority after the DP master station CPU reads the output data.
Preferably, in this embodiment of the present invention, the input data is data collected by the DP central station CPU through each field device.
Preferably, in the embodiment of the present invention, the usage record of the operation authority is stored in a configuration parameter area of the shared memory.
The dual-CPU data interaction apparatus of this embodiment is used to implement the aforementioned dual-CPU data interaction method, and therefore specific embodiments in the dual-CPU data interaction apparatus may be found in the foregoing portions of the embodiment of the dual-CPU data interaction method, for example, the first obtaining module 100, the input instruction module 200, the second obtaining module 300, the operation module 400, the storage module 500, and the output instruction module 600 are respectively used to implement steps S101, S102, S103, S104, S105, and S106 in the aforementioned dual-CPU data interaction method, so that the specific embodiments thereof may refer to descriptions of corresponding portions of the embodiments, and are not described herein again.
Referring to fig. 3, fig. 3 is a flowchart illustrating a specific dual-CPU data interaction method according to an embodiment of the present invention.
In the embodiment of the invention, the dual-CPU data interaction method is particularly applied to the DP central station CPU, and the method provided by the embodiment of the invention is particularly a specific interaction mode between the control station CPU and the DP central station CPU.
Referring to fig. 3, the dual-CPU data interaction method includes:
s201: and acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction.
In the embodiment of the invention, the DP master station CPU and the control station CPU share the same shared memory; and the data input instruction is an instruction sent when the control station CPU releases the operation authority. The control station CPU needs to acquire the operation authority of the shared memory first, and the control station CPU can specifically acquire the operation authority of the shared memory every time the operation cycle is reached. After the control station CPU obtains the operation authority, a data input instruction may be sent to the DP central station CPU, and in this step, the DP central station CPU may obtain the operation authority of the shared memory according to the data input instruction.
The information of the currently acquired operation authority, such as which component is specific to the currently acquired operation authority, is usually stored in a preset configuration parameter area of the shared memory, and the configuration parameter area usually also stores common information of data attributes, where the data attributes usually include identification information used for representing data flow direction in the shared memory, such as transmission direction of the input data, output data, and the like, and are used for realizing data interaction between the control station CPU and the DP central station CPU.
S202: and writing input data into the shared memory according to the operation authority.
In this step, the DP central station CPU writes the input data into the shared memory according to the operation permission, and details about the input data are described in detail in the above embodiments of the present invention and are not described herein again. The input data is generally data acquired by the DP central station CPU through each field device, that is, the DP central station CPU generally acquires data of each field device as input data periodically, and in the embodiment of the present invention, the control station CPU can acquire the input data by sharing a memory.
S203: and releasing the operation authority after the input data is written into the shared memory.
In this step, the DP central station CPU releases the operation authority again, so that the control station CPU can newly acquire the operation authority to read the input data.
S204: and acquiring a data output instruction and acquiring an operation authority according to the data output instruction.
In this embodiment of the present invention, the data output instruction is an instruction sent by the control station CPU after writing output data into the shared memory according to the acquired operation permission, and the output data is output data obtained by the control station CPU performing an operation according to the input data.
After the control station CPU obtains input data, output data can be obtained through certain operation, the output data are written into the shared memory according to the control authority, and then the control authority is released and a data output instruction is sent to the DP master station CPU. In this step, the DP master CPU obtains the operation right according to the data output instruction, so as to perform the following steps.
S205: and reading the output data stored in the shared memory according to the operation authority.
In this step, the output data written in the shared memory is read according to the operation authority, and the data interaction between the control station CPU and the DP master station CPU is realized.
After this step, it is usually necessary to release the operation authority so as to perform the next data interaction between the control station CPU and the DP master station CPU.
It should be noted that, the dual-CPU data interaction method provided in the embodiment of the present invention and the dual-CPU data interaction method provided in the embodiment of the present invention may be referred to correspondingly, and the two methods respectively act on the control station CPU and the DP master station CPU, and are executed correspondingly to each other to implement data interaction between the control station CPU and the DP master station CPU, so that the specific implementation manner thereof may refer to descriptions of corresponding respective partial embodiments, and is not described herein again.
In the following, the dual-CPU data interaction device provided by the embodiment of the present invention is introduced, and the dual-CPU data interaction device described below and the dual-CPU data interaction method described above may be referred to correspondingly.
Fig. 4 is a block diagram of a specific dual-CPU data interaction device according to an embodiment of the present invention, where the dual-CPU data interaction device is applied to a DP central office CPU to implement interaction between a control station CPU and the DP central office CPU.
Referring to fig. 4, the dual CPU data interaction apparatus may include:
the third obtaining module 700: the shared memory access control system is used for acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction; the DP master station CPU and the control station CPU share the same shared memory; and the data input instruction is an instruction sent when the control station CPU releases the operation authority.
The write module 800: and the shared memory is used for writing input data into the shared memory according to the operation authority.
The release module 900: and the operation authority is released after the input data is written into the shared memory.
The fourth obtaining module 1000: the system is used for acquiring a data output instruction and acquiring the operation authority according to the data output instruction; and the data output instruction is an instruction sent after the control station CPU writes output data into the shared memory according to the acquired operation authority, and the output data is output data obtained by the control station CPU through operation according to the input data.
The reading module 1100: and the output data is used for reading the output data stored in the shared memory according to the operation authority.
Preferably, in the embodiment of the present invention, the data input instruction is specifically an instruction that is sent when the control station CPU releases the operation authority after acquiring the operation authority of the shared memory each time when an operation cycle is reached.
Preferably, in the embodiment of the present invention, the method further includes:
a secondary release module: for releasing the operating right after reading the output data.
Preferably, in this embodiment of the present invention, the input data is data collected by the DP central station CPU through each field device.
Preferably, in the embodiment of the present invention, the usage record of the operation authority is stored in a configuration parameter area of the shared memory.
The dual-CPU data interaction apparatus of this embodiment is used to implement the aforementioned dual-CPU data interaction method, and therefore specific implementations of the dual-CPU data interaction apparatus may be found in the foregoing portions of the embodiment of the dual-CPU data interaction method, for example, the third obtaining module 700, the writing module 800, the releasing module 900, the fourth obtaining module 1000, and the reading module 1100 are respectively used to implement steps S201, S202, S203, S204, and S205 in the aforementioned dual-CPU data interaction method, so that the specific implementations thereof may refer to descriptions of corresponding embodiments of each portion, and are not described herein again.
The dual-CPU data interaction system provided in the embodiments of the present invention is introduced below, and the dual-CPU data interaction system described below, the dual-CPU data interaction method described above, and the dual-CPU data interaction apparatus may be referred to in a corresponding manner.
Fig. 5 is a block diagram of a dual-CPU data interaction system according to an embodiment of the present invention, and referring to fig. 5, the dual-CPU data interaction system includes a control station CPU11 and a DP bus station CPU12, and the control station CPU11 and the DP bus station CPU12 share a same shared memory.
The control station CPU11 is configured to:
and acquiring the operation authority of the shared memory.
Sends a data input instruction to the DP bus station CPU12 and releases the operation authority.
After sending a data input instruction to the DP central station CPU12 and releasing the operation authority, acquiring the operation authority released by the DP central station CPU12, and reading the input data from the shared memory according to the operation authority.
And calculating the input data to obtain output data.
And storing and outputting data to the shared memory according to the operation authority.
After storing output data in the shared memory according to the operation authority, a data output instruction is sent to the DP central station CPU12 and the operation authority is released.
The DP central office CPU12 is configured to:
and acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction.
And writing input data into the shared memory according to the operation authority.
And releasing the operation authority after writing input data into the shared memory.
And acquiring a data output instruction and acquiring the operation authority according to the data output instruction.
And reading the output data stored in the shared memory according to the operation authority.
Preferably, in the embodiment of the present invention, the control station CPU11 is specifically configured to:
and when the operation period is reached, acquiring the operation authority of the shared memory.
Preferably, in the embodiment of the present invention, the DP bus station CPU12 is further configured to:
and releasing the operation authority after the output data stored in the shared memory is read according to the operation authority.
Preferably, in this embodiment of the present invention, the input data is data collected by the DP central station CPU12 through each field device.
Preferably, in the embodiment of the present invention, the usage record of the operation authority is stored in a configuration parameter area of the shared memory.
The dual-CPU data interaction system of this embodiment is used to install the dual-CPU data interaction device and implement the dual-CPU data interaction method, so that the specific implementation manner in the dual-CPU data interaction system can be seen in the foregoing embodiment section of the dual-CPU data interaction method. Therefore, the detailed description thereof may refer to the description of the corresponding partial embodiments, which is not repeated herein.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The double-CPU data interaction method, the double-CPU data interaction device and the double-CPU data interaction system provided by the invention are described in detail above. The principles and embodiments of the present invention are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.

Claims (10)

1. A dual-CPU data interaction method is applied to a control station CPU and comprises the following steps:
acquiring the operation authority of the shared memory; the control station CPU and the DP master station CPU share the same shared memory;
sending a data input instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to the shared memory according to the operation authority;
after a data input instruction is sent to the DP master station CPU and the operation authority is released, the operation authority released by the DP master station CPU is obtained, and the input data is read from the shared memory according to the operation authority;
computing the input data to obtain output data;
storing and outputting data to the shared memory according to the operation authority;
after storing output data in the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
2. The method of claim 1, wherein obtaining the operating right of the shared memory comprises:
and when the operation period is reached, acquiring the operation authority of the shared memory.
3. The method according to claim 2, wherein after storing output data in the shared memory according to the operation authority, sending a data output instruction to the DP central station CPU and releasing the operation authority, so that the DP central station CPU obtains the operation authority according to the data output instruction, and reading the output data stored in the shared memory according to the operation authority includes:
after storing output data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data output instruction, reads the output data stored in the shared memory according to the operation authority, and releases the operation authority after the DP master station CPU reads the output data.
4. The method of claim 1, wherein the input data is data collected by the DP substation CPU via various field devices.
5. The method according to claim 4, wherein the usage record of the operation right is stored in a configuration parameter area of the shared memory.
6. A dual-CPU data interaction device is applied to a control station CPU and comprises:
a first obtaining module: the method comprises the steps of obtaining operation permission of a shared memory; the control station CPU and the DP master station CPU share the same shared memory;
an input instruction module: the data processing system is used for sending a data input instruction to the DP master station CPU and releasing the operation authority, so that the DP master station CPU obtains the operation authority according to the data input instruction and stores input data to the shared memory according to the operation authority;
a second obtaining module: the shared memory is used for acquiring the operation authority released by the DP master station CPU after sending a data input instruction to the DP master station CPU and releasing the operation authority, and reading the input data from the shared memory according to the operation authority;
an operation module: the device is used for calculating the input data to obtain output data;
a storage module: the shared memory is used for storing and outputting data to the shared memory according to the operation authority;
an output instruction module: and after storing output data in the shared memory according to the operation authority, sending a data output instruction to the DP central station CPU and releasing the operation authority, so that the DP central station CPU obtains the operation authority according to the data output instruction and reads the output data stored in the shared memory according to the operation authority.
7. A dual-CPU data interaction method is applied to a DP central station CPU and comprises the following steps:
acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction; the DP master station CPU and the control station CPU share the same shared memory; the data input instruction is an instruction sent when the control station CPU releases the operation authority;
writing input data into the shared memory according to the operation authority;
releasing the operation authority after writing input data into the shared memory;
acquiring a data output instruction and acquiring the operation authority according to the data output instruction; the data output instruction is an instruction sent by the control station CPU after writing output data into the shared memory according to the acquired operation authority, and the output data is output data obtained by the control station CPU through operation according to the input data;
and reading the output data stored in the shared memory according to the operation authority.
8. The method according to claim 7, further comprising, after the reading the output data stored in the shared memory according to the operation right:
and releasing the operation authority.
9. A dual-CPU data interaction device is applied to a DP central station CPU and comprises the following components:
a third obtaining module: the shared memory access control system is used for acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction; the DP master station CPU and the control station CPU share the same shared memory; the data input instruction is an instruction sent when the control station CPU releases the operation authority;
a writing module: the shared memory is used for writing input data into the shared memory according to the operation authority;
a releasing module: the shared memory is used for storing input data, and releasing the operation authority after the input data is written into the shared memory;
a fourth obtaining module: the system is used for acquiring a data output instruction and acquiring the operation authority according to the data output instruction; the data output instruction is an instruction sent by the control station CPU after writing output data into the shared memory according to the acquired operation authority, and the output data is output data obtained by the control station CPU through operation according to the input data;
a reading module: and the output data is used for reading the output data stored in the shared memory according to the operation authority.
10. A double-CPU data interaction system is characterized by comprising a control station CPU and a DP master station CPU, wherein the control station CPU and the DP master station CPU share the same shared memory;
the control station CPU is used for:
acquiring the operation authority of the shared memory;
sending a data input instruction to the DP master station CPU and releasing the operation authority;
after a data input instruction is sent to the DP master station CPU and the operation authority is released, the operation authority released by the DP master station CPU is obtained, and the input data is read from the shared memory according to the operation authority;
computing the input data to obtain output data;
storing and outputting data to the shared memory according to the operation authority;
after storing and outputting data to the shared memory according to the operation authority, sending a data output instruction to the DP master station CPU and releasing the operation authority;
the DP head station CPU is used for:
acquiring a data input instruction and acquiring the operation authority of the shared memory according to the data input instruction;
writing input data into the shared memory according to the operation authority;
releasing the operation authority after writing input data into the shared memory;
acquiring a data output instruction and acquiring the operation authority according to the data output instruction;
and reading the output data stored in the shared memory according to the operation authority.
CN202011342105.7A 2020-11-25 2020-11-25 double-CPU data interaction method, device and system Pending CN112416849A (en)

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