CN112382666B - 一种柔性器件及其制备方法 - Google Patents
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Abstract
本发明涉及一种柔性器件及其制备方法,主要结构由上至下包括:基底层(1)、粘结层(2)、隔离区(3)、保护层(4),及其包围的器件区,所述器件区包括源区和漏区(5)、体区(6)、栅介质层(7)、栅电极(8)、互连层(9)、第一连接电极(10)、第二连接电极(11)。本发明通过设置基底层和保护层对柔性器件形成保护,对其进行应力缓冲,能够防止外界的沾污、冲击等对器件功能层造成损伤,提高了柔性器件的可靠性和柔性。
Description
技术领域
本发明属于半导体材料领域,特别涉及一种柔性器件及其制备方法。
背景技术
将电子器件柔性化可以颠覆性地改变传统信息器件的刚性物理形态,使柔性电子器件具有可弯曲、拉伸、延展等特点,从而满足下一代电子产品对其便携化、可延展性、可穿戴性等技术特点的进一步需求。
当前绝大多数电子技术都是基于半导体硅的,这是因为硅基半导体比无机半导体具有更高的迁移率、优异的电学性能、良好的机械性能、成熟的制造工艺等优势。采用适当的方法实现硅基器件的柔性化可以获得高性能的柔性电子器件。目前现有的制备技术中,通常是将硅基元器件进行机械(研磨、抛光)减薄、转移并键合到柔性基板上,在这些工艺过程中,柔性器件往往会产生轻微变形,致使出现产品功能退化、良率降低等不良影响。
发明内容
本发明所要解决的技术问题是提供一种柔性器件及其制备方法,通过设置基底层和保护层对柔性器件形成保护,同时结合工艺过程改进,能够防止外界的沾污、冲击等对器件功能层造成损伤,提高了柔性器件的可靠性和柔性。
本发明提供了一种柔性器件,所述柔性器件结构由上至下包括:基底层、粘结层、隔离区和保护层;所述隔离区位于中部的体区外端,所述体区两端设置源区和漏区;所述体区上方依次设置栅介质层和栅电极,栅介质层和栅电极均位于粘结层的中部;设置互连层贯穿粘结层和隔离区,互连层一端与栅电极相连,另一端与保护层中的第二连接电极相连;于保护层中所述源区和漏区下方设置第一连接电极,实现器件的电学连接。
所述基底层的材料为柔性玻璃材料、金属材料、聚合物材料中的至少一种,所述聚合物材料包括不限于聚二甲基硅氧烷(PDMS)、聚酰亚胺(PI)、聚对苯二甲酸乙二醇酯(PET)等。所述基底层覆盖粘结层和互连层,能够对整个器件起到支撑和保护作用,同时提高结构的柔韧性。
所述粘结层和隔离区的材料为聚酰亚胺、光刻胶、甲基丙烯酸甲酯(PMMA)中的至少一种。所述粘结层将器件表面与基底层连接,具有良好的柔性、稳定性、防潮性等性能特点。所述隔离区实现器件间的电气隔离。
所述保护层的材料为聚二甲基硅氧烷、聚酰亚胺、聚对苯二甲酸乙二醇酯中的至少一种。
所述源区和漏区对NMOS晶体管为N型掺杂,为PMOS晶体管为P型掺杂。源区和漏区对称,可以互换。
所述体区的材料为N型或者P型材料。
所述栅介质层的材料为二氧化硅或高K材料;所述栅电极的材料为多晶硅或金属栅极。
所述互连层的材料为导电胶、聚苯胺及其衍生物、聚乙炔中的至少一种。所述互连层有利于实现空间上的弯曲和变形,提高互连可靠性。
本发明还提供了一种柔性器件的制备方法,包括:
(1)采用半导体SOI基片,包括半导体硅衬底、埋氧层和顶层硅;在所述顶层硅中制造晶体管,该晶体管结构包括:体区,位于体区上方的栅介质层和栅电极,位于体区横向两端的源区和漏区,位于源区和漏区外端的隔离区;
(2)在晶体管表面覆盖粘结层,刻蚀粘结层形成通孔,并在通孔中填充导电材料形成互连层;随后在粘结层和互连层表面形成基底层;
(3)采用激光技术在硅衬底的预设位置进行柔性器件的剥离;对含有晶体管的结构继续减薄处理,采用干法或湿法刻蚀以去除剩余的硅衬底和埋氧层;
(4)在远离基底层的晶体管表面覆盖保护层;在对应于形成电极区的位置形成通孔,用导电胶填充通孔形成源区和漏区的第一连接电极,同时第二连接电极通过互连层将栅电极引出。
有益效果
(1)本发明通过设置基底层和保护层对柔性器件形成保护,对其进行应力缓冲,结合工艺过程改进,能够防止外界的沾污、冲击等对器件功能层造成损伤,提高了柔性器件的可靠性和柔性。
(2)本发明利用SOI的埋氧层作为牺牲层,有利于精确控制衬底减薄的刻蚀速率,降低了刻蚀对晶体管有源区的影响。
(3)本发明采用激光剥离法替代传统的机械减薄法将需要去除的衬底整体移除,有效避免了机械处理带来的损伤问题,另一方面被移除的衬底可以重复利用,节省成本。
附图说明
图1为本发明的结构示意图;
图2为本发明的制备工艺示意图。
具体实施方式
下面结合具体实施例,进一步阐述本发明。应理解,这些实施例仅用于说明本发明而不用于限制本发明的范围。此外应理解,在阅读了本发明讲授的内容之后,本领域技术人员可以对本发明作各种改动或修改,这些等价形式同样落于本申请所附权利要求书所限定的范围。
实施例1
如图1所示,本实施例提供了一种柔性器件,所述柔性器件结构由上至下包括:基底层1、粘结层2、隔离区3和保护层4;所述隔离区3位于中部的体区6外端,所述体区6两端设置源区和漏区5;所述体区6上方依次设置栅介质层7和栅电极8,栅介质层7和栅电极8均位于粘结层2的中部;设置互连层9贯穿粘结层2和隔离区3,互连层9一端与栅电极8相连,另一端与保护层4中的第二连接电极11相连;于保护层4中所述源区和漏区5下方设置第一连接电极10,实现器件的电学连接。
如图2所示,本实施例还提供了一种柔性器件的制备方法,包括:
(1)采用半导体SOI基片,包括半导体硅衬底、埋氧层和顶层硅;在所述顶层硅中制造晶体管,该晶体管结构包括:体区6,位于体区6上方的栅介质层7和栅电极8,位于体区6横向两端的源区和漏区5,位于源区和漏区5外端的隔离区3;
(2)在晶体管表面覆盖一层SU-8光刻胶形成粘结层2,刻蚀粘结层2形成通孔,并在通孔中填充导电材料聚苯胺形成互连层9;随后在粘结层2和互连层9表面形成基底层1,本实施例中采用聚二甲基硅氧烷(PDMS);
(3)采用激光剥离技术在硅衬底的预设位置进行柔性器件的剥离;对含有晶体管的结构继续减薄处理,采用干法或湿法刻蚀以去除剩余的硅衬底和埋氧层;
(4)在远离基底层1的晶体管表面覆盖聚二甲基硅氧烷(PDMS)形成保护层4;在对应于形成电极区的位置形成通孔,用导电胶填充通孔形成源区和漏区的第一连接电极10,同时第二连接电极11通过互连层9将栅电极8引出。
Claims (1)
1.一种柔性器件的制备方法,包括:
所述柔性器件结构由上至下包括:基底层(1)、粘结层(2)、隔离区(3)和保护层(4);所述隔离区(3)位于中部的体区(6)外端,所述体区(6)两端设置源区和漏区(5);所述体区(6)上方依次设置栅介质层(7)和栅电极(8),栅介质层(7)和栅电极(8)均位于粘结层(2)的中部;设置互连层(9)贯穿粘结层(2)和隔离区(3),互连层(9)一端与栅电极(8)相连,另一端与保护层(4)中的第二连接电极(11)相连;于保护层(4)中所述源区和漏区(5)下方设置第一连接电极(10),实现器件的电学连接;具体步骤如下:
(1)采用半导体SOI基片,包括半导体硅衬底、埋氧层和顶层硅;在所述顶层硅中制造晶体管,该晶体管结构包括:体区(6),位于体区(6)上方的栅介质层(7)和栅电极(8),位于体区(6)横向两端的源区和漏区(5),位于源区和漏区(5)外端的隔离区(3);
(2)在晶体管表面覆盖粘结层(2),刻蚀粘结层(2)形成通孔,并在通孔中填充导电材料形成互连层(9);随后在粘结层(2)和互连层(9)表面形成基底层(1);
(3)采用激光技术在硅衬底的预设位置进行柔性器件的剥离;对含有晶体管的结构继续减薄处理,采用干法或湿法刻蚀以去除剩余的硅衬底和埋氧层;(4)在远离基底层(1)的晶体管表面覆盖保护层(4);在对应于形成电极区的位置形成通孔,用导电胶填充通孔形成源区和漏区的第一连接电极(10),同时第二连接电极(11)通过互连层(9)将栅电极(8)引出。
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CN108539051A (zh) * | 2018-03-20 | 2018-09-14 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制作方法 |
CN110071176A (zh) * | 2019-04-08 | 2019-07-30 | 深圳市华星光电半导体显示技术有限公司 | 顶栅自对准金属氧化物半导体tft及其制作方法、显示面板 |
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