CN112367073B

CN112367073B - High-reliability trimming circuit

Info

Publication number: CN112367073B
Application number: CN202011293879.5A
Authority: CN
Inventors: 张明; 焦炜杰
Original assignee: Jiangsu Runic Technology Co ltd
Current assignee: Jiangsu Runic Technology Co ltd
Priority date: 2020-11-18
Filing date: 2020-11-18
Publication date: 2024-04-26
Anticipated expiration: 2040-11-18
Also published as: CN112367073A

Abstract

The invention relates to a high-reliability trimming circuit. The circuit comprises a trimming main circuit and a trimming signal generating circuit which is connected with the trimming main circuit in an adapting way; when trimming, the trimming signal generating circuit can load trimming control signals to the required trimming state identification circuit, and the trimming signal generating circuit can load trimming control signals to the trimming state locking circuit and/or the trimming direction identification circuit; after the trimming state locking circuit receives the trimming control signals, the trimming selection direction determined by the trimming direction identification circuit can be locked and maintained by using the trimming state locking signals output by the trimming state locking circuit, and the current states of all trimming state identification circuits can be locked by using the trimming state locking signals. The invention can effectively realize repairing and adjusting after packaging, improves the repairing and adjusting reliability, and has wide application range, safety and reliability.

Description

High-reliability trimming circuit

Technical Field

The invention relates to a trimming circuit, in particular to a high-reliability trimming circuit.

Background

With the development of integrated circuit industry and design technology, the circuit performance requirements are also higher and higher so as to meet the wide application requirements; however, circuit characteristics are always affected by non-ideal factors of the semiconductor manufacturing process, and these parasitic effects are mainly represented in terms of current mirror mismatch, resistance matching deviation, etc., and these effects are random and exist from chip to chip, wafer to wafer, and lot to lot.

In order to realize high-precision integrated circuits on a standard process, adjustment after chip manufacturing becomes a mainstream solution for improving and optimizing performance and improving chip yield, and trimming technology is widely applied to integrated circuit products such as high-precision low-offset amplifiers, low-temperature drift high-performance reference sources, radio frequency circuits and the like, and besides performance improvement, in order to realize different performances on the same chip, the circuit structure and the like of the integrated circuits can be changed by trimming technology, so that different application requirements are met.

For trimming, there are currently wafer level trimming and post-package trimming, and an operational amplifier is taken as an example, and differences between the wafer level trimming and the post-package trimming are described below. For example, during wafer level trimming, the offset voltage may be 500 μv, and since the package may generate stress, the offset voltage (offset) may be changed to 100 μv, and if the offset voltage is to be trimmed to a smaller range, the yield of the product may be affected; therefore, under the condition of ensuring the yield, the offset voltage of the operational amplifier is difficult to be adjusted to be below 100 mu V in the wafer level adjustment.

When the offset voltage of the operational amplifier is required to be below 100 μv, even 10 μv and 20 μv, a trimming process after packaging is required. Currently, there is a post-package trimming process in the industry, but the current post-package trimming requirement cannot be met.

Disclosure of Invention

The invention aims to overcome the defects in the prior art and provide a high-reliability trimming circuit which can effectively realize trimming after packaging, improve the trimming reliability, and has the advantages of wide application range, safety and reliability.

According to the technical scheme provided by the invention, the high-reliability trimming circuit comprises a trimming main circuit and a trimming signal generating circuit which is adaptively connected with the trimming main circuit, wherein the trimming main circuit comprises a trimming direction identification circuit, a trimming state locking circuit and a plurality of mutually independent trimming state identification circuits;

The trimming signal generating circuit is connected with the corresponding input ends of the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit in the trimming main circuit, and can load trimming control signals to the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit respectively;

When the trimming signal generating circuit loads the trimming control signal to the trimming direction identification circuit, the trimming direction first identification signal obtained through the trimming direction identification circuit can be adjusted to be a trimming direction second identification signal; after any trimming state identification circuit receives the loaded trimming control signal, a first trimming value identification signal can be obtained through the trimming state identification circuit; after receiving the loaded trimming control signal, the trimming state locking circuit can generate a trimming state locking signal;

When the trimming is performed, the trimming signal generating circuit can load trimming control signals to the required trimming state identification circuit, the required trimming state value can be obtained after the first identification signals of the trimming values output by the trimming state identification circuits loaded with the trimming control signals are combined, and the trimming signal generating circuit can load the trimming control signals to the trimming state locking circuit and/or the trimming direction identification circuit so as to determine the trimming selection direction by utilizing the trimming direction first identification signals or the trimming direction second identification signals output by the trimming direction identification circuit; after the trimming state locking circuit receives the trimming control signals, the trimming selection direction determined by the trimming direction identification circuit can be locked and maintained by using the trimming state locking signals output by the trimming state locking circuit, and the current states of all trimming state identification circuits can be locked by using the trimming state locking signals.

The trimming state register is connected with a trimming direction identification circuit, a trimming state identification circuit and a trimming state locking circuit in the trimming main circuit;

The trimming state register can read and latch the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit to correspond to the trimmed state, the output end of the trimming state register is connected with the trimming packaging body, the trimming packaging body can obtain the trimming selection direction and the trimming state value through the trimming state register, and the trimming packaging body can carry out required trimming according to the trimming selection direction and the trimming state value.

The trimming signal generating circuit comprises a signal generating first circuit capable of generating a trimming first signal and a signal generating second circuit capable of generating a trimming second signal.

The signal generating first circuit and the signal generating second circuit can be connected with the trimming main circuit, and the trimming state locking circuit, the trimming state identification circuit and/or the trimming direction identification circuit can receive the loaded trimming control signal if and only if the trimming first signal and the trimming second signal are in the first level state.

The signal generating first circuit comprises a first sampling trigger circuit and a signal register connected with the first sampling trigger circuit, wherein the first sampling trigger circuit is connected with the signal register, the output end of the signal register is respectively connected with a trimming state identification circuit, a trimming state locking circuit and a trimming direction identification circuit in the trimming main circuit, and when the shifting register trigger signal is loaded on the signal register through the first sampling trigger circuit, the signal register can sequentially shift and output a trimming first signal in a first level state so as to sequentially load the trimming first signal to the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit.

When the first level state is high level, the trimming state identification circuit comprises an identification circuit AND gate, an identification circuit NMOS tube, an identification circuit comparator and an identification circuit OR gate, wherein the input end of the identification circuit AND gate can simultaneously receive a trimming first signal and a trimming second signal, the output end of the identification circuit AND gate is connected with the grid end of the identification circuit NMOS tube, the source end of the identification circuit NMOS tube is connected with one end of an identification fuse, the output end of an identification circuit current mirror and the first end of the identification circuit comparator, the drain end of the identification circuit NMOS tube is connected with the input end of the identification circuit current mirror and the positive power supply of the identification circuit comparator, and the other end of the identification fuse and the negative power supply of the identification circuit comparator are grounded; the second end of the identification circuit comparator is connected with one end of the identification resistor, and the other end of the identification resistor is grounded; the output end of the identification circuit comparator is connected with one input end of the identification circuit or the door, and the other end of the identification circuit or the door receives the trimming first signal.

When the trimming first signal and the trimming second signal are not in the first level state, the output of the identification circuit or the door is consistent with the level state of the trimming first signal, and when the trimming first signal and the trimming second signal are in the first level state, the output of the identification circuit comparator is in the first level state, and then the first identification signal of the trimming value is obtained through the output end of the identification circuit or the door.

The identification circuit comparator comprises a constant current source Ib, an input pair tube, a PMOS tube PM2 and a PMOS tube PM3, wherein the input pair tube comprises an input tube group PMm and an input tube group PMn which is matched with the input tube group PMm, the input tube group PMm and the input tube group PMn comprise a plurality of PMOS tubes, the voltage end of the constant current source Ib, the source end of the PMOS tube PM2 and the source end of the PMOS tube PM3 are connected with a voltage VDD, the output end of the constant current source Ib is connected with the source end of the PMOS tube in the input tube group PMm and the source end of the PMOS tube in the input tube group PMn, the grid ends of all the PMOS tubes in the input tube group PMm can form an in-phase end of the identification circuit comparator after being connected with each other, and the grid ends of all the PMOS tubes in the input tube group PMm can form an opposite-phase end of the identification circuit comparator, and the quantity of the PMOS tubes in the input tube group PMm is smaller than that in the input tube group PMn;

The drain end of the PMOS tube in the input tube group PMm is connected with the gate end of the NMOS tube NM1, the drain end of the NMOS tube NM2, the gate end of the NMOS tube NM2, the drain end of the NMOS tube NM4 and the drain end of the NMOS tube NM6, the drain end of the PMOS tube in the input tube group PMm is connected with the drain end of the NMOS tube NM3, the gate end of the NMOS tube NM3, the drain end of the NMOS tube NM1, the gate end of the NMOS tube NM4 and the gate end of the NMOS tube NM5, and the source end of the NMOS tube NM1, the source end of the NMOS tube NM2, the source end of the NMOS tube NM3, the source end of the NMOS tube NM4, the source end of the NMOS tube NM5 and the source end of the NMOS tube NM6 are all grounded;

The drain end of the NMOS tube NM5 is connected with the drain end of the PMOS tube PM2, the gate end of the PMOS tube PM2 and the gate end of the PMOS tube PM3, the drain end of the PMOS tube PM3 is connected with the drain end of the NMOS tube NM6, and the drain end of the PMOS tube PM3 and the drain end of the NMOS tube NM6 are mutually connected to form the output end of the identification circuit comparator.

When the first level state is high level, the trimming state locking circuit comprises a locking circuit and gate, a locking circuit NMOS tube and a locking circuit comparator, wherein the input end of the locking circuit and gate can simultaneously receive a trimming first signal and a trimming second signal, the output end of the locking circuit and gate is connected with the gate end of the locking circuit NMOS tube, the source end of the locking circuit NMOS tube is connected with one end of a locking fuse, the output end of a locking circuit current source and the first end of the locking circuit comparator, the drain end of the locking circuit NMOS tube is connected with the input end of the locking circuit current source and the positive power supply of the locking circuit comparator, and the other end of the locking fuse and the negative power supply of the locking circuit comparator are grounded; the second end of the locking circuit comparator is connected with one end of the locking resistor, the other end of the locking resistor is grounded, and the output end of the locking circuit comparator is connected with the trimming status register.

The trimming main circuit, the trimming signal generating circuit and the trimming packaging body are packaged in the same packaging circuit, any pin of the trimming packaging body except a power supply connecting pin and a grounding connecting pin is used as a trimming connecting pin and is electrically connected with an external trimming controller through the selected trimming connecting pin, and the trimming controller is electrically connected with the trimming signal generating circuit through the trimming connecting pin.

The type of the trimming packaging body comprises an operational amplifier, an instrument amplifier, a band gap reference circuit or an ADC circuit;

The trimming direction identification circuit and the trimming state identification circuit adopt the same circuit structure; the trimming controller loads a trimming signal trigger signal to the trimming signal generating circuit, and the trimming signal generating circuit can output a trimming control signal according to the trimming signal generating circuit.

The invention has the advantages that: the trimming signal generating circuit is matched with the trimming main circuit, so that trimming can be performed firstly, and trimming locking is performed after trimming is performed, so that trimming of the trimming packaging body can be effectively realized; the whole trimming circuit can be locked by using the trimming state locking circuit, so that the trimming state after trimming is ensured not to be changed any more, and the trimming reliability of the trimming packaging body is further ensured.

Drawings

Fig. 1 is a circuit diagram of an embodiment of the present invention.

Fig. 2 is a schematic circuit diagram of an identification circuit comparator according to the present invention.

Reference numerals illustrate: the system comprises a 1-trimming controller, a 2-operational amplifier, a 3-signal register, a 4-first signal trigger circuit, a 5-first voltage sampling circuit, a 6-second voltage sampling circuit, a 7-trimming second signal generating circuit and an 8-trimming state register.

Detailed Description

The invention will be further described with reference to the following specific drawings and examples.

In order to effectively realize trimming after packaging and improve the reliability of trimming, the invention comprises a trimming main circuit and a trimming signal generating circuit which is adaptively connected with the trimming main circuit, wherein the trimming main circuit comprises a trimming direction identification circuit, a trimming state locking circuit and a plurality of mutually independent trimming state identification circuits;

Specifically, the trimming signal generating circuit is connected with the trimming main circuit in an adapting way, and the trimming control signal can be output through the trimming signal generating circuit. All trimming state identification circuits in the trimming main circuit are mutually independent, and of course, the trimming state identification circuits, the trimming direction identification circuits and the trimming state locking circuits are mutually independent. The corresponding output states of the trimming direction identification circuit, the state identification circuit and the trimming state locking circuit are controlled by trimming control signals output by the trimming signal generating circuit.

In the embodiment of the present invention, the trimming direction identification circuit can identify the direction when trimming specifically, such as increasing or decreasing, in general, the trimming direction identification circuit defaults to one direction trimming, such as decreasing, and when the trimming direction identification circuit receives the loaded trimming control signal, the trimming direction identification circuit outputs the second trimming direction identification signal, and when implementing specifically, if the first trimming direction identification signal is decreasing the trimming direction, then the trimming direction corresponding to the second trimming direction identification signal is increasing, that is, when the trimming direction identification signal output by the trimming direction identification circuit is needed, the trimming direction identification circuit needs to be loaded with the trimming control signal, otherwise, the trimming direction identification circuit does not need to be loaded with the trimming control signal, that is, the specific situation that the trimming signal generation circuit loads the trimming control signal to the trimming direction identification circuit needs to be determined according to the actual trimming index of the trimming package body and the difference between the current value and the target value of the trimming index, which is not described herein, and is well known in the art.

For the trimming state identification circuit, when the trimming state identification circuit receives the trimming control signal, the trimming value first identification signal can be obtained through the trimming state identification circuit of the received trimming control signal, and when the trimming state identification circuit does not receive the trimming control signal, the trimming value second identification signal can be obtained through the trimming state identification circuit. In specific implementation, the second trimming value identification signal is generally in a "0" or high-resistance state, and the first trimming value identification signal is in a "1" state, and of course, the states corresponding to the first trimming value identification signal and the second trimming value identification signal can be replaced with each other, so long as the condition that the corresponding trimming can be performed on the trimming package body is met, which is well known to those skilled in the art, and no redundant description is provided herein.

In the embodiment of the invention, when the trimming value identification signal is the first trimming value identification signal, the trimming state identification circuit indicates that the trimming package body is subjected to corresponding value trimming, and when the trimming value identification signal is the second trimming value identification signal, the trimming package body is not subjected to trimming on the surface.

For the determined trimming package, the specific number of trimming status identification circuits can be determined according to trimming indexes of the trimming package and specific conditions of the trimming package, and the specific conditions are well known to those skilled in the art. In fig. 1, there are shown cases where n-1 trimming status identification circuits exist in the trimming main circuit.

In specific implementation, the first identification signal of the trimming value is "1", the second identification signal of the trimming value is "0" or in a high-resistance state, or the first identification signal of the trimming value is "0" or in a high-resistance state, and the second identification signal of the trimming value is "1", which can be specifically selected according to actual needs. The following description will be made with the first flag signal of the trimming value being "1" and the second flag signal of the trimming value being "0".

For n-1 trimming value identification circuits, during trimming, the trimming signal generation circuit loads trimming control signals into part or all of the trimming value identification circuits, namely, a trimming value first identification signal can be obtained through the trimming value identification circuit receiving the loaded trimming control signals, and a trimming value second identification signal can be obtained through the rest trimming value identification circuits not receiving the trimming control signals, so that n-1 corresponding trimming value sequences can be obtained through the n-1 trimming value identification circuits, the values in each trimming value sequence have corresponding trimming values, the trimming of the trimming package body can be completed according to the specific conditions of the trimming value sequences, and the trimming process of the trimming package body is consistent with the prior art according to the n-1 trimming value sequences and trimming direction signals, and is not repeated. In the embodiment of the present invention, the electrical parameters of the trimming package may be offset voltage, resistance matching error, etc., and are specifically selected according to needs, which are well known in the art, and are not described herein.

For the trimming state locking circuit, the trimming state locking circuit can also receive the trimming control signal loaded by the trimming signal generating circuit, and after receiving the trimming control signal, the trimming state locking circuit can obtain the trimming state locking signal. After the trimming state locking signal is obtained, the trimming selection direction determined by the trimming direction identification circuit can be locked and maintained, and the current state of all trimming state identification circuits can be locked by utilizing the trimming state locking signal; specifically, according to the trimming state locking signal, the current states of the trimming direction identification circuit and the trimming state identification circuit are kept unchanged, if the trimming direction first identification signal is obtained through the trimming direction identification circuit currently, after the trimming state locking circuit outputs the trimming state locking signal, even if the trimming direction identification circuit receives the trimming control signal, the trimming direction second identification signal cannot be obtained through the trimming direction identification circuit; similarly, the trimming value second identification signal is obtained through the trimming state identification circuit, and after the trimming state locking circuit outputs the trimming state locking signal, even if the trimming state identification circuit receives the trimming control signal, the trimming state second identification signal cannot be obtained through the trimming state identification circuit.

Of course, in the specific implementation, the trimming state locking signal is obtained through the trimming state locking circuit, in order to realize the locking of the corresponding states of the trimming direction identification circuit and the trimming state identification circuit, the trimming control signal can be generated again by prohibiting the trimming signal generating circuit, and since no trimming control signal is loaded to the trimming direction identification circuit or the trimming state identification circuit, the trimming direction identification circuit and all the trimming state identification circuits can be locked and kept in the current state, and the specific implementation mode can be selected according to the actual needs, and is not repeated here.

As can be seen from the above description, when trimming is performed, generally, the trimming control signal is loaded to the trimming direction identification circuit, then is selectively loaded to the required trimming state identification circuit, and finally is loaded to the trimming state locking circuit, and after the trimming state locking signal is obtained through the trimming state locking circuit, the whole trimming process is completed.

Further, the system also comprises a trimming status register 8, wherein the trimming status register 8 is connected with a trimming direction identification circuit, a trimming status identification circuit and a trimming status locking circuit in the trimming main circuit;

the trimming state register 8 can read and latch the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit to be in a corresponding trimming state, the output end of the trimming state register 8 is connected with a trimming package body, the trimming package body can obtain a trimming selection direction and a trimming state value through the trimming state register 8, and the trimming package body can carry out required trimming according to the trimming selection direction and the trimming state value.

In the embodiment of the present invention, the trimming status register 8 may be an OTP register, and after a specific trimming process is completed by matching the signal generating circuit with the trimming main circuit, that is, after the trimming status locking circuit outputs the trimming status locking signal, the trimming status register 8 can read the current corresponding status of the trimming direction identification circuit, the trimming status identification circuit and the trimming status locking circuit, and after the trimming status register 8 reads the current corresponding status, the trimming package body can perform the required trimming according to the trimming selection direction and the trimming status value registered in the trimming status register 8, thereby implementing the specific trimming of a certain trimming index of the trimming package body.

Of course, in the specific implementation, the trimming package may also be directly connected to the trimming main circuit, and since the trimming state locking circuit outputs the trimming state locking signal, the trimming direction identification circuit and the corresponding state of the trimming state identification circuit can be locked, and the trimming package is directly connected to the trimming direction indication circuit, the trimming state identification circuit and/or the trimming state locking circuit, the trimming state register 8 may be omitted.

In the embodiment of the present invention, the trimming package may be an operational amplifier, an instrumentation amplifier, a bandgap reference circuit or an ADC circuit, or may be other commonly used integrated circuit forms, which are well known to those skilled in the art, and will not be described herein. The index for trimming the trimming package may also be selected according to actual needs, and in fig. 1, the trimming package is the operational amplifier 2, and specific other cases may refer to the case of fig. 1, which is not described herein again.

Further, the trimming signal generating circuit comprises a signal generating first circuit capable of generating a trimming first signal and a signal generating second circuit capable of generating a trimming second signal,

In the embodiment of the invention, the trimming signal generating circuit can generate the required trimming first signal and trimming second signal, wherein the trimming first signal and the trimming second signal have two level states of a first level state and a second level state, and the first level state and the second level state are two different level states, if the first level state is a high level, the second level state is a low level state, or if the first level state is a low level state, the second level state is a high level state. In the specific implementation, if and only if the trimming first signal and the trimming second signal are in the first level state, the trimming state locking circuit, the trimming state identification circuit and/or the trimming direction identification circuit can receive the loaded trimming control signal.

In the implementation, when the first signal can be modified by the signal generating first circuit and the second signal can be modified by the signal generating second circuit, the operation of pre-modifying can be performed. At this time, the trimming direction identification circuit and the trimming state identification circuit can respectively obtain the trimming direction first identification signal and the trimming state first identification signal under the effect of the trimming first signal of the first level state. The following describes a specific pre-trimming procedure.

Specifically, the trimming main circuit is connected with the trimming signal generating circuit, and the trimming main circuit can obtain trimming status signals according to the trimming first signal and the trimming second signal of the trimming signal generating circuit, wherein the trimming status signals comprise trimming direction identification signals (trimming direction first identification signals or trimming direction second identification signals) and trimming value identification signals (trimming value first identification signals or trimming value second identification signals) output by each trimming status identification circuit, and the trimming direction signals specifically refer to that for a determined trimming package body, when trimming is carried out, trimming indexes of the trimming package body are increased or reduced, so that the trimming indexes after trimming are close to or reach trimming target range values.

Before pre-trimming, an input signal can be loaded on the trimming packaging body, an output signal of the trimming packaging body under the action of the input signal is measured, a trimming direction when trimming is carried out on the trimming packaging body is determined according to the output signal, if offset voltage is trimmed on the trimming packaging body, namely, trimming indexes are offset voltages, the voltage difference range between the current offset voltage and a target offset voltage is judged to be +50 mu V according to the output signal, and when trimming is carried out, the trimming direction is reduced; and judging that the difference value between the current offset voltage and the target offset voltage is-50 mu V according to the output signal, adding the trimming direction when trimming, and determining a specific trimming state value according to the finally obtained n-1 trimming value sequences.

When the trimming packaging body is trimmed, a trimming target value range is firstly determined according to trimming index requirements, and the trimming target value can be specifically selected and determined according to actual requirements and the like, and is particularly well known to the person skilled in the art. After the trimming target value range is obtained, a trimming mode needs to be determined, and the trimming mode can be specifically determined through pre-trimming.

Specifically, when the trimming is performed in advance, after the trimming direction is determined, all trimming state identification circuits sequentially receive trimming first signals in a first level state, after each trimming state identification circuit sequentially outputs trimming value first identification signals, trimming can be performed on the trimming packaging body by using the trimming state corresponding to the trimming value first identification signals output by the current trimming state identification circuit, and the output of the current trimming packaging body under the current trimming is measured, so that the difference between the output of the current trimming and the trimming index target value can be judged. After loading the trimming first signals to all trimming state identification circuits, the trimming package body can be pre-trimmed respectively according to the trimming state corresponding to the trimming first identification signals of each trimming state identification circuit, and according to the difference between the current trimming output and the trimming index target value, the optimal combination in actual trimming can be obtained by the person skilled in the art according to the difference between different outputs and the trimming index target value, so that the trimming value sequence corresponding to the actual trimming can be obtained. If for n-1 trimming status identification circuits, when the first trimming status identification circuit and the second trimming status identification circuit output the first trimming status identification signal at the same time, the trimming index is closest to the trimming target value, then, when in actual trimming, the trimming signal generating circuit only loads trimming control signals to the first trimming status identification circuit and the second trimming status identification circuit, and none of the rest trimming status identification circuits loads trimming control signals; the specific condition of the specific trimming value sequence is selected according to the condition of pre-trimming, so that a trimming control signal can be loaded into a trimming state identification circuit at a required position.

When the trimming is performed in advance, the trimming direction identification circuit and the trimming state identification circuit only receive the trimming first signal, so that after the trimming first signal is removed, the trimming direction identification circuit and the trimming state identification circuit can recover the initial state, and at the moment, the trimming direction identification circuit and the trimming state identification circuit can respectively output corresponding states after receiving the trimming control signal, namely under the effect of the trimming control signal, the trimming direction second identification signal can be obtained through the trimming direction identification circuit, and the trimming value first identification can be obtained through the trimming state identification circuit. After the trimming direction identification signal obtains a second trimming direction identification signal under the trimming control signal, when the trimming first signal or the trimming control signal is available, the output of the trimming direction identification signal is still locked and kept as the second trimming direction identification signal; similarly, after the trimming state identification circuit obtains the trimming state first identification signal under the trimming control signal, when the trimming first signal or the trimming control signal exists, the output of the trimming state identification signal is still locked and kept as the trimming value first identification signal. Therefore, under the action of the trimming control signal, the trimming direction second identification signal obtained by the trimming direction identification circuit and the trimming value first identification signal obtained by the trimming state identification circuit are not recoverable.

Further, the signal generating first circuit comprises a first sampling trigger circuit and a signal register 3 connected with the first sampling trigger circuit, the first sampling trigger circuit is connected with the signal register 3, the output end of the signal register 3 is respectively connected with a trimming state identification circuit, a trimming state locking circuit and a trimming direction identification circuit in the trimming main circuit, and when the shift register trigger signal is loaded to the signal register 3 through the first sampling trigger circuit, the signal register 3 can sequentially shift and output a trimming first signal in a first level state so as to sequentially load the trimming first signal to the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit.

In the embodiment of the invention, the first signal can be generated and modified by the first signal generating circuit, and the second signal can be generated and modified by the second signal generating circuit. The signal register 3 comprises a shift register or a cyclic shift register.

When n-1 trimming state identification circuits exist in the trimming main circuit, n+1 trimming first signals can be generated through shifting of the signal register 3, and n+1 shifting output ends of the signal register 3 are respectively connected with the trimming direction identification circuits, the trimming state identification circuits and the trimming state locking circuits in a one-to-one correspondence mode. In specific implementation, the signal register 3 has n+1 shift output ends, the first shift output end of the signal register 3 is connected with the trimming direction identification circuit, and the n+1 shift output end of the signal register 3 is connected with the signal state locking circuit. All shift output ends of the signal register 3 are in a second level state by default, when the shift trigger is carried out on the signal register 3 for the first time, a first shift output end of the signal register 3 outputs a trimming first signal in a first level state, and when the shift trigger is carried out on the signal register 3 for the second time, a second shift output end of the signal register 3 outputs a trimming first signal in the first level state, and meanwhile, the first shift output end of the signal register 3 is in a second level state; when the signal register 3 is shifted and registered for the third time, the third shift output end of the signal register 3 outputs a trimming first signal of the first level state, and meanwhile, the second shift output end of the signal register 3 is in the second level state, and the first shift output end of the signal register 3 keeps in the second level state. The following other shift output cases may refer to the above description, and will not be repeated here.

The trimming state locking circuit receives a trimming first signal output by the n+1th shift of the signal register. When the signal register 3 is a loop register, reference may be made to the above description of the general shift register, which is well known to those skilled in the art, and will not be repeated here.

Further, when the first level state is high level, the trimming state identification circuit comprises an identification circuit AND gate, an identification circuit NMOS tube, an identification circuit comparator and an identification circuit OR gate, wherein the input end of the identification circuit AND gate can simultaneously receive a trimming first signal and a trimming second signal, the output end of the identification circuit AND gate is connected with the gate end of the identification circuit NMOS tube, the source end of the identification circuit NMOS tube is connected with one end of an identification fuse, the output end of the identification circuit current mirror and the same-phase end of the identification circuit comparator, the drain end of the identification circuit NMOS tube is connected with the identification circuit current mirror and the positive power supply of the identification circuit comparator, and the other end of the identification fuse and the negative power supply of the identification circuit comparator are grounded; the inverting terminal of the identification circuit comparator is connected with one end of the identification resistor, and the other end of the identification resistor is grounded; the output end of the identification circuit comparator is connected with one input end of the identification circuit or the door, and the other end of the identification circuit or the door receives the trimming first signal.

Specifically, all trimming state identification circuits can adopt the same circuit form, and of course, different circuit forms can also be adopted, and the selection can be specifically carried out according to actual needs. In the embodiment of the invention, the trimming state identification circuit adopts the same circuit form, wherein when the first level state is high level, the trimming state indication circuit comprises an identification circuit AND gate, an identification circuit NMOS tube, an identification circuit comparator and an identification circuit OR gate.

In the embodiment of the invention, the input end of the identification circuit and the gate can simultaneously receive the trimming first signal and the trimming second signal, the output end of the identification circuit and the gate is connected with the gate end of the identification circuit NMOS tube, the source end of the identification circuit NMOS tube is connected with one end of the identification fuse, the output end of the identification circuit current mirror and the first end of the identification circuit comparator, the drain end of the identification circuit NMOS tube is connected with the input end of the identification circuit current mirror and the positive power supply of the identification circuit comparator, and the other end of the identification fuse and the negative power supply of the identification circuit comparator are grounded; the second end of the identification circuit comparator is connected with one end of the identification resistor, and the other end of the identification resistor is grounded; the output end of the identification circuit comparator is connected with one input end of the identification circuit or the door, and the other end of the identification circuit or the door receives the trimming first signal.

It is known by those skilled in the art that when the first level state is low, the identification circuit and the gate, the identification circuit or the gate need to be replaced by the corresponding logic implementation forms of the corresponding identification circuit nand gate, the corresponding identification circuit nor gate, and the like, so that the same input and output purposes can be achieved. Of course, other specific implementations of the trimming status identifying circuit may be adopted, so long as the specific pre-trimming and trimming locking purposes can be satisfied, and details thereof will not be repeated here. When the method is implemented, the output end of the identification circuit comparator outputs a high-level state if and only if the identification circuit and the AND gate simultaneously receive the trimming first signal and the trimming second signal which are both in the first-level state, otherwise, the identification circuit comparator outputs a high-resistance state or a low-level state through the matching of the identification circuit current mirror, the identification circuit NMOS tube, the identification circuit fuse and the identification circuit resistor with the identification circuit comparator.

In specific implementation, the trimming direction identification circuit is selected to adopt the same circuit structure as the trimming state identification circuit. When the first level state is at a high level, fig. 1 shows a specific implementation case of the trimming direction identification circuit and the trimming state identification circuit, in the trimming state identification circuit forming the trimming direction identification circuit, AD0 is an identification circuit and gate, MN0 is an identification circuit NMOS tube, BJ0 is an identification circuit comparator, OR0 is an identification circuit OR gate, F0 is an identification fuse, R0 is an identification resistor, I0 is an identification current mirror, and an output end of the identification circuit OR gate OR0 is connected with the trimming state register 8. The identification circuit OR gate OR0 outputs Trim selection direction Trim0. In fig. 1, the identification circuit and gate AD0, the identification circuit NMOS transistor MN0, the identification circuit comparator BJ0, the identification circuit OR gate OR0, the identification fuse F0, and the identification current mirror I0 form a trimming direction identification circuit.

In the trimming state identification circuit adjacent to the trimming direction identification circuit, AD1 is an identification circuit AND gate, MN1 is an identification circuit NMOS tube, BJ1 is an identification circuit comparator, OR1 is an identification circuit OR gate, F1 is an identification fuse, R1 is an identification resistor, I1 is an identification current mirror, and the output end of the identification circuit OR1 is connected with a trimming state register 8. The identification circuit OR gate OR1 outputs a trimming-state identification signal Trim1.

In the trimming state identification circuit farthest from the trimming direction identification circuit, ADn-1 is an identification circuit AND gate, MNN-1 is an identification circuit NMOS tube, BJn-1 is an identification circuit comparator, ORn-1 is an identification circuit OR gate, fn-1 is an identification fuse, rn-1 is an identification resistor, in-1 is an identification current mirror, and the output end of the identification circuit OR gate 1 is connected with the trimming state register 8. The identification circuit or gate ORn-1 outputs a trimming status identification signal Trim (n-1). In addition, the specific case of the remaining trimming status indication circuits is omitted in fig. 1, that is, trimming status identification signals Trim2, …, trim (n-2) are omitted, and specific reference may be made to the above description, and the details are not repeated here.

In fig. 1, the signal register 3 is a shift register, a first shift output end (S0 in the drawing) of the signal register 3 is connected to an input end of the identification circuit and gate AD0 and an input end of the identification circuit OR gate OR0, a second shift output end (S1 in the drawing) of the signal register 3 is connected to an input end of the identification circuit and gate AD1 and an input end of the identification circuit OR gate OR1, and an nth of the signal register 3 is connected to an input end of the identification circuit and gate ADn-1 and an input end of the identification circuit OR gate ORn-1. When the first level state is high, the default output of the signal register 3 is 0 level, that is, S0, S1, …, sn-1 and Sn are all 0 in fig. 1, after the first trigger, S0 becomes the first level state, the rest remains in the 0 level state, and when the second trigger, S1 becomes the first level state, the rest is the 0 level state, and so on.

When S0 is in the first level state, i.e. the high level, the output of the identification circuit OR the gate OR0 is in the high level, at this time, the trimming status register 8 can read the trimming direction signal Trim0, and when the implementation is performed, the default trimming direction can be the positive direction trimming, i.e. when the trimming direction signal Trim0 is in the first level state, the trimming electrical parameter index of the trimming package body can be trimmed in the increasing direction according to the trimming direction signal Trim0 stored in the trimming status register 8.

When the signal register 3 is triggered for the second time, the S1 of the signal register 3 becomes the first level state, the S0 becomes the second level state (0 level OR low level state), at this time, the Trim selection direction Trim0 output by the identification circuit OR the gate OR0 becomes the second level state, at the same time, the Trim value identification signal Trim1 output by the identification circuit and the gate OR1 becomes the first Trim value identification signal, that is, the Trim value identification signal Trim1 is high level, after reading by the Trim state register 8, the Trim package can perform Trim index trimming according to the Trim value corresponding to the Trim value identification signal Trim1, that is, the Trim index corresponding to the Trim package before trimming subtracts the current corresponding Trim value.

And so on, when the n-th trigger is performed on the signal register 3, sn-1 of the signal register 3 becomes a first level state, S0, S1, … Sn-2 all become a second level state, at this time, only the trimming direction signal Trim (n-1) output by the identification circuit OR the gate ORn-1 is in the first level state, and the outputs of the other identification circuits OR gates (OR 0, OR1, …, ORn-2) are all in the second level state, similarly to the above, after reading by the trimming status register 8, the trimming package can perform trimming index trimming according to the trimming value corresponding to the trimming value identification signal Trim (n-1), that is, subtracting the current corresponding trimming value from the trimming index corresponding to the trimming package before trimming.

The above process can complete the pre-trimming of the trimming package, and when the pre-trimming is performed, a technician can determine an optimal trimming scheme after recording the trimming process, for example, trimming the trimming package by using the trimming value identification signal Trim1 alone, or trimming the trimming package by using the accumulation of the trimming value corresponding to the trimming value identification signal Trim2 and the trimming value corresponding to the trimming value identification signal Trim 3. The specific trimming scheme of the trimming package body is based on the range which can be closest to the trimming target value, and can be specifically selected and determined according to the condition in the actual pre-trimming process, which is well known in the art.

In order to meet the requirement that the repairing and adjusting packaging body has better performance in the working process, namely, the repairing and adjusting index of the repairing and adjusting packaging body after repairing and adjusting is close to the repairing and adjusting target, the optimal scheme selected after pre-repairing and adjusting is required to be locked. Therefore, after pre-trimming, trimming lock is required. When the trimming and locking is performed, the trimming second signal is required to be loaded to the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit, namely, the trimming control signal is loaded to the selected trimming state indicating circuit and/or trimming direction identification circuit, and the trimming control signal is loaded to the trimming state locking circuit.

Specifically, when the trimming direction needs to be locked, the identification circuit and the gate AD0 receive the trimming first signal and the trimming second signal in the first level state at the same time, at this time, the identification circuit and the gate AD0 output the first level state, and the identification circuit NMOS transistor MN0 can be in the on state by using the first level state output by the identification circuit and the gate AD 0. After the identification circuit NMOS tube MN0 is conducted, the identification fuse F0 can be fused, so that the level of the same-phase end of the identification circuit comparator BJ0 is higher than that of the opposite-phase end of the identification circuit comparator BJ0, the output end of the identification circuit comparator BJ0 is in a first level state, and then the identification circuit OR gate OR0 is output in the first level state, namely the trimming direction signal Trim0 is in the first level state. After the fuse F0 is melted, the level of the non-inverting terminal of the comparator BJ0 can be always higher than the level of the inverting terminal of the comparator BJ0, and the output terminal of the comparator BJ0 is locked to be in the first level state, so that the output of the comparator BJ0 is in the first level state.

Similarly, when the trimming value identification signal Trim1 is required to be locked as the trimming value first identification signal, the identification circuit and the gate AD1 simultaneously receive the trimming first signal and the trimming second signal in the first level state, at this time, the identification circuit and the gate AD1 output the first level state, and the identification circuit and the gate AD1 output the first level state, so that the identification circuit NMOS tube MN1 is in the on state. After the identification circuit NMOS tube MN1 is conducted, the identification fuse F1 can be fused, so that the level of the same-phase end of the identification circuit comparator BJ1 is higher than that of the opposite-phase end of the identification circuit comparator BJ1, the output end of the identification circuit comparator BJ1 is in a first level state, and then the output of the identification circuit or the gate 1 is in the first level state, namely the trimming value identification signal Trim1 is in the first level state. After the identification fuse F1 is melted, the level of the same phase end of the identification circuit comparator BJ1 can be always higher than the level of the opposite phase end of the identification circuit comparator BJ1, and the output end of the identification circuit comparator BJ1 is locked to be in a first level state, so that the identification circuit OR gate OR1 is output to be in the first level state.

The specific locking condition of other trimming state identification circuits can be referred to the above description, the process is completely consistent, and the description can be specifically performed according to the need. In the specific implementation, only after the trimming scheme is determined according to the pre-trimming, the trimming second signal in the first level state is loaded to the required position, so that the trimming control signal can be loaded to the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit.

Further, when the trimming first signal and the trimming second signal are not in the first level state, the output of the identification circuit or the gate is consistent with the level state of the trimming first signal, when the trimming first signal and the trimming second signal are in the first level state, the output of the identification circuit comparator is in the first level state, and then the first identification signal of the trimming value is obtained through the output end of the identification circuit or the gate.

In the embodiment of the invention, when the first level state is a high level state, that is, the identification circuit comparator outputs the second level state under default, the identification circuit comparator outputs 0 level or low level. When the default output of the identification circuit comparator is in the second level state, the output of the identification circuit or the door can be influenced by the trimming first signal only, and when the locking is needed, the output of the identification circuit comparator is in the first level state, and at the moment, the output of the identification circuit or the door can be locked to be in the first level state.

The identification fuse is in a small resistance state before being fused, is in a large resistance state after being fused, and has a larger voltage division due to the action of the identification circuit current mirror after being fused, namely the same phase end of the identification circuit comparator has a larger voltage. As known by those skilled in the art, in the actual production process, the offset voltage of the identification circuit comparator presents a discrete state, for example, may be ±5mV, so that in order to ensure that the identification circuit comparator outputs a second level state under a default condition, the identification circuit comparator needs to be biased. In order to satisfy the operation of the identification circuit comparator, as shown in fig. 2, a specific implementation structure of the identification circuit comparator is shown.

As shown in fig. 2, the identification circuit comparator includes a constant current source Ib, an input pair of tubes, a PMOS tube PM2 and a PMOS tube PM3, where the input pair of tubes includes an input tube group PMm and an input tube group PMn adapted to the input tube group PMm, the input tube group PMm and the input tube group PMn each include a plurality of PMOS tubes, the voltage end of the constant current source Ib, the source end of the PMOS tube PM2 and the source end of the PMOS tube PM3 are all connected with the voltage VDD, the output end of the constant current source Ib is connected with the source end of the PMOS tube in the input tube group PMm and the source end of the PMOS tube in the PMOS tube pair, the gate ends of all PMOS tubes in the input tube group PMm are connected with each other to form an in-phase end of the identification circuit comparator, and the number of PMOS tubes in the input tube group PMm is different from the number of PMOS tubes in the input tube group PMn;

In the embodiment of the invention, the input tube group PMm and the input tube group PMn can be matched to form the input pair tube, and the number of PMOS tubes in the input tube group PMn is different from the number of PMOS tubes in the input tube group PMm, for example, the number of PMOS tubes in the input tube group PMm can be 6, the number of PMOS tubes in the input tube group PMn can be 9, and of course, the specific number can be other values, and the specific number can be selected according to actual needs. When the number difference between the two is larger, the pull bias of the whole identification circuit comparator is larger. The specific output current of the constant current source Ib can be selected according to actual needs, so long as the specific working process of the identification circuit comparator can be met, and details are omitted here.

In particular, when the first end of the identification circuit comparator may be the same-phase end or the opposite-phase end, the second end of the identification circuit comparator may be the opposite-phase end or the same-phase end. When the first end of the identification circuit comparator is an in-phase end and the second end of the identification circuit comparator is an anti-phase end, the number of PMOS (P-channel metal oxide semiconductor) tubes in the input tube group PMm is smaller than that of PMOS tubes in the input tube group PMn, so that the specific working state of the identification circuit comparator can be ensured.

Further, when the first level state is high level, the trimming state locking circuit comprises a locking circuit and gate, a locking circuit NMOS tube and a locking circuit comparator, wherein the input end of the locking circuit and gate can simultaneously receive a trimming first signal and a trimming second signal, the output end of the locking circuit and gate is connected with the gate end of the locking circuit NMOS tube, the source end of the locking circuit NMOS tube is connected with one end of a locking fuse, the output end of a locking circuit current source and the first end of the locking circuit comparator, the drain end of the locking circuit NMOS tube is connected with the input end of the locking circuit current source and the positive power supply of the locking circuit comparator, and the other end of the locking fuse and the negative power supply of the locking circuit comparator are grounded; the second end of the locking circuit comparator is connected with one end of the locking resistor, the other end of the locking resistor is grounded, and the output end of the locking circuit comparator is connected with the trimming status register.

In the embodiment of the invention, the specific circuit implementation of the trimming state locking circuit has a similar structure to the trimming state identification circuit, and compared with the trimming identification state identification circuit, the trimming state locking circuit reduces OR gates. In fig. 1, ADn is a latch and gate, MNn is a latch NMOS, in is a latch current source, and BJn is a latch comparator. The first end of the locking circuit comparator, the second end of the locking circuit comparator and the specific implementation structure of the locking circuit comparator can refer to the description of the marking circuit comparator, and the locking circuit comparator and the marking circuit comparator can adopt the identical circuit form, and are not repeated here.

During locking, only after the locking circuit and the gate ADn receive the trimming first signal and the trimming second signal in the first level state at the same time, the locking circuit and the gate ADn output to the first level state, the locking state and the gate ADn can be used to turn on the locking circuit NMOS transistor MNn and blow the locking fuse Fn, and as described above, the output of the locking comparator BJn can be locked to the first level state. The trimming status register 8 is an OTP register, and it can be known by using the property of the OTP register that when the trimming status register 8 reads that the output of the locking comparator BJn is in the first level state, the trimming status register 8 can lock the current content, i.e. can lock the trimming scheme of the trimming package, thereby improving the reliability of trimming the trimming package.

During specific trimming, the locking circuit and the AND gate ADn receive the trimming first signal and generate the trimming first signal after the n+1th shift of the signal register 3, that is, lock the trimming first signal after the modification is completed. When trimming, the specific trimming value is generally presented in a state, for example, the trimming status identification signal Trim0 to the trimming status identification signal Trim (n-1) are gradually increased or gradually decreased, and the specific trimming value can be selected according to actual needs, which is well known to those skilled in the art and will not be repeated here.

Further, the trimming main circuit, the trimming signal generating circuit and the trimming package are packaged in the same packaging circuit, any pin of the trimming package except the power supply connecting pin and the grounding connecting pin is used as a trimming connecting pin, and is electrically connected with an external trimming controller through the selected trimming connecting pin, and the trimming controller is electrically connected with the trimming signal generating circuit through the trimming connecting pin.

In the embodiment of the present invention, after the integrated circuit is packaged, the trimming package has a plurality of pins, such as a power connection pin, a ground connection pin, an output pin, a control pin, etc., which are specifically related according to the type of the trimming package, etc., and are well known to those skilled in the art, and are not repeated herein. When repairing the repairing and adjusting packaging body, the repairing and adjusting controller 1 is connected with the repairing and adjusting connecting pin by the repairing and adjusting controller 1, and the repairing and adjusting controller 1 is electrically connected with the repairing and adjusting signal generating circuit through the repairing and adjusting connecting pin.

In fig. 1, a trimming controller 1 is connected to an output terminal OUT of an operational amplifier 2, a trimming status register 8 is adaptively connected to the operational amplifier 2, and a specific manner of implementing trimming between the trimming status register 8 and the operational amplifier 2 is consistent with the prior art, which is well known in the art and will not be repeated herein. The in-phase end of the operational amplifier 2 can be loaded with an input signal, a corresponding output signal can be obtained at the output end OUT of the operational amplifier 2 after the required signal is loaded at the in-phase end of the operational amplifier 2, and the trimming direction and the trimming target of the operational amplifier 2 can be determined according to the condition of the output signal.

The trimming controller 1 may take the form of an existing conventional test controller, etc., and may be specifically selected as required, which is well known to those skilled in the art. The trimming controller 1 can be connected with a trimming signal generating circuit. The trimming controller 1 can control the trimming signal generating circuit to generate a required trimming control signal, for example, the trimming controller 1 uses the first voltage sampling circuit 5 and the second voltage sampling circuit 6 to sample the voltage changed by the trimming controller respectively by changing the voltage state, and the process of specifically controlling the trimming controller 1 to generate the trimming control signal by the trimming signal generating circuit can specifically take the form commonly used in the technical field, which is specifically known to those skilled in the technical field and will not be repeated here.

The first sampling trigger circuit comprises a first voltage sampling circuit 5 and a first signal trigger circuit 4, the first voltage sampling circuit 5 is connected with the first signal trigger circuit 4, and the first signal trigger circuit 4 is connected with the signal register 3; the signal generating second circuit comprises a second voltage sampling circuit 6 and a trimming second signal generating circuit 7 connected with the second voltage sampling circuit 6.

In the embodiment of the invention, the power supply VDD is a power supply of the trimming package, the first voltage sampling circuit 5 and the second voltage sampling circuit 6 can adopt the existing common circuit form, the first voltage sampling circuit 5 and the second voltage sampling circuit 6 are connected with one end of a connecting resistor, and the other end of the connecting resistor is connected with a trimming connecting pin. In fig. 1, RG is a trimming connection pin, when the trimming package is the operational amplifier 2, the corresponding trimming connection pin RG is an output pin of the operational amplifier 2, and when the trimming package is another device, it is specifically known to those skilled in the art, and will not be repeated here.

In specific implementation, the first signal trigger circuit 4 may be in a conventional manner, the first signal trigger circuit 4 can load a shift register signal into the signal register 3, the trimming second signal generating circuit 7 may be in a conventional manner, and mainly can generate a trimming second signal, determine that the trimming second signal at a required position is in a first level state, and specifically generate a form of the trimming second signal, which is well known to those skilled in the art and is not described herein.

Claims

1. A high-reliability trimming circuit is characterized in that: the trimming main circuit comprises a trimming direction identification circuit, a trimming state locking circuit and a plurality of mutually independent trimming state identification circuits;

2. The high reliability trimming circuit of claim 1, wherein: the trimming state register is connected with a trimming direction identification circuit, a trimming state identification circuit and a trimming state locking circuit in the trimming main circuit;

3. The high reliability trimming circuit according to claim 1 or 2, characterized in that: the trimming signal generating circuit comprises a signal generating first circuit capable of generating a trimming first signal and a signal generating second circuit capable of generating a trimming second signal,

4. The high reliability trimming circuit of claim 3, wherein: the signal generating first circuit comprises a first sampling trigger circuit and a signal register connected with the first sampling trigger circuit, wherein the first sampling trigger circuit is connected with the signal register, the output end of the signal register is respectively connected with a trimming state identification circuit, a trimming state locking circuit and a trimming direction identification circuit in the trimming main circuit, and when the shifting register trigger signal is loaded on the signal register through the first sampling trigger circuit, the signal register can sequentially shift and output a trimming first signal in a first level state so as to sequentially load the trimming first signal to the trimming direction identification circuit, the trimming state identification circuit and the trimming state locking circuit.

5. The high reliability trimming circuit of claim 4, wherein: when the first level state is high level, the trimming state identification circuit comprises an identification circuit AND gate, an identification circuit NMOS tube, an identification circuit comparator and an identification circuit OR gate, wherein the input end of the identification circuit AND gate can simultaneously receive a trimming first signal and a trimming second signal, the output end of the identification circuit AND gate is connected with the grid end of the identification circuit NMOS tube, the source end of the identification circuit NMOS tube is connected with one end of an identification fuse, the output end of an identification circuit current mirror and the first end of the identification circuit comparator, the drain end of the identification circuit NMOS tube is connected with the input end of the identification circuit current mirror and the positive power supply of the identification circuit comparator, and the other end of the identification fuse and the second end of the identification circuit comparator are grounded; the inverting terminal of the identification circuit comparator is connected with one end of the identification resistor, and the other end of the identification resistor is grounded; the output end of the identification circuit comparator is connected with one input end of the identification circuit or the door, and the other end of the identification circuit or the door receives the trimming first signal.

6. The high reliability trimming circuit of claim 5, wherein: when the trimming first signal and the trimming second signal are not in the first level state, the output of the identification circuit or the door is consistent with the level state of the trimming first signal, and when the trimming first signal and the trimming second signal are in the first level state, the output of the identification circuit comparator is in the first level state, and then the first identification signal of the trimming value is obtained through the output end of the identification circuit or the door.

7. The high reliability trimming circuit of claim 5 or 6, wherein: the identification circuit comparator comprises a constant current source Ib, an input pair tube, a PMOS tube PM2 and a PMOS tube PM3, wherein the input pair tube comprises an input tube group PMm and an input tube group PMn which is matched with the input tube group PMm, the input tube group PMm and the input tube group PMn comprise a plurality of PMOS tubes, the voltage end of the constant current source Ib, the source end of the PMOS tube PM2 and the source end of the PMOS tube PM3 are connected with a voltage VDD, the output end of the constant current source Ib is connected with the source end of the PMOS tube in the input tube group PMm and the source end of the PMOS tube in the input tube group PMn, the grid ends of all the PMOS tubes in the input tube group PMm can form an in-phase end of the identification circuit comparator after being connected with each other, and the grid ends of all the PMOS tubes in the input tube group PMm can form an opposite-phase end of the identification circuit comparator, and the quantity of the PMOS tubes in the input tube group PMm is different from that in the input tube group PMn;

8. The high reliability trimming circuit of claim 3, wherein: when the first level state is high level, the trimming state locking circuit comprises a locking circuit and gate, a locking circuit NMOS tube and a locking circuit comparator, wherein the input end of the locking circuit and gate can simultaneously receive a trimming first signal and a trimming second signal, the output end of the locking circuit and gate is connected with the gate end of the locking circuit NMOS tube, the source end of the locking circuit NMOS tube is connected with one end of a locking fuse, the output end of a locking circuit current source and the first end of the locking circuit comparator, the drain end of the locking circuit NMOS tube is connected with the input end of the locking circuit current source and the positive power supply of the locking circuit comparator, and the other end of the locking fuse and the negative power supply of the locking circuit comparator are grounded; the second end of the locking circuit comparator is connected with one end of the locking resistor, the other end of the locking resistor is grounded, and the output end of the locking circuit comparator is connected with the trimming status register.

9. The high reliability trimming circuit of claim 1, wherein: the trimming main circuit, the trimming signal generating circuit and the trimming packaging body are packaged in the same packaging circuit, any pin of the trimming packaging body except a power supply connecting pin and a grounding connecting pin is used as a trimming connecting pin and is electrically connected with an external trimming controller through the selected trimming connecting pin, and the trimming controller is electrically connected with the trimming signal generating circuit through the trimming connecting pin.

10. The high reliability trimming circuit of claim 9, wherein: the type of the trimming packaging body comprises an operational amplifier, an instrument amplifier, a band gap reference circuit or an ADC circuit;