CN112332787A - Broadband high-efficiency power amplifier based on termination coupling line structure and design method thereof - Google Patents
Broadband high-efficiency power amplifier based on termination coupling line structure and design method thereof Download PDFInfo
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Abstract
The invention discloses a broadband high-efficiency power amplifier based on a termination coupling line structure and a design method thereof. Compared with the prior art, the invention provides a novel output matching network topological structure, the cascade connection coupling line structure is used for designing the output matching network of the power amplifier, different terminal impedance conditions are selected at four ports of the coupling microstrip line, the connection coupling line can realize impedance transformation and control harmonic impedance, the efficiency of the designed power amplifier can be improved, and the bandwidth of the designed power amplifier is expanded by utilizing the cascade connection of two sections of coupling lines. Compared with the traditional design method, a harmonic control circuit and a fundamental wave matching circuit do not need to be designed respectively, and the design of the power amplifier is simplified while the high-efficiency performance is kept.
Description
Technical Field
The invention relates to the technical field of wireless communication, in particular to a broadband high-efficiency power amplifier based on a termination coupling line structure and a design method thereof.
Background
With the rapid development of wireless communication technology, the requirement for the radio frequency front end circuit is higher and higher. The performance and characteristics of a power amplifier, which is a key module in an rf front-end circuit, have a very important influence on the overall wireless communication system. Especially, the arrival of 5G communication puts higher demands on the bandwidth of the wireless communication system, and as an important component of the wireless communication system, the bandwidth characteristic of the power amplifier becomes an important index for measuring the power amplifier. The power amplifier is also the most energy consuming part in the wireless communication system, and has important influence on the energy consumption of the whole system, the working time of the equipment and the pressure of the heat dissipation device, so the efficiency of the power amplifier is also another important index for measuring the power amplifier. Therefore, how to design a power amplifier with wider bandwidth and higher efficiency is a hot issue in the field of wireless communication technology.
However, in the design of the power amplifier, the power amplifier is usually designed to have higher efficiency but narrower bandwidth, or have wider bandwidth but lower efficiency. In the existing design, a harmonic control network is mostly adopted to control harmonic waves, and then matching is carried out through a fundamental wave matching network, so that the design method increases the complexity of circuit design to a certain extent, and has larger volume and higher cost.
Therefore, in order to overcome the above-mentioned drawbacks, it is necessary to provide a design solution for a wideband high-efficiency power amplifier with better performance.
Disclosure of Invention
In view of this, the present invention provides a broadband high-efficiency power amplifier based on a termination coupling line structure and a design method thereof, and provides a new output matching network topology structure, in which a cascade termination coupling line is used as an output matching network of the power amplifier, different termination impedance conditions are selected at four ports of the coupling line, so that not only can impedance transformation be realized, but also harmonic wave control is realized, and meanwhile, two sections of coupling microstrip lines are cascaded to expand the working bandwidth of the power amplifier. Compared with the traditional power amplifier, the output matching network has a simple structure, is easy to realize, does not need to design a harmonic control circuit and a fundamental wave matching circuit respectively, greatly simplifies the complexity of circuit design while realizing high performance, further reduces the volume of the circuit and reduces the production cost.
In order to overcome the defects of the prior art, the invention adopts the following technical scheme:
a broadband high-efficiency power amplifier based on a termination coupling line structure comprises an input matching network, a grid direct current feed network, a transistor, a drain direct current feed network and an output matching network, wherein,
the input matching network is connected with the input end of the transistor, 50 ohm impedance is matched to the transistor, the best source impedance conjugate is obtained through source traction, and the power amplifier obtains the maximum input power;
the grid direct current feed network and the drain direct current feed network are respectively connected with the grid and the drain of the transistor, apply voltage to the grid and the drain of the transistor and are used for blocking radio frequency signals from flowing into a power supply and setting a static working point;
the transistor is used for amplifying an input signal;
the output matching network is connected with the output end of the transistor and used for matching the optimal output impedance obtained by pulling the load of the transistor to 50 ohms so as to enable the power amplifier to realize maximum-efficiency transmission, and the output matching network not only has the function of impedance matching, but also has the function of inhibiting harmonic waves.
The output matching network is a network topology terminating a coupled line cascade structure, and comprises a first parallel open transmission line TL9, a second parallel open transmission line TL10, a third parallel open transmission line TL11, a fourth parallel open transmission line TL12, a first parallel coupled line CLin1 and a second parallel coupled line CLin2, wherein the first parallel open transmission line TL9 is connected with a 2 port of the first parallel coupled line CLin1, a 3 port of the first parallel coupled line CLin1 is connected with a 2 port of the second parallel coupled line CLin2 and a second parallel open transmission line TL10, a 4 port of the first parallel coupled line CLin1 is connected with a 1 port of the second parallel coupled line CLin2 and a third parallel open transmission line TL11, a second parallel open transmission line TL10 is connected with a 3 port of the first parallel coupled line CLin1 and a 2 port of the second parallel coupled line CLin 6, a third parallel coupled line CLin 11 is connected with a first parallel coupled line CLin port of the first parallel coupled line CLin and a parallel coupled line CLin1, the 2 port of the second parallel coupled line CLin2 is connected to the 3 port of the first parallel coupled line CLin1 and the second parallel open transmission line TL10, the 1 port of the second parallel coupled line CLin2 is connected to the 4 port of the first parallel coupled line CLin1 and the third parallel open transmission line TL11, and the fourth parallel open transmission line TL12 is connected to the 3 port of the second parallel coupled line CLin2 as a load terminal.
As a further improvement, the input matching network includes a dc blocking capacitor C1, a first series transmission line TL1, a second series transmission line TL2, a third series transmission line TL3, a fourth series transmission line TL5 and an RC parallel stabilizing circuit, wherein one end of the dc blocking capacitor C1 is connected to the rf source input end, the other end of the dc blocking capacitor C1 is connected to one end of the first series transmission line TL1, the other end of the first series transmission line TL1 is connected to one end of the second series transmission line TL2, the other end of the second series transmission line TL2 is connected to one end of the RC parallel stabilizing circuit, the other end of the RC parallel stabilizing circuit is connected to one end of the third series transmission line TL3, the other end of the third series transmission line TL3 is connected to one end of the fourth series transmission line TL5, and the other end of the fourth series transmission line is connected to the input end of the transistor.
As a further improvement, the gate dc feed network includes a microstrip transmission line TL 4, a stabilizing resistor R2, and a coupling capacitor C3, wherein one end of the microstrip transmission line is connected to the power supply and one end of the capacitor C3, the other end of the capacitor C3 is grounded, the other end of the microstrip transmission line TL 4 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the input end of the transistor, and the bias voltage of the gate dc feed network is-2.8V; the drain direct current feed network comprises a microstrip transmission line TL7 and a capacitor C4, wherein one end of the microstrip transmission line TL7 is connected with one end of a power supply and one end of the capacitor C4, one end of the capacitor C4 is grounded, the other end of the microstrip transmission line TL7 is connected with the output end of a transistor, and the bias voltage of the drain direct current feed network is 28V.
As a further improvement, the output matching network is a symmetrical matching network formed by loading the coupling lines at different ports through open stubs and then cascading the coupling lines.
As a further improvement, the transistor adopts a GaN HEMT CGH40010F transistor.
In order to solve the technical problems in the prior art, the invention also discloses a design method of the broadband high-efficiency power amplifier based on the termination coupling line structure, which is realized by the following steps:
step S1: carrying out source traction and load traction on a grid electrode and a drain electrode of the transistor under the central frequency to obtain optimal source impedance and optimal load impedance;
step S2: according to the optimal source impedance obtained in the step S1, conjugate matching from the input port to the optimal source impedance is realized by a step impedance matching method, and an input matching network is designed;
step S3: designing a bias circuit by adopting a quarter-wavelength transmission line;
step S4: designing an output filter matching network according to the optimal load impedance obtained in the step S1; the working bandwidth is expanded by cascading two sections of parallel coupling microstrip lines, and four open-circuit short stubs TL9, TL10, TL11 and TL12 are loaded on different port branches of the parallel coupling microstrip lines to form an output filter matching network;
step S5: and building the designed modules into an integral circuit.
Compared with the prior art, the invention has the following technical effects:
the invention adopts a novel output matching network structure topology, utilizes the coupling line cascade to expand the bandwidth of the designed power amplifier, and loads open-circuit short stubs on different port branches of the coupling line, thereby not only realizing impedance matching, but also controlling harmonic waves and improving the efficiency of the power amplifier. The harmonic control circuit and the fundamental wave matching circuit are not required to be designed respectively, the complexity of circuit design is greatly simplified, the designed output matching network is of a symmetrical structure, the structure and the process are simplified, meanwhile, the size of the circuit is further reduced, the production cost is reduced, and the method has a good application prospect.
Drawings
FIG. 1 is a schematic diagram of a wideband high efficiency power amplifier based on a terminated coupled line structure according to the present invention;
FIG. 2 is a schematic diagram of the input matching network and the gate DC feed network of the present invention;
FIG. 3 is a topology structure diagram of the output matching network of the cascade termination coupling line in the present invention;
fig. 4 is a schematic structural diagram of a conventional coupled microstrip line;
FIG. 5a is an odd-mode equivalent circuit schematic of the present invention for the output matching network topology of FIG. 3;
FIG. 5b is a schematic diagram of an even mode equivalent circuit of the present invention for the output matching network topology of FIG. 3;
FIG. 6 is a diagram illustrating S parameter simulation results of output matched network filtering according to the present invention;
fig. 7 is a graph of the output power, efficiency and gain simulation results for a wideband high efficiency power amplifier based on a terminated coupled line architecture in accordance with the present invention.
Detailed Description
The following are specific embodiments of the present invention and are further described with reference to the drawings, but the present invention is not limited to these embodiments.
The applicant carries out intensive research on the structure of a traditional broadband high-efficiency power amplifier in the prior art aiming at the defects in the prior art, and finds that the output matching circuit of the traditional broadband high-efficiency power amplifier in the prior art is generally designed with a harmonic control circuit firstly, and then is designed with a fundamental wave matching circuit on the basis, so that the design method not only increases the complexity of the design process and the structure, but also has larger overall volume after the design is finished, is not beneficial to miniaturization design and has higher cost.
In order to solve the defects of the prior art, the invention provides a broadband high-efficiency power amplifier based on a terminating coupling line structure and a design method thereof.
Referring to fig. 1, there is shown a schematic diagram of a wideband high efficiency power amplifier based on a terminated coupled line structure according to the present invention, which includes an input matching network, a gate dc feeding network, a transistor, a drain dc feeding network, and an output matching network, wherein,
the input matching network is connected with the input end of the transistor, 50 ohm impedance is matched to the transistor, the best source impedance conjugate is obtained through source traction, and the power amplifier obtains the maximum input power;
the grid direct current feed network and the drain direct current feed network are respectively connected with the grid and the drain of the transistor, apply voltage to the grid and the drain of the transistor and are used for blocking radio frequency signals from flowing into a power supply and setting a static working point;
the output matching network is connected with the output end of the transistor and used for matching the optimal output impedance obtained by pulling the load of the transistor to 50 ohms so as to enable the power amplifier to realize maximum-efficiency transmission, and the output matching network not only has the function of impedance matching, but also has the function of inhibiting harmonic waves.
Referring to fig. 2, a schematic block diagram of an input matching network is shown, which includes a dc blocking capacitor C1, a first series transmission line TL1, a second series transmission line TL2, a third series transmission line TL3, a fourth series transmission line TL5, and an RC parallel stabilizing circuit, wherein one end of the dc blocking capacitor C1 is connected to an rf source input end, the other end of the dc blocking capacitor C1 is connected to one end of the first series transmission line TL1, the other end of the first series transmission line TL1 is connected to one end of the second series transmission line TL2, the other end of the second series transmission line TL2 is connected to one end of the RC parallel stabilizing circuit, the other end of the RC parallel stabilizing circuit is connected to one end of the third series transmission line TL3, the other end of the third series transmission line TL3 is connected to one end of the fourth series transmission line TL5, and the other end of the fourth series transmission line is connected to an input end of a transistor.
Referring to fig. 3, a schematic diagram of a topology of an output matching network is shown, and matching of circuits is realized by connecting coupled line structures in a cascade manner. Including a first parallel open transmission line TL9, a second parallel open transmission line TL10, a third parallel open transmission line TL11, a fourth parallel open transmission line TL12, a first parallel coupling line CLin1, and a second parallel coupling line CLin2, wherein the first parallel open transmission line TL9 is connected to a 2-port of the first parallel coupling line CLin1, a 3-port of the first parallel coupling line CLin1 is connected to a 2-port of the second parallel coupling line CLin2 and the second parallel open transmission line TL10, a 4-port of the first parallel coupling line CLin1 is connected to a 1-port of the second parallel coupling line CLin2 and the third parallel open transmission line TL11, a second parallel open transmission line TL10 is connected to a 3-port of the first parallel coupling line CLin1 and a 2-port of the second parallel coupling line CLin2, a third parallel open transmission line TL11 is connected to a 4-port of the first parallel coupling line CLin1 and a 2-port of the first parallel coupling line CLin 6324, and a 2-port of the first parallel coupling line CLin 599 are connected to the first parallel coupling line CLin 599, the 1 port of the second parallel coupled line CLin2 is connected with the 4 port of the first parallel coupled line CLin1 and the third parallel open transmission line TL11, and the fourth parallel open transmission line TL12 is connected with the 3 port of the second parallel coupled line CLin2 as a load terminal.
The topology of the output matching network is a symmetrical terminating coupling line structure, and the working principle of the technical scheme of the invention is further explained below.
To further simplify the analysis, the symmetric output matching network is subjected to odd-even mode analysis. Referring to fig. 4, a schematic diagram of a conventional coupling microstrip line structure is shown, which belongs to a four-port network because it has four taps of 1,2,3 and 4. The odd-even mode parameter for the coupled microstrip line can be expressed by the following equation:
wherein the content of the first and second substances,
and
respectively, the characteristic impedance of odd-even mode of the air-coupled microstrip line, andeoand εeeRespectively, the effective dielectric constant of the dielectric odd-even mode. From the above two formulae, it is only necessary to obtain εeoAnd εeeAt epsilonrThe corresponding change value when changing can obtain the changed Z0oAnd Z0eThe value is obtained.
Parameter Z0o，Z0eThe characteristic impedances of the odd mode and the even mode of the coupling microstrip line are respectively, and theta is the electrical length of the coupling microstrip line. The four-port impedance matrix of a conventional coupled microstrip line structure can be expressed as:
wherein VmAnd In(m, n is 1,2,3,4) are the voltage and current of the four ports of the conventional coupling line in fig. 4,
condition ik＝0Corresponding to the kth port being open. In this case, a dimensional impedance matrix is obtained instead of the normalized impedance matrix. Each element has a unit of Ω.
After the four-port network parameters of the coupled microstrip line are calculated, the characteristics of a plurality of unit circuits can be obtained on the basis. Except that the coupling microstrip line directional coupler is used as a four-port element, the coupling microstrip line directional coupler is generally used as a filter circuit unit; and at this time, other two ports are often short-circuited or open-circuited, so that only two ports are connected with other circuits, and a two-port network is formed actually.
Referring to fig. 5a, which is a schematic diagram of an odd-mode equivalent circuit of an output matching network, in an odd-mode excitation state, an expression of an input impedance of the odd-mode equivalent circuit under a symmetric plane is as follows:
Zino＝Z11+Z12 (8)
wherein:
Zod,Zenthe odd and even mode characteristic impedances of coupled lines CLin1 and CLin2, respectively, theta is its electrical length, Z1，θ1The characteristic impedance and electrical length of transmission lines TL9 and TL 12.
Referring to fig. 5b, which is a schematic diagram of an even mode equivalent circuit of the output matching network, in an even mode excitation state, an expression of an input impedance of the even mode equivalent circuit under a symmetric plane is as follows:
Zine＝Z22+Z23 (11)
wherein:
Z1，θ1characteristic impedance and electrical length, Z, of transmission lines TL9 and TL122，θ2Characteristic impedance and electrical length of transmission lines TL10 and TL11, respectively. Then, the input impedance of the odd-even mode equivalent circuit is introduced into a scattering parameter, and the expression of the scattering parameter can be obtained as follows:
wherein ZinRepresented as the input impedance of the output matching network. Based on the above expression, the external scattering parameters of the terminated coupling line structure can be calculated and analyzed, and the filter performance parameters in the working frequency band are determined by the above formula. Drawing (A)And 6, an S parameter simulation result schematic diagram of filtering of the output matching network is shown, and the matching network has the minimum suppression of second harmonic of 23dB and shows good filtering characteristics.
Referring to fig. 7, a simulation result diagram of output power, efficiency and gain of the broadband high-efficiency power amplifier based on the termination coupling line structure is shown, the designed power amplifier works in a frequency band of 1.2-3.6GHz, the saturation output power is 40-42dBm, the gain is greater than 10dB, and the drain efficiency is 63% -76%, so that a good performance index is shown.
In a preferred embodiment, a Cree GaN HEMT CGH40010F transistor is used;
in a preferred embodiment, a gate bias circuit is arranged between the input matching network and the transistor, and the bias voltage of the gate bias circuit is set to be-2.8V;
in a preferred embodiment, a drain bias circuit is arranged between the transistor and the designed output matching network, and the bias voltage of the drain bias circuit is set to be 28V;
the invention relates to a design method of a broadband high-efficiency power amplifier based on a termination coupling line structure, which is realized by the following steps:
step S1: firstly, carrying out source traction and load traction on a grid electrode and a drain electrode of a transistor under central frequency to obtain optimal source impedance and optimal load impedance;
step S2: according to the optimal source impedance obtained in the step S1, conjugate matching from the input port to the optimal source impedance is realized by a step impedance matching method, and an input matching network is designed;
step S3: designing a bias circuit module by adopting a quarter-wavelength transmission line;
step S4: the output filter matching network is designed according to the optimal load impedance obtained in step S1. By adopting the mode of cascading the amplifier and the filter matching network, filter response can be obtained between different input impedance points and fixed output impedance of 50 omega, and the impedance mismatch generated by the interconnection line between the drain node of the transistor and the input port of the filter matching network can be minimized by the mode. The designed output filter matching network is as shown in fig. 3, two parallel coupling microstrip lines are cascaded to expand the working bandwidth, and four open-circuit stubs TL9, TL10, TL11 and TL12 are loaded on different port branches of the parallel coupling microstrip lines to form the output filter matching network. The branch node is loaded with the open stub, so that the transmission zero point of the filter matching network can be increased, the selectivity of the filter matching network is improved, and a better out-of-band rejection level is obtained. Fig. 5 is a diagram of an equivalent circuit of odd-even mode of the output filter matching network, wherein the input impedance of the equivalent circuit of odd-even mode is:
Zino＝Z11+Z12 (16)
Zine＝Z22+Z23 (17)
wherein:
Zod,Zenthe odd and even mode characteristic impedances of coupled lines CLin1 and CLin2, respectively, theta is its electrical length, Z1，θ1Characteristic impedance and electrical length, Z, of transmission lines TL9 and TL122，θ2Characteristic impedance and electrical length of transmission lines TL10 and TL11, respectively. The input impedance of the odd-even mode equivalent circuit is introduced into a scattering parameter, and the expression of the scattering parameter can be obtained as follows:
wherein ZinRepresented as the input impedance of the output matching network. Based on the above expression, the external scattering parameters of the terminated coupling line structure can be calculated and analyzed, and the filter performance parameters in the working frequency band are determined by the above formula. Fig. 6 is a schematic diagram of the simulation result of the S parameter of the output matching network filter, and it is seen from the simulation result of the S parameter that the matching network suppresses the second harmonic by 23dB at least, and shows good filtering characteristics.
Step S5: and building each designed module into an integral circuit, simulating and debugging the built integral circuit, and optimizing the integral circuit according to a simulation result to further improve the performance of the designed power amplifier.
Referring to fig. 7, a simulation result diagram of output power, efficiency and gain of the broadband high-efficiency power amplifier based on the termination coupling line structure is shown, the designed power amplifier works in a frequency band of 1.2-3.6GHz, the saturation output power is 40-42dBm, the gain is greater than 10dB, and the drain efficiency is 63% -76%, so that a good performance index is shown.
The above description of the embodiments is only intended to facilitate the understanding of the method of the invention and its core idea. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (6)
1. A broadband high-efficiency power amplifier based on a termination coupling line structure is characterized by at least comprising an input matching network, a grid direct current feed network, a transistor, a drain direct current feed network and an output matching network, wherein,
the input matching network is connected with the input end of the transistor and is used for matching 50 ohm impedance to the conjugate of the optimal source impedance obtained by the transistor through source traction, so that the power amplifier obtains the maximum input power;
the grid direct current feed network and the drain direct current feed network are respectively connected with the grid and the drain of the transistor and are used for blocking radio frequency signals from flowing into a power supply and setting a static working point;
the transistor is used for amplifying an input signal;
the output matching network is connected with the output end of the transistor and is used for matching the optimal output impedance obtained by the traction of the transistor load to 50 ohms so as to ensure that the power amplifier realizes the maximum efficiency transmission,
the output matching network not only has the function of impedance matching, but also has the function of inhibiting harmonic waves, the network topology which adopts a termination coupled line cascade structure comprises a first parallel open-circuit transmission line TL9, a second parallel open-circuit transmission line TL10, a third parallel open-circuit transmission line TL11, a fourth parallel open-circuit transmission line TL12, a first parallel coupled line CLin1 and a second parallel coupled line CLin2, the first parallel open transmission line TL9 is connected to the 2-port of the first parallel coupling line CLin1 as an input terminal, the 3-port of the first parallel coupling line CLin1 is connected to the 2-port of the second parallel coupling line CLin2 and the second parallel open transmission line TL10, the 4-port of the first parallel coupling line CLin1 is connected to the 1-port of the second parallel coupling line CLin2 and the third parallel open transmission line TL11, and the fourth parallel open transmission line TL12 is connected to the 3-port of the second parallel coupling line CLin2 as a load terminal.
2. The wideband high efficiency power amplifier based on terminated coupled line architecture as claimed in claim 1, wherein the input matching network comprises a blocking capacitor C1, a first series transmission line TL1, a second series transmission line TL2, a third series transmission line TL3, a fourth series transmission line TL5 and a RC shunt regulator circuit, wherein one end of the blocking capacitor C1 is connected to the RF source input, the other end of the blocking capacitor C1 is connected to one end of the first series transmission line TL1, the other end of the first series transmission line TL1 is connected to one end of the second series transmission line TL2, the other end of the second series transmission line TL2 is connected to one end of the RC shunt regulator circuit, the other end of the RC shunt regulator circuit is connected to one end of the third series transmission line TL3, the other end of the third series transmission line TL3 is connected to one end of the fourth series transmission line TL5, the other end of the fourth series transmission line is connected to the input terminal of the transistor.
3. The wideband high-efficiency power amplifier based on the terminated coupling line structure as claimed in claim 1, wherein the gate dc feed network comprises a microstrip transmission line TL 4, a stable resistor R2 and a coupling capacitor C3, wherein one end of the microstrip transmission line is connected to a power supply and one end of the capacitor C3, the other end of the capacitor C3 is grounded, the other end of the microstrip transmission line TL 4 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the input end of the transistor, and the bias voltage of the gate dc feed network is-2.8V; the drain direct current feed network comprises a microstrip transmission line TL7 and a capacitor C4, wherein one end of the microstrip transmission line TL7 is connected with one end of a power supply and one end of the capacitor C4, one end of the capacitor C4 is grounded, and the other end of the microstrip transmission line TL7 is connected with an output end of a transistor.
4. The wideband high efficiency power amplifier based on terminated coupled line structure as claimed in claim 1, wherein the output matching network is a symmetric matching network formed by loading the different ports of the coupled lines through open stubs and then cascading the coupled lines.
5. The wideband high efficiency power amplifier based on terminated coupled line architecture as claimed in claim 1, wherein said transistor is GaN HEMT CGH40010F transistor.
6. A design method of a broadband high-efficiency power amplifier based on a termination coupling line structure is characterized by comprising the following steps:
step S1: carrying out source traction and load traction on a grid electrode and a drain electrode of the transistor under the central frequency to obtain optimal source impedance and optimal load impedance;
step S2: according to the optimal source impedance obtained in the step S1, conjugate matching from the input port to the optimal source impedance is realized by a step impedance matching method, and an input matching network is designed;
step S3: designing a bias circuit by adopting a quarter-wavelength transmission line;
step S4: designing an output filter matching network according to the optimal load impedance obtained in the step S1; the working bandwidth is expanded by cascading two sections of parallel coupling microstrip lines, and four open-circuit short stubs TL9, TL10, TL11 and TL12 are loaded on different port branches of the parallel coupling microstrip lines to form an output filter matching network;
step S5: and building the designed modules into an integral circuit.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113824409A (en) * | 2021-09-02 | 2021-12-21 | 郑州中科集成电路与系统应用研究院 | Broadband reconfigurable multifunctional power amplifier system based on reconfigurable broadband impedance transformation network |
| CN113922834A (en) * | 2021-09-28 | 2022-01-11 | 广东宽普科技有限公司 | High-efficient heat dissipation high frequency signal receiving and dispatching subassembly |
| CN115694380A (en) * | 2022-10-30 | 2023-02-03 | 北京航空航天大学 | Double-frequency broadband power amplifier and matching branch design method thereof |
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2020
- 2020-10-10 CN CN202011076370.5A patent/CN112332787A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113824409A (en) * | 2021-09-02 | 2021-12-21 | 郑州中科集成电路与系统应用研究院 | Broadband reconfigurable multifunctional power amplifier system based on reconfigurable broadband impedance transformation network |
| CN113824409B (en) * | 2021-09-02 | 2023-08-15 | 郑州中科集成电路与系统应用研究院 | Broadband reconfigurable multifunctional power amplifier system based on reconfigurable broadband impedance transformation network |
| CN113922834A (en) * | 2021-09-28 | 2022-01-11 | 广东宽普科技有限公司 | High-efficient heat dissipation high frequency signal receiving and dispatching subassembly |
| CN115694380A (en) * | 2022-10-30 | 2023-02-03 | 北京航空航天大学 | Double-frequency broadband power amplifier and matching branch design method thereof |
| CN115694380B (en) * | 2022-10-30 | 2023-04-28 | 北京航空航天大学 | Dual-frequency broadband power amplifier and matching branch design method thereof |
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