CN112310257B - Protective layer and its manufacturing method and use - Google Patents
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- CN112310257B CN112310257B CN201910681178.XA CN201910681178A CN112310257B CN 112310257 B CN112310257 B CN 112310257B CN 201910681178 A CN201910681178 A CN 201910681178A CN 112310257 B CN112310257 B CN 112310257B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 33
- 239000011241 protective layer Substances 0.000 title claims abstract description 27
- 239000010410 layer Substances 0.000 claims abstract description 53
- 239000010408 film Substances 0.000 claims description 75
- 239000000463 material Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 48
- 229910052751 metal Inorganic materials 0.000 claims description 36
- 239000002184 metal Substances 0.000 claims description 36
- 238000004458 analytical method Methods 0.000 claims description 22
- 238000012360 testing method Methods 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 10
- 229910044991 metal oxide Inorganic materials 0.000 claims description 8
- 150000004706 metal oxides Chemical class 0.000 claims description 8
- 229910052976 metal sulfide Inorganic materials 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 8
- 150000003346 selenoethers Chemical class 0.000 claims description 8
- 238000010884 ion-beam technique Methods 0.000 claims description 7
- 239000002131 composite material Substances 0.000 claims description 6
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 6
- 239000002994 raw material Substances 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 3
- 239000012790 adhesive layer Substances 0.000 claims 2
- 239000002344 surface layer Substances 0.000 abstract description 27
- 238000003486 chemical etching Methods 0.000 abstract description 6
- 238000009825 accumulation Methods 0.000 abstract description 5
- 238000013461 design Methods 0.000 abstract description 5
- 230000035882 stress Effects 0.000 abstract description 5
- 230000006355 external stress Effects 0.000 abstract description 4
- 238000005336 cracking Methods 0.000 abstract description 3
- 238000002161 passivation Methods 0.000 description 14
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 8
- 238000000227 grinding Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 6
- 238000012546 transfer Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 229910052697 platinum Inorganic materials 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 230000002950 deficient Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 230000000704 physical effect Effects 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N titanium dioxide Inorganic materials O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 3
- 229910019020 PtO2 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000003917 TEM image Methods 0.000 description 1
- YKIOKAURTKXMSB-UHFFFAOYSA-N adams's catalyst Chemical compound O=[Pt]=O YKIOKAURTKXMSB-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000000445 field-emission scanning electron microscopy Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2898—Sample preparation, e.g. removing encapsulation, etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Sampling And Sample Adjustment (AREA)
Abstract
The invention discloses a protective layer and a manufacturing method and application thereof, wherein the protective layer comprises a first film, a buffer film and a second film. According to the design of the invention, before the sample of the fault product is sent to the FIB system, the manufacturing method of the invention mainly deposits at least one layer of first film, at least one layer of buffer film and at least one layer of second film on the surface layer of the sample, and further forms the protective layer on the surface layer of the sample. Thus, the protective layer provides protection to the surface layer or other areas of the sample from deformation, cracking or collapse due to mass interference, stress or charge accumulation during FIB thinning or subsequent chemical etching. On the other hand, the micro light emitting diode and the vertical cavity surface emitting laser, the surface of which is covered with the protective layer of the invention, can show higher tolerance level of external stress.
Description
Technical Field
The present invention relates to the field of Failure Analysis (FA), and more particularly, to a protection layer, a method for manufacturing the same, and a use thereof, which can be applied to manufacturing a test piece for Failure Analysis, increasing yield of a mass transfer process of a micro light emitting diode, and protecting a surface layer of a Vertical Cavity Surface Emitting Laser (VCSEL).
Background
With the rapid development of Integrated Circuit (IC) design technology, the process technology of semiconductor manufacturing is also continuously increasing, so that the gate line width of transistor devices is being reduced year by year. However, as the device line width is reduced, the wafer fab has made many efforts to control and maintain the process yield.
Failure Analysis (FA) is an important technology for increasing the yield of semiconductor manufacturing processes. Semiconductor devices and ICs produced by semiconductor manufacturing processes may have different failure modes that may be caused by process errors in a process step. Currently, failure analysis can be mainly divided into: element Electrical Failure Analysis (EFA) and element Physical (Physical) Failure Analysis (PFA). When a semiconductor device or an IC is found to be faulty, an electrical fault analysis is usually performed on the faulty product, and then a physical fault analysis is performed on a specific faulty position of the faulty product according to the result of the electrical fault analysis. It should be noted that material structure analysis instruments such as high-resolution FE-SEM, FIB, TEM, etc. are indispensable for analyzing element physical property failure, and the english and chinese names of these three instruments are summarized in table (1) below.
Watch (1)
The resolution of the existing TEM can reach 0.2 nm. In addition, since the electron beam has a weak transmission, the test piece suitable for TEM analysis must be thinned to a thickness of about 50 to 100 nm. For this reason, PFA engineers usually first manufacture the defective sample into a test piece, and then send the test piece to the transmission electron microscope. The preparation method of the common test piece can be mainly classified into the following two ways:
(1) grinding the surface layer of the fault product by using chemical etching liquid and grinding cloth; however, because the thicknesses of the surface layers of different fault products needing to be ground and removed are different, other material layers which do not need to be ground are often damaged during grinding, so that the test piece of the fault product after grinding is still not suitable for defect analysis of a fixed-point micro-area;
(2) firstly, the surface of the fault product is ground and polished by a grinding mode, and then the surface layer of the fault product is thinned by using Focused Ion Beam (FIB). It should be noted that before FIB thinning, a platinum protection layer, which is also a conductive layer, must be plated on the surface of the failed article to prevent charge from accumulating on the surface of the failed article during FIB thinning. However, the platinum protective layer may interfere with the surface layer material of the defective product, resulting in the surface layer material being cracked or cracked when FIB thinning is performed; particularly, if the surface layer of the failed article is an organic film (e.g. photoresist), the organic film is likely to be directly peeled off during the FIB thinning process, resulting in the failure of TEM specimen fabrication.
Generally speaking, before fabricating the TEM specimen, at least one protective film must be formed on the sample of the TEM specimen. However, the platinum protective layer used in the prior art shows quite obvious defects and shortcomings in the preparation process of the TEM specimen; accordingly, the present invention has been made and developed to the utmost extent, and finally, the present invention provides a passivation layer, a method for manufacturing the same, and a use of the same.
Disclosure of Invention
The invention provides a protective layer, a manufacturing method and an application thereof, wherein the protective layer comprises a first film, a buffer film and a second film. Moreover, the protection layer has the functions of manufacturing a test piece for failure analysis, improving the yield of a mass transfer process of the micro light emitting diode, providing surface protection of the vertical cavity surface emitting laser and the like. According to the design of the invention, before the sample of the fault product is sent to the FIB system, the manufacturing method of the invention mainly deposits at least one layer of first film, at least one layer of buffer film and at least one layer of second film on the surface layer of the sample, and further forms the protective layer on the surface layer of the sample. Thus, the protective layer provides protection to the surface layer or other areas of the sample from deformation, cracking or collapse due to mass interference, stress or charge accumulation during FIB thinning or subsequent chemical etching. Likewise, the micro light emitting diode and the vertical cavity surface emitting laser, the surface of which is covered with the protective layer of the present invention, can show a higher tolerance level of the external stress.
To achieve the above objective, an embodiment of the present invention provides a passivation layer, including:
a first film made of a first material;
a second film formed on the first film and made of a second material; and
a buffer film formed between the first film and the second film;
the first material and the second material are selected from a group consisting of metal oxides, metal sulfides, metal selenides, metal nitrides and metal oxynitrides, and the process material of the buffer film is a compound or a mixture of the first material and the second material.
In order to achieve the above-mentioned objective of the present invention, the present invention also provides an embodiment of the method for manufacturing the passivation layer, including the steps of:
(1) depositing at least one first film on the surface of a sample by using a first material as a raw material;
(2) depositing at least one buffer film on the first film; and
(3) depositing at least one layer of second film on the buffer film by using a second material as a raw material;
the first material and the second material are selected from a group consisting of metal oxides, metal sulfides, metal selenides, metal nitrides and metal oxynitrides, and the process material of the buffer film is a compound or a mixture of the first material and the second material.
In an embodiment of the method for manufacturing a passivation layer of the present invention, before depositing the first thin film on the surface of the sample, the sample may be ground to be thinner.
In an embodiment of the method for manufacturing a passivation layer of the present invention, the metal oxide, the metal sulfide, the metal selenide, the metal nitride, or the metal oxynitride may be any one of the following metal components: a single metal, a binary metal alloy, or a multi-component metal alloy.
In summary, the protection provided by the protection layer prevents the surface layer or other areas of the sample from being deformed, cracked or cracked due to mass interference, stress or charge accumulation when the sample is subjected to the FIB thinning process or the subsequent chemical etching process. On the other hand, the micro light emitting diode and the vertical cavity surface emitting laser, the surface of which is covered with the protective layer of the invention, can show higher tolerance level of external stress.
Drawings
FIG. 1 is a side cross-sectional view showing a protective layer of the present invention;
FIG. 2 is a flow chart showing steps of a method for forming a passivation layer according to the present invention;
FIG. 3 is a schematic view showing a process of fabricating the passivation layer; and
FIG. 4 is a schematic process diagram showing a method for manufacturing a test strip for physical property failure analysis according to the present invention.
Wherein, the reference numbers:
S1-S3 steps
1 protective layer
2 samples
21 substrate
22 isolating layer
23 active layer
24 surface layer
11 first film
10 buffer film
12 second film
Detailed Description
In order to more clearly describe the protection layer and the manufacturing method and application thereof, preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 1 is a side cross-sectional view showing a protective layer of the present invention. Fig. 2 is a flowchart illustrating a method for fabricating a passivation layer according to the present invention. Fig. 3 is a schematic diagram showing a process of the method for fabricating the passivation layer. In particular, the passivation layer 1 of the present invention has applications in manufacturing a test piece for failure analysis, increasing yield of mass transfer process of micro-leds, and providing surface protection for vertical cavity surface emitting lasers. Taking a sample for failure analysis as an example, as shown in fig. 3, a sample 2 of a failure product (e.g. an IC or a semiconductor device) includes a substrate 21, and an isolation layer 22 is formed on the substrate 21, for example: a silicon dioxide film or a High dielectric (High K) film. And, a plurality of active layers 23 are formed on the isolation layer 22, for example: a gate of the MOS device or a light emitting layer of the LED device. In order to control the width of the active layers 23, a photoresist layer, referred to as a surface layer 24, with the same width is formed on each active layer 23 by photolithography (photolithography) and etching. However, the process error of photolithography or etching may make the width of the surface layer 24 too narrow, resulting in the damage of part of the active layer 23 during the process. Of course, process errors may also result in an excessively wide width of the skin 24.
The device Failure Analysis (PFA) technique can be used to check the major factors causing the process errors in photolithography or etching. Therefore, as shown in fig. 1, fig. 2 and fig. 3, the manufacturing method of the present invention first performs step S1: at least one first film 11 is deposited on a surface of a sample using a first material as a raw material. It is contemplated that the surface of sample 2 is referred to herein as surface layer 24. It should be noted that the cross-sectional view of the sample 2 shown in fig. 3 is only for exemplary illustration of the manufacturing method of the present invention, and is not intended to limit the application examples of the present invention. For example, when the passivation layer 1 of the present invention is applied to improve the yield of the mass transfer process of micro-leds, the sample 2 is a micro-led or a light emitting device array composed of a plurality of micro-leds. On the other hand, when the protection layer 1 of the present invention is applied to provide surface layer protection for a Vertical Cavity Surface Emitting Laser (VCSEL), the sample 2 is a VCSEL.
After completing step S1, the manufacturing method then proceeds to step S2: depositing at least one buffer film 10 on the first film 11. Finally, step S3 is executed: at least one layer of second film 12 is deposited on the buffer film 10 by using a second material as a raw material. According to the design of the present invention, the first material and the second material are selected from the group consisting of metal oxide, metal sulfide, metal selenide, metal nitride, and metal oxynitride, and the process material of the buffer film 10 is a composite or mixture of the first material and the second material. It is to be noted that, the metal in the metal oxide, the metal sulfide, the metal selenide, the metal nitride, or the metal oxynitride can be any one of the following: a single metal, a binary metal alloy, or a multi-component metal alloy. Moreover, the present invention specifically limits that the size of atoms of a first metal element constituting the first film 11 must be smaller than the size of atoms of a second metal element constituting the second film 12. Thus, exemplary materials of the first material for forming the first film 11 and the second material for forming the second film 12 are collated in the following table (2).
Watch (2)
The above table (2) lists only exemplary materials of the first film 11 and the second film 12, but it should be noted that the technical features of the present invention are not limited to the application of specific materials of the first film 11 and the second film 12. In particular, Al is shown in Table (2)2O3And HfO2Either in a fully or partially oxidized state. On the other hand, the buffer film 10 is used as a bonding layer (binder layer) between the first film 11 and the second film 12, which is a composite of the first material and the second material, or a mixture of the first material and the second material. For example, the buffer film 10 may be made of Al2O3/PtO2Complex, PtO2/TiO2Composite, TiO2/HfO2Composites, etc.
It should be noted that, when the protection layer 1 of the present invention is applied to the manufacture of a test piece for failure analysis, the sample 2 may be sent to a Focused ion beam system (FIB system) after the protection layer 1 is manufactured, so as to perform an ion beam thinning process on the sample 2. The ion beam thinning process is performed mainly for the purpose of thinning the thickness of the region to be analyzed of the sample 2 to a thickness observable by a Transmission Electron Microscope (TEM), for example: 0.1 μm. It should be noted that, in order to reduce the operating time of the ion beam thinning process, the sample 2 may be subjected to grinding thinning before depositing the first thin film 11 on the surface of the sample 2, for example: and (5) mechanically grinding and thinning.
Please refer to fig. 4, which is a process diagram illustrating a manufacturing method of the test strip for physical property failure analysis according to the present invention. In the process diagram of fig. 4, the passivation layer 1 composed of the first film 11, the buffer film 10 and the second film 12 only partially covers the surface of the sample 2, and particularly only covers the active layers 23 on the sample 2. Of course, since the surface layer 24 is covered on the active layer 23, the passivation layer 1 covers both the surface layer 24 and the active layer 23.
Thus, the above description is a complete and clear description of the protective layer of the present invention and its method of manufacture and use; moreover, the present invention has the following advantages as follows:
(1) generally, at least one protective film must be formed on a sample of the TEM specimen before fabricating the TEM specimen. However, the platinum protective film used in the prior art may interfere with the surface layer material (e.g., organic material) of the defective product, resulting in the surface layer material being cracked or broken when FIB thinning is performed, and thus causing failure in the production of TEM specimen. In view of the above, the present invention particularly provides a passivation layer, a method for manufacturing the same, and a use of the same; the protective layer comprises a first film, a buffer film and a second film. Moreover, the protection layer has the functions of manufacturing a test piece for failure analysis, improving the yield of a mass transfer process of the micro light emitting diode, providing surface protection of the vertical cavity surface emitting laser and the like. According to the design of the invention, before the sample of the fault product is sent to the FIB system, the manufacturing method of the invention mainly deposits at least one layer of first film, at least one layer of buffer film and at least one layer of second film on the surface layer of the sample, and further forms the protective layer on the surface layer of the sample. Thus, the protective layer provides protection to the surface layer or other areas of the sample from deformation, cracking or collapse due to mass interference, stress or charge accumulation during FIB thinning or subsequent chemical etching. Likewise, the micro light emitting diode and the vertical cavity surface emitting laser, the surface of which is covered with the protective layer of the present invention, can show a higher tolerance level of the external stress.
(2) As described above, by the protection of the protective layer 1, the surface layer or other areas of the sample 2 are not deformed, cracked or collapsed due to mass interference, stress or charge accumulation when the FIB thinning process or the subsequent chemical etching process is performed. Meanwhile, the sample after FIB thinning treatment can be used as a TEM test piece of the fault product, and a TEM image of the TEM test piece can show high contrast so as to clearly show the fixed point micro-area defect.
It should be emphasized that the above detailed description is specific to possible embodiments of the invention, but this is not to be taken as limiting the scope of the invention, and all equivalent implementations or modifications that do not depart from the technical spirit of the invention are intended to be included within the scope of the invention.
Claims (7)
1. A protective layer made of a test piece for failure analysis is characterized by comprising:
a first film made of a first material;
a second film formed on the first film and made of a second material; and
a buffer film formed between the first film and the second film and used as an adhesive layer;
wherein the first material and the second material are selected from one of the group consisting of metal oxide, metal sulfide, metal selenide, metal nitride and metal oxynitride, and the process material of the buffer film is a composite of the first material and the second material;
wherein the size of an atom of a first metal element constituting the first film is smaller than the size of an atom of a second metal element constituting the second film.
2. A manufacturing method of a protective layer made of a test piece for fault analysis is characterized by comprising the following steps:
(1) depositing at least one first film on the surface of a sample by using a first material as a raw material;
(2) depositing at least one buffer film on the first film as an adhesive layer; and
(3) depositing at least one layer of second film on the buffer film by using a second material as a raw material;
wherein the first material and the second material are selected from one of the group consisting of metal oxide, metal sulfide, metal selenide, metal nitride and metal oxynitride, and the process material of the buffer film is a composite of the first material and the second material;
wherein the size of an atom of a first metal element constituting the first film is smaller than the size of an atom of a second metal element constituting the second film.
3. The method of claim 2, wherein the sample is ground to thin before depositing the first thin film on the surface of the sample.
4. The method for manufacturing a protective layer according to claim 2, further comprising the steps of:
(4) the sample is sent into a focused ion beam system to carry out ion beam thinning treatment on the sample.
5. The method of claim 2, wherein the first film completely covers or partially covers the surface of the sample.
6. The method of claim 3, wherein the first film covers only at least one active layer on the sample.
7. The method of claim 3, wherein the metal oxide, the metal sulfide, the metal selenide, the metal nitride, or the metal oxynitride comprises a metal selected from the group consisting of a single metal, a binary metal alloy, and a multi-element metal alloy.
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| TW201039378A (en) * | 2009-04-16 | 2010-11-01 | Atomic Energy Council | A method of fabricating a ZnO film having a matching crystal orientation to silicon substrate |
| CN109149361A (en) * | 2018-10-10 | 2019-01-04 | 南京工程学院 | A kind of vertical-cavity surface-emitting silicon substrate GaN laser and preparation method thereof based on dielectric Bragg mirror |
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| CN100385595C (en) * | 2003-12-31 | 2008-04-30 | 中芯国际集成电路制造(上海)有限公司 | Method for preparing transmission electron microscope test piece |
| KR101449030B1 (en) * | 2008-04-05 | 2014-10-08 | 엘지이노텍 주식회사 | group 3 nitride-based semiconductor light emitting diodes and methods to fabricate them |
| CN108479806B (en) * | 2018-01-06 | 2020-04-28 | 中南大学 | Heterojunction film composed of same metal and oxygen group element, preparation and application thereof |
| TWI658262B (en) * | 2018-03-21 | 2019-05-01 | 丁肇誠 | Sample preparing method for use in physical failure analysis |
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| TW201039378A (en) * | 2009-04-16 | 2010-11-01 | Atomic Energy Council | A method of fabricating a ZnO film having a matching crystal orientation to silicon substrate |
| CN109149361A (en) * | 2018-10-10 | 2019-01-04 | 南京工程学院 | A kind of vertical-cavity surface-emitting silicon substrate GaN laser and preparation method thereof based on dielectric Bragg mirror |
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