CN112306417B - Method for shortening power-on recovery time of SSD - Google Patents

Method for shortening power-on recovery time of SSD Download PDF

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CN112306417B
CN112306417B CN202011240572.9A CN202011240572A CN112306417B CN 112306417 B CN112306417 B CN 112306417B CN 202011240572 A CN202011240572 A CN 202011240572A CN 112306417 B CN112306417 B CN 112306417B
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incremental
ssd
data
block address
metadata
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CN112306417A (en
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陈庆陆
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Suzhou Inspur Intelligent Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0611—Improving I/O performance in relation to response time
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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Abstract

The invention discloses a method for shortening power-on recovery time of an SSD, dividing a space address in a DDR, wherein the space address comprises a head information segment, an increment data segment and a base data segment, and dividing metadata and storing the metadata into a basic data segment; when the metadata is updated, the incremental data is stored in the incremental data segment; when the incremental data is full or the SSD is powered off, adding the header information and then flashing the space address into the SLC, namely generating a snapshot; and when the SSD is electrified and restored, the SSD reads the snapshot, the carried basic data is restored to the DDR according to the header information in the snapshot, the duplication checking of the incremental logical block address based on the Hash algorithm is carried out during restoration, if the incremental logical block address fails, the incremental data is skipped, and if the incremental data passes, the incremental data is added to the basic data. By the mode, the time of the duplicate checking operation can be shortened, the power-on recovery time of the SSD is shortened, the SSD can enter a working state more quickly, the working stability of the SSD is further enhanced, and the market competitiveness of the SSD is improved.

Description

Method for shortening power-on recovery time of SSD
Technical Field
The invention relates to the technical field of Flash firmware algorithms, in particular to a method for shortening power-on recovery time of an SSD.
Background
When the current SSD is powered on and restored, firstly, the base data in the snapshot is restored to the DDR. patch L2P table, delta data needs to be loaded from DDR into Local Dram. The SSD reads the L2P table according to the LBA in the delta data to obtain old _ PBA, then performs xor operation with new _ PBA in the dleta data to obtain xor _ PBA, and then calls a DDR interface patch of the xor mode to the L2P table. Before patch, 32L 2P deltas in 256bytes are subjected to unified xored PBA preprocessing, and then patch is unified to an L2P table. It was found in the implementation that there could be two different deltas of the same LBA for the 32L 2P deltas. If the LBA check and duplication process is not performed, the finally recovered L2P table is inconsistent with the L2P table in DDR before power down.
In the conventional duplication checking processing method, in the L2P delta preprocessing process, after reading the L2P table according to the LBA in the L2P delta, the LBA is recorded in an array. The L2P table is then read according to the LBA in the delta, and a loop is performed to determine whether the current LBA is already read from the LBA read previously. And if so, performing xor on the new _ PBA1 in one delta closest to the current LBA and the new _ PBA in the current delta to obtain the xor _ PBA. The method can effectively solve the problem of inconsistent L2P table recovery, but through actually measuring the 4T disc recovery, about 20s is consumed by the duplication checking operation, and the power-on recovery time of the SSD is greatly increased.
Disclosure of Invention
The invention mainly solves the technical problem of providing a method for shortening the power-on recovery time of an SSD (solid State disk), and provides a hash algorithm-based duplicate checking method aiming at long time consumption of the duplicate checking operation and influence on the power-on recovery time of the SSD, so that the time of the duplicate checking operation is reduced, and the purpose of shortening the power-on recovery time is finally achieved. The efficiency of design development can be improved, and then solid state hard drives job stabilization nature is strengthened, the market competition of solid state dish is improved.
In order to solve the technical problems, the invention adopts a technical scheme that: a method for shortening power-on recovery time of an SSD is provided, which comprises the following steps:
s100, dividing a plurality of write buffers in the DDR, wherein each write buffer comprises a header information section, a delta data section and a base data section, the header information section, the delta data section and the base data section respectively cache header information, delta data and base data, and the base data sections in each write buffer are the same in size and are base _ buffer _ size;
s200, segmenting the metadata according to the size of base _ buffer _ size, and putting the segmented metadata into a base data segment of the write buffer;
s300, generating a snapshot; when the metadata is updated, storing the delta data into a delta data section of the write buffer; when delta data cached in the delta data segment is full or the SSD is powered off, sequentially copying base data with the size of base _ buffer _ size to the base data segment, adding header information and then writing the header information into the SLC, and generating a snapshot when 16K data are written each time, wherein the header information records the type of metadata and the number of stored deltas;
s400, recovering the SSD after power-on; and the SSD sequentially reads the data in the snapshot which is refreshed in the last round from the NAND, the base data carried by the SSD is restored to the DDR according to the header information, then the delta data in the snapshot are sequentially patched to the base data, and the patch carries out the re-checking operation of the delta LBA based on the hash algorithm.
Further, in the step S100, several write buffers with a size of 16k are divided in the DDR, the first 64bytes of each write buffer are used for caching header information, a uniform delta _ buffer _ size is used for caching the generated delta data, and the remaining size of the base _ buffer _ size is used for storing a piece of base data.
Further, the step S400 of repeating the delta LBA based on the hash algorithm includes the following steps: applying xored _ Buffer, and loading delta data from DDR to Local Dram; the SSD reads the L2P table according to the delta LBA in the delta data to obtain old _ PBA, then performs xor operation with new _ PBA in the delta data to obtain xor _ PBA, sequentially stores the xor _ PBA in the xor _ Buffer, and calls a DDR interface patch of the xor mode to the L2P table; before patch, L2P delta is subjected to unified xored PBA pre-processing, and then unified patch to L2P table operation is performed.
Further, when loading delta data from DDR into Local Dram, the delta data is loaded into Local Dram in order with a size of 256bytes, each group of 256bytes of delta data containing 32L 2P deltas.
Further, the xored PBA pre-processing comprises the following steps: defining an array list [ ] containing N single-chain table heads; while reading the L2P table according to the delta LBA in the L2P delta, obtaining a list _ index in a delta LBA% N mode and indexing a single-chain table head array list [ list _ index ], traversing the context which is already hung in the list, and judging whether the carried delta LBA is the same as the delta LBA currently reading the L2P table; if the two delta LBA _ Flags are the same, setting one same _ LBA _ Flag to be valid, and not performing duplication checking processing when all subsequent delta LBAs read the L2P table, otherwise, adding the context where the current delta LBA is located into the linked list.
Further, the unified patch to L2P table operation includes the steps of: judging that the same _ LBA _ Flag is valid, before the current xored _ PBA in the xored _ Buffer is patched to the L2P table, traversing whether the xored _ Buffer has patched the current delta LBA, if so, revising the xored PBA and then patching to the L2P table, otherwise, if the same _ LBA _ Flag is invalid, directly patching the xor _ PBA to the L2P table.
The invention has the beneficial effects that: aiming at the L2P table recovery process of introducing a non-aligned L2P table mechanism, the invention designs a delta LBA (logical block addressing) duplicate checking method based on a hash algorithm. According to the method, when the batch quantifies L2P delta data, the delta data are preprocessed in advance to know whether the quantitative L2P delta data contain the delta of the same delta LBA, and the subsequent batch operation is directly corrected, so that the conventional mode of traversing all the delta LBAs is avoided, and the recovery time is saved by more than 50%. The invention is beneficial to shortening the power-on recovery time of the SSD and entering the working state more quickly, thereby enhancing the working stability of the SSD and improving the market competitiveness of the SSD.
Drawings
FIG. 1 is a flowchart of a preferred embodiment of a method for reducing power-on recovery time in an SSD in accordance with the present invention;
FIG. 2 is a flowchart of a power-on recovery step in a method for reducing power-on recovery time of an SSD according to the present invention.
Detailed Description
The following detailed description of the preferred embodiments of the present invention, taken in conjunction with the accompanying drawings, will make the advantages and features of the invention easier to understand by those skilled in the art, and thus will clearly and clearly define the scope of the invention.
Referring to fig. 1, an embodiment of the present invention includes:
the metadata is management data of the SSD solid state disk, and comprises an L2P table, Block info and a trim table; the English name of the Logical To Physical Table of L2P represents a mapping Table from a Logical block To a Physical block, and the L2P Table is a linear Table with LBA as an index and PBA as content; LBA is Logical Block Address, and Logical Block Address; PBA, Physical Block Address; NAND is a computer flash memory device, SLC is a single-level memory cell, and 1bit of data is stored in each memory cell of NAND; DDR is double rate synchronous dynamic random access memory; delta data is delta data; local Dram is Local dynamic random access memory.
Aiming at the recovery process of an L2P table introducing a non-aligned L2P table mechanism, the non-aligned L2P table mechanism and the non-DWORD size of a table entry PBA of an L2P table are configured into 31bits or 30bits according to the capacity of an SSD; in this embodiment, the L2P table is updated and maintained by the LKM software core, which is responsible for save and restore by the JM software core, which is the Journal Manager.
The JM stores an L2P table in a delta + base mode, a plurality of write cache space addresses (write buffers) with the size of 16k are divided in the DDR, the first 64bytes of each write buffer are used for buffer header information, the size of the immediately following delta _ buffer _ size is used for caching the generated delta data, and the size of the rest base _ buffer _ size (16 k-64bytes buffer _ header-delta _ buffer _ size) is used for storing a section of base data; dividing the whole L2P table into N sections of base _ N according to the size of L2P base buffer;
the LKM updates the L2P table to form L2P delta (LBA, PBA) and sends the delta (LBA, PBA) to the JM, and the JM sequentially stores the delta buffer in the 16k write buffer; when the L2P delta buffer is fully filled or the SSD is powered down, JM needs to sequentially copy a segment of base _ i (i is 0,1,2,3 … (N-1)) to the L2P base buffer, and then the base information is added and then is written into the SLC.
The header information records which metadata is saved, how much dleta data is saved, and each 16k data that is flashed is a snapshot. After the JM refreshes 16k data for N times by adopting a delta + base mode, the whole L2P table is stored in the SLC.
When the SSD is electrified and restored, the JM reads the N16K data written in the last round in sequence from the NAND, firstly restores the base data in the 16K data to the DDR, and because the DDR interface reads the delta data which can only load 256bytes at most once to the Local Dram, the delta data are sequentially loaded to the Local DRAM in the size of 256 bytes. Each group of 256bytes of delta data contains 32 deltas (LBAs, PBAs), denoted new delta buffer. Because the L2P table adopts a non-aligned L2P table mechanism, the DDR interface operates the data limit of the minimum DWORD size, and the patch L2P table can only be completed in an XOR mode; referring to FIG. 2, the specific patch steps are as follows:
s1, applying for xored _ buffer capable of accommodating 32 delta (LBA, PBA) size spaces.
S2, applying an array delta _ list [32] containing 32 single-chain table headers and 1 same _ LBA _ flag;
s3, obtaining cur _ LBA through the delta in the new delta buffer in sequence, and applying for the context of the state machine to read the L2P table. Obtaining a list _ index delta _ list [ LBA% 32] according to the LBA% 32, traversing all the state machine contexts which are already hung in the linked list, and setting a same _ LBA _ flag if the carried LBA is the same as a cur _ LBA; all subsequent operations to read the L2P table in the new delta buffer are performed as the above-mentioned duplication check operation.
S4, reading the L2P table to obtain old _ PBA and carrying out XOR operation on new _ PBA corresponding to the LBA in the new delta buffer to obtain xored _ PBA, and sequentially storing the result in the form of (LBA, xored _ PBA) into the xored _ buffer. If old _ PBA is the same as new _ PBA, no XOR operation is needed.
S5, when the preprocessing of all 32 deltas in the new delta buffer is completed, sequentially reading (LBA, xored _ PBA) in the xored buffer to execute a patch operation; if the same _ LBA _ flag is valid and the (LBA, xored _ PBA) is valid, when the patch cur xored _ PBA, traversing whether the same (LBA, xored _ PBA') has been patched in the xored buffer according to the LBA requirement; if the new LBA exists in the XOR _ buffer, according to the position of the current (LBA, XOR _ PBA) in the XOR _ buffer, traversing the (LBA, new _ PBA) before the same position in the new delta buffer, finding out the same LBA nearest to the position to obtain new _ PBA ', and performing XOR on the new _ PBA' and the new _ PBA of the current position, replacing the (LBA, XOR _ PBA) of the same position in the XOR _ buffer, and then patch the new LBA to the L2P table. If the same _ LBA _ flag is invalid, it indicates that delta data containing the same LBA does not exist in the xored _ buffer, so that the xoed _ PBA patch can be directly put into the L2P table.
S6, if (LBA, xored _ PBA) is invalid, it indicates that old _ PBA in the L2P table is the latest PBA, and patch is not needed.
Aiming at the requirement that the delta LBA is required to be checked and duplicated in the process of recovering a non-aligned L2P table by electrifying an SSD, the delta LBA duplication checking method based on the Hash algorithm is adopted, when the delta data of L2P are quantified by the patch, the delta data are preprocessed in advance, whether the delta data of the same delta LBA is contained in the delta data of the L2P is known, and the subsequent patch operation is directly corrected. The time of the duplicate checking operation is reduced, and the purpose of shortening the power-on recovery time is achieved.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (7)

1. A method for reducing power-on recovery time of an SSD is characterized by comprising the following steps:
dividing a plurality of space addresses with the same size in the DDR, wherein the space addresses comprise a header information section, an increment data section and a base data section, and the header information section, the increment data section and the base data section are respectively used for caching header information, increment data and basic data; the space size of the basic data segment in each space address is the same;
dividing the metadata according to the space size of the basic data segment and storing the metadata into the basic data segment of the space address;
when the metadata is updated, the incremental data is stored in an incremental data section of the space address; when the incremental data stored in the incremental data section is full or the SSD is powered off, adding header information in a header information section of the space address; flashing the space address stored with the header information, the incremental data and the basic data into the SLC, and generating a snapshot when one space address is flashed;
when the SSD is electrified and restored, the SSD reads a snapshot from the NAND; and the SSD restores the basic data carried by the snapshot to the DDR according to the header information in the snapshot, the incremental logical block address based on the Hash algorithm is subjected to duplicate checking during restoration, the next snapshot is skipped and read if the duplicate checking does not pass, and the incremental data in the snapshot is added to the basic data of the DDR according to the duplicate checking.
2. The method of claim 1, wherein the SSD is configured to reduce power-on recovery time by: the hash algorithm-based incremental logical block address duplication checking comprises the following steps:
setting an exclusive-or cache, and loading incremental data from DDR into a local dynamic random access memory, wherein the incremental data comprises an incremental data L2P table;
the SSD reads the metadata according to the incremental logical block address of the incremental data to obtain a corresponding old physical block address, and the old physical block address and the new physical block address of the incremental data are subjected to XOR to obtain an XOR physical block address and are stored in an XOR cache;
and performing exclusive OR physical block address preprocessing on the incremental data L2P table and calling a DDR interface in an exclusive OR mode to be added to the metadata.
3. The method of claim 2, wherein the SSD is configured to reduce power-on recovery time by: the XOR physical block address preprocessing comprises the following steps:
defining a plurality of single-chain table head arrays;
when reading the metadata according to the incremental logical block address, indexing the single-chain table head array, traversing the context in the single-chain table head array, and judging whether the incremental logical block address carried in the single-chain table head array is the same as the incremental logical block address of the metadata currently being read;
if the two numbers are the same, marking an effective mark on the incremental logical block address of the metadata currently being read, when reading the subsequent snapshot, not performing duplication checking treatment when reading the metadata by the incremental logical block address, and otherwise, adding the incremental logical block address of the metadata currently being read into the single-linked list head array.
4. The method of claim 3, wherein the SSD reduces power-on recovery time comprises: the operation of adding the DDR interface calling the exclusive or mode into the metadata comprises the following steps:
judging whether the incremental logical block address has an effective identifier, traversing the XOR cache if the incremental logical block address has the effective identifier, judging whether the current incremental logical block address exists, and if the current incremental logical block address exists, correcting the XOR physical block address and adding the corrected XOR physical block address into metadata; if the incremental logical block address does not have a valid identification, the exclusive or physical block address is added to the metadata.
5. The method of claim 2, wherein the SSD is configured to reduce power-on recovery time by: when the incremental data is loaded into the local dynamic random access memory from the DDR, the incremental data is loaded in groups, and each group of the incremental data comprises an incremental data L2P table.
6. The method of claim 1, wherein the SSD is configured to reduce power-on recovery time by: when the SSD reads the snapshots from the NAND, the snapshots are sequentially read from back to front according to the sequence of the snapshot generation.
7. The method of claim 6, wherein the SSD reduces power-on recovery time comprises: the header information records the kind of metadata and the number of incremental data saved.
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