CN112271137B - Passivation method based on high electron mobility transistor - Google Patents
Passivation method based on high electron mobility transistor Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 63
- 238000002161 passivation Methods 0.000 title claims abstract description 51
- 239000013078 crystal Substances 0.000 claims abstract description 20
- 230000005012 migration Effects 0.000 claims abstract description 17
- 238000013508 migration Methods 0.000 claims abstract description 17
- 125000004429 atom Chemical group 0.000 claims description 67
- 230000008569 process Effects 0.000 claims description 30
- 238000000137 annealing Methods 0.000 claims description 22
- 238000002347 injection Methods 0.000 claims description 9
- 239000007924 injection Substances 0.000 claims description 9
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 239000002245 particle Substances 0.000 claims description 6
- 229910052786 argon Inorganic materials 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 12
- 230000007547 defect Effects 0.000 abstract description 10
- 230000004043 responsiveness Effects 0.000 abstract description 7
- 230000005274 electronic transitions Effects 0.000 abstract description 5
- 238000002513 implantation Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 230000005669 field effect Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
- H01L21/26546—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds of electrically active species
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
- H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
Abstract
The invention discloses a passivation method based on a high electron mobility transistor, which can excite atoms of a crystal lattice on the surface of the high electron mobility transistor into free atoms by applying larger energy, wherein the free atoms can preferentially occupy and form a leakage channel with lower energy under free migration. The energy band structure of the leakage channel can be changed after the free atoms occupy the leakage channel, so that the energy required for electronic transition in part of the leakage channel is increased, and finally the effect of reducing leakage current and passivating the leakage channel is achieved. The free atoms can fill and eliminate defects in the high electron mobility transistor, so that various leakage channels in the high electron mobility transistor are passivated into the same leakage channel, the passivation effect on the high electron mobility transistor is improved, and the responsiveness of the high electron mobility transistor is improved.
Description
Technical Field
The invention relates to the technical field of transistors, in particular to a passivation method based on a high electron mobility transistor.
Background
HEMTs (High electron mobility transistor, high electron mobility transistors), also known as modulation doped field effect transistors, are one type of field effect transistor that use two materials with different energy gaps to form a heterojunction that provides a channel for carriers, rather than using doped semiconductors directly instead of junctions to form a conductive channel, as in metal oxide semiconductor field effect transistors. High electron mobility transistors can operate at extremely high frequencies and are therefore widely used in mobile phones, satellite televisions and radar.
Under a specific sealed environment, the high mobility field effect transistor can be used for realizing a small-volume, high-temperature-resistant and acid-base-resistant environment feedback device, and when the environment atmosphere is slightly changed, the current or voltage of the HEMT device is changed, so that the environment change under the sealed space is warned or other circuits are protected. As GaAs, gaN, inP and other materials are used in HEMT manufacture, various defect forms often exist in the materials at the same time, and certain leakage current exists under normal operation, and the leakage current influences the responsiveness of the HEMT device. A problem to be solved by those skilled in the art is how to improve the responsivity of the high electron mobility transistor.
Disclosure of Invention
The invention aims to provide a passivation method based on a high electron mobility transistor, which can effectively improve the responsivity of the high electron mobility transistor.
In order to solve the above technical problems, the present invention provides a passivation method based on a high electron mobility transistor, including:
placing a high electron mobility transistor within the passivation means;
applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through the passivation device so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated; the region to be passivated is provided with a plurality of leakage channels, the additional energy is larger than the migration energy of atoms in a crystal lattice of the region to be passivated, which are collided out of the crystal lattice, and the dose of free atoms is smaller than the dose of atoms in the region to be passivated, which is changed into an amorphous state.
Optionally, the magnitude of the additional energy is greater than 10 times the magnitude of the migration energy.
Optionally, the dose of free atoms is less than one tenth of the dose of the amorphous state of the region to be passivated.
Optionally, the applying, by the passivation device, additional energy of a preset magnitude to a region to be passivated of the high electron mobility transistor to generate free atoms that freely migrate to a leakage channel in the region to be passivated includes:
applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through a preset process so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated;
the preset process comprises any one of the following steps:
low energy particle injection, group III element injection, neutron injection.
Optionally, the additional energy is selected from the following range of values: 0.1MeV to 5MeV, inclusive.
Optionally, the dose size range is: 1X 10 9 cm 2 Up to 1X 10 15 cm 2 Including endpoint values.
Optionally, the applying, by the passivation device, additional energy of a preset magnitude to a region to be passivated of the high electron mobility transistor to generate free atoms that freely migrate to a leakage channel in the region to be passivated includes:
and applying additional energy with preset size to the to-be-passivated region of the high electron mobility transistor through a plasma annealing process so as to generate free atoms which freely migrate to a leakage channel in the to-be-passivated region.
Optionally, the annealing atmosphere of the plasma annealing process may be any one or any combination of the following:
hydrogen, nitrogen, argon.
Optionally, the range of the annealing temperature of the plasma annealing process is as follows: 350 ℃ to 550 ℃, inclusive.
The passivation method based on the high electron mobility transistor comprises the steps of placing the high electron mobility transistor in a passivation device; applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through a passivation device so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated; the region to be passivated is provided with a plurality of leakage channels, the additional energy is larger than the migration energy of atoms in a crystal lattice of the region to be passivated, which are collided and separated from the crystal lattice, and the dosage of free atoms is smaller than the dosage of the region to be passivated which is changed into an amorphous state. Atoms of the lattice of the surface of the high electron mobility transistor can be excited into free atoms by applying larger energy, and the free atoms preferentially occupy the leakage channels with lower energy under free migration. The energy band structure of the leakage channel can be changed after the free atoms occupy the leakage channel, so that the energy required for electronic transition in part of the leakage channel is increased, and finally the effect of reducing leakage current and passivating the leakage channel is achieved. The free atoms can fill and eliminate defects in the high electron mobility transistor, so that various leakage channels in the high electron mobility transistor are passivated into the same leakage channel, the passivation effect on the high electron mobility transistor is improved, and the responsiveness of the high electron mobility transistor is improved.
Drawings
For a clearer description of embodiments of the invention or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a passivation method based on a high electron mobility transistor according to an embodiment of the present invention;
fig. 2 is a flowchart of a passivation method based on a high electron mobility transistor according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide a passivation method based on a high electron mobility transistor. In the prior art, as materials such as GaAs, gaN, inP are used in the manufacture of the HEMT, various defect forms often exist in the materials at the same time to form various leakage channels, so that certain leakage current exists under normal operation, and the responsiveness of the HEMT device is affected by the leakage current.
The passivation method based on the high electron mobility transistor comprises the steps of placing the high electron mobility transistor in a passivation device; applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through a passivation device so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated; the region to be passivated is provided with a plurality of leakage channels, the additional energy is larger than the migration energy of atoms in a crystal lattice of the region to be passivated, which are collided and separated from the crystal lattice, and the dosage of free atoms is smaller than the dosage of the region to be passivated which is changed into an amorphous state. Atoms of the lattice of the surface of the high electron mobility transistor can be excited into free atoms by applying larger energy, and the free atoms preferentially occupy the leakage channels with lower energy under free migration. The energy band structure of the leakage channel can be changed after the free atoms occupy the leakage channel, so that the energy required for electronic transition in part of the leakage channel is increased, and finally the effect of reducing leakage current and passivating the leakage channel is achieved. The free atoms can fill and eliminate defects in the high electron mobility transistor, so that various leakage channels in the high electron mobility transistor are passivated into the same leakage channel, the passivation effect on the high electron mobility transistor is improved, and the responsiveness of the high electron mobility transistor is improved.
In order to better understand the aspects of the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a flowchart of a passivation method based on a high electron mobility transistor according to an embodiment of the present invention.
Referring to fig. 1, in an embodiment of the present invention, a passivation method based on a high electron mobility transistor includes:
s101: the high electron mobility transistor is disposed within a passivation device.
The specific structure of the high electron mobility transistor may refer to the prior art, and will not be described herein. The structure of the passivation means may also be referred to in the art, as long as it can apply additional energy of a predetermined amount to the region to be passivated of the high electron mobility transistor, and is not particularly limited herein.
S102: additional energy of a preset magnitude is applied to the region to be passivated of the high electron mobility transistor by the passivation means to generate free atoms free to migrate to the leakage path in the region to be passivated.
In the embodiment of the invention, the region to be passivated is provided with a plurality of leakage channels, the additional energy is larger than the migration energy of atoms in a crystal lattice of the region to be passivated, which are collided and separated from the crystal lattice, and the dose of free atoms is smaller than the dose of the region to be passivated which is changed into an amorphous state.
The leakage path corresponds to a defect in the high electron mobility transistor, and in the embodiment of the present invention, the region to be passivated of the high electron mobility transistor has various leakage paths, and the leakage paths are usually located inside the crystal. In this step, a certain additional energy is applied to the region to be passivated of the high electron mobility transistor by the passivation means to generate free atoms, and the free atoms can migrate to the leakage channel inside the region to be passivated of the high electron mobility transistor. Since the additional energy applied to the free atoms needs to be larger than the migration energy of atoms in the crystal lattice of the area to be passivated, that is, at the additional energy, some of the atoms in the crystal lattice of the area to be passivated are collided away from the original positions of the atoms to form free atoms and migrate into the high electron mobility transistor, and the free atoms and the defects in the high electron mobility transistor, that is, the leakage channels in the high electron mobility transistor are mutually coupled, so that the defects in the high electron mobility transistor, that is, the leakage channel types of the high electron mobility transistor are reduced or eliminated, and the response of the high electron mobility transistor is improved.
In the embodiment of the present invention, the dose of the free atoms needs to be smaller than the dose of the regions to be passivated to be changed into an amorphous state, that is, the passivation process does not destroy the device or change the basic performance of the device, and does not change the material type of the regions to be passivated in the high electron mobility transistor.
In particular, in embodiments of the present invention, the additional energy is typically required to be greater than 10 times the migration energy. That is, in the embodiment of the present invention, the additional energy applied to the region to be passivated needs to be much larger than the migration energy of atoms leaving the lattice in the lattice of the region to be passivated, so as to ensure that the leakage channel types in the high electron mobility transistor can be reduced during passivation.
In particular, in the embodiments of the present invention, the dose of the free atoms is generally required to be less than one tenth of the dose of the amorphous state of the region to be passivated, so as to ensure that the device is not destroyed or the basic performance of the device is not changed during passivation, and the material type of the region to be passivated in the high electron mobility transistor is not changed.
The passivation method based on the high electron mobility transistor provided by the embodiment of the invention comprises the steps of placing the high electron mobility transistor in a passivation device; applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through a passivation device so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated; the region to be passivated is provided with a plurality of leakage channels, the additional energy is larger than the migration energy of atoms in a crystal lattice of the region to be passivated, which are collided and separated from the crystal lattice, and the dosage of free atoms is smaller than the dosage of the region to be passivated which is changed into an amorphous state. Atoms of the lattice of the surface of the high electron mobility transistor can be excited into free atoms by applying larger energy, and the free atoms preferentially occupy the leakage channels with lower energy under free migration. The energy band structure of the leakage channel can be changed after the free atoms occupy the leakage channel, so that the energy required for electronic transition in part of the leakage channel is increased, and finally the effect of reducing leakage current and passivating the leakage channel is achieved. The free atoms can fill and eliminate defects in the high electron mobility transistor, so that various leakage channels in the high electron mobility transistor are passivated into the same leakage channel, the passivation effect on the high electron mobility transistor is improved, and the responsiveness of the high electron mobility transistor is improved.
The following embodiments of the invention will be described in detail with reference to the specific details of a passivation method for a high electron mobility transistor.
Referring to fig. 2, fig. 2 is a flowchart of a passivation method based on a high electron mobility transistor according to an embodiment of the present invention.
Referring to fig. 2, in an embodiment of the present invention, a passivation method based on a high electron mobility transistor includes:
s201: the high electron mobility transistor is disposed within a passivation device. S202: and applying additional energy with preset size to the to-be-passivated region of the high electron mobility transistor through a preset process so as to generate free atoms which freely migrate to the leakage channel in the to-be-passivated region.
In an embodiment of the present invention, the preset process includes any one of the following: low energy particle injection, group III element injection, neutron injection. That is, in the embodiment of the present invention, the application of the additional energy with the preset magnitude to the region to be passivated may be realized by a particle implantation process, specifically, one of a low-energy particle implantation, a group III element implantation, and a neutron implantation. The details of the low-energy particle implantation, group III element implantation, and neutron implantation may be referred to in the prior art, and will not be described herein.
Specifically, when the additional energy of the preset magnitude is applied through the implantation process in this step, the range of the additional energy magnitude is generally: 0.1MeV to 5MeV, inclusive. When the additional energy is in the interval, the additional energy applied to the area to be passivated can be ensured to be far larger than the migration energy of atoms in the crystal lattice of the area to be passivated, which is impacted out of the crystal lattice, so that the leakage channel type in the high electron mobility transistor can be reduced in the passivation process.
Specifically, when additional energy of a predetermined magnitude is applied by the implantation process in this step, the value range of the free atomic dose size is generally: 1X 10 9 cm 2 Up to 1X 10 15 cm 2 Including endpoint values. When the dose of free atoms is within the above range, it can be ensured that the dose of free atoms is far smaller than the dose of the regions to be passivated to be changed into an amorphous state, so as to ensure that the device is not destroyed or the basic performance of the device is not changed during the passivation process, and the high electron mobility crystal is not changedThe type of material in the region to be passivated in the body tube.
Specifically, the step may specifically be: additional energy of a preset magnitude is applied to a region to be passivated of the high electron mobility transistor through a plasma annealing process so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated.
That is, in the embodiment of the present invention, the plasma annealing process may be used to apply additional energy with a preset magnitude to passivate various leakage paths in the to-be-passivated region. The specific process content of the plasma annealing process can refer to the prior art, and will not be described herein.
Specifically, in the embodiment of the present invention, in order to ensure the performance of the plasma annealing process, the annealing atmosphere of the plasma annealing process may be any one or any combination of the following: hydrogen, nitrogen, argon. The annealing atmosphere of the component can have good passivation effect on the high electron mobility transistor, and effectively reduces the number of various leakage channels in the high electron mobility transistor. Meanwhile, in the embodiment of the invention, in order to ensure that a good passivation effect can be achieved on the high electron mobility transistor through a plasma annealing process, the range of the annealing temperature of the plasma annealing process is generally: 350 ℃ to 550 ℃, inclusive. I.e., the annealing temperature of the plasma annealing process may be exactly 350 c or 550 c, and any temperature therebetween.
According to the passivation method based on the high electron mobility transistor, provided by the embodiment of the invention, atoms of a crystal lattice on the surface of the high electron mobility transistor can be excited into free atoms by applying larger energy, and the free atoms can preferentially occupy and form a leakage channel with lower energy under free migration. The energy band structure of the leakage channel can be changed after the free atoms occupy the leakage channel, so that the energy required for electronic transition in part of the leakage channel is increased, and finally the effect of reducing leakage current and passivating the leakage channel is achieved. The free atoms can fill and eliminate defects in the high electron mobility transistor, so that various leakage channels in the high electron mobility transistor are passivated into the same leakage channel, the passivation effect on the high electron mobility transistor is improved, and the responsiveness of the high electron mobility transistor is improved.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The passivation method based on the high electron mobility transistor provided by the invention is described in detail above. The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.
Claims (9)
1. A passivation method based on a high electron mobility transistor, comprising:
placing a high electron mobility transistor within the passivation means;
applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through the passivation device so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated; the region to be passivated is provided with a plurality of leakage channels, the additional energy is larger than the migration energy of atoms in a crystal lattice of the region to be passivated, which are collided out of the crystal lattice, and the dose of free atoms is smaller than the dose of atoms in the region to be passivated, which is changed into an amorphous state.
2. The method of claim 1, wherein the additional energy is greater than 10 times the migration energy.
3. A method according to claim 2, characterized in that the dose of free atoms is less than one tenth of the dose of the amorphous state of the area to be passivated.
4. The method of claim 1, wherein applying additional energy of a preset amount to a region to be passivated of the high electron mobility transistor by the passivation device to generate free atoms free to migrate to a leakage path at the region to be passivated comprises:
applying additional energy with preset size to a region to be passivated of the high electron mobility transistor through a preset process so as to generate free atoms which freely migrate to a leakage channel in the region to be passivated;
the preset process comprises any one of the following steps:
low energy particle injection, group III element injection, neutron injection.
5. The method of claim 4, wherein the additional energy level is in the range of: 0.1MeV to 5MeV, inclusive.
6. The method of claim 5, wherein the dose size of the free atoms is in the range of: 1X 10 9 cm 2 Up to 1X 10 15 cm 2 Including endpoint values.
7. The method of claim 1, wherein applying additional energy of a preset amount to a region to be passivated of the high electron mobility transistor by the passivation device to generate free atoms free to migrate to a leakage path at the region to be passivated comprises:
and applying additional energy with preset size to the to-be-passivated region of the high electron mobility transistor through a plasma annealing process so as to generate free atoms which freely migrate to a leakage channel in the to-be-passivated region.
8. The method of claim 7, wherein the annealing atmosphere of the plasma annealing process is any one or any combination of the following:
hydrogen, nitrogen, argon.
9. The method of claim 8, wherein the plasma annealing process has an annealing temperature ranging from: 350 ℃ to 550 ℃, inclusive.
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| CN111509042A (en) * | 2020-04-30 | 2020-08-07 | 中国电子科技集团公司第五十五研究所 | MIS structure GaN high electron mobility transistor and preparation method thereof |
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