CN112269708A - Debugging information acquisition method and device, electronic equipment and storage medium - Google Patents

Debugging information acquisition method and device, electronic equipment and storage medium Download PDF

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Publication number
CN112269708A
CN112269708A CN202011525884.4A CN202011525884A CN112269708A CN 112269708 A CN112269708 A CN 112269708A CN 202011525884 A CN202011525884 A CN 202011525884A CN 112269708 A CN112269708 A CN 112269708A
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debugging
displayed
debugging information
information
queue
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CN202011525884.4A
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CN112269708B (en
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于永庆
周海
靳慧杰
金正雄
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Hubei Xinqing Technology Co ltd
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Hubei Xinqing Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing

Abstract

The application provides a debugging information acquisition method, a debugging information acquisition device, electronic equipment and a storage medium, wherein the debugging information acquisition method comprises the steps of firstly receiving debugging information to be displayed through a debugging queue, and generating a first enabling signal according to the debugging information to be displayed; then receiving a first enabling signal through a triggering part, and generating a triggering signal according to the first enabling signal; when the trigger signal is detected, obtaining debugging information to be displayed from a debugging queue and storing the debugging information to a cache component; and finally, loading debugging information to be displayed from the buffer component and displaying. This application just produces trigger signal through changing trigger condition, only when debugging the queue and receiving to show information, consequently need not frequently carry out the operation of acquireing of debugging information, has saved the resource, and can guarantee to both obtain to show debugging information after trigger signal production at every turn, can both acquire effective debugging information promptly at every turn for it is comparatively smooth and easy to show output, and then has improved research and development personnel's debugging efficiency.

Description

Debugging information acquisition method and device, electronic equipment and storage medium
Technical Field
The present application relates to the field of chip verification technologies, and in particular, to a method and an apparatus for obtaining debugging information, an electronic device, and a storage medium.
Background
The chip verification is carried out through the EMU platform, so that the simulation efficiency can be greatly improved, the chip is widely applied when the very large-scale chip design is verified, the relevant debugging information of the chip during debugging is output and displayed through the EMU platform, and the debugging efficiency of research personnel is directly influenced by the display speed of debugging signals. When obtaining the debugging signal at present, accomplish the capture of output debugging information as trigger condition through high frequency clock signal, however clock signal's pulse is too frequent, all will carry out the operation of obtaining of debugging signal when every pulse of clock signal produces, can cause very big time spending for the performance of catching effective debugging information descends, causes to show that output is not smooth and easy, and then influences research and development personnel's debugging efficiency.
Therefore, the existing chip debugging process has the technical problem of unsmooth debugging information output, and needs to be improved.
Disclosure of Invention
The embodiment of the application provides a debugging information acquisition method and device, electronic equipment and a storage medium, which are used for relieving the technical problem of unsmooth debugging information output in the existing chip debugging process.
In order to solve the above technical problem, an embodiment of the present application provides the following technical solutions:
the application provides a debugging information acquisition method, which comprises the following steps:
receiving debugging information to be displayed through a debugging queue, and generating a first enabling signal according to the debugging information to be displayed;
receiving the first enabling signal through a triggering component, and generating a triggering signal according to the first enabling signal;
when the trigger signal is detected, acquiring the debugging information to be displayed from the debugging queue and storing the debugging information to a cache component;
and loading and displaying the debugging information to be displayed from the cache component.
Simultaneously, this application still provides a debugging information acquisition device, includes:
the device comprises a first receiving module, a second receiving module and a debugging module, wherein the first receiving module is used for receiving debugging information to be displayed through a debugging queue and generating a first enabling signal according to the debugging information to be displayed;
the second receiving module is used for receiving the first enabling signal through a triggering component and generating a triggering signal according to the first enabling signal;
the acquisition module is used for acquiring the debugging information to be displayed from the debugging queue and storing the debugging information to be displayed in a cache component when the trigger signal is detected;
and the loading module is used for loading and displaying the debugging information to be displayed from the cache component.
In one embodiment, the second receiving module is configured to generate a pulse signal according to the enable signal.
In one embodiment, the obtaining module is configured to obtain the debugging information to be displayed from the debugging queue when a rising edge of the pulse signal is detected.
In one embodiment, the first receiving module is configured to create a debug queue, and receive a second enable signal through the debug queue; and receiving debugging information to be displayed transmitted by a target interface through the debugging queue.
In an embodiment, the debugging information obtaining apparatus further includes a creating module, where the creating module operates before the first receiving module, and the creating module is configured to create a cache component through a specification and a description language, where the cache component carries a target interface identifier.
In an embodiment, the obtaining module is further configured to obtain the debugging information to be displayed from the debugging queue when the trigger signal is detected; and storing the debugging information to be displayed into the cache component according to the target interface identifier.
In one embodiment, the loading module is configured to load the debugging information to be displayed from the cache component through a specification and description language; and displaying the debugging information to be displayed through display equipment.
The application also provides an electronic device comprising a memory and a processor; the memory stores an application program, and the processor is configured to run the application program in the memory to perform any one of the operations in the debugging information obtaining method.
The present application also provides a computer-readable storage medium, on which a computer program is stored, the computer program being executed by a processor to implement the debugging information obtaining method of any one of the above.
Has the advantages that: the application provides a debugging information acquisition method, a debugging information acquisition device, electronic equipment and a storage medium, wherein the debugging information acquisition method comprises the steps of firstly receiving debugging information to be displayed through a debugging queue, and generating a first enabling signal according to the debugging information to be displayed; then receiving the first enabling signal through a triggering component, and generating a triggering signal according to the first enabling signal; when the trigger signal is detected, acquiring the debugging information to be displayed from the debugging queue and storing the debugging information to a cache component; and finally, loading and displaying the debugging information to be displayed from the cache component. This application receives at the debugging queue and produces first enabling signal after waiting to show the debugging information, make trigger part produce trigger signal, then acquire the debugging information of waiting to show from the debugging queue again, through change trigger condition, only just produce trigger signal when the debugging queue receives the information of waiting to show, consequently, need not frequently carry out the operation of acquireing of debugging information, the resource has been saved, and can guarantee to both obtain the debugging information of waiting to show after trigger signal produces at every turn, can both acquire effective debugging information at every turn promptly, make to show that output is comparatively smooth and easy, and then the debugging efficiency of research personnel has been improved.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a scene schematic diagram of a video display system according to an embodiment of the present application.
Fig. 2 is a schematic flowchart of a debugging information obtaining method according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a hardware simulation platform and a display device in the debugging information obtaining method according to the embodiment of the present application.
Fig. 4 is a schematic diagram of a trigger signal and debug information in a debug information obtaining method provided in an embodiment of the present application.
Fig. 5 is a schematic diagram illustrating a comparison between trigger signals in a debugging information obtaining method provided in the prior art and the embodiment of the present application.
Fig. 6 is a schematic structural diagram of a debugging information obtaining apparatus according to an embodiment of the present application.
Fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," "third," "fourth," and the like (if any) in this application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus. .
Referring to fig. 1, fig. 1 is a schematic view of a scenario of a debugging information obtaining system according to an embodiment of the present application, where an application scenario includes a hardware simulation platform 10 and a display device 20; wherein:
the hardware simulation platform 10 is an Emulator platform, also called an EMU platform, and can be regarded as a hardware of a software simulator, is a simulation platform for realizing the verification of functions and performance of a chip by simulating the chip environment through software operation, and can be used for very large-scale chip verification, wherein the chip can be a single chip only comprising an integrated circuit, or an integrated chip which takes the system function of an electronic system as a starting point, and closely combines the design of a system model, a processing mechanism, a chip structure, each layer of circuits and devices to complete the functions of the whole system on the single chip.
The display device 20 includes, but is not limited to, a tablet Computer, a notebook Computer, a Personal Computer (PC), a micro-processing box, or other devices capable of displaying, etc.
The hardware simulation platform 10 and the display device 20 perform data and signal transmission through an interface to realize data interaction between the two, wherein:
the hardware simulation platform 10 is provided with a processor, a debugging queue, a triggering component and a buffer component, etc., after downloading software codes and test files related to a chip to the hardware simulation platform 10, the hardware simulation platform 10 simulates the operation of the chip according to the software codes, simulates the output of the chip under the same conditions according to various conditions in the test files, and generates debugging information to be displayed in the processor according to the output result, at this time, the debugging information to be displayed is received through the debugging queue, a first enabling signal is generated according to the debugging information to be displayed, then the first enabling signal is received through the triggering component, a triggering signal is generated according to the first enabling signal, when the triggering signal is detected, the debugging information to be displayed is obtained from the debugging queue and stored in the buffer component, and finally the debugging information to be displayed is loaded from the buffer component and displayed in the display device 20, whether the functions of the chip are expected or not is judged by analyzing the debugging information in the display device 20.
It should be noted that the system scenario diagram shown in fig. 1 is only an example, the service and scenario described in the embodiment of the present application are for more clearly illustrating the technical solution of the embodiment of the present application, and do not form a limitation on the technical solution provided in the embodiment of the present application, and as a person having ordinary skill in the art knows, with the evolution of the system and the occurrence of a new service scenario, the technical solution provided in the embodiment of the present application is also applicable to similar technical problems. The following are detailed below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
Referring to fig. 2, fig. 2 is a schematic flowchart of a method for obtaining debugging information according to an embodiment of the present application, where the method includes:
s201: and receiving debugging information to be displayed through the debugging queue, and generating a first enabling signal according to the debugging information to be displayed.
With the continuous development of the process technology and the application field, on one hand, the complexity of chip design is continuously improved, and on the other hand, the requirements on the development cycle of the chip are more and more strict, which requires that various verification operations on the chip be performed as early and efficient as possible to ensure that the actual functional characteristics of the chip design are consistent with the functional characteristics defined in the design specification. In very large-scale chip verification, an EMU platform is often used for chip verification, after software codes and test files related to a chip are downloaded to the EMU platform, the EMU platform simulates the operation of the chip according to the software codes, the output of the chip under the same condition is simulated according to each condition in the test files, the test files can comprise a plurality of debugging commands, and in the actual chip debugging process, a required debugging command can be selected from the test files according to a debugging command selection signal to debug the chip. After debugging, debugging information is generated in a processor of the EMU platform according to an output result, then the debugging information is displayed in display equipment, whether each function of the chip meets expectations is judged by analyzing the debugging information in the display equipment, for example, after simulation is performed according to software codes and test files, the output result is theoretically A, and the actually output debugging information is A, which indicates that the actual debugging information meets expectations.
The EMU platform can be used for carrying out hardware simulation on the vehicle-mounted system-level chip, and the vehicle-mounted system-level chip is installed on various vehicles and used for being connected with other electronic equipment and processing interactive signaling between the electronic equipment and the other electronic equipment so as to assist the vehicles to realize various functions such as video display, audio playing, navigation and backing. Of course, the EMU platform may also be used for hardware simulation of other types of chips, and the application is not limited thereto.
As shown in fig. 3, the EMU platform, i.e., the hardware emulation platform 10, includes a processor 31, a system bus 32, and a peripheral attachment system 33, and the processor 31 may be at least one of Cortex a76, Cortex a55, Cortex M4S, and Cortex M52. The peripheral accessory system 33 includes a plurality of low-speed interfaces for communicating with the outside world, such as Universal Asynchronous Receiver/Transmitter (UART), General Purpose Input/Output (GPIO), I2C (Inter-Integrated Circuit) bus, etc.
After the processor 31 generates the debug information, the debug information is transmitted to the peripheral attached system 33 through the system bus 32, captured by the target interface 331 of the peripheral attached system 33, and stored in a Random Access Memory (RAM). A debugging queue and a buffer component 332 are arranged in the RAM, the debugging queue is a First-in First-out (FIFO) queue, the buffer component 332 is a log file, and each operation performed by the system in the process of acquiring debugging information and each obtained information will leave a record in the log file. When the debugging information to be displayed enters the RAM, the debugging information enters the debugging queue first, and after the debugging queue receives the debugging information to be displayed, the peripheral attached system 33 generates a first enable signal. The RAM may be a Static Random Access Memory (SRAM) or a Dynamic Random Access Memory (DRAM).
In one embodiment, the step of receiving the debugging information to be displayed through the debugging queue includes: establishing a debugging queue, and receiving a second enabling signal through the debugging queue; and receiving debugging information to be displayed transmitted by the target interface through the debugging queue. Firstly, a debugging queue needs to be created in the RAM, after the debugging queue receives a second enable signal generated in the peripheral accessory system 33, an access mode of the debugging queue is enabled, that is, external data can have an authority to enter the debugging queue, then debugging information to be displayed generated in the processor 31 is transmitted to the target interface 331 through the system bus 32, then is transmitted to the debugging queue through the target interface 331, finally the debugging information to be displayed enters the debugging queue, and after entering, the peripheral accessory system 33 generates a first enable signal. In the present application, the target interface 331 is a UART serial port, which is a mature asynchronous serial data transceiver transmitter, and here, the received debugging information to be displayed is sent to the debugging queue in bytes.
In one embodiment, before the step of receiving the debugging information to be displayed through the debugging queue, the method further includes: and creating a cache component through the specification and the description language, wherein the cache component carries the target interface identifier. The cache component 332 is created through Specification and Description Language (SDL), which is fast and convenient when creating the cache component 332, and the creation of the cache component 332 can be completed only by a small amount of writing work. The buffer component 332 carries the target interface identifier of the target interface 331, and since the target interface 331 is a UART serial port in the present application, the identifier in the buffer component 332 is also a UART.
S202: the first enabling signal is received through the triggering component, and the triggering signal is generated according to the first enabling signal.
The peripheral accessory system 33 is further provided with a trigger unit (not shown), which is denoted by TX _ POP, and is configured to generate a trigger signal according to the first enable signal after receiving the first enable signal, specifically, the trigger signal may be a pulse signal, the signal delivered by the trigger unit maintains a low level when the trigger signal is not generated, a high level pulse is generated after receiving the first enable signal, and then the trigger unit continues to maintain the low level. Each time the trigger unit receives the first enable signal, it generates a trigger signal indicating that the peripheral accessory system 33 has a TX _ FIFO _ POP request, i.e. a request to POP data from the transmit queue.
It should be noted that the trigger signal generated in the above embodiments is a pulse signal only, and the application is not limited thereto, and any device or component that can generate a trigger signal after receiving an enable signal and generate any trigger signal that can be detected fall within the scope of the application.
S203: and when the trigger signal is detected, acquiring debugging information to be displayed from the debugging queue and storing the debugging information to the cache component.
The trigger component generates a trigger signal indicating that the debug information to be displayed in the peripheral accessory system 33 arrives and needs to be acquired in time. At this time, when detecting the trigger signal sent by the trigger component, the peripheral accessory system 33 acquires the debug information to be displayed from the debug queue, and then stores the debug information to be displayed in the previously created buffer component 332. The debugging queue is a first-in first-out queue, the head of the first-in first-out queue is represented by TX _ POP _ DATA, namely a POP DATA sending area, and when the trigger signal prompts that the peripheral accessory system 33 has a TX _ FIFO _ POP request, the debugging queue sends out the debugging information to be displayed in the TX _ POP _ DATA.
Specifically, taking the trigger signal as the pulse signal as an example, when the rising edge of the pulse signal is detected, the to-be-displayed debugging information is acquired from the debugging queue, and after the acquisition, the to-be-displayed debugging information is stored in the cache component 332 according to the target interface identifier. The peripheral accessory system 33 has various types of interfaces, and the information received by different interfaces is different, and since the previously created cache component carries the target interface identifier, after the debugging information to be displayed is acquired in this step, the debugging information to be displayed is directly stored into the corresponding cache component 332 according to the target interface identifier, that is, the target interface identifier is used to indicate the storage address of the debugging information to be displayed.
S204: and loading and displaying debugging information to be displayed from the cache component.
In this step, the debugging information to be displayed is loaded from the cache component 332 by Specification and Description Language (SDL), and then the debugging information to be displayed is displayed by the display device 20. The SDL language is fast and convenient to load debugging information to be displayed, and can be completed only by a small amount of writing work. Specifically, the display device 20 is turned on by the XTERM terminal simulator of the special tool to display, and the display device 20 includes but is not limited to a tablet Computer, a notebook Computer, a Personal Computer (PC), a microprocessor box, or other devices capable of displaying, and the like.
As shown in fig. 4, a trigger signal generated by the method for acquiring debug information forms a periodic pulse signal, and when a pulse is generated, the debug information to be displayed is acquired from the debug queue once, and as shown in fig. 3, the debug information to be displayed acquired from the debug queue is analyzed and divided, and according to different contents of test files, any debug information can be output after the trigger signal is generated, that is, the method for acquiring debug information of the present application has a wide application range.
As shown in fig. 5, in the prior art, a current trigger signal is a high-frequency pulse signal, a current stop signal is a pulse signal, the two signals cooperate with each other to obtain debugging information to be displayed, an operation of obtaining the debugging information to be displayed is performed once on a rising edge of each pulse signal of the current trigger signal, the obtaining is stopped when a rising edge of a pulse of the current stop signal arrives, and after a falling edge of the pulse of the current stop signal arrives, the obtaining operation is continued according to a rising edge of a next pulse signal in the current trigger signal. In addition, in the prior art, it is also necessary to set a current stop signal and a current trigger signal to be matched with each other to interrupt the acquisition operation, thereby preventing the system from being in a high-frequency acquisition state all the time. In the application, the frequency of the trigger signal is greatly reduced relative to the frequency of the current trigger signal, so that the frequency of the implementation obtaining operation is also greatly reduced, and the trigger signal is generated only after the trigger signal enters the debugging information to be displayed in the debugging queue, so that the debugging information to be displayed can be obtained by obtaining operation every time, and the condition of resource waste does not exist. In addition, the debugging information can be acquired after the trigger signal is generated every time, and the frequency of the acquisition operation is low, so that a stop signal is not required to be set to interrupt the acquisition operation, a signal is reduced compared with the prior art, and resources are further saved.
Through the analysis, the debugging information acquisition method generates a first enabling signal after the debugging queue receives the debugging information to be displayed, so that the trigger component generates the trigger signal, then the debugging information to be displayed is acquired from the debugging queue, because the EMU platform is a low-performance simulation platform, the performance of data acquisition can be influenced as to the setting quality of the trigger condition of the signal acquisition, the triggering signal is generated only when the debugging queue receives the information to be displayed through changing the trigger condition, therefore, the acquisition operation of the debugging information is not required to be frequently carried out, resources are saved, and the debugging information to be displayed can be acquired after the trigger signal is generated every time, namely, effective debugging information can be acquired every time, the display output is smooth, and the debugging efficiency of research personnel is improved.
In the above embodiments, the RAM is disposed in the peripheral accessory system 33 as an example, but the present application is not limited thereto, and the same technical effect can be achieved by configuring the UART serial port with the RAM of the internal system.
On the basis of the method in the foregoing embodiment, this embodiment will be further described from the perspective of a debugging information obtaining apparatus, please refer to fig. 6, where fig. 6 specifically describes the debugging information obtaining apparatus provided in this embodiment, and the apparatus may include:
the first receiving module 110 is configured to receive debugging information to be displayed through a debugging queue, and generate a first enable signal according to the debugging information to be displayed;
a second receiving module 120, configured to receive the first enable signal through a trigger component, and generate a trigger signal according to the first enable signal;
an obtaining module 130, configured to obtain the to-be-displayed debugging information from the debugging queue when the trigger signal is detected, and store the to-be-displayed debugging information in a cache component;
and the loading module 140 is configured to load and display the to-be-displayed debugging information from the cache component.
In one embodiment, the second receiving module 120 is configured to generate a pulse signal according to the enable signal.
In one embodiment, the obtaining module 130 is configured to obtain the debugging information to be displayed from the debugging queue when a rising edge of the pulse signal is detected.
In one embodiment, the first receiving module 110 is configured to create a debug queue, and receive the second enable signal through the debug queue; and receiving debugging information to be displayed transmitted by a target interface through the debugging queue.
In an embodiment, the debugging information obtaining apparatus further includes a creating module, where the creating module operates before the first receiving module 110, and the creating module is configured to create a cache component through a specification and a description language, where the cache component carries the target interface identifier.
In an embodiment, the obtaining module 130 is further configured to obtain the debugging information to be displayed from the debugging queue when the trigger signal is detected; and storing the debugging information to be displayed into the cache component according to the target interface identifier.
In one embodiment, the loading module 140 is configured to load the debugging information to be displayed from the cache component through a specification and description language; and displaying the debugging information to be displayed through display equipment.
Different from the prior art, the debugging information acquisition device provided by the application receives debugging information to be displayed through the debugging queue, and generates a first enabling signal according to the debugging information to be displayed; then receiving a first enabling signal through a triggering part, and generating a triggering signal according to the first enabling signal; when the trigger signal is detected, obtaining debugging information to be displayed from a debugging queue and storing the debugging information to a cache component; and finally, loading debugging information to be displayed from the buffer component and displaying. This application receives at the debugging queue and produces first enabling signal after waiting to show the debugging information, make trigger part produce trigger signal, then acquire the debugging information of waiting to show from the debugging queue again, through change trigger condition, only just produce trigger signal when the debugging queue receives the information of waiting to show, consequently, need not frequently carry out the operation of acquireing of debugging information, the resource has been saved, and can guarantee to both obtain the debugging information of waiting to show after trigger signal produces at every turn, can both acquire effective debugging information at every turn promptly, make to show that output is comparatively smooth and easy, and then the debugging efficiency of research personnel has been improved.
Accordingly, an electronic device may include, as shown in fig. 7, a Radio Frequency (RF) circuit 701, a memory 702 including one or more computer-readable storage media, an input unit 703, a display unit 704, a sensor 705, an audio circuit 706, a WiFi module 707, a processor 708 including one or more processing cores, and a power supply 709. Those skilled in the art will appreciate that the electronic device configuration shown in fig. 7 does not constitute a limitation of the electronic device and may include more or fewer components than shown, or some components may be combined, or a different arrangement of components. Wherein:
the RF circuit 701 may be used for receiving and transmitting signals during a message transmission or communication process, and in particular, for receiving downlink information of a base station and then sending the received downlink information to the one or more processors 708 for processing; in addition, data relating to uplink is transmitted to the base station. The memory 702 may be used to store software programs and modules, and the processor 708 executes various functional applications and data processing by operating the software programs and modules stored in the memory 702. The input unit 703 may be used to receive input numeric or character information and generate keyboard, mouse, joystick, optical or trackball signal inputs related to user settings and function control.
The display unit 704 may be used to display information input by or provided to the user and various graphical user interfaces of the server, which may be made up of graphics, text, icons, video, and any combination thereof.
The electronic device may also include at least one sensor 705, such as a light sensor, motion sensor, and other sensors. The audio circuitry 706 includes speakers that can provide an audio interface between the user and the electronic device.
WiFi belongs to short-range wireless transmission technology, and the electronic device can help the user send and receive e-mail, browse web pages, access streaming media, etc. through the WiFi module 707, which provides wireless broadband internet access for the user. Although fig. 7 shows the WiFi module 707, it is understood that it does not belong to the essential constitution of the electronic device, and may be omitted entirely as needed within the scope of not changing the essence of the application.
The processor 708 is a control center of the electronic device, connects various parts of the entire mobile phone using various interfaces and lines, and performs various functions of the electronic device and processes data by running or executing software programs and/or modules stored in the memory 702 and calling data stored in the memory 702, thereby performing overall monitoring of the mobile phone.
The electronic device also includes a power source 709 (e.g., a battery) for supplying power to various components, which may preferably be logically coupled to the processor 708 via a power management system, such that functions of managing charging, discharging, and power consumption may be performed via the power management system.
Although not shown, the electronic device may further include a camera, a bluetooth module, and the like, which are not described in detail herein. Specifically, in this embodiment, the processor 708 in the server loads the executable file corresponding to the process of one or more application programs into the memory 702 according to the following instructions, and the processor 708 runs the application programs stored in the memory 702, so as to implement the following functions:
receiving debugging information to be displayed through a debugging queue, and generating a first enabling signal according to the debugging information to be displayed; receiving a first enabling signal through a triggering part, and generating a triggering signal according to the first enabling signal; when the trigger signal is detected, obtaining debugging information to be displayed from a debugging queue and storing the debugging information to a cache component; and loading and displaying debugging information to be displayed from the cache component.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and parts that are not described in detail in a certain embodiment may refer to the above detailed description, and are not described herein again.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by associated hardware controlled by the instructions, which may be stored in a computer readable storage medium and loaded and executed by a processor.
To this end, an embodiment of the present application provides a computer-readable storage medium, in which a plurality of instructions are stored, and the instructions can be loaded by a processor to implement the following functions:
receiving debugging information to be displayed through a debugging queue, and generating a first enabling signal according to the debugging information to be displayed; receiving a first enabling signal through a triggering part, and generating a triggering signal according to the first enabling signal; when the trigger signal is detected, obtaining debugging information to be displayed from a debugging queue and storing the debugging information to a cache component; and loading and displaying debugging information to be displayed from the cache component.
The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
Wherein the computer-readable storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
Since the instructions stored in the computer-readable storage medium can execute the steps in any method provided in the embodiments of the present application, the beneficial effects that can be achieved by any method provided in the embodiments of the present application can be achieved, for details, see the foregoing embodiments, and are not described herein again.
The method, the apparatus, the electronic device, and the storage medium for acquiring the debugging information provided by the embodiments of the present application are described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the present application, and the description of the embodiments is only used to help understand the technical scheme and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims (10)

1. A debugging information acquisition method is characterized by comprising the following steps:
receiving debugging information to be displayed through a debugging queue, and generating a first enabling signal according to the debugging information to be displayed;
receiving the first enabling signal through a triggering component, and generating a triggering signal according to the first enabling signal;
when the trigger signal is detected, acquiring the debugging information to be displayed from the debugging queue and storing the debugging information to a cache component;
and loading and displaying the debugging information to be displayed from the cache component.
2. The debug information acquisition method of claim 1, wherein said step of generating a trigger signal in accordance with said enable signal comprises:
and generating a pulse signal according to the enable signal.
3. The method according to claim 2, wherein the step of acquiring the debugging information to be displayed from the debugging queue when the trigger signal is detected includes:
and when the rising edge of the pulse signal is detected, acquiring the debugging information to be displayed from the debugging queue.
4. The method for obtaining debugging information according to claim 1, wherein the step of receiving the debugging information to be displayed via the debugging queue comprises:
creating a debugging queue, and receiving a second enabling signal through the debugging queue;
and receiving debugging information to be displayed transmitted by a target interface through the debugging queue.
5. The method according to claim 4, wherein before the step of receiving the debug information to be displayed via the debug queue, the method further comprises:
and creating a cache component through a specification and a description language, wherein the cache component carries a target interface identifier.
6. The method according to claim 5, wherein the step of acquiring the to-be-displayed debug information from the debug queue and storing the to-be-displayed debug information in the cache component when the trigger signal is detected includes:
when the trigger signal is detected, acquiring the debugging information to be displayed from the debugging queue;
and storing the debugging information to be displayed into the cache component according to the target interface identifier.
7. The method according to claim 1, wherein the step of loading and displaying the debug information to be displayed from the cache component includes:
loading the debugging information to be displayed from the cache component through a specification and description language;
and displaying the debugging information to be displayed through display equipment.
8. A debug information acquisition apparatus, comprising:
the device comprises a first receiving module, a second receiving module and a debugging module, wherein the first receiving module is used for receiving debugging information to be displayed through a debugging queue and generating a first enabling signal according to the debugging information to be displayed;
the second receiving module is used for receiving the first enabling signal through a triggering component and generating a triggering signal according to the first enabling signal;
the acquisition module is used for acquiring the debugging information to be displayed from the debugging queue and storing the debugging information to be displayed in a cache component when the trigger signal is detected;
and the loading module is used for loading and displaying the debugging information to be displayed from the cache component.
9. An electronic device comprising a memory and a processor; the memory stores an application program, and the processor is configured to execute the application program in the memory to perform the operations of the debugging information obtaining method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that a computer program is stored thereon, the computer program being executed by a processor to implement the debugging information obtaining method of any one of claims 1 to 7.
CN202011525884.4A 2020-12-22 2020-12-22 Debugging information acquisition method and device, electronic equipment and storage medium Active CN112269708B (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010044929A1 (en) * 2000-05-18 2001-11-22 Toshihiro Tsurugasaki Multi-process display method in debugger system
CN101770420A (en) * 2008-12-30 2010-07-07 上海摩波彼克半导体有限公司 System on chip (SOC) debugging structure and method for realizing output of debugging information
CN103226506A (en) * 2013-04-28 2013-07-31 杭州士兰微电子股份有限公司 Chip-embedded USB to JTAG debugging device and debugging method
US20130198566A1 (en) * 2012-01-27 2013-08-01 Lsi Corporation Method and Apparatus for Debugging System-on-Chip Devices
CN103257916A (en) * 2012-02-15 2013-08-21 深圳市金蝶友商电子商务服务有限公司 Method and system for displaying debugging information
US20130326282A1 (en) * 2004-09-14 2013-12-05 Synopsys, Inc. Debug in a multicore architecture
CN110795354A (en) * 2019-10-30 2020-02-14 北京小米移动软件有限公司 Information processing method, device and storage medium
CN111124789A (en) * 2019-11-19 2020-05-08 博流智能科技(南京)有限公司 Chip simulation debugging system and debugging method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010044929A1 (en) * 2000-05-18 2001-11-22 Toshihiro Tsurugasaki Multi-process display method in debugger system
US20130326282A1 (en) * 2004-09-14 2013-12-05 Synopsys, Inc. Debug in a multicore architecture
CN101770420A (en) * 2008-12-30 2010-07-07 上海摩波彼克半导体有限公司 System on chip (SOC) debugging structure and method for realizing output of debugging information
US20130198566A1 (en) * 2012-01-27 2013-08-01 Lsi Corporation Method and Apparatus for Debugging System-on-Chip Devices
CN103257916A (en) * 2012-02-15 2013-08-21 深圳市金蝶友商电子商务服务有限公司 Method and system for displaying debugging information
CN103226506A (en) * 2013-04-28 2013-07-31 杭州士兰微电子股份有限公司 Chip-embedded USB to JTAG debugging device and debugging method
CN110795354A (en) * 2019-10-30 2020-02-14 北京小米移动软件有限公司 Information processing method, device and storage medium
CN111124789A (en) * 2019-11-19 2020-05-08 博流智能科技(南京)有限公司 Chip simulation debugging system and debugging method

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