CN112269649A - Method, device and system for realizing asynchronous execution of host task - Google Patents
Method, device and system for realizing asynchronous execution of host task Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
- G06F9/4856—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
Abstract
The application discloses a method, a device and a system for realizing asynchronous execution of host tasks. Wherein, the method comprises the following steps: storing tasks to be executed by a host computer to a cache region of a nonvolatile storage device connected with the host computer; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter. The method and the device solve the technical problem that in the prior art, only the data of the host end is stored in the nonvolatile storage device, but the execution of the command is initiated and processed by the host end, so that the load of the host end is heavier.
Description
Technical Field
The present application relates to the field of storage devices, and in particular, to a method, an apparatus, and a system for implementing asynchronous execution of host tasks.
Background
Cmb (controller Memory buffer) is a technology proposed by NVMe 1.2, and the main purpose is: the host can store the relevant data into a buffer (cache area) at the NVMe Controller end, thereby reducing the interaction overhead between the NVMe Controller and the host end.
Fig. 1 is a schematic diagram of interaction between a host and a nonvolatile storage device, as shown in fig. 1, in the current technical solution, a host generally places a subscription Queue/Completion Queue/PRP SGL List in a cache region (CMB) of the nonvolatile storage device, and also supports placing read and write data in the CMB.
In the current technical solution, only the data storage characteristic of the Controller Memory Buffer is utilized to store the data of the host end to the Controller end, but the execution of the command is initiated and processed by the host end. Thus, the load on the host side is still relatively heavy.
Aiming at the problem that in the prior art, only data at a host end is stored in a nonvolatile storage device, but the execution of a command is initiated and processed by the host end, so that the load of the host end is heavier, an effective solution is not provided at present.
Disclosure of Invention
The embodiment of the application provides a method, a device and a system for realizing asynchronous execution of host tasks, so as to solve at least the technical problem that in the prior art, only data at a host end is stored in a nonvolatile storage device, but command execution is initiated and processed by the host end, so that the load at the host end is heavy.
According to an aspect of the embodiments of the present application, there is provided a method for implementing asynchronous execution of host tasks, including: storing tasks to be executed by a host computer to a cache region of a nonvolatile storage device connected with the host computer; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter.
Optionally, the storing the task that the host needs to execute to a cache area of a nonvolatile storage device connected to the host includes: reading a first protocol register of the nonvolatile storage device to obtain an address of a cache region; reading a second protocol register of the nonvolatile storage device to obtain the size of a cache region; and writing the task to be executed into the address of the cache area according to the size of the cache area.
Optionally, the execution result is generated by: and after receiving the execution parameters, the processor of the nonvolatile storage device executes the tasks in sequence according to the current resource use condition of the processor and the priority of the tasks to obtain an execution result.
Optionally, the method further includes: and sending a query instruction to the nonvolatile storage device, wherein the query instruction is used for querying the resource state of a processor of the nonvolatile storage device, and the resource state is written into a state register of the nonvolatile storage device when the processor executes a task.
Optionally, after obtaining the execution result of the task from the nonvolatile storage device, the method further includes: and sending a third instruction to the processor of the nonvolatile storage device, wherein the third instruction is used for instructing the processor of the nonvolatile storage device to release all resources.
According to another aspect of the embodiments of the present application, there is provided another method for implementing asynchronous execution of host tasks, where the method is applied to a nonvolatile storage device, where the volatile storage device includes at least one processor, and the method includes: the processor acquires execution parameters from the instructions sent by the host, wherein the execution parameters are parameters required by executing tasks required to be executed by the host, and the tasks are pre-stored in a cache region of a nonvolatile storage device connected with the host by the host; sequentially executing the tasks in the cache region based on the execution parameters to generate an execution result; and sending the execution result to the host.
According to another aspect of the embodiments of the present application, there is also provided a system for implementing asynchronous execution of host tasks, including: the system comprises a host and nonvolatile storage equipment, wherein the host is used for storing tasks required to be executed by the host to a cache region of the nonvolatile storage equipment connected with the host; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by calling the task in the cache region by a processor of the nonvolatile storage device and executing the task based on the execution parameter; and the nonvolatile storage equipment is connected with the host and used for executing the tasks in sequence according to the current resource use condition of the processor and the priority of the tasks after receiving the execution parameters to obtain an execution result.
According to another aspect of the embodiments of the present application, there is also provided an apparatus for implementing asynchronous execution of a host task, including: the storage module is used for storing tasks to be executed by the host computer to a cache region of the nonvolatile storage equipment connected with the host computer; the first sending module is used for sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises execution parameters required by task execution; the second sending module is used for sending a second instruction to the processor of the nonvolatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter.
According to still another aspect of the embodiments of the present application, there is provided a non-volatile storage medium, where the non-volatile storage medium includes a stored program, and the device in which the non-volatile storage medium is located is controlled to execute the above method for implementing asynchronous execution of host tasks when the program is running.
According to yet another aspect of the embodiments of the present application, there is further provided a processor configured to execute a program stored in a memory, where the program executes the above method for implementing asynchronous execution of host tasks.
In the embodiment of the application, the tasks required to be executed by the host are stored in a cache region of a nonvolatile storage device connected with the host; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is that a processor of the nonvolatile storage device calls the task in the cache region, and the task at the host end is migrated to the nonvolatile storage device end for processing based on a mode obtained by executing the task by the execution parameter, and meanwhile, an adaptive method for managing the host task is configured on the nonvolatile storage device, so that the nonvolatile storage device automatically manages and executes the tasks, thereby achieving the technical effect of greatly reducing the load at the host end, and further solving the technical problem that in the prior art, only the data at the host end is stored in the nonvolatile storage device, but the execution of the command is initiated and processed by the host end, so that the load at the host end is heavier.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
FIG. 1 is a schematic diagram of a host and nonvolatile storage device interaction;
FIG. 2 is a schematic diagram of a host and non-volatile storage device interaction according to an embodiment of the present application;
FIG. 3 is a flow chart of a method for asynchronous execution of host tasks according to an embodiment of the present application;
FIG. 4 is a schematic diagram of an implementation of host task storage according to an embodiment of the present application;
FIG. 5 is a schematic diagram of one implementation of managing scheduling and execution of host tasks according to an embodiment of the application;
FIG. 6 is a flow chart of another method for asynchronous execution of host tasks according to an embodiment of the present application;
FIG. 7 is a block diagram of a system for implementing asynchronous execution of host tasks according to an embodiment of the present application;
fig. 8 is a block diagram of an apparatus for implementing asynchronous execution of host tasks according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 2 is a schematic diagram of interaction between a host and a nonvolatile memory device according to an embodiment of the present application, and as shown in fig. 2, in practice, from the current NVMe Controller chip, there exists a multi-core CPU with powerful computing capability at the Controller end. The invention not only utilizes CMB to store data of the host end, but also fully utilizes the multi-core CPUs on the Controller to transfer tasks of the host end to the Controller for processing. Meanwhile, an adaptive method for managing host tasks is configured on the Controller, so that the Controller can automatically manage and execute the tasks, and the load of the host end is greatly reduced. The above method is explained in detail below:
in accordance with an embodiment of the present application, there is provided an embodiment of a method for implementing asynchronous execution of host tasks, it being noted that the steps illustrated in the flowchart of the figure may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than here.
Fig. 3 is a flowchart of a method for implementing asynchronous execution of host tasks according to an embodiment of the present application, and as shown in fig. 3, the method includes the following steps:
step S302, storing the tasks to be executed by the host computer to a cache area of a nonvolatile storage device connected with the host computer;
step S304, sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task;
step S306, sending a second instruction to a processor of the nonvolatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter.
Through the steps, the tasks of the host end are migrated to the nonvolatile storage device end for processing, and meanwhile, the nonvolatile storage device is configured with the self-adaptive method for managing the host tasks, so that the nonvolatile storage device automatically manages and executes the tasks, and the technical effect of greatly reducing the load of the host end is achieved.
According to an alternative embodiment of the present application, step S302 is implemented by: reading a first protocol register of the nonvolatile storage device to obtain an address of a cache region; reading a second protocol register of the nonvolatile storage device to obtain the size of a cache region; and writing the task to be executed into the address of the cache area according to the size of the cache area.
Fig. 4 is a schematic diagram of implementing host task storage according to an embodiment of the present application, and as shown in fig. 4, the host task storage is implemented by a CMB between the host and the Controller. The details are as follows:
(1) the host reads the protocol register 0x38 of the Controller standard through the PCIe Memory Read to obtain the address of the CMB.
(2) The host reads the protocol register 0x3c of the Controller standard through the PCIe Memory Read to obtain the size of the CMB.
(3) And the host writes all tasks to be executed to the address of the CMB through PCIe Memory Write according to the current size and use condition of the CMB.
In some optional embodiments of the present application, the execution result is generated by: and after receiving the execution parameters, the processor of the nonvolatile storage device executes the tasks in sequence according to the current resource use condition of the processor and the priority of the tasks to obtain an execution result.
According to another alternative embodiment of the present application, the host may further send a query instruction to the nonvolatile memory device, where the query instruction is used to query a resource state of a processor of the nonvolatile memory device, and the resource state is written to a status register of the nonvolatile memory device when the processor executes a task.
Optionally, after the step S306 is completed, a third instruction needs to be sent to the processor of the nonvolatile memory device, where the third instruction is used to instruct the processor of the nonvolatile memory device to release all resources.
Fig. 5 is a schematic diagram for implementing scheduling and executing of a task of a management host according to an embodiment of the present application, where, as shown in fig. 5, the scheduling and executing of the task of the management host includes negotiating an execution parameter between the host and a Controller, and a task adaptive scheduling method of the Controller. The details are as follows:
(1) the host sends a Directive Send command to the Controller, and packs and sends the execution parameters to the Controller.
(2) After receiving the parameters sent by the host, the Controller starts Task scheduling, starts to execute Task according to the current resource use condition of the Controller and the priority of the Task, and writes the load and the resource state into a state register for the host to inquire.
(3) And after all tasks are executed, the host sends a Directive Receive command to the Controller, and the result of the task execution is retrieved.
(4) The host sends a Directive Send command to the Controller to release all resources.
The key point of the invention is that the asynchronous execution of the host task is self-adaptively completed at the nonvolatile storage device end by fully utilizing the CMB storage technology and the flexibility of the NVMe Directive command. Storing the tasks that the host needs to perform by the CMB facilitates a way to share programs between the host and the non-volatile storage device. Then the Directive command flexibly realizes the negotiation of the task parameters and the acquisition of the execution result. Meanwhile, the nonvolatile storage device automatically processes the tasks of the host, so that the load of the host is greatly reduced.
Fig. 6 is a flowchart of another method for implementing asynchronous execution of host tasks according to an embodiment of the present application, where the method is applied to a nonvolatile memory device, where the volatile memory device includes at least one processor, and the method includes the following steps:
step S602, the processor obtains execution parameters from the instructions sent by the host, wherein the execution parameters are parameters required by executing the tasks required by the host, and the tasks are pre-stored in a cache area of a nonvolatile storage device connected with the host by the host;
step S604, sequentially executing the tasks in the cache region based on the execution parameters to generate an execution result;
step S606, the execution result is sent to the host.
It should be noted that, reference may be made to the description related to the embodiment shown in fig. 3 for a preferred implementation of the embodiment shown in fig. 6, and details are not described here again.
Fig. 7 is a block diagram of a system for implementing asynchronous execution of host tasks according to an embodiment of the present application, where, as shown in fig. 7, the system includes: a host 70 and a non-volatile storage device 72, wherein,
the host computer 70 is used for storing tasks required to be executed by the host computer into a cache region of a nonvolatile storage device connected with the host computer; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by calling the task in the cache region by a processor of the nonvolatile storage device and executing the task based on the execution parameter;
and the nonvolatile storage device 72 is connected with the host 72 and is used for executing the tasks in sequence according to the current resource use condition of the processor and the priority of the tasks after receiving the execution parameters to obtain an execution result.
Fig. 8 is a block diagram of an apparatus for implementing asynchronous execution of host tasks according to an embodiment of the present application, where, as shown in fig. 8, the apparatus includes:
the storage module 80 is used for storing tasks required to be executed by the host to a cache region of the nonvolatile storage device connected with the host;
a first sending module 82, configured to send a first instruction to a processor of the nonvolatile memory device, where the first instruction includes an execution parameter required for executing a task;
a second sending module 84, configured to send a second instruction to the processor of the nonvolatile memory device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter.
It should be noted that, reference may be made to the description related to the embodiment shown in fig. 3 for a preferred implementation of the embodiment shown in fig. 8, and details are not described here again.
The embodiment of the application also provides a nonvolatile storage medium, which comprises a stored program, wherein when the program runs, the device where the nonvolatile storage medium is located is controlled to execute the method for realizing asynchronous execution of the host task.
The nonvolatile storage medium is used for storing a program for executing the following functions: storing tasks to be executed by a host computer to a cache region of a nonvolatile storage device connected with the host computer; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter.
The embodiment of the application also provides a processor, and the processor is used for running the program stored in the memory, wherein the program runs to execute the above method for realizing asynchronous execution of the host task.
The processor is used for running a program for executing the following functions: storing tasks to be executed by a host computer to a cache region of a nonvolatile storage device connected with the host computer; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required by executing a task; sending a second instruction to a processor of the non-volatile storage device; and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by the processor of the nonvolatile storage device calling the task in the cache region and executing the task based on the execution parameter.
The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present application, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a read-Only Memory (ROM), a random access Memory (RBJZSKJM, RBJZSKJndom BJZSJccess Memory), a removable hard disk, a magnetic disk, or an optical disk, and various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present application and it should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.
Claims (10)
1. A method for implementing asynchronous execution of host tasks, comprising:
storing tasks to be executed by a host to a cache region of a nonvolatile storage device connected with the host;
sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required for executing the task;
sending a second instruction to a processor of the non-volatile storage device; and
and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by calling the task in the cache region by a processor of the nonvolatile storage device and executing the task based on the execution parameter.
2. The method of claim 1, wherein storing tasks that a host needs to perform to a cache of a non-volatile storage device connected to the host comprises:
reading a first protocol register of the nonvolatile storage device to obtain an address of the cache region;
reading a second protocol register of the nonvolatile storage device to obtain the size of the cache region;
and writing the task to be executed into the address of the cache region according to the size of the cache region.
3. The method of claim 1, wherein the execution result is generated by:
and after receiving the execution parameters, the processor of the nonvolatile storage device sequentially executes the tasks according to the current resource use condition of the processor and the priority of the tasks to obtain the execution result.
4. The method of claim 3, further comprising:
sending a query instruction to the nonvolatile storage device, where the query instruction is used to query a resource state of a processor of the nonvolatile storage device, where the resource state is written into a state register of the nonvolatile storage device when the processor executes the task.
5. The method of claim 1, wherein after retrieving the results of the execution of the task from the non-volatile storage device, the method further comprises:
and sending a third instruction to the processor of the nonvolatile storage device, wherein the third instruction is used for instructing the processor of the nonvolatile storage device to release all resources.
6. A method for asynchronous execution of host tasks, the method being applied to a non-volatile storage device including at least one processor, the method comprising:
the processor acquires execution parameters from an instruction sent by a host, wherein the execution parameters are parameters required by executing a task required to be executed by the host, and the task is pre-stored in a cache region of a nonvolatile storage device connected with the host by the host;
sequentially executing the tasks in the cache region based on the execution parameters to generate an execution result;
and sending the execution result to the host.
7. A system for implementing asynchronous execution of host tasks, comprising: a host and a non-volatile storage device, wherein,
the host is used for storing tasks to be executed by the host to a cache region of the nonvolatile storage device connected with the host; sending a first instruction to a processor of the nonvolatile storage device, wherein the first instruction comprises an execution parameter required for executing the task; sending a second instruction to a processor of the non-volatile storage device; receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by calling the task in the cache region by a processor of the nonvolatile storage device and executing the task based on the execution parameter;
and the nonvolatile storage equipment is connected with the host and used for executing the tasks in sequence according to the current resource use condition of the processor and the priority of the tasks after receiving the execution parameters to obtain the execution result.
8. An apparatus for implementing asynchronous execution of host tasks, comprising:
the storage module is used for storing tasks to be executed by a host computer to a cache region of a nonvolatile storage device connected with the host computer;
a first sending module, configured to send a first instruction to a processor of the nonvolatile storage device, where the first instruction includes an execution parameter required for executing the task;
a second sending module, configured to send a second instruction to a processor of the nonvolatile storage device; and
and receiving an execution result of the task from the nonvolatile storage device, wherein the execution result is obtained by calling the task in the cache region by a processor of the nonvolatile storage device and executing the task based on the execution parameter.
9. A non-volatile storage medium, comprising a stored program, wherein when the program runs, the device on which the non-volatile storage medium is located is controlled to execute the method for implementing asynchronous execution of host tasks according to any one of claims 1 to 6.
10. A processor configured to execute a program stored in a memory, wherein the program when executed performs the method of implementing asynchronous execution of host tasks as claimed in any one of claims 1 to 6.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102831011A (en) * | 2012-08-10 | 2012-12-19 | 上海交通大学 | Task scheduling method and device based on multi-core system |
| CN108762931A (en) * | 2018-05-31 | 2018-11-06 | 康键信息技术（深圳）有限公司 | Method for scheduling task, server based on distributed scheduling system and storage medium |
| CN110764887A (en) * | 2019-09-10 | 2020-02-07 | 浙江大华技术股份有限公司 | Task rescheduling method and system, and related equipment and device |
| CN111124744A (en) * | 2019-12-26 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Data integrity checking method and system, electronic equipment and storage medium |
| US20200341916A1 (en) * | 2019-04-26 | 2020-10-29 | Samsung Electronics Co., Ltd. | Method for status monitoring of acceleration kernels in a storage device and storage device employing the same |
-
2020
- 2020-11-20 CN CN202011312287.3A patent/CN112269649A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102831011A (en) * | 2012-08-10 | 2012-12-19 | 上海交通大学 | Task scheduling method and device based on multi-core system |
| CN108762931A (en) * | 2018-05-31 | 2018-11-06 | 康键信息技术（深圳）有限公司 | Method for scheduling task, server based on distributed scheduling system and storage medium |
| US20200341916A1 (en) * | 2019-04-26 | 2020-10-29 | Samsung Electronics Co., Ltd. | Method for status monitoring of acceleration kernels in a storage device and storage device employing the same |
| CN110764887A (en) * | 2019-09-10 | 2020-02-07 | 浙江大华技术股份有限公司 | Task rescheduling method and system, and related equipment and device |
| CN111124744A (en) * | 2019-12-26 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Data integrity checking method and system, electronic equipment and storage medium |
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