CN112257082A - DSP embedded system debugging interface access control method - Google Patents
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- CN112257082A CN112257082A CN202011120296.2A CN202011120296A CN112257082A CN 112257082 A CN112257082 A CN 112257082A CN 202011120296 A CN202011120296 A CN 202011120296A CN 112257082 A CN112257082 A CN 112257082A
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Abstract
The invention belongs to the technical field of embedded information security, and particularly relates to a debugging interface access control method of a DSP (digital signal processor) embedded system. The security protection design is carried out on the JTAG interface of the DSP chip in the DSP embedded system, the full ciphertext form interaction of JTAG interface data of the DSP embedded system is realized, an unauthorized user can be effectively prevented from directly carrying out simulation analysis, decompiling, dynamic tracking debugging and other reverse analysis cracking by capturing the JTAG interface data, only a developer provided with a corresponding encryption and decryption device can decrypt the JTAG interface data, then the simulation and debugging are carried out on the DSP chip, the core intellectual property right of the developer is effectively protected, and therefore the security of the whole DSP embedded system is improved. The method can be popularized and applied to the protection of the core independent intellectual property rights of military and trade weapon equipment, and can effectively prevent foreign parties from carrying out reverse analysis and decomposition on military and trade weapon equipment exported in China through a JTAG interface.
Description
Technical Field
The invention belongs to the technical field of embedded information security, and particularly relates to a debugging interface access control method of a DSP (digital signal processor) embedded system.
Background
The DSP Embedded System is a general System which takes a DSP device as a core processor, is closely combined with an actual application System and embeds the DSP System into an application electronic System. The system has the advantages of the DSP in high-speed operation and large-amount data analysis and processing, and has the technical characteristics required by the practical application target.
JTAG (Joint Test Action group) is an international standard Test protocol, which is mainly used for testing the inside of a chip and simulating and debugging a system, the JTAG technology is an embedded debugging technology, a special Test circuit is packaged in chips such as a DSP, and internal nodes can be tested by JTAG Test tools to obtain key information.
The JTAG interface of the DSP embedded system provides a path for inverse analysis and decomposition such as decompilation, dynamic trace debugging and the like for unauthorized users while providing convenience for simulation debugging and testing for developers. Under normal conditions, the JTAG interface of the DSP embedded system transmits plaintext data, and the simulation analysis and the dynamic debugging can be carried out only by connecting the simulator with the JTAG interface of the DSP embedded system. However, if the DSP embedded system containing the key core technology is obtained by an unauthorized user, they can perform reverse analysis and cracking such as simulation analysis, decompilation, dynamic trace debugging and the like through the JTAG interface connection simulator, thereby obtaining a core technology route, which seriously endangers the security of the independent intellectual property of the developer, especially in the field of military and trade products, the exported weaponry will face a huge risk that the key technology is reversely analyzed and cracked by an unauthorized user outside, and there is a potential safety hazard that the key core technology is revealed.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: aiming at the problem that an unauthorized user can directly capture plaintext data through a JTAG interface so as to carry out reverse analysis and cracking such as simulation analysis, decompiling, dynamic tracking and debugging and the like, how to provide a debugging interface access control method of a DSP embedded system, thereby effectively improving the overall security of the DSP embedded system and protecting the core intellectual property of a developer.
(II) technical scheme
In order to solve the above technical problem, the present invention provides a method for controlling access to a debugging interface of a DSP embedded system, the method being implemented based on the system for controlling access to the debugging interface of the DSP embedded system, the system comprising: the system comprises a DSP embedded system, an encryption and decryption device, a DSP simulator and an upper computer;
the DSP embedded system comprises: the system comprises a DSP chip, a JTAG internal interface, an encryption and decryption processing module and an external JTAG interface; the encryption and decryption processing module comprises an encryption processing unit and a decryption processing unit;
the encryption and decryption device comprises an encryption unit, a decryption unit, a first JTAG interface and a second JTAG interface; the encryption unit is used for encrypting input plaintext data and outputting ciphertext data; the decryption unit is used for decrypting the input ciphertext data and outputting plaintext data;
the method for controlling the access of the debugging interface of the DSP embedded system comprises the following steps:
step 1: the JTAG interface of the DSP embedded system outputs ciphertext data to the outside:
step 1.1: the DSP chip transmits plaintext data to be transmitted to the encryption and decryption processing module through a JTAG internal interface;
step 1.2: the encryption and decryption processing module identifies plaintext data input by the JTAG internal interface, calls the encryption processing unit to encrypt the input plaintext data, and outputs corresponding ciphertext data to the external JTAG interface after the encryption processing unit finishes processing;
step 2: the encryption and decryption device identifies ciphertext data input by an external JTAG interface and received through a first JTAG interface, calls a decryption processing unit to decrypt the input ciphertext data, and outputs corresponding plaintext data to the DSP simulator through a second JTAG interface after the decryption processing is finished;
and step 3: the JTAG interface of the DSP simulator judges and processes the input plaintext data, and transmits the processed plaintext data to the upper computer after the processing is finished;
and 4, step 4: the upper computer judges and processes the plaintext data after receiving the plaintext data, and transmits the plaintext data to be fed back to the DSP simulator after the processing is finished;
and 5: the DSP simulator judges and processes the plaintext data input by the USB interface, and outputs corresponding plaintext data to the encryption and decryption device through the JTAG interface after the processing is finished;
step 6: the encryption and decryption device identifies plaintext data input by the second JTAG interface, calls the encryption processing unit to encrypt the input plaintext data, and outputs corresponding ciphertext data to the DSP embedded system through the first JTAG interface after the encryption processing is finished;
and 7: the DSP embedded system processes ciphertext data input by an external JTAG interface;
step 7.1: the external JTAG interface of the DSP embedded system identifies the input ciphertext data and transmits the ciphertext data to the encryption and decryption processing module;
step 7.2: the encryption and decryption processing module calls the decryption processing unit to decrypt ciphertext data input by the external JTAG interface, and outputs corresponding plaintext data to the internal JTAG interface of the DSP chip after the decryption processing is finished;
step 7.3: and the DSP chip receives plaintext data input by the internal JTAG interface and processes the plaintext data, so that data interaction between the DSP embedded system and the upper computer is completed.
The DSP embedded system also comprises a self-destruction prevention module.
In the DSP embedded system, a DSP chip, a JTAG internal interface, an encryption and decryption processing module, an external JTAG interface and an anti-disassembly self-destruction module are packaged by SiP to form a new DSP device capable of being replaced in situ.
The anti-dismantling self-destruction module adopts a photosensitive device to complete the design of a related self-destruction circuit module, and immediately triggers a self-destruction mechanism when sensing that SiP packaging is forcibly opened or the device is subjected to reverse analysis and destruction under the irradiation of infrared rays and other rays.
The encryption and decryption processing module realizes a stream cipher algorithm inside and completes encryption and decryption processing of the input data stream quickly.
All the external JTAG interfaces of the new DSP device transmit ciphertext data, so that reverse analysis and cracking of simulation debugging and disassembly by unauthorized users can be effectively prevented.
Wherein the method further comprises a step of system initialization;
the method comprises the following steps:
firstly, replacing a DSP chip of an original DSP embedded system with a new DSP device packaged by SiP to form a new DSP embedded system;
secondly, the encryptor and the decryptor are respectively connected with an external JTAG interface of the DSP embedded system and a JTAG interface of the DSP simulator through JTAG connecting lines, and a USB interface of the DSP simulator is connected with an upper computer through a USB connecting line to form a data path;
and finally, powering on the system, and initializing each module of the DSP embedded system.
And 3, the DSP simulator transmits the processed plaintext data to the upper computer through the USB interface.
And in the step 4, the upper computer transmits the plaintext data to be fed back to the DSP simulator through the USB interface.
And the stream cipher algorithm is realized by a sequence cipher algorithm.
(III) advantageous effects
Under normal conditions, the simulator is connected with a JTAG interface of a DSP embedded system, so that simulation analysis and dynamic debugging can be performed, convenience in simulation debugging and testing is provided for developers, and a path is provided for reverse analysis cracking such as decompilation, dynamic tracking debugging and the like of unauthorized users. Compared with the prior art, the invention provides a debugging interface access control method of a DSP embedded system, which is used for carrying out safety protection design on a JTAG interface of a DSP chip in the DSP embedded system, realizes full ciphertext form interaction of JTAG interface data of the DSP embedded system, and can effectively prevent unauthorized users from directly carrying out reverse analysis and cracking such as simulation analysis, decompilation, dynamic tracking and debugging and the like by capturing the JTAG interface data, so that only developers equipped with corresponding encryptors can decrypt the JTAG interface data, and further carry out simulation and debugging on the DSP chip, effectively protects core intellectual property rights of developers, and further improves the safety of the whole DSP embedded system. The method can be popularized and applied to the protection of the core independent intellectual property rights of military and trade weapon equipment, and can effectively prevent foreign parties from carrying out reverse analysis and destruction on military and trade weapon equipment exported in China through a JTAG interface, thereby ensuring the rights and interests of our parties.
Drawings
Fig. 1 is a schematic diagram of the architecture of the present invention.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
In order to solve the problem of the prior art, the present invention provides a method for controlling access to a debugging interface of a DSP embedded system, wherein the method is implemented based on the system for controlling access to the debugging interface of the DSP embedded system, as shown in fig. 1, the system includes: the system comprises a DSP embedded system, an encryption and decryption device, a DSP simulator and an upper computer;
the DSP embedded system comprises: the system comprises a DSP chip, a JTAG internal interface, an encryption and decryption processing module and an external JTAG interface; the encryption and decryption processing module comprises an encryption processing unit and a decryption processing unit;
the encryption and decryption device comprises an encryption unit, a decryption unit, a first JTAG interface and a second JTAG interface, and is only equipped for developers; the encryption unit is used for encrypting input plaintext data and outputting ciphertext data; the decryption unit is used for decrypting the input ciphertext data and outputting plaintext data;
the method for controlling the access of the debugging interface of the DSP embedded system comprises the following steps:
step 1: the JTAG interface of the DSP embedded system outputs ciphertext data to the outside:
step 1.1: in a new DSP device packaged by the SiP, the DSP chip transmits plaintext data to be transmitted to an encryption and decryption processing module through a JTAG internal interface;
step 1.2: the encryption and decryption processing module identifies plaintext data input by the JTAG internal interface, calls the encryption processing unit to encrypt the input plaintext data, and outputs corresponding ciphertext data to the external JTAG interface after the encryption processing unit finishes processing;
step 2: the encryption and decryption device identifies ciphertext data input by an external JTAG interface and received through a first JTAG interface, calls a decryption processing unit to decrypt the input ciphertext data, and outputs corresponding plaintext data to the DSP simulator through a second JTAG interface after the decryption processing is finished;
and step 3: the JTAG interface of the DSP simulator judges and processes the input plaintext data, and transmits the processed plaintext data to the upper computer after the processing is finished;
and 4, step 4: the upper computer judges and processes the plaintext data after receiving the plaintext data, and transmits the plaintext data to be fed back to the DSP simulator after the processing is finished;
and 5: the DSP simulator judges and processes the plaintext data input by the USB interface, and outputs corresponding plaintext data to the encryption and decryption device through the JTAG interface after the processing is finished;
step 6: the encryption and decryption device identifies plaintext data input by the second JTAG interface, calls the encryption processing unit to encrypt the input plaintext data, and outputs corresponding ciphertext data to the DSP embedded system through the first JTAG interface after the encryption processing is finished;
and 7: the DSP embedded system processes ciphertext data input by an external JTAG interface;
step 7.1: the external JTAG interface of the DSP embedded system identifies the input ciphertext data and transmits the ciphertext data to the encryption and decryption processing module;
step 7.2: the encryption and decryption processing module calls the decryption processing unit to decrypt ciphertext data input by the external JTAG interface, and outputs corresponding plaintext data to the internal JTAG interface of the DSP chip after the decryption processing is finished;
step 7.3: and the DSP chip receives plaintext data input by the internal JTAG interface and processes the plaintext data, so that data interaction between the DSP embedded system and the upper computer is completed.
The DSP embedded system also comprises a self-destruction prevention module.
In the DSP embedded System, a security protection design is carried out on a JTAG interface of a DSP chip, and the DSP chip, a JTAG internal interface, an encryption and decryption processing module, an external JTAG interface and an anti-disassembly self-destruction module form a new DSP device capable of being replaced in situ through SiP packaging (System in a package).
The anti-dismantling self-destruction module adopts a photosensitive device to complete the design of a related self-destruction circuit module, and immediately triggers a self-destruction mechanism when sensing that SiP packaging is forcibly opened or the device is subjected to reverse analysis and destruction under the irradiation of infrared rays and other rays.
The encryption and decryption processing module realizes a stream cipher algorithm inside and completes encryption and decryption processing of the input data stream quickly.
All the external JTAG interfaces of the new DSP device transmit ciphertext data, so that reverse analysis and cracking of simulation debugging and disassembly by unauthorized users can be effectively prevented.
Wherein the method further comprises a step of system initialization;
the method comprises the following steps:
firstly, replacing a DSP chip of an original DSP embedded system with a new DSP device packaged by SiP to form a new DSP embedded system;
secondly, the encryptor and the decryptor are respectively connected with an external JTAG interface of the DSP embedded system and a JTAG interface of the DSP simulator through JTAG connecting lines, and a USB interface of the DSP simulator is connected with an upper computer through a USB connecting line to form a data path;
and finally, powering on the system, and initializing each module of the DSP embedded system.
And 3, the DSP simulator transmits the processed plaintext data to the upper computer through the USB interface.
And in the step 4, the upper computer transmits the plaintext data to be fed back to the DSP simulator through the USB interface.
The stream cipher algorithm is realized by selecting a sequence cipher algorithm with relatively high encryption and decryption processing speed under the condition of enough encryption strength, and the higher the encryption and decryption processing speed is, the faster the data communication speed of the whole system is.
Example 1
The embodiment provides a method for realizing full ciphertext data interaction by a JTAG debugging interface of a DSP embedded system.
Firstly, the JTAG debugging interface of the DSP embedded system is optimally designed, and a new DSP device packaged by SiP replaces the original DSP device to form a new DSP embedded system.
The new DSP device of the SiP package is a System in a package (System in a package) formed by introducing an encryption and decryption processing module and an anti-dismantling self-destruction module to perform SiP package with a DSP chip, and an original JTAG interface is changed into an internal interface of the new DSP device, while a JTAG interface which is really presented to the outside is a signal interface processed by the internal encryption and decryption processing module.
The encryption and decryption processing module comprises an encryption processing unit and a decryption processing unit, a high-speed stream cipher algorithm is realized inside the encryption and decryption processing module, the input plaintext data stream and the input ciphertext data stream can be distinguished, and the encryption processing of the input plaintext data and the decryption processing of the input ciphertext data can be completed quickly.
The anti-dismantling self-destruction module adopts a photosensitive device to complete the design of a related self-destruction circuit module, and can immediately trigger a self-destruction mechanism when sensing that SiP packaging is forcibly opened or the device is subjected to reverse analysis and destruction under the irradiation of infrared rays and other rays.
After the optimization design of the DSP embedded system is completed by using a new DSP device packaged by SiP, plaintext data output by a JTAG interface inside a DSP chip reaches an internal encryption and decryption module firstly, an encryption processing unit is called by the internal encryption and decryption module to complete data encryption processing, and then output ciphertext data are transmitted to an external JTAG interface, so that all ciphertext data are transmitted to the outside by the JTAG interface of the DSP chip, and unauthorized users can be effectively prevented from directly performing reverse analysis such as simulation analysis, decompilation, dynamic tracking debugging and the like by capturing the JTAG interface data.
In summary, by adopting the design method provided herein, only a developer equipped with an encryptor and a decryptor can perform simulation and debugging on a DSP chip of an embedded system through a JTAG interface, and an unauthorized user is not equipped with an encryptor and can only capture ciphertext data that cannot be decrypted through the JTAG interface, so that reverse analysis cracking such as simulation analysis, decompilation, dynamic trace debugging and the like cannot be performed, thereby effectively protecting core intellectual property rights of the developer and improving the security of the entire DSP embedded system. The method can be popularized and applied to the protection of the core independent intellectual property rights of military and trade weapon equipment, and can effectively prevent foreign parties from carrying out reverse analysis and destruction on military and trade weapon equipment exported in China through a JTAG interface, thereby ensuring the rights and interests of our parties.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (10)
1. A method for controlling access to a debugging interface of a DSP embedded system, which is implemented based on the access control system of the debugging interface of the DSP embedded system, and comprises the following steps: the system comprises a DSP embedded system, an encryption and decryption device, a DSP simulator and an upper computer;
the DSP embedded system comprises: the system comprises a DSP chip, a JTAG internal interface, an encryption and decryption processing module and an external JTAG interface; the encryption and decryption processing module comprises an encryption processing unit and a decryption processing unit;
the encryption and decryption device comprises an encryption unit, a decryption unit, a first JTAG interface and a second JTAG interface; the encryption unit is used for encrypting input plaintext data and outputting ciphertext data; the decryption unit is used for decrypting the input ciphertext data and outputting plaintext data;
the method for controlling the access of the debugging interface of the DSP embedded system comprises the following steps:
step 1: the JTAG interface of the DSP embedded system outputs ciphertext data to the outside:
step 1.1: the DSP chip transmits plaintext data to be transmitted to the encryption and decryption processing module through a JTAG internal interface;
step 1.2: the encryption and decryption processing module identifies plaintext data input by the JTAG internal interface, calls the encryption processing unit to encrypt the input plaintext data, and outputs corresponding ciphertext data to the external JTAG interface after the encryption processing unit finishes processing;
step 2: the encryption and decryption device identifies ciphertext data input by an external JTAG interface and received through a first JTAG interface, calls a decryption processing unit to decrypt the input ciphertext data, and outputs corresponding plaintext data to the DSP simulator through a second JTAG interface after the decryption processing is finished;
and step 3: the JTAG interface of the DSP simulator judges and processes the input plaintext data, and transmits the processed plaintext data to the upper computer after the processing is finished;
and 4, step 4: the upper computer judges and processes the plaintext data after receiving the plaintext data, and transmits the plaintext data to be fed back to the DSP simulator after the processing is finished;
and 5: the DSP simulator judges and processes the plaintext data input by the USB interface, and outputs corresponding plaintext data to the encryption and decryption device through the JTAG interface after the processing is finished;
step 6: the encryption and decryption device identifies plaintext data input by the second JTAG interface, calls the encryption processing unit to encrypt the input plaintext data, and outputs corresponding ciphertext data to the DSP embedded system through the first JTAG interface after the encryption processing is finished;
and 7: the DSP embedded system processes ciphertext data input by an external JTAG interface;
step 7.1: the external JTAG interface of the DSP embedded system identifies the input ciphertext data and transmits the ciphertext data to the encryption and decryption processing module;
step 7.2: the encryption and decryption processing module calls the decryption processing unit to decrypt ciphertext data input by the external JTAG interface, and outputs corresponding plaintext data to the internal JTAG interface of the DSP chip after the decryption processing is finished;
step 7.3: and the DSP chip receives plaintext data input by the internal JTAG interface and processes the plaintext data, so that data interaction between the DSP embedded system and the upper computer is completed.
2. The method according to claim 1, further comprising a tamper-resistant self-destruction module in the DSP embedded system.
3. The method according to claim 2, wherein in the DSP embedded system, a new DSP device capable of in-situ replacement is formed by packaging the DSP chip, the JTAG internal interface, the encryption/decryption processing module, the external JTAG interface and the tamper-proof self-destruction module through SiP.
4. The method according to claim 3, wherein the tamper-proof self-destruction module uses a photosensitive device to complete the design of the related self-destruction circuit module, and immediately triggers a self-destruction mechanism when sensing that the SiP package is forcibly opened or the device is broken by reverse analysis under infrared or other light irradiation.
5. The method according to claim 4, wherein the encryption/decryption processing module implements a stream cipher algorithm therein to quickly perform encryption/decryption processing on the input data stream.
6. The method according to claim 5, wherein the external JTAG interface of the new DSP device transmits all ciphertext data to the outside, thereby effectively preventing unauthorized users from performing reverse analysis cracking of simulation debugging and disassembly.
7. The DSP embedded system debugging interface access control method of claim 3 further comprising the step of system initialization;
the method comprises the following steps:
firstly, replacing a DSP chip of an original DSP embedded system with a new DSP device packaged by SiP to form a new DSP embedded system;
secondly, the encryptor and the decryptor are respectively connected with an external JTAG interface of the DSP embedded system and a JTAG interface of the DSP simulator through JTAG connecting lines, and a USB interface of the DSP simulator is connected with an upper computer through a USB connecting line to form a data path;
and finally, powering on the system, and initializing each module of the DSP embedded system.
8. The DSP embedded system debugging interface access control method of claim 1 wherein in step 3 the DSP emulator transfers the processed plaintext data to the upper computer through a USB interface.
9. The DSP embedded system debugging interface access control method of claim 1, wherein in step 4, the upper computer transmits the plaintext data to be fed back to the DSP emulator through the USB interface.
10. The method according to claim 5, wherein the stream cipher algorithm is implemented using a sequential cipher algorithm.
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