CN112256460A - Inter-process communication method and device, electronic equipment and computer readable storage medium - Google Patents

Inter-process communication method and device, electronic equipment and computer readable storage medium Download PDF

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CN112256460A
CN112256460A CN202011331006.9A CN202011331006A CN112256460A CN 112256460 A CN112256460 A CN 112256460A CN 202011331006 A CN202011331006 A CN 202011331006A CN 112256460 A CN112256460 A CN 112256460A
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memory
shared access
access area
information
data interaction
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CN112256460B (en
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王艳伟
邹仕洪
张广伟
黄浩东
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Beijing Yuanxin Science and Technology Co Ltd
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Beijing Yuanxin Science and Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes

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Abstract

The embodiment of the application provides a method and a device for interprocess communication, electronic equipment and a computer readable storage medium, and relates to the field of interprocess communication. The method comprises the following steps: and acquiring information of at least one shared access area, and sending a data interaction message to the target process through the current process, wherein the data interaction message at least comprises the information of each shared access area, so that the current process and the target process perform data interaction based on any shared access area. According to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.

Description

Inter-process communication method and device, electronic equipment and computer readable storage medium
Technical Field
The present application relates to the field of inter-process communication technologies, and in particular, to an inter-process communication method, an inter-process communication apparatus, an electronic device, and a computer-readable storage medium.
Background
The inter-process communication must be considered in terms of security, data in communication can only be read and written by the processes of the transmitting and receiving parties, and other processes cannot access. However, there is no MMU (Memory management Unit) on the MCU (Microcontroller Unit) hardware running the embedded operating system, which cannot perform natural isolation of the Memory during inter-process communication, and how to achieve inter-process secure communication is only for access during communication between the processes of the transmitter and the receiver, and protects other processes from illegal access, which still needs to be further solved.
Disclosure of Invention
The object of the present application is to solve at least one of the above-mentioned technical drawbacks, in particular the technical drawback of inter-process secure communication.
In a first aspect, a method for inter-process communication is provided, where the method includes:
acquiring information of at least one shared access area, wherein the shared access area is a memory space pre-registered to a memory protection unit, so that at least two processes perform data interaction by accessing the registered memory space;
and sending a data interaction message to the target process through the current process, wherein the data interaction message at least comprises information of each shared access area, so that the data interaction between the current process and the target process is carried out based on any shared access area.
In one possible implementation, the method may further include:
responding to the creation of a current process, and allocating a first memory space for the current process, wherein the first memory space is a memory space allocated to the current process for access, and the first memory space comprises a plurality of memory areas;
determining at least one memory area in the plurality of memory areas, or taking at least one memory block in the at least one memory area as a shared access area;
and respectively registering the information of each shared access area into a preset list of the memory protection unit.
In another possible implementation manner, the obtaining information of the at least one shared access area includes:
and acquiring the information of the shared access area from a preset list of the memory protection unit.
In another possible implementation manner, the data interaction between the current process and the target process based on any shared access area includes:
writing data information interacted with a target process into a shared access area by a current process;
and the target process registers the information of the shared access area into a preset list of the memory protection unit according to the data interaction message so as to be used for the target process to access the shared access area.
In another possible implementation manner, the information of the shared access area includes at least one of information of an address of the shared access area, a space size of the shared access area, and a process access attribute.
In another possible implementation, the method may further include:
and after data interaction is carried out with the target process, deleting the information of each shared access area in a preset list of the memory protection unit.
In a second aspect, an inter-process communication apparatus is provided, the apparatus comprising:
the acquisition module is used for acquiring information of at least one shared access area, and the shared access area is a memory space pre-registered to the memory protection unit so that at least two processes can perform data interaction by accessing the registered memory space;
and the sending module is used for sending a data interaction message to the target process through the current process, wherein the data interaction message at least comprises information of each shared access area, so that the current process and the target process carry out data interaction based on any shared access area.
In one possible implementation, the apparatus may further include:
the preprocessing module is used for responding to the creation of a current process and allocating a first memory space to the current process, wherein the first memory space is a memory space allocated to the current process for access, and the first memory space comprises a plurality of memory areas;
determining at least one memory area in the plurality of memory areas, or taking at least one memory block in the at least one memory area as a shared access area;
and respectively registering the information of each shared access area into a preset list of the memory protection unit.
In a third aspect, an electronic device is provided, which includes:
one or more processors;
a memory;
one or more application programs, wherein the one or more application programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs configured to: performing the inter-process communication method according to any one of claims 1 to 6.
For example, in a third aspect of the present application, there is provided a computing device comprising: the processor, the memory and the communication interface complete mutual communication through the communication bus;
the memory is used for storing at least one executable instruction, and the executable instruction enables the processor to execute the corresponding operation of the interprocess communication method as shown in the first aspect of the application.
In a fourth aspect, a computer-readable storage medium is provided, wherein the computer program, when executed by a processor, implements the inter-process communication method of any one of claims 1-6.
For example, in a fourth aspect of the embodiments of the present application, a computer-readable storage medium is provided, on which a computer program is stored, and the program, when executed by a processor, implements the inter-process communication method shown in the first aspect of the present application.
The beneficial effect that technical scheme that this application provided brought is:
according to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments of the present application will be briefly described below.
Fig. 1 is a schematic flowchart of an inter-process communication method according to an embodiment of the present application;
fig. 2 is a schematic diagram illustrating a principle of inter-process communication based on a memory pool according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram illustrating a principle of inter-process communication for dynamically allocating a shared memory based on a system heap according to an embodiment of the present application;
fig. 4 is a schematic view of a scenario of inter-process shared memory communication according to an embodiment of the present application;
FIG. 5 is a block diagram of an interprocess communication device according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an electronic device for interprocess communication according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present invention.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. As used herein, the term "and/or" includes all or any element and all combinations of one or more of the associated listed items.
To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
The inter-process communication must be considered in terms of security, data in communication can only be read and written by the processes of the transmitting and receiving parties, and other processes cannot access. However, the MCU hardware running the embedded os has no MMU, which cannot perform natural isolation of the memory during inter-process communication, and how to achieve secure inter-process communication is only accessed when the processes of the transmitter and the receiver communicate, which protects other processes from illegal access, and still needs to be further solved.
According to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
The following describes the technical solutions of the present application and how to solve the above technical problems with specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.
The embodiment of the application provides an inter-process communication method, and an execution main body of the method may be a terminal or server device running a process, or may also be a device or chip integrated on the device, for example, a computer device running the process, and the like. As shown in fig. 1, which is a schematic flowchart of an interprocess communication method provided in the embodiment of the present application, the method includes the following steps:
s101: information of at least one shared access area is obtained.
Specifically, the shared access area is a memory space pre-registered to the memory protection unit, so that at least two processes perform data interaction by accessing the registered memory space. The Memory Protection Unit may be an MPU (Memory Protection Unit) existing on a hardware device such as a chip, and the MPU is implemented by a register or the like. The information of the memory space is registered to the memory protection unit, so that the memory space is provided with access authority.
S102: and sending a data interaction message to the target process through the current process so as to be used for data interaction between the current process and the target process based on any shared access area.
Specifically, the data interaction message at least includes information of each shared access area, for example, the information of the shared access area may include an address of the shared access area, a space size of the shared access area, and a process access attribute, where the process access attribute may include, for example, whether the shared access area is readable and writable, whether the code can be executed, and the like.
In addition, the data interaction message may be sent to the target process by inserting the data interaction message into a message queue or by allocating a message control block for the data interaction message to carry the data interaction message.
According to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
In one embodiment, step S101 of the inter-process communication method may further include, before:
s100: responding to the creation of a current process, and allocating a first memory space for the current process, wherein the first memory space comprises a plurality of memory areas; determining at least one memory area in the plurality of memory areas, or taking at least one memory block in the at least one memory area as a shared access area; and respectively registering the information of each shared access area into a preset list of the memory protection unit.
Specifically, in the kernel mode, the first memory space is a memory space allocated to the current process for access, and the first memory space may include a plurality of memory regions. It should be noted that each process only allocates one corresponding first memory space, and the first memory space may include a plurality of memory regions, and the memory regions are generally memory spaces with continuous addresses, but the plurality of memory regions included in the first memory space do not necessarily need to be adjacent in address. Moreover, all memory areas in the first memory space may be used as shared access areas for performing data interaction between processes, or a part of the memory areas, for example, at least one memory area, or at least one memory block in at least one memory area may be used as a shared access area, and information of the shared access areas is respectively registered in a preset list of the memory protection unit, and by registering information of the shared access areas for performing data interaction between processes to the memory protection unit, the memory protection unit is allowed to have access rights to the memory space. In other words, a process that does not register the shared access area in the memory protection unit cannot make a sub-access to the shared access area.
The information of each shared access region in the preset list of the memory protection unit may be understood as being correspondingly recorded in a region in the memory protection unit, where each region includes an identifier of the region, such as a region label, and information of the registered shared access region, such as a start address of the shared access region, a space size of the shared access region, and a process access attribute, where the process access attribute may include, for example, whether the code is readable and writable, whether the code can be executed, and the like. The network identification of the current process may also be included to record the corresponding process that may access the shared access region registered in the region.
In addition, when the shared access area is registered in the memory protection unit, the shared access area can be registered in the memory protection unit through one or more threads in the process, or a plurality of threads register different shared access areas, so that the threads registering the shared access area have access authority to the shared access area, and further isolation of the access areas among different threads is realized.
In addition, in order to meet the data interaction requirements between the processes, one or more memory areas may be correspondingly added or deleted in the first memory space according to the actual interaction data amount and other factors, for example, when the required data interaction amount is large, or the interaction data needs to be interacted in different memory areas according to different data types, one or more memory areas may be correspondingly added in the first memory space according to the memory area required to be used by the actual interaction. And after the inter-process data interaction is finished, the temporarily unused memory area can be correspondingly deleted.
In another embodiment, step S101 may specifically include: and acquiring the information of the shared access area from a preset list of the memory protection unit.
Specifically, based on the step S100 of registering the information of the shared access area in the preset list of the memory protection unit in advance, the information of the shared access area may be acquired from the preset list of the memory protection unit, so that at least two processes perform data interaction by accessing the registered memory space.
In another embodiment, the step S102 of performing data interaction between the current process and the target process based on any shared access area specifically includes:
and writing data information which is interacted with the target process in advance into the shared access area by the current process.
And the target process registers the information of the shared access area into a preset list of the memory protection unit according to the data interaction message so as to be used for the target process to access the shared access area.
Specifically, the target process registers, according to information of the shared access region in the data interaction message, information of a memory space corresponding to the shared access region into a preset list of the memory protection unit, for example, a region of the memory protection unit, that is, the information of the shared access region and an identifier of the target process are recorded in the region, so that the target process has an access right to the shared access region.
In one embodiment, the inter-process communication method may further include:
s103: and after data interaction is carried out with the target process, deleting the information of each shared access area in a preset list of the memory protection unit.
Specifically, since the number of the shared protection regions that can be registered in the preset list of the memory protection unit is limited, that is, the number of the regions in the memory protection unit is limited, after data interaction with the target process is performed, the information of each shared access region can be deleted in the memory protection unit to release the corresponding region, so that the shared access region for inter-process communication can be dynamically registered in the memory protection unit.
According to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
In order to better understand the method provided by the embodiment of the present application, the following further describes the technical solution of the embodiment of the present application with reference to fig. 2 to 3.
As shown in fig. 2, which is a schematic diagram of a principle of inter-process communication based on a memory pool provided in an embodiment of the present application, in the inter-process communication based on the memory pool, in response to creation of a current process, a memory space accessed by the current process is allocated to the current process, a memory region in the memory space corresponds to a corresponding memory pool, and all or a part of the memory region in the memory region may be used as a shared memory region and registered in a preset list of a memory protection unit, for example, in a corresponding MPU region, so that under a protection mechanism of the memory protection unit, the current process has an access right to the registered shared access region. And then, memory blocks are allocated in a memory pool corresponding to the shared access area and used for writing interactive data in the memory blocks, and then information of the memory blocks, such as addresses and sizes of the memory blocks, is inserted into the message queue, so that data interactive messages are sent to the target process. And after receiving the data interaction message, the target process acquires the address and the size of the memory block, and registers the address and the size of the memory block in the MPU region to realize that the target process has access authority to the registered shared access region, so that the data on the data block can be accessed. The process of registering the current process and the target process in the MPU region may be understood as a static process performed when the processes allocate the memory blocks in the inter-process communication based on the memory pool, and thus is not shown in the figure.
In addition, the area used for shared access of the inter-process interaction data may also be a physical memory space corresponding to the global variable in the user mode, and through the inter-process communication method in the embodiment of the present application, the process in which the physical memory space corresponding to the global variable is registered in the memory protection unit has an access right to the global variable, so that data interaction through the global variable between processes can be realized.
As shown in fig. 3, which is a schematic diagram of inter-process communication for dynamically allocating a shared memory based on a system heap according to an embodiment of the present disclosure, in a processing process shown in the figure, in response to creation of a current process, a memory space accessed by the current process is allocated from the system heap, a memory region in the memory space is registered as a shared access region to an MPU region, and then a corresponding message control block is allocated, where the message control block is used to carry a message body of a data interaction message between the current process and a target process, and the message body may include information of the shared access region, so as to write interaction data in the shared access region, and then send the message control block to a message exchange module, so as to send the message control block carrying the data interaction message to the target process. After receiving the message control block, the target process acquires the address and the size of the shared access area from the data interaction message, and then correspondingly registers the memory area corresponding to the shared access area to the MPU region, so that the target process has access right to the shared access area, and further reads the interaction data of the shared access area. After the data interaction between the current process and the target process is carried out, the message control block and the shared access area can be released, and the corresponding MPU region is released.
As shown in fig. 4, which is a schematic view of a scenario of inter-process shared memory communication provided in an embodiment of the present application, based on the principle of the inter-process communication method in the embodiment of the present application, in a communication manner through a shared memory between processes, access to a memory region of an overlapping address registered in an MPU region by different processes performing communication may be implemented by overlapping memory block addresses of memory regions registered in the MPU region by a current process and a target process, and conversely, isolation of memory regions accessed between processes may also be implemented by addresses of different memory regions registered in the MPU region by the current process and the target process, thereby implementing a security mechanism of data between different processes.
For example, as shown in fig. 4, three different processes exist in the scene, where a memory space accessed by a plaintext process is denoted as dom0, a memory space dom0 includes memory areas part0 and part1, a memory space accessed by an encryptor process is denoted as dom1, a memory space dom1 includes memory areas part2, part3, and part4, a memory space accessed by a ciphertext process is denoted as dom2, and a memory space dom2 includes memory areas part5 and part6, where addresses of a part of memory blocks in a memory area part1 corresponding to the plaintext process overlap addresses of memory blocks in part2 corresponding to the encryptor process, and addresses of memory blocks in part4 corresponding to the encryptor process overlap addresses of memory blocks in part5 corresponding to the ciphertext process. In addition, the memory blocks overlapped among the processes mentioned above are the memory spaces registered in the MPU region by the processes.
Based on the configuration of the memory space of each process, the plaintext process stores the original data to be encrypted in part0, and can copy the original data into a memory block overlapped with the encryptor process in part1 to process the original data into plaintext data, the encryptor process obtains the plaintext data from the memory block overlapped with part1 in part2, copies the plaintext data into part3, and performs encryption operation in part3 (the part3 does not have address overlap with any process and is considered to be completely trusted), and after encryption is completed, copies the encrypted ciphertext data to a memory block overlapped with the part5 address corresponding to the ciphertext process in part 4. The ciphertext process then takes the ciphertext data from its part5 and copies it to part6 for ciphertext data processing.
Through the above processing, since the plaintext process and the ciphertext process have no memory block with overlapped addresses, the plaintext process cannot acquire ciphertext data, and cannot acquire the processing of the ciphertext data. Both the encryptor process and the ciphertext process have no memory blocks with addresses overlapping part0 of the plaintext process and therefore cannot learn the origin of the original data. The encryptor process and the part6 of the ciphertext process have no memory block with overlapping addresses, and therefore, the processing of the ciphertext data cannot be known. Since the plaintext process and the ciphertext process have no memory block with an address overlapping with part3 of the encryptor process, the process of the encryption operation cannot be known.
Therefore, based on the address overlapping of the memory areas registered in the memory protection unit among the processes, the secure communication among the processes and the isolation protection of the data can be realized.
According to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
An embodiment of the present application provides an inter-process communication apparatus, as shown in fig. 5, which is a schematic structural diagram of the inter-process communication apparatus provided in the embodiment of the present application, and the inter-process communication apparatus 50 may include: an obtaining module 501 and a sending module 502.
An obtaining module 501, configured to obtain information of at least one shared access area, where the shared access area is a memory space pre-registered to a memory protection unit, so that at least two processes perform data interaction by accessing the registered memory space.
Specifically, the shared access area is a memory space pre-registered to the memory protection unit, so that at least two processes perform data interaction by accessing the registered memory space. The memory protection unit may be an MPU, and the memory space is accessed by registering information of the memory space in the memory protection unit.
A sending module 502, configured to send a data interaction message to a target process through a current process, where the data interaction message at least includes information of each shared access area, so that the current process and the target process perform data interaction based on any shared access area.
Specifically, the data interaction message at least includes information of each shared access area, for example, the information of the shared access area may include an address of the shared access area, a space size of the shared access area, and a process access attribute, where the process access attribute may include, for example, whether the shared access area is readable and writable, whether the code can be executed, and the like.
Further, the current process writes data information interacted with the target process in the shared access area;
and the target process registers the information of the shared access area into a preset list of the memory protection unit according to the data interaction message so as to be used for the target process to access the shared access area.
In another embodiment, the apparatus may further include a preprocessing module, configured to, in response to creation of a current process, allocate a first memory space to the current process, where the first memory space is a memory space allocated to access by the current process, and the first memory space includes a plurality of memory regions;
determining at least one shared access area in a plurality of memory areas;
and respectively registering the information of each shared access area into a preset list of the memory protection unit.
The obtaining module is specifically configured to obtain information of the shared access area from a preset list of the memory protection unit.
In another embodiment, the apparatus may further include a deleting module, configured to delete information of each shared access area in a preset list of the memory protection unit after performing data interaction with the target process.
The interprocess communication apparatus of this embodiment can execute the interprocess communication method shown in the foregoing embodiments of this application, and the implementation principles thereof are similar, and are not described herein again.
According to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
An embodiment of the present application provides an electronic device, including: a memory and a processor; at least one program stored in the memory for execution by the processor, which when executed by the processor, implements: according to the method and the device, the information of the shared access area pre-registered to the memory protection unit is obtained, and the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, and therefore processes except the processes which carry out interaction can not access the shared access area, and safety communication among the processes is achieved.
In an alternative embodiment, an electronic device is provided, as shown in fig. 6, the electronic device 4000 shown in fig. 6 comprising: a processor 4001 and a memory 4003. Processor 4001 is coupled to memory 4003, such as via bus 4002. Optionally, the electronic device 4000 may further include a transceiver 4004, and the transceiver 4004 may be used for data interaction between the electronic device and other electronic devices, such as transmission of data and/or reception of data. In addition, the transceiver 4004 is not limited to one in practical applications, and the structure of the electronic device 4000 is not limited to the embodiment of the present application.
The Processor 4001 may be a CPU (Central Processing Unit), a general-purpose Processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other Programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. The processor 4001 may also be a combination that performs a computational function, including, for example, a combination of one or more microprocessors, a combination of a DSP and a microprocessor, or the like.
Bus 4002 may include a path that carries information between the aforementioned components. The bus 4002 may be a PCI (Peripheral Component Interconnect) bus, an EISA (Extended Industry Standard Architecture) bus, or the like. The bus 4002 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 6, but this is not intended to represent only one bus or type of bus.
The Memory 4003 may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory) or other optical Disc storage, optical Disc storage (including Compact Disc, laser Disc, optical Disc, digital versatile Disc, blu-ray Disc, etc.), a magnetic Disc storage medium or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to these.
The memory 4003 is used for storing application codes for executing the scheme of the present application, and the execution is controlled by the processor 4001. Processor 4001 is configured to execute application code stored in memory 4003 to implement what is shown in the foregoing method embodiments.
Among them, electronic devices include but are not limited to: mobile phones, notebook computers, multimedia players, desktop computers, and the like.
The present application provides a computer-readable storage medium, on which a computer program is stored, which, when running on a computer, enables the computer to execute the corresponding content in the foregoing method embodiments. Compared with the prior art, the method and the device have the advantages that the information of the shared access area pre-registered to the memory protection unit is obtained, the data interaction message containing the information of the shared access area is sent to the target process, so that at least two processes can carry out data interaction by accessing the registered memory space, processes except the processes which carry out interaction cannot access the shared access area, and the safety communication among the processes is realized.
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
The foregoing is only a partial embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (10)

1. An interprocess communication method, comprising:
acquiring information of at least one shared access area, wherein the shared access area is a memory space pre-registered to a memory protection unit, so that at least two processes perform data interaction by accessing the registered memory space;
and sending a data interaction message to a target process through a current process, wherein the data interaction message at least comprises information of each shared access area, so that the data interaction between the current process and the target process is carried out based on any one shared access area.
2. The communication method of claim 1, wherein the method further comprises:
responding to the creation of a current process, and allocating a first memory space to the current process, wherein the first memory space is a memory space allocated to the current process for access, and the first memory space comprises a plurality of memory areas;
determining at least one memory area in the plurality of memory areas, or at least one memory block in the at least one memory area as the shared access area;
and respectively registering the information of each shared access area into a preset list of a memory protection unit.
3. The communication method according to claim 2, wherein the obtaining information of the at least one shared access area comprises:
and acquiring the information of the shared access area from a preset list of the memory protection unit.
4. The communication method according to claim 1, wherein the data interaction between the current process and the target process based on any one of the shared access areas comprises:
the current process writes data information interacted with a target process in the shared access area;
and the target process registers the information of the shared access area into a preset list of the memory protection unit according to the data interaction message so as to be used for the target process to access the shared access area.
5. The communication method according to claim 1, wherein the information of the shared access area includes at least one of an address of the shared access area, a space size of the shared access area, and a process access attribute.
6. The communication method of claim 1, wherein the method further comprises:
and after data interaction is carried out with the target process, deleting the information of each shared access area in a preset list of the memory protection unit.
7. An interprocess communication apparatus, comprising:
the system comprises an acquisition module, a storage module and a processing module, wherein the acquisition module is used for acquiring information of at least one shared access area, and the shared access area is a memory space pre-registered to a memory protection unit so that at least two processes can perform data interaction by accessing the registered memory space;
and the sending module is used for sending a data interaction message to a target process through a current process, wherein the data interaction message at least comprises information of each shared access area, so that the data interaction between the current process and the target process is carried out based on any one shared access area.
8. The communications device of claim 7, further comprising:
the system comprises a preprocessing module, a memory access module and a processing module, wherein the preprocessing module is used for responding to the creation of a current process and allocating a first memory space to the current process, the first memory space is a memory space allocated to the current process for access, and the first memory space comprises a plurality of memory areas;
determining at least one memory area in the plurality of memory areas, or at least one memory block in the at least one memory area as the shared access area;
and respectively registering the information of each shared access area into a preset list of a memory protection unit.
9. An electronic device, characterized in that the electronic device comprises:
one or more processors;
a memory;
one or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the one or more processors, the one or more programs configured to: performing the inter-process communication method according to any one of claims 1 to 6.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the inter-process communication method according to any one of claims 1 to 6.
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