CN112235580A

CN112235580A - Image encoding method, decoding method, device and storage medium

Info

Publication number: CN112235580A
Application number: CN201910636152.3A
Authority: CN
Inventors: 林永兵; 马莎
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-07-15
Filing date: 2019-07-15
Publication date: 2021-01-15
Also published as: WO2021008524A1

Abstract

The application provides an image encoding method, a decoding method, an apparatus and a storage medium. The image decoding method comprises the steps of obtaining a code stream, and obtaining residual images of grid images in an image sequence according to the code stream, wherein the image sequence comprises a plurality of grid images, and the geographic positions corresponding to the grid images are close or the image contents of the grid images are close. Performing inter-frame prediction on the grid images in the image sequence to obtain a predicted image of the grid images in the image sequence; and obtaining the grid images in the image sequence according to the residual images of the grid images in the image sequence and the predicted images of the grid images in the image sequence. The embodiment of the application can reduce the storage cost of the code stream.

Description

Image encoding method, decoding method, device and storage medium

Technical Field

The present application relates to the field of image encoding and decoding technologies, and in particular, to an image encoding method, a decoding method, an apparatus, and a storage medium.

Background

A laser detection and ranging (LiDAR) system is a radar system that employs a laser as a radiation source, which may be referred to as a LiDAR for short. The laser radar is a product combining a laser technology and a radar technology, and has the characteristics of high detection precision, large measurement range, non-contact, 3D and 360-degree measurement and the like. Laser radars are commonly used for high-precision map construction, high-precision positioning, target detection, 3D scene rendering and the like.

The 3D point cloud data volume generated by laser radar measurement is huge, which brings huge challenges to point cloud data storage and transmission. In order to reduce the storage capacity of the point cloud data, the 3D point cloud data is generally converted into 2D point cloud data as a positioning layer. However, the bitmap layer still covers a large geographical area, the data size is still large, and the code stream obtained by encoding the image in the point cloud data still occupies a large storage overhead.

Disclosure of Invention

The application provides an image encoding method, a decoding method, a device and a storage medium, which are used for reducing storage space occupied by code streams.

In a first aspect, an image decoding method is provided, which includes: acquiring a code stream; acquiring a residual image of a grid image in an image sequence according to the code stream; performing inter-frame prediction on the grid images in the image sequence to obtain a predicted image of the grid images in the image sequence; and obtaining the grid images in the image sequence according to the residual images of the grid images in the image sequence and the predicted images of the grid images in the image sequence.

The image sequence comprises a plurality of grid images, and the geographic positions corresponding to the grid images are close or the image contents of the grid images are close. Specifically, that the geographic locations corresponding to the plurality of grid images are close or the image contents of the plurality of grid images are close may mean that the plurality of grid images satisfy the first condition.

It should be understood that, the above-mentioned inter-frame prediction of the mesh image in the image sequence may be that the mesh image is predicted to obtain a residual image of the mesh image, and then the mesh image and the residual image of the mesh image are subtracted to obtain a residual image of the mesh image.

In addition, when performing inter prediction on a mesh image in an image sequence, the mesh image in the image sequence may be divided into image blocks, and then a prediction block of each image block is determined by using an inter prediction mode, so as to determine a residual block of each image block. In the present application, the predicted image of the above-mentioned mesh image may be composed of a predicted block of each image block in the mesh image, and the residual image of the mesh image may be composed of a residual block of each image block in the mesh image.

In the application, because the image sequence contains the grid images with similar geographic positions or similar image contents, when the image sequence is subjected to interframe prediction, the data volume of the obtained residual image can be smaller, and further, the code stream corresponding to the final image sequence occupies a smaller storage space, so that the storage or the transmission is facilitated.

With reference to the first aspect, in certain implementations of the first aspect, the first condition is that a distance between geographic positions corresponding to at least two grid images in the plurality of grid images is smaller than a preset distance.

The preset distance can also be a distance threshold, and the size of the preset distance can be flexibly set according to actual needs. For example, the above-mentioned preset distance may be set to 3m (3 meters), and when the distance between the corresponding geographical positions of the two mesh images is less than 3m, the two mesh images satisfy the first condition. Here, 3m is merely an example, and the preset distance may be set to 5m, 6m, and so on, and in any case, any suitable preset distance may be set as required.

In addition, the first condition may be that a distance between geographic positions corresponding to at least two mesh images in the plurality of mesh images is smaller than or equal to a preset distance.

Because the similarity of images with similar geographic positions is generally higher, when the image sequence includes at least two grid images adjacent to each other at corresponding geographic positions, the data volume of residual images obtained subsequently can be smaller by performing inter-frame prediction on the image sequence.

With reference to the first aspect, in certain implementations of the first aspect, the first condition is that a similarity of image contents of at least two mesh images of the plurality of mesh images is greater than or equal to a preset similarity.

The preset similarity can also be referred to as a similarity threshold, and the size of the preset similarity can be flexibly set according to actual needs. For example, the above-described preset similarity may be set to 50%, and when the similarity of the image contents of the two mesh images is greater than or equal to 50%, the two mesh images satisfy the first condition. Here, 50% is merely an example, and the preset similarity may be set to 55%, 60%, 65%, and so on, and in any case, any suitable size of the preset similarity may be set as required.

In addition, the first condition may be that the similarity of the image contents of at least two mesh images in the plurality of mesh images is greater than a preset similarity.

When the image sequence comprises at least two grid images with similar image contents, the data volume of a residual image obtained subsequently can be smaller by performing inter-frame prediction on the image sequence.

With reference to the first aspect, in certain implementations of the first aspect, the first condition is that image contents of at least two mesh images of the plurality of mesh images correspond to the same geographic area.

Since the similarity of images in the same geographic area is generally high, when the image sequence includes at least two mesh images located in the same geographic area, the data amount of a residual image obtained subsequently can be made small by performing inter-frame prediction on the image sequence.

The size of the geographical area may be a preset size, and the size of the geographical area may be set according to actual needs. For example, the size of the geographical area may be a 2m × 2m area. It should be understood that the geographic area size of the 2m × 2m area is merely an example, and the geographic area size may be set to be a 1m × 1m area, a 3m × 32m area, etc., and in any case, any suitable geographic area size may be set as desired.

As another example, the size of the geographical area is an area of 2m × 2m, and when both the mesh images are located in the area of 2m × 2m, the two mesh images satisfy the first condition.

With reference to the first aspect, in certain implementations of the first aspect, at least two of the above-mentioned mesh images are mesh images of adjacent frames between each other.

That is, the at least two mesh images satisfying the first condition are adjacent frames to each other.

For example, the mesh image 1, the mesh image 2, and the mesh image 3 in the above-described image sequence satisfy the above-described first condition. Then, the mesh image 1, the mesh image 2, and the mesh image 3 may be the ith frame, the (i + 1) th frame, and the (i + 2) th frame in the image sequence, respectively. Wherein i is a positive integer.

With reference to the first aspect, in some implementations of the first aspect, pixel values of a grid image in the image sequence are represented by M bits, each bit takes a value of 0 or 1, and M is an integer greater than 1, where the method further includes: and processing the grid images in the image sequence to obtain the processed grid images.

The value of the ith bit in the N bits of the pixel value of the grid image in the image sequence is opposite to the value of the ith bit in the N bits of the pixel value of the grid image in the processed image sequence, and the positions of the N bits of the pixel value of the grid image in the image sequence are the same as the positions of the N bits of the pixel value of the grid image in the processed image sequence.

N bits of pixel values of the grid images in the image sequence are located behind and adjacent to a first bit of the pixel values of the grid images in the image sequence, the first bit is a bit with a value of 1 and the highest digit in the pixel values of the grid images in the image sequence, i and N are positive integers, i is not more than N, and N is less than M.

In the application, the encoding end performs the negation processing on the pixel values of the grid image, so that the data volume of the grid image can be reduced under the condition that the pixel values of the grid image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space, and the decoding end performs the (negation) processing on the grid image obtained by decoding, so that the grid image processed (negated) by the encoding end can be restored, and further, the final grid image is obtained.

Wherein, the value of the 1 st bit of the N bits of the grid image in the processed image sequence is opposite to the value of the 1 st bit of the N bits of the grid image in the image sequence, and the value of the (i + 1) th bit of the N bits of the grid image in the processed image sequence is the result of performing exclusive or processing on the value of the (i + 1) th bit of the N bits of the grid image in the image sequence and the ith bit of the N bits of the grid image in the processed image sequence.

The N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to a first bit of the pixel values of the mesh images in the image sequence, the first bit being a bit having a value of 1 and a highest number of bits among the pixel values of the mesh images in the image sequence, or the N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to a highest bit of the pixel values of the mesh images in the image sequence.

The positions of N bits of the pixel values of the grid images in the image sequence are the same as the positions of N bits of the pixel values of the grid images in the processed image sequence, the number of the ith bit is higher than the number of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M.

In the application, the encoding end performs exclusive or processing on the pixel values of the grid image, so that the data volume of the grid image can be reduced under the condition that the pixel values of the grid image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space, and the decoding end performs exclusive or processing on the grid image obtained by decoding, so that the grid image processed (exclusive or processed) by the encoding end can be restored, and further, the final grid image is obtained.

With reference to the first aspect, in some implementations of the first aspect, the obtaining a mesh image in an image sequence according to a residual image of a mesh image in the image sequence and a predicted image of the mesh image in the image sequence includes: processing the residual image to obtain a processed residual image; and obtaining the grid image in the image sequence according to the processed residual image and the predicted image of the grid image in the image sequence.

The value of the ith bit of the N bits of the pixel value of the residual image is opposite to the value of the ith bit of the N bits of the pixel value of the processed residual image, and the positions of the N bits of the pixel value of the residual image and the N bits of the pixel value of the processed residual image are the same.

N bits of the pixel values of the residual image are located behind and adjacent to a first bit of the pixel values of the residual image, the first bit is a bit with a value of 1 and the highest digit in the pixel values of the residual image, i and N are positive integers, i is not more than N, and N is less than M.

In the application, the encoding end performs negation processing on the pixel values of the residual image, so that the data volume of the residual image can be reduced under the condition that the pixel values of the residual image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space, and the decoding end performs (negation) processing on the residual image obtained by decoding, so that the residual image processed (negated) by the encoding end can be restored, and further, a final image block is obtained according to the processed residual image.

The value of the 1 st bit of the N bits of the processed residual image is opposite to the value of the 1 st bit of the N bits of the residual image, and the value of the (i + 1) th bit of the N bits of the processed residual image is the result of performing exclusive or processing on the value of the (i + 1) th bit of the N bits of the residual image and the ith bit of the N bits of the processed residual image.

The N bits of the pixel value of the residual image are located after and adjacent to a first bit of the pixel value of the residual image, the first bit being a bit having a value of 1 and a highest bit number among the pixel values of the residual image, or the N bits of the pixel value of the residual image are located after and adjacent to a highest bit of the pixel value of the residual image.

The positions of N bits of the pixel value of the residual image are the same as the positions of N bits of the pixel value of the processed residual image, the number of bits of the ith bit is higher than the number of bits of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M;

in the application, the encoding end performs exclusive-or processing on the pixel values of the residual image, so that the data volume of the residual image can be reduced under the condition that the pixel values of the residual image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space, and the decoding end performs exclusive-or processing on the residual image obtained by decoding, so that the residual image processed (exclusive-or processing) by the encoding end can be restored, and further, the final image block can be obtained according to the processed residual image.

With reference to the first aspect, in some implementation manners of the first aspect, the obtaining a residual image of a mesh image in an image sequence according to a code stream includes: and performing inverse transformation, inverse quantization and entropy decoding on the code stream to obtain a residual image.

The decoding process corresponds to lossy encoding of the image, and the code stream obtained by encoding can occupy a smaller storage space as much as possible by the mode.

With reference to the first aspect, in some implementation manners of the first aspect, the obtaining a residual image of a mesh image in an image sequence according to a code stream includes: and carrying out entropy decoding processing on the code stream to obtain a residual error image.

The decoding method only performing entropy decoding processing corresponds to lossless coding, and the coding method can avoid image distortion as much as possible and ensure the final display effect of the image.

With reference to the first aspect, in some implementation manners of the first aspect, the code stream is obtained by encoding a positioning layer.

With reference to the first aspect, in some implementations of the first aspect, the pixel values of the positioning layer include rasterized elevation data.

The pixel values of the positioning layer contain M bits, each bit representing an occupied bit of each grid. Because the pixel values of the positioning layer contain the rasterized elevation data and the probability of the character '11' appearing at a high position in the elevation data is higher, the data amount of the pixel values of the positioning layer containing the elevation data can be reduced by processing the pixel values of the positioning layer, and the storage space occupied by the finally obtained code stream is further reduced.

With reference to the first aspect, in certain implementations of the first aspect, the value of M is any one of 8, 10, and 12.

In a second aspect, there is provided an image encoding method, the method comprising: acquiring an image sequence; performing inter-frame prediction on a grid image in an image sequence to obtain a residual image; and coding the residual image to obtain a coded code stream.

Specifically, the prediction image of the above-described mesh image may be composed of prediction blocks of the respective image blocks in the mesh image, and the residual image of the mesh image may be composed of residual blocks of the respective image blocks in the mesh image. When the coding end carries out coding, the residual image can be divided into image blocks, then a prediction block of each image block is obtained, a residual block of each image block is obtained according to each image block and the residual block of each image block, and then the residual image of the grid image is obtained.

In the application, because the image sequence comprises the grid images with similar geographic positions or similar image contents, when the image sequence is subjected to interframe prediction, the data volume of the obtained residual image can be smaller, and further, the code stream obtained by finally coding the image sequence occupies a smaller storage space, so that the storage or the transmission is facilitated.

With reference to the second aspect, in certain implementations of the second aspect, the first condition is that a distance between corresponding geographic positions of at least two grid images in the plurality of grid images is smaller than a preset distance.

The preset distance can also be a distance threshold, and the size of the preset distance can be flexibly set according to actual needs.

For example, the above-mentioned preset distance may be set to 3m (3 meters), and when the distance between the corresponding geographical positions of the two mesh images is less than 3m, the two mesh images satisfy the first condition. Here, 3m is merely an example, and the preset distance may be set to 5m, 6m, and so on, and in any case, any suitable preset distance may be set as required.

With reference to the second aspect, in certain implementations of the second aspect, the first condition is that a similarity of image contents of at least two mesh images of the plurality of mesh images is greater than or equal to a preset similarity.

The preset similarity can also be referred to as a similarity threshold, and the size of the preset similarity can be flexibly set according to actual needs.

For example, the above-described preset similarity may be set to 50%, and when the similarity of the image contents of the two mesh images is greater than or equal to 50%, the two mesh images satisfy the first condition. Here, 50% is merely an example, and the preset similarity may be set to 55%, 60%, 65%, and so on, and in any case, any suitable size of the preset similarity may be set as required.

With reference to the second aspect, in certain implementations of the second aspect, the first condition is that image contents of at least two mesh images in the image sequence correspond to the same geographic area.

With reference to the second aspect, in certain implementations of the second aspect, at least two of the mesh images are mesh images of adjacent frames to each other.

It is to be understood that the at least two mesh images satisfying the first condition described above may be adjacent frames to each other. For example, the mesh image 1, the mesh image 2, and the mesh image 3 in the above-described image sequence satisfy the above-described first condition. Then, the mesh image 1, the mesh image 2, and the mesh image 3 may be the ith frame, the (i + 1) th frame, and the (i + 2) th frame in the image sequence, respectively. Wherein i is a positive integer.

With reference to the second aspect, in some implementations of the second aspect, pixel values of a mesh image in an image sequence are represented by M bits, each bit takes a value of 0 or 1, M is an integer greater than 1, before performing inter-frame prediction on the mesh image in the image sequence, the method further includes: processing the grid images in the image sequence to obtain processed grid images; inter-prediction of a mesh image in an image sequence, comprising: and performing inter-frame prediction on the processed grid image to obtain a residual image.

In the application, the encoding end performs negation processing on the pixel values of the grid image, so that the data volume of the grid image can be reduced under the condition that the pixel values of the grid image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space.

In the application, the encoding end performs exclusive-or processing on the pixel values of the grid image, so that the data volume of the grid image can be reduced under the condition that the pixel values of the grid image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space.

With reference to the second aspect, in some implementations of the second aspect, the pixel value of the residual image is represented by M bits, a value of each bit is 0 or 1, and M is an integer greater than 1, where the encoding of the residual image to obtain an encoded code stream includes: processing the residual image to obtain a processed residual image; and coding the processed residual image to obtain a coded code stream.

Wherein the value of the ith bit in the N bits of the pixel value of the residual image is opposite to the value of the ith bit in the N bits of the pixel value of the processed residual image, the N bits of the pixel value of the residual image and the N bits of the pixel value of the processed residual image are located at the same position,

In the embodiment of the application, the encoding end performs exclusive-or processing on the pixel values of the residual image, so that the data volume of the residual image can be reduced under the condition that the pixel values of the residual image contain continuous placeholders, and further, the code stream generated by encoding occupies less storage space.

The value of the ith bit in the N bits of the pixel value of the residual image is opposite to the value of the ith bit in the N bits of the pixel value of the processed residual image, and the value of the (i + 1) th bit in the N bits of the processed residual image is the result of performing exclusive or processing on the value of the (i + 1) th bit in the N bits of the residual image and the ith bit in the N bits of the processed residual image.

The positions of N bits of the pixel value of the residual image are the same as the positions of N bits of the pixel value of the processed residual image, the number of bits of the ith bit is higher than the number of bits of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M.

With reference to the second aspect, in some implementation manners of the second aspect, the encoding the residual image to obtain an encoded code stream includes: and transforming, quantizing and entropy coding the residual image to obtain a coded code stream.

By adopting lossy coding, the code stream obtained by coding can occupy smaller storage space as much as possible.

With reference to the second aspect, in some implementation manners of the second aspect, the encoding the residual image to obtain an encoded code stream includes: and performing entropy coding processing on the residual image to obtain a coded code stream.

By adopting lossless coding, image distortion can be avoided as much as possible, and the final display effect of the image is ensured.

With reference to the second aspect, in some implementations of the second aspect, the grid tiles in the sequence of images are from a self-positioning layer.

With reference to the second aspect, in some implementations of the second aspect, the pixel values of the positioning layer include rasterized elevation data.

With reference to the second aspect, in some implementations of the second aspect, the value of M is any one of 8, 10, and 12.

In a third aspect, an image decoding apparatus is provided, which includes a module corresponding to the method of the first aspect, and the corresponding module is capable of implementing the steps of the method of the first aspect.

In a fourth aspect, an image encoding apparatus is provided, which comprises means corresponding to the method of the second aspect, and which are capable of implementing the steps of the method of the second aspect.

The image decoding apparatus of the third aspect or the image encoding apparatus of the fourth aspect may include one or more modules, and any one of the one or more modules may be configured by any one of a circuit, a field programmable gate array FPGA, an application specific integrated circuit ASIC, and a general processor.

In a fifth aspect, there is provided an image decoding apparatus comprising a memory and a processor, the processor calling program code stored in the memory to perform the method of the first aspect.

In a sixth aspect, there is provided an image encoding apparatus comprising a memory and a processor, the processor invoking program code stored in the memory to perform the method of the second aspect.

Optionally, the memory is a non-volatile memory.

Optionally, the memory and the processor are coupled to each other.

The image decoding apparatus may be referred to as an image decoder, and the image encoding apparatus may be referred to as an image encoder.

In a seventh aspect, this application provides a computer-readable storage medium storing instructions for causing one or more processors to perform the method in the first aspect or the second aspect.

Any of the one or more processors may be comprised of any of a circuit, a field programmable gate array, FPGA, an application specific integrated circuit, ASIC, and a general purpose processor.

In an eighth aspect, embodiments of the present application provide a computer program product, which when run on a computer, causes the computer to perform some or all of the steps of the method of the first or second aspect.

Drawings

FIG. 1 is a schematic block diagram of an example video encoding system for implementing an embodiment of the present application;

FIG. 2 is a block schematic diagram of an example video encoder for implementing embodiments of the present application;

FIG. 3 is a block schematic diagram of an example video decoder for implementing embodiments of the present application;

FIG. 4 is a schematic block diagram of an example video coding system for implementing embodiments of the present application;

FIG. 5 is a schematic block diagram of an example video coding apparatus for implementing embodiments of the present application;

FIG. 6 is a schematic block diagram of an example of an encoding apparatus or a decoding apparatus for implementing embodiments of the present application;

FIG. 7 is a diagram of spatial and temporal candidate motion information for a current coding unit;

fig. 8 is a schematic diagram of a procedure of an image encoding method of an embodiment of the present application;

fig. 9 is a schematic diagram of a procedure of an image encoding method of an embodiment of the present application;

fig. 10 is a schematic diagram of a procedure of an image encoding method of an embodiment of the present application;

FIG. 11 is a schematic flow chart diagram of an image decoding method of an embodiment of the present application;

FIG. 12 is a schematic flow chart diagram of an image decoding method of an embodiment of the present application;

FIG. 13 is a schematic flow chart diagram of an image decoding method of an embodiment of the present application;

FIG. 14 is a schematic flow chart of an image encoding method of an embodiment of the present application;

FIG. 15 is a schematic flow chart of an image encoding method of an embodiment of the present application;

FIG. 16 is a diagram illustrating the performance of coding using an inversion operation;

FIG. 17 is a diagram of the performance of encoding using an XOR operation;

FIG. 18 is a schematic flow chart of an image encoding method of an embodiment of the present application;

FIG. 19 is a diagram of an image sequence including I-frames and P-frames;

FIG. 20 is a schematic representation of the conversion of 3D point cloud data to 2D planar data;

fig. 21 is a schematic block diagram of an image decoding apparatus of an embodiment of the present application;

FIG. 22 is a schematic block diagram of an image encoding apparatus of an embodiment of the present application;

fig. 23 is a schematic block diagram of an image decoding apparatus of an embodiment of the present application;

fig. 24 is a schematic block diagram of an image encoding apparatus according to an embodiment of the present application.

Detailed Description

The technical solution in the present application will be described below with reference to the accompanying drawings.

In the following description, reference is made to the accompanying drawings which form a part hereof and in which is shown by way of illustration specific aspects of embodiments of the application or in which specific aspects of embodiments of the application may be employed. It should be understood that embodiments of the present application may also be used in other respects, and may include structural or logical changes not depicted in the drawings. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present application is defined by the appended claims.

For example, it should be understood that the disclosure in connection with the described methods may equally apply to the corresponding apparatus or system performing the described methods, and vice versa.

For another example, if one or more particular method steps are described, the corresponding apparatus may comprise one or more units, such as functional units, to perform the described one or more method steps (e.g., a unit performs one or more steps, or multiple units, each of which performs one or more of the multiple steps), even if such one or more units are not explicitly described or illustrated in the figures.

Furthermore, if a particular apparatus is described based on one or more units, such as functional units, the corresponding method may include one step to perform the function of the one or more units (e.g., one step to perform the function of the one or more units, or multiple steps, each of which performs the function of one or more of the plurality of units), even if such one or more steps are not explicitly described or illustrated in the figures. Further, it is to be understood that features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless explicitly stated otherwise.

The technical scheme related to the embodiment of the application can be applied to the H.266 standard and the future video coding standard. The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application. Some concepts that may be involved in embodiments of the present application are briefly described below.

The image encoding and decoding in the present application is the same as the encoding and decoding of video images, and some basic processes and related contents of the encoding and decoding of video images are described in detail below.

Video coding generally refers to processing a sequence of pictures that form a video or video sequence. In the field of video coding, the terms "picture", "frame" or "image" may be used as synonyms. Video encoding as used herein means video encoding or video decoding. Video encoding is performed on the source side, typically including processing (e.g., by compressing) the original video picture to reduce the amount of data required to represent the video picture for more efficient storage and/or transmission. Video decoding is performed at the destination side, typically involving inverse processing with respect to the encoder, to reconstruct the video pictures. Embodiments are directed to video picture "encoding" to be understood as referring to "encoding" or "decoding" of a video sequence. The combination of the encoding part and the decoding part is also called codec (encoding and decoding).

A video sequence comprises a series of images (pictures) which are further divided into slices (slices) which are further divided into blocks (blocks). Video coding performs the coding process in units of blocks, and in some new video coding standards, the concept of blocks is further extended. For example, in the h.264 standard, there is a Macroblock (MB), which may be further divided into a plurality of prediction blocks (partitions) that can be used for predictive coding. In the High Efficiency Video Coding (HEVC) standard, basic concepts such as a Coding Unit (CU), a Prediction Unit (PU), and a Transform Unit (TU) are adopted, and various block units are functionally divided, and a brand new tree-based structure is adopted for description. For example, a CU may be partitioned into smaller CUs according to a quadtree, and the smaller CUs may be further partitioned to form a quadtree structure, where the CU is a basic unit for partitioning and encoding an encoded image. There is also a similar tree structure for PU and TU, and PU may correspond to a prediction block, which is the basic unit of predictive coding. The CU is further partitioned into PUs according to a partitioning pattern. A TU may correspond to a transform block, which is a basic unit for transforming a prediction residual. However, CU, PU and TU are basically concepts of blocks (or image blocks).

For example, in HEVC, a CTU is split into multiple CUs by using a quadtree structure represented as a coding tree. A decision is made at the CU level whether to encode a picture region using inter-picture (temporal) or intra-picture (spatial) prediction. Each CU may be further split into one, two, or four PUs according to the PU split type. The same prediction process is applied within one PU and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying a prediction process based on the PU split type, the CU may be partitioned into Transform Units (TUs) according to other quadtree structures similar to the coding tree used for the CU. In recent developments in video compression technology, coded blocks are partitioned using quad-tree and binary tree (QTBT) partitions to partition frames. In the QTBT block structure, a CU may be square or rectangular in shape.

Herein, for convenience of description and understanding, an image block to be encoded in a currently encoded image may be referred to as a current image block, e.g., in encoding, a block currently being encoded; in decoding, refers to the block currently being decoded. A decoded image block in a reference picture used for predicting a current image block is referred to as a reference block, i.e. a reference block is a block that provides a reference signal for the current image block, wherein the reference signal represents pixel values within the image block. A block in a reference picture that provides a prediction signal for a current image block may be a prediction block, where the prediction signal represents pixel values or sample values or sampled signals within the prediction block. For example, after traversing multiple reference blocks, a best reference block is found that will provide prediction for the current image block, which is called a prediction block.

In the case of lossless video coding, the original video picture can be reconstructed, i.e., the reconstructed video picture has the same quality as the original video picture (assuming no transmission loss or other data loss during storage or transmission). In the case of lossy video coding, the amount of data needed to represent the video picture is reduced by performing further compression, e.g., by quantization, while the decoder side cannot fully reconstruct the video picture, i.e., the quality of the reconstructed video picture is lower or worse than the quality of the original video picture.

Several video coding standards of h.261 belong to the "lossy hybrid video codec" (i.e., the combination of spatial and temporal prediction in the sample domain with 2D transform coding in the transform domain for applying quantization). Each picture of a video sequence is typically partitioned into non-overlapping sets of blocks, typically encoded at the block level. In other words, the encoder side typically processes, i.e., encodes, video at the block (video block) level, e.g., generates a prediction block by spatial (intra-picture) prediction and temporal (inter-picture) prediction, subtracts the prediction block from the current image block (the current or block to be processed) to obtain a residual block, transforms the residual block and quantizes the residual block in the transform domain to reduce the amount of data to be transmitted (compressed), while the decoder side applies the inverse processing portion relative to the encoder to the encoded or compressed block to reconstruct the current image block for representation. In addition, the encoder replicates the decoder processing loop such that the encoder and decoder generate the same prediction (e.g., intra-prediction and inter-prediction) and/or reconstruction for processing, i.e., encoding, subsequent blocks.

The system architecture to which the embodiments of the present application apply is described below. Referring to fig. 1, fig. 1 schematically shows a block diagram of a video encoding and decoding system 10 to which an embodiment of the present application is applied. As shown in fig. 1, video encoding and decoding system 10 may include a source device 12 and a destination device 14, source device 12 generating encoded video data and, thus, source device 12 may be referred to as a video encoding apparatus. Destination device 14 may decode the encoded video data generated by source device 12, and thus destination device 14 may be referred to as a video decoding apparatus. Various implementations of source apparatus 12, destination apparatus 14, or both may include one or more processors and memory coupled to the one or more processors. The memory can include, but is not limited to, a read-only memory (ROM), a Random Access Memory (RAM), an erasable programmable read-only memory (EPROM), a flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures that can be accessed by a computer, as described herein. Source apparatus 12 and destination apparatus 14 may comprise a variety of devices, including desktop computers, mobile computing devices, notebook (e.g., laptop) computers, tablet computers, set-top boxes, telephone handsets such as so-called "smart" phones, televisions, cameras, display devices, digital media players, video game consoles, on-board computers, wireless communication devices, or the like.

Although fig. 1 depicts source device 12 and destination device 14 as separate devices, device embodiments may also include the functionality of both source device 12 and destination device 14 or both, i.e., source device 12 or corresponding functionality and destination device 14 or corresponding functionality. In such embodiments, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be implemented using the same hardware and/or software, or using separate hardware and/or software, or any combination thereof.

A communication connection may be made between source device 12 and destination device 14 over link 13, and destination device 14 may receive encoded video data from source device 12 via link 13. Link 13 may include one or more media or devices capable of moving encoded video data from source device 12 to destination device 14. In one example, link 13 may include one or more communication media that enable source device 12 to transmit encoded video data directly to destination device 14 in real-time. In this example, source apparatus 12 may modulate the encoded video data according to a communication standard, such as a wireless communication protocol, and may transmit the modulated video data to destination apparatus 14. The one or more communication media may include wireless and/or wired communication media such as a Radio Frequency (RF) spectrum or one or more physical transmission lines. The one or more communication media may form part of a packet-based network, such as a local area network, a wide area network, or a global network (e.g., the internet). The one or more communication media may include a router, switch, base station, or other apparatus that facilitates communication from source apparatus 12 to destination apparatus 14.

Source device 12 includes an encoder 20, and in the alternative, source device 12 may also include a picture source 16, a picture preprocessor 18, and a communication interface 22. In one implementation, the encoder 20, the picture source 16, the picture preprocessor 18, and the communication interface 22 may be hardware components of the source device 12 or may be software programs of the source device 12.

Described below, respectively:

the picture source 16, which may include or be any type of picture capturing device, may be used, for example, to capture real-world pictures, and/or any type of picture or comment generating device (for screen content encoding, some text on the screen is also considered part of the picture or image to be encoded), such as a computer graphics processor for generating computer animated pictures, or any type of device for obtaining and/or providing real-world pictures, computer animated pictures (e.g., screen content, Virtual Reality (VR) pictures), and/or any combination thereof (e.g., Augmented Reality (AR) pictures). The picture source 16 may be a camera for capturing pictures or a memory for storing pictures, and the picture source 16 may also include any kind of (internal or external) interface for storing previously captured or generated pictures and/or for obtaining or receiving pictures. When picture source 16 is a camera, picture source 16 may be, for example, an integrated camera local or integrated in the source device; when the picture source 16 is a memory, the picture source 16 may be an integrated memory local or integrated, for example, in the source device. When the picture source 16 comprises an interface, the interface may for example be an external interface receiving pictures from an external video source, for example an external picture capturing device such as a camera, an external memory or an external picture generating device, for example an external computer graphics processor, a computer or a server. The interface may be any kind of interface according to any proprietary or standardized interface protocol, e.g. a wired or wireless interface, an optical interface.

The picture can be regarded as a two-dimensional array or matrix of pixel elements (picture elements). The pixels in the array may also be referred to as sampling points. The number of sampling points of the array or picture in the horizontal and vertical directions (or axes) defines the size and/or resolution of the picture. To represent color, three color components are typically employed, i.e., a picture may be represented as or contain three sample arrays. For example, in RBG format or color space, a picture includes corresponding arrays of red, green, and blue samples. However, in video coding, each pixel is typically represented in a luminance/chrominance format or color space, e.g. for pictures in YUV format, comprising a luminance component (sometimes also indicated with L) indicated by Y and two chrominance components indicated by U and V. The luminance (luma) component Y represents luminance or gray level intensity (e.g., both are the same in a gray scale picture), while the two chrominance (chroma) components U and V represent chrominance or color information components. Accordingly, a picture in YUV format includes a luma sample array of luma sample values (Y), and two chroma sample arrays of chroma values (U and V). Pictures in RGB format can be converted or transformed into YUV format and vice versa, a process also known as color transformation or conversion. If the picture is black and white, the picture may include only an array of luminance samples. In the embodiment of the present application, the pictures transmitted from the picture source 16 to the picture processor may also be referred to as raw picture data 17.

Picture pre-processor 18 is configured to receive original picture data 17 and perform pre-processing on original picture data 17 to obtain pre-processed picture 19 or pre-processed picture data 19. For example, the pre-processing performed by picture pre-processor 18 may include trimming, color format conversion (e.g., from RGB format to YUV format), toning, or de-noising.

An encoder 20 (or video encoder 20) for receiving the pre-processed picture data 19, processing the pre-processed picture data 19 with a relevant prediction mode (such as the prediction mode in various embodiments herein), thereby providing encoded picture data 21 (structural details of the encoder 20 will be described further below based on fig. 2 or fig. 4 or fig. 5). In some embodiments, the encoder 20 may be configured to perform various embodiments described hereinafter to implement the application of the encoding method described in the present application on the encoding side.

A communication interface 22, which may be used to receive encoded picture data 21 and may transmit encoded picture data 21 over link 13 to destination device 14 or any other device (e.g., memory) for storage or direct reconstruction, which may be any device for decoding or storage. The communication interface 22 may be used, for example, to encapsulate the encoded picture data 21 into a suitable format, such as a data packet, for transmission over the link 13.

Destination device 14 includes a decoder 30, and optionally destination device 14 may also include a communication interface 28, a picture post-processor 32, and a display device 34. Described below, respectively:

communication interface 28 may be used to receive encoded picture data 21 from source device 12 or any other source, such as a storage device, such as an encoded picture data storage device. The communication interface 28 may be used to transmit or receive the encoded picture data 21 by way of the link 13 between the source device 12 and the destination device 14, or via any kind of network, such as a direct wired or wireless connection, any kind of network, such as a wired or wireless network or any combination thereof, or any kind of private and public networks, or any combination thereof. Communication interface 28 may, for example, be used to decapsulate data packets transmitted by communication interface 22 to obtain encoded picture data 21.

Both communication interface 28 and communication interface 22 may be configured as a one-way communication interface or a two-way communication interface, and may be used, for example, to send and receive messages to establish a connection, acknowledge and exchange any other information related to a communication link and/or data transfer, such as an encoded picture data transfer.

A decoder 30 (otherwise referred to as decoder 30) for receiving the encoded picture data 21 and providing decoded picture data 31 or decoded pictures 31 (structural details of the decoder 30 will be described further below based on fig. 3 or fig. 4 or fig. 5). In some embodiments, the decoder 30 may be configured to perform various embodiments described hereinafter to implement the application of the decoding method described in the present application on the decoding side.

A picture post-processor 32 for performing post-processing on the decoded picture data 31 (also referred to as reconstructed picture data) to obtain post-processed picture data 33. Post-processing performed by picture post-processor 32 may include: color format conversion (e.g., from YUV format to RGB format), toning, trimming or resampling, or any other process may also be used to transmit post-processed picture data 33 to display device 34.

A display device 34 for receiving the post-processed picture data 33 for displaying pictures to, for example, a user or viewer. Display device 34 may be or may include any type of display for presenting the reconstructed picture, such as an integrated or external display or monitor. For example, the display may include a Liquid Crystal Display (LCD), an Organic Light Emitting Diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), a Digital Light Processor (DLP), or any other display of any kind.

Although source device 12 and destination device 14 are depicted in fig. 1 as separate devices, device embodiments may also include the functionality of both source device 12 and destination device 14 or both, i.e., source device 12 or corresponding functionality and destination device 14 or corresponding functionality. In such embodiments, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be implemented using the same hardware and/or software, or using separate hardware and/or software, or any combination thereof.

It will be apparent to those skilled in the art from this description that the existence and (exact) division of the functionality of the different elements or source device 12 and/or destination device 14 shown in fig. 1 may vary depending on the actual device and application. Source device 12 and destination device 14 may comprise any of a variety of devices, including any type of handheld or stationary device, such as a notebook or laptop computer, a mobile phone, a smartphone, a tablet or tablet computer, a camcorder, a desktop computer, a set-top box, a television, a camera, an in-vehicle device, a display device, a digital media player, a video game console, a video streaming device (e.g., a content service server or a content distribution server), a broadcast receiver device, a broadcast transmitter device, etc., and may not use or use any type of operating system.

Both encoder 20 and decoder 30 may be implemented as any of a variety of suitable circuits, such as one or more microprocessors, Digital Signal Processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combinations thereof. If the techniques are implemented in part in software, the device may store instructions of the software in a suitable non-transitory computer-readable storage medium and may execute the instructions in hardware using one or more processors to perform the techniques of this application. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered as one or more processors.

In some cases, the video encoding and decoding system 10 shown in fig. 1 is merely an example, and the techniques of this application may be applicable to video encoding settings (e.g., video encoding or video decoding) that do not necessarily involve any data communication between the encoding and decoding devices. In other examples, the data may be retrieved from local storage, streamed over a network, and so on. A video encoding device may encode and store data to a memory, and/or a video decoding device may retrieve and decode data from a memory. In some examples, the encoding and decoding are performed by devices that do not communicate with each other, but merely encode data to and/or retrieve data from memory and decode data.

Referring to fig. 2, fig. 2 shows a schematic/conceptual block diagram of an example of an encoder 20 for implementing embodiments of the present application. In the example of fig. 2, encoder 20 includes a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, a loop filter unit 220, a Decoded Picture Buffer (DPB) 230, a prediction processing unit 260, and an entropy encoding unit 270. Prediction processing unit 260 may include inter prediction unit 244, intra prediction unit 254, and mode selection unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown in the figure). The encoder 20 shown in fig. 2 may also be referred to as a hybrid video encoder or a video encoder according to a hybrid video codec.

For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260, and the entropy encoding unit 270 form a forward signal path of the encoder 20, and, for example, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the Decoded Picture Buffer (DPB) 230, the prediction processing unit 260 form a backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to a signal path of a decoder (see the decoder 30 in fig. 3).

The encoder 20 receives, e.g., via an input 202, a picture 201 or an image block 203 of a picture 201, e.g., a picture in a sequence of pictures forming a video or a video sequence. Image block 203 may also be referred to as a current picture block or a picture block to be encoded, and picture 201 may be referred to as a current picture or a picture to be encoded (especially when the current picture is distinguished from other pictures in video encoding, such as previously encoded and/or decoded pictures in the same video sequence, i.e., a video sequence that also includes the current picture).

An embodiment of the encoder 20 may comprise a partitioning unit (not shown in fig. 2) for partitioning the picture 201 into a plurality of blocks, e.g. image blocks 203, typically into a plurality of non-overlapping blocks. The partitioning unit may be used to use the same block size for all pictures in a video sequence and a corresponding grid defining the block size, or to alter the block size between pictures or subsets or groups of pictures and partition each picture into corresponding blocks.

In one example, prediction processing unit 260 of encoder 20 may be used to perform any combination of the above-described segmentation techniques.

Like picture 201, image block 203 is also or can be considered as a two-dimensional array or matrix of sample points having sample values, although its size is smaller than picture 201. In other words, the image block 203 may comprise, for example, one sample array (e.g., a luma array in the case of a black and white picture 201) or three sample arrays (e.g., a luma array and two chroma arrays in the case of a color picture) or any other number and/or class of arrays depending on the color format applied. The number of sampling points in the horizontal and vertical directions (or axes) of the image block 203 defines the size of the image block 203.

The encoder 20 as shown in fig. 2 is used to encode a picture 201 block by block, e.g. performing encoding and prediction for each image block 203.

The residual calculation unit 204 is configured to calculate a residual block 205 based on the picture image block 203 and the prediction block 265 (further details of the prediction block 265 are provided below), e.g. by subtracting sample values of the prediction block 265 from sample values of the picture image block 203 sample by sample (pixel by pixel) to obtain the residual block 205 in the sample domain.

The transform processing unit 206 is configured to apply a transform, such as a Discrete Cosine Transform (DCT) or a Discrete Sine Transform (DST), on the sample values of the residual block 205 to obtain transform coefficients 207 in a transform domain. The transform coefficients 207 may also be referred to as transform residual coefficients and represent the residual block 205 in the transform domain.

The transform processing unit 206 may be used to apply integer approximations of DCT/DST, such as the transform specified for HEVC/h.265. Such integer approximations are typically scaled by some factor compared to the orthogonal DCT transform. To maintain the norm of the residual block processed by the forward transform and the inverse transform, an additional scaling factor is applied as part of the transform process. The scaling factor is typically selected based on certain constraints, e.g., the scaling factor is a power of 2 for a shift operation, a trade-off between bit depth of transform coefficients, accuracy and implementation cost, etc. For example, a specific scaling factor may be specified on the decoder 30 side for the inverse transform by, for example, inverse transform processing unit 212 (and on the encoder 20 side for the corresponding inverse transform by, for example, inverse transform processing unit 212), and correspondingly, a corresponding scaling factor may be specified on the encoder 20 side for the forward transform by transform processing unit 206.

Quantization unit 208 is used to quantize transform coefficients 207, e.g., by applying scalar quantization or vector quantization, to obtain quantized transform coefficients 209. Quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209. The quantization process may reduce the bit depth associated with some or all of transform coefficients 207. For example, an n-bit transform coefficient may be rounded down to an m-bit transform coefficient during quantization, where n is greater than m. The quantization level may be modified by adjusting a Quantization Parameter (QP). For example, for scalar quantization, different scales may be applied to achieve finer or coarser quantization. Smaller quantization steps correspond to finer quantization and larger quantization steps correspond to coarser quantization. An appropriate quantization step size may be indicated by a Quantization Parameter (QP). For example, the quantization parameter may be an index of a predefined set of suitable quantization step sizes. For example, a smaller quantization parameter may correspond to a fine quantization (smaller quantization step size) and a larger quantization parameter may correspond to a coarse quantization (larger quantization step size), or vice versa. The quantization may comprise a division by a quantization step size and a corresponding quantization or inverse quantization, e.g. performed by inverse quantization 210, or may comprise a multiplication by a quantization step size. Embodiments according to some standards, such as HEVC, may use a quantization parameter to determine the quantization step size. In general, the quantization step size may be calculated based on the quantization parameter using a fixed point approximation of an equation that includes division. Additional scaling factors may be introduced for quantization and dequantization to recover the norm of the residual block that may be modified due to the scale used in the fixed point approximation of the equation for the quantization step size and quantization parameter. In one example implementation, the inverse transform and inverse quantization scales may be combined. Alternatively, a custom quantization table may be used and signaled from the encoder to the decoder, e.g., in a bitstream. Quantization is a lossy operation, where the larger the quantization step size, the greater the loss.

The inverse quantization unit 210 is configured to apply inverse quantization of the quantization unit 208 on the quantized coefficients to obtain inverse quantized coefficients 211, e.g., to apply an inverse quantization scheme of the quantization scheme applied by the quantization unit 208 based on or using the same quantization step as the quantization unit 208. The dequantized coefficients 211 may also be referred to as dequantized residual coefficients 211, corresponding to transform coefficients 207, although the loss due to quantization is typically not the same as the transform coefficients.

The inverse transform processing unit 212 is configured to apply an inverse transform of the transform applied by the transform processing unit 206, for example, an inverse Discrete Cosine Transform (DCT) or an inverse Discrete Sine Transform (DST), to obtain an inverse transform block 213 in the sample domain. The inverse transform block 213 may also be referred to as an inverse transform dequantized block 213 or an inverse transform residual block 213.

The reconstruction unit 214 (e.g., summer 214) is used to add the inverse transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain the reconstructed block 215 in the sample domain, e.g., to add sample values of the reconstructed residual block 213 to sample values of the prediction block 265.

Optionally, a buffer unit 216 (or simply "buffer" 216) of the line buffer 216 may be used to buffer or store the reconstructed block 215 and corresponding sample values for intra prediction, for example. In other embodiments, the encoder may be used to use the unfiltered reconstructed block and/or corresponding sample values stored in buffer unit 216 for any class of estimation and/or prediction, such as intra prediction.

For example, an embodiment of encoder 20 may be configured such that buffer unit 216 is used not only to store reconstructed blocks 215 for intra prediction 254, but also for loop filter unit 220 (not shown in fig. 2), and/or such that buffer unit 216 and decoded picture buffer unit 230 form one buffer, for example. Other embodiments may be used to use filtered block 221 and/or blocks or samples from decoded picture buffer 230 (neither shown in fig. 2) as input or basis for intra prediction 254.

The loop filter unit 220 (or simply loop filter 220) is used to filter the reconstructed block 215 to obtain a filtered block 221, so as to facilitate pixel transition or improve video quality. Loop filter unit 220 is intended to represent one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or other filters, such as a bilateral filter, an Adaptive Loop Filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although loop filter unit 220 is shown in fig. 2 as an in-loop filter, in other configurations, loop filter unit 220 may be implemented as a post-loop filter. The filtered block 221 may also be referred to as a filtered reconstructed block 221. The decoded picture buffer 230 may store the reconstructed encoded block after the loop filter unit 220 performs a filtering operation on the reconstructed encoded block.

Embodiments of encoder 20 (correspondingly, loop filter unit 220) may be configured to output loop filter parameters (e.g., sample adaptive offset information), e.g., directly or after entropy encoding by entropy encoding unit 270 or any other entropy encoding unit, e.g., such that decoder 30 may receive and apply the same loop filter parameters for decoding.

Decoded Picture Buffer (DPB) 230 may be a reference picture memory that stores reference picture data for use by encoder 20 in encoding video data. DPB 230 may be formed from any of a variety of memory devices, such as Dynamic Random Access Memory (DRAM) including Synchronous DRAM (SDRAM), Magnetoresistive RAM (MRAM), Resistive RAM (RRAM), or other types of memory devices. The DPB 230 and the buffer 216 may be provided by the same memory device or separate memory devices. In a certain example, a Decoded Picture Buffer (DPB) 230 is used to store filtered blocks 221. Decoded picture buffer 230 may further be used to store other previous filtered blocks, such as previous reconstructed and filtered blocks 221, of the same current picture or of a different picture, such as a previous reconstructed picture, and may provide the complete previous reconstructed, i.e., decoded picture (and corresponding reference blocks and samples) and/or the partially reconstructed current picture (and corresponding reference blocks and samples), e.g., for inter prediction. In a certain example, if reconstructed block 215 is reconstructed without in-loop filtering, Decoded Picture Buffer (DPB) 230 is used to store reconstructed block 215.

Prediction processing unit 260, also referred to as block prediction processing unit 260, is used to receive or obtain image block 203 (current image block 203 of current picture 201) and reconstructed picture data, e.g., reference samples of the same (current) picture from buffer 216 and/or reference picture data 231 of one or more previously decoded pictures from decoded picture buffer 230, and to process such data for prediction, i.e., to provide prediction block 265, which may be inter-predicted block 245 or intra-predicted block 255.

The mode selection unit 262 may be used to select a prediction mode (e.g., intra or inter prediction mode) and/or a

corresponding prediction block

245 or 255 used as the prediction block 265 to calculate the residual block 205 and reconstruct the reconstructed block 215.

Embodiments of mode selection unit 262 may be used to select prediction modes (e.g., from those supported by prediction processing unit 260) that provide the best match or the smallest residual (smallest residual means better compression in transmission or storage), or that provide the smallest signaling overhead (smallest signaling overhead means better compression in transmission or storage), or both. The mode selection unit 262 may be configured to determine a prediction mode based on Rate Distortion Optimization (RDO), i.e., select a prediction mode that provides the minimum rate distortion optimization, or select a prediction mode in which the associated rate distortion at least meets the prediction mode selection criteria.

The prediction processing performed by the example of the encoder 20 (e.g., by the prediction processing unit 260) and the mode selection performed (e.g., by the mode selection unit 262) will be explained in detail below.

As described above, the encoder 20 is configured to determine or select the best or optimal prediction mode from a set of (predetermined) prediction modes. The prediction mode set may include, for example, intra prediction modes and/or inter prediction modes.

The intra prediction mode set may include 35 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes as defined in h.265, or may include 67 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes as defined in h.266 under development.

In a possible implementation, the set of inter prediction modes may for example comprise an Advanced Motion Vector (AMVP) mode and a merge (merge) mode depending on available reference pictures (i.e. at least partially decoded pictures stored in the DBP230, for example, as described above) and other inter prediction parameters, for example depending on whether the best matching reference block is searched using the entire reference picture or only a portion of the reference picture, for example, a search window region of a region surrounding the current image block, and/or depending on whether pixel interpolation, such as half-pixel and/or quarter-pixel interpolation, is applied. In a specific implementation, the inter prediction mode set may include an improved control point-based AMVP mode and an improved control point-based merge mode according to an embodiment of the present application. In one example, intra-prediction unit 254 may be used to perform any combination of the inter-prediction techniques described below.

In addition to the above prediction mode, embodiments of the present application may also apply a skip mode and/or a direct mode.

The prediction processing unit 260 may further be configured to partition the image block 203 into smaller block partitions or sub-blocks, for example, by iteratively using quad-tree (QT) partitions, binary-tree (BT) partitions, or triple-tree (TT) partitions, or any combination thereof, and to perform prediction, for example, for each of the block partitions or sub-blocks, wherein mode selection includes selecting a tree structure of the partitioned image block 203 and selecting a prediction mode to apply to each of the block partitions or sub-blocks.

The inter prediction unit 244 may include a Motion Estimation (ME) unit (not shown in fig. 2) and a Motion Compensation (MC) unit (not shown in fig. 2). The motion estimation unit is used to receive or obtain a picture image block 203 (current picture image block 203 of current picture 201) and a decoded picture 231, or at least one or more previously reconstructed blocks, e.g., reconstructed blocks of one or more other/different previously decoded pictures 231, for motion estimation. For example, the video sequence may comprise a current picture and a previously decoded picture 31, or in other words, the current picture and the previously decoded picture 31 may be part of, or form, a sequence of pictures forming the video sequence.

For example, the encoder 20 may be configured to select a reference block from a plurality of reference blocks of the same or different one of a plurality of other pictures and provide the reference picture and/or an offset (spatial offset) between the position (X, Y coordinates) of the reference block and the position of the current image block to a motion estimation unit (not shown in fig. 2) as an inter prediction parameter. This offset is also called a Motion Vector (MV).

The motion compensation unit is configured to obtain inter-prediction parameters and perform inter-prediction based on or using the inter-prediction parameters to obtain an inter-prediction block 245. The motion compensation performed by the motion compensation unit (not shown in fig. 2) may involve taking or generating a prediction block based on a motion/block vector determined by motion estimation (possibly performing interpolation to sub-pixel precision). Interpolation filtering may generate additional pixel samples from known pixel samples, potentially increasing the number of candidate prediction blocks that may be used to encode a picture block. Upon receiving the motion vector for the PU of the current picture block, motion compensation unit 246 may locate the prediction block in one reference picture list to which the motion vector points. Motion compensation unit 246 may also generate syntax elements associated with the blocks and video slices for use by decoder 30 in decoding picture blocks of the video slices.

Specifically, the inter prediction unit 244 may transmit a syntax element including an inter prediction parameter (e.g., indication information for selecting an inter prediction mode for current image block prediction after traversing a plurality of inter prediction modes) to the entropy encoding unit 270. In a possible application scenario, if there is only one inter prediction mode, the inter prediction parameters may not be carried in the syntax element, and the decoding end 30 can directly use the default prediction mode for decoding. It will be appreciated that the inter prediction unit 244 may be used to perform any combination of inter prediction techniques.

The intra prediction unit 254 is used to obtain, for example, a picture block 203 (current picture block) of the same picture and one or more previously reconstructed blocks, e.g., reconstructed neighboring blocks, to be received for intra estimation. For example, the encoder 20 may be configured to select an intra-prediction mode from a plurality of (predetermined) intra-prediction modes.

Embodiments of encoder 20 may be used to select an intra prediction mode based on optimization criteria, such as based on a minimum residual (e.g., an intra prediction mode that provides a prediction block 255 that is most similar to current picture block 203) or a minimum code rate distortion.

The intra-prediction unit 254 is further configured to determine the intra-prediction block 255 based on the intra-prediction parameters as the selected intra-prediction mode. In any case, after selecting the intra-prediction mode for the block, intra-prediction unit 254 is also used to provide intra-prediction parameters, i.e., information indicating the selected intra-prediction mode for the block, to entropy encoding unit 270. In one example, intra-prediction unit 254 may be used to perform any combination of intra-prediction techniques.

Specifically, the intra prediction unit 254 may transmit a syntax element including an intra prediction parameter (e.g., indication information for selecting an intra prediction mode for current image block prediction after traversing a plurality of intra prediction modes) to the entropy encoding unit 270. In a possible application scenario, if there is only one intra-prediction mode, the intra-prediction parameters may not be carried in the syntax element, and the decoding end 30 may directly use the default prediction mode for decoding.

Entropy encoding unit 270 is configured to apply an entropy encoding algorithm or scheme (e.g., a Variable Length Coding (VLC) scheme, a Context Adaptive VLC (CAVLC) scheme, an arithmetic coding scheme, a Context Adaptive Binary Arithmetic Coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), Probability Interval Partitioning Entropy (PIPE) coding, or other entropy encoding methods or techniques) to individual or all of quantized residual coefficients 209, inter-prediction parameters, intra-prediction parameters, and/or loop filter parameters (or not) to obtain encoded picture data 21 that may be output by output 272 in the form of, for example, encoded bitstream 21. The encoded bitstream may be transmitted to video decoder 30, or archived for later transmission or retrieval by video decoder 30. Entropy encoding unit 270 may also be used to entropy encode other syntax elements of the current video slice being encoded.

Other structural variations of video encoder 20 may be used to encode the video stream. For example, the non-transform based encoder 20 may quantize the residual signal directly without the transform processing unit 206 for certain blocks or frames. In another embodiment, encoder 20 may have quantization unit 208 and inverse quantization unit 210 combined into a single unit.

Specifically, in the embodiment of the present application, the encoder 20 may be used to implement the video encoding process described in the following embodiments.

It should be understood that the video encoder in the present application may include only a part of the modules in the video encoder 20, for example, the video encoder in the present application may include an image decoding unit and a dividing unit. Wherein the image decoding unit may be composed of one or more units of an entropy decoding unit, a prediction unit, an inverse transform unit, and an inverse quantization unit.

In addition, other structural changes of video encoder 20 may be used to encode the video stream. For example, for some image blocks or image frames, video encoder 20 may quantize the residual signal directly without processing by transform processing unit 206 and, correspondingly, without processing by inverse transform processing unit 212; alternatively, for some image blocks or image frames, the video encoder 20 does not generate residual data and accordingly does not need to be processed by the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, and the inverse transform processing unit 212; alternatively, video encoder 20 may store the reconstructed image block directly as a reference block without processing by filter 220; alternatively, the quantization unit 208 and the inverse quantization unit 210 in the video encoder 20 may be merged together. The loop filter 220 is optional, and in the case of lossless compression coding, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, and the inverse transform processing unit 212 are optional. It should be appreciated that the inter prediction unit 244 and the intra prediction unit 254 may be selectively enabled according to different application scenarios.

Referring to fig. 3, fig. 3 shows a schematic/conceptual block diagram of an example of a decoder 30 for implementing embodiments of the present application. Video decoder 30 is operative to receive encoded picture data (e.g., an encoded bitstream) 21, e.g., encoded by encoder 20, to obtain a decoded picture 231. During the decoding process, video decoder 30 receives video data, such as an encoded video bitstream representing picture blocks of an encoded video slice and associated syntax elements, from video encoder 20.

In the example of fig. 3, decoder 30 includes entropy decoding unit 304, inverse quantization unit 310, inverse transform processing unit 312, reconstruction unit 314 (e.g., summer 314), buffer 316, loop filter 320, decoded picture buffer 330, and prediction processing unit 360. The prediction processing unit 360 may include an inter prediction unit 344, an intra prediction unit 354, and a mode selection unit 362. In some examples, video decoder 30 may perform a decoding pass that is substantially reciprocal to the encoding pass described with reference to video encoder 20 of fig. 2.

Entropy decoding unit 304 is to perform entropy decoding on encoded picture data 21 to obtain, for example, quantized coefficients 309 and/or decoded encoding parameters (not shown in fig. 3), such as any or all of inter-prediction, intra-prediction parameters, loop filter parameters, and/or other syntax elements (decoded). The entropy decoding unit 304 is further for forwarding the inter-prediction parameters, the intra-prediction parameters, and/or other syntax elements to the prediction processing unit 360. Video decoder 30 may receive syntax elements at the video slice level and/or the video block level.

Inverse quantization unit 310 may be functionally identical to inverse quantization unit 110, inverse transform processing unit 312 may be functionally identical to inverse transform processing unit 212, reconstruction unit 314 may be functionally identical to reconstruction unit 214, buffer 316 may be functionally identical to buffer 216, loop filter 320 may be functionally identical to loop filter 220, and decoded picture buffer 330 may be functionally identical to decoded picture buffer 230.

Prediction processing unit 360 may include inter prediction unit 344 and intra prediction unit 354, where inter prediction unit 344 may be functionally similar to inter prediction unit 244 and intra prediction unit 354 may be functionally similar to intra prediction unit 254. The prediction processing unit 360 is typically used to perform block prediction and/or to obtain a prediction block 365 from the encoded data 21, as well as to receive or obtain (explicitly or implicitly) prediction related parameters and/or information about the selected prediction mode from, for example, the entropy decoding unit 304.

When the video slice is encoded as an intra-coded (I) slice, intra-prediction unit 354 of prediction processing unit 360 is used to generate a prediction block 365 for the picture block of the current video slice based on the signaled intra-prediction mode and data from previously decoded blocks of the current frame or picture. When a video frame is encoded as an inter-coded (i.e., B or P) slice, inter prediction unit 344 (e.g., a motion compensation unit) of prediction processing unit 360 is used to generate a prediction block 365 for the video block of the current video slice based on the motion vectors and other syntax elements received from entropy decoding unit 304. For inter prediction, a prediction block may be generated from one reference picture within one reference picture list. Video decoder 30 may construct the reference frame list using default construction techniques based on the reference pictures stored in DPB 330: list 0 and list 1.

Prediction processing unit 360 is used to determine prediction information for the video blocks of the current video slice by parsing the motion vectors and other syntax elements, and to generate a prediction block for the current video block being decoded using the prediction information. In an example of the present application, prediction processing unit 360 uses some of the syntax elements received to determine a prediction mode (e.g., intra or inter prediction) for encoding video blocks of a video slice, an inter prediction slice type (e.g., B-slice, P-slice, or GPB-slice), construction information for one or more of a reference picture list of the slice, a motion vector for each inter-coded video block of the slice, an inter prediction state for each inter-coded video block of the slice, and other information to decode video blocks of a current video slice. In another example of the present application, the syntax elements received by video decoder 30 from the bitstream include syntax elements received in one or more of an Adaptive Parameter Set (APS), a Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), or a slice header.

Inverse quantization unit 310 may be used to inverse quantize (i.e., inverse quantize) the quantized transform coefficients provided in the bitstream and decoded by entropy decoding unit 304. The inverse quantization process may include using quantization parameters calculated by video encoder 20 for each video block in the video slice to determine the degree of quantization that should be applied and likewise the degree of inverse quantization that should be applied.

Inverse transform processing unit 312 is used to apply an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients in order to produce a block of residuals in the pixel domain.

The reconstruction unit 314 (e.g., summer 314) is used to add the inverse transform block 313 (i.e., reconstructed residual block 313) to the prediction block 365 to obtain the reconstructed block 315 in the sample domain, e.g., by adding sample values of the reconstructed residual block 313 to sample values of the prediction block 365.

Loop filter unit 320 (either during or after the encoding cycle) is used to filter reconstructed block 315 to obtain filtered block 321 to facilitate pixel transitions or improve video quality. In one example, loop filter unit 320 may be used to perform any combination of the filtering techniques described below. Loop filter unit 320 is intended to represent one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or other filters, such as a bilateral filter, an Adaptive Loop Filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although loop filter unit 320 is shown in fig. 3 as an in-loop filter, in other configurations, loop filter unit 320 may be implemented as a post-loop filter.

Decoded video block 321 in a given frame or picture is then stored in decoded picture buffer 330, which stores reference pictures for subsequent motion compensation.

Decoder 30 is used to output decoded picture 31, e.g., via output 332, for presentation to or viewing by a user.

Other variations of video decoder 30 may be used to decode the compressed bitstream. For example, decoder 30 may generate an output video stream without loop filter unit 320. For example, the non-transform based decoder 30 may directly inverse quantize the residual signal without the inverse transform processing unit 312 for certain blocks or frames. In another embodiment, video decoder 30 may have inverse quantization unit 310 and inverse transform processing unit 312 combined into a single unit.

Specifically, in the embodiment of the present application, the decoder 30 is used to implement the video decoding method described in the following embodiments.

It should be understood that the video encoder in the present application may include only a part of the modules in the video encoder 30, for example, the video encoder in the present application may include a partition unit and an image encoding unit. Wherein the image encoding unit may be composed of one or more units of a prediction unit, a transform unit, a quantization unit, and an entropy encoding unit.

In addition, other structural variations of video decoder 30 may be used to decode the encoded video bitstream. For example, video decoder 30 may generate an output video stream without processing by filter 320; alternatively, for some image blocks or image frames, the quantized coefficients are not decoded by entropy decoding unit 304 of video decoder 30 and, accordingly, do not need to be processed by inverse quantization unit 310 and inverse transform processing unit 312. Loop filter 320 is optional; and the inverse quantization unit 310 and the inverse transform processing unit 312 are optional for the case of lossless compression. It should be understood that the inter prediction unit and the intra prediction unit may be selectively enabled according to different application scenarios.

It should be understood that, in the encoder 20 and the decoder 30 of the present application, the processing result for a certain link may be further processed and then output to the next link, for example, after the links such as interpolation filtering, motion vector derivation, or loop filtering, the processing result for the corresponding link may be further clamped (clip) or shifted (shift).

For example, the motion vector of the control point of the current image block derived according to the motion vector of the adjacent affine coding block (the coding block predicted by using the affine motion model may be referred to as an affine coding block), or the motion vector of the sub-block of the current image block derived may be further processed, which is not limited in this application. For example, the value range of the motion vector is constrained to be within a certain bit width. Assuming that the allowed bit-width of the motion vector is bitDepth, the motion vector ranges from-2 ^ (bitDepth-1) to 2^ (bitDepth-1) -1, where the "^" symbol represents the power. And if the bitDepth is 16, the value range is-32768-32767. And if the bitDepth is 18, the value range is-131072-131071.

As another example, the value of the motion vector (e.g., the motion vector MV of four 4x4 sub-blocks within an 8x8 image block) may be constrained such that the maximum difference between the integer parts of the four 4x4 sub-blocks MV does not exceed N (e.g., N may be 1) pixels.

Referring to fig. 4, fig. 4 is an illustrative diagram of an example of a video coding system 40 including encoder 20 of fig. 2 and/or decoder 30 of fig. 3 according to an example embodiment. Video coding system 40 may implement a combination of the various techniques of the embodiments of the present application. In the illustrated embodiment, video coding system 40 may include an imaging device 41, an encoder 20, a decoder 30 (and/or a video codec implemented by logic 47 of a processing unit 46), an antenna 42, one or more processors 43, one or more memories 44, and/or a display device 45.

As shown in fig. 4, the imaging device 41, the antenna 42, the processing unit 46, the logic circuit 47, the encoder 20, the decoder 30, the processor 43, the memory 44, and/or the display device 45 can communicate with each other. As discussed, although video coding system 40 is depicted with encoder 20 and decoder 30, in different examples video coding system 40 may include only encoder 20 or only decoder 30.

In some instances, antenna 42 may be used to transmit or receive an encoded bitstream of video data. Additionally, in some instances, display device 45 may be used to present video data. In some examples, logic 47 may be implemented by processing unit 46. The processing unit 46 may comprise application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, or the like. Video decoding system 40 may also include an optional processor 43, which optional processor 43 similarly may include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, or the like. In some examples, the logic 47 may be implemented in hardware, such as video encoding specific hardware, and the processor 43 may be implemented in general purpose software, an operating system, and so on. In addition, the memory 44 may be any type of memory, such as a volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or a non-volatile memory (e.g., flash memory, etc.), and so on. In a non-limiting example, storage 44 may be implemented by a speed cache memory. In some instances, logic circuitry 47 may access memory 44 (e.g., to implement an image buffer). In other examples, logic 47 and/or processing unit 46 may include memory (e.g., cache, etc.) for implementing image buffers, etc.

In some examples, encoder 20, implemented by logic circuitry, may include an image buffer (e.g., implemented by processing unit 46 or memory 44) and a graphics processing unit (e.g., implemented by processing unit 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include an encoder 20 implemented by logic circuitry 47 to implement the various modules discussed with reference to fig. 2 and/or any other encoder system or subsystem described herein. Logic circuitry may be used to perform various operations discussed herein.

In some examples, decoder 30 may be implemented by logic circuitry 47 in a similar manner to implement the various modules discussed with reference to decoder 30 of fig. 3 and/or any other decoder system or subsystem described herein. In some examples, logic circuit implemented decoder 30 may include an image buffer (implemented by processing unit 2820 or memory 44) and a graphics processing unit (e.g., implemented by processing unit 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include a decoder 30 implemented by logic circuitry 47 to implement the various modules discussed with reference to fig. 3 and/or any other decoder system or subsystem described herein.

In some instances, antenna 42 may be used to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data related to the encoded video frame, indicators, index values, mode selection data, etc., discussed herein, such as data related to the encoding partition (e.g., transform coefficients or quantized transform coefficients, (as discussed) optional indicators, and/or data defining the encoding partition). Video coding system 40 may also include a decoder 30 coupled to antenna 42 and used to decode the encoded bitstream. The display device 45 is used to present video frames.

It should be understood that for the example described with reference to encoder 20 in the embodiments of the present application, decoder 30 may be used to perform the reverse process. With respect to signaling syntax elements, decoder 30 may be configured to receive and parse such syntax elements and decode the associated video data accordingly. In some examples, encoder 20 may entropy encode the syntax elements into an encoded video bitstream. In such instances, decoder 30 may parse such syntax elements and decode the relevant video data accordingly.

Referring to fig. 5, fig. 5 is a schematic structural diagram of a video coding apparatus 400 (e.g., a video encoding apparatus 400 or a video decoding apparatus 400) provided by an embodiment of the present application. Video coding apparatus 400 is suitable for implementing the embodiments described herein. In one embodiment, video coding device 400 may be a video decoder (e.g., decoder 30 of fig. 3) or a video encoder (e.g., encoder 20 of fig. 2). In another embodiment, video coding device 400 may be one or more components of decoder 30 of fig. 3 or encoder 20 of fig. 2 described above.

Video coding apparatus 400 includes: an ingress port 410 and a reception unit (Rx)420 for receiving data, a processor, logic unit or Central Processing Unit (CPU)430 for processing data, a transmitter unit (Tx)440 and an egress port 450 for transmitting data, and a memory 460 for storing data. Video coding device 400 may also include optical-to-Electrical (EO) components and optical-to-electrical (opto) components coupled with ingress port 410, receiver unit 420, transmitter unit 440, and egress port 450 for egress or ingress of optical or electrical signals.

The processor 430 is implemented by hardware and software. Processor 430 may be implemented as one or more CPU chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. Processor 430 is in communication with inlet port 410, receiver unit 420, transmitter unit 440, outlet port 450, and memory 460. Processor 430 includes a coding module 470 (e.g., encoding module 470 or decoding module 470). The encoding/decoding module 470 implements the embodiments disclosed herein to implement the encoding method/decoding method of the embodiments of the present application. For example, the encoding/decoding module 470 implements, processes, or provides various encoding operations. Accordingly, substantial improvements are provided to the functionality of the video coding apparatus 400 by the encoding/decoding module 470 and affect the transition of the video coding apparatus 400 to different states. Alternatively, the encode/decode module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.

The memory 460, which may include one or more disks, tape drives, and solid state drives, may be used as an over-flow data storage device for storing programs when such programs are selectively executed, and for storing instructions and data that are read during program execution. The memory 460 may be volatile and/or nonvolatile, and may be Read Only Memory (ROM), Random Access Memory (RAM), random access memory (TCAM), and/or Static Random Access Memory (SRAM).

Referring to fig. 6, fig. 6 is a simplified block diagram of an apparatus 500 that may be used as either or both of source device 12 and destination device 14 in fig. 1 according to an example embodiment. The apparatus 500 may implement the encoding method or the decoding method of the embodiments of the present application. In other words, fig. 6 is a schematic block diagram of one implementation of an encoding apparatus or a decoding apparatus (simply referred to as a decoding apparatus 500) of the embodiment of the present application. Among other things, the decoding device 500 may include a processor 510, a memory 530, and a bus system 550. Wherein the processor is connected with the memory through the bus system, the memory is used for storing instructions, and the processor is used for executing the instructions stored by the memory. The memory of the coding device stores program code, and the processor may invoke the program code stored in the memory to perform the various video encoding or decoding methods described herein, and in particular the various new image block partitioning methods. To avoid repetition, it is not described in detail here.

In the embodiment of the present application, the processor 510 may be a Central Processing Unit (CPU), and the processor 510 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and so on. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The memory 530 may include a Read Only Memory (ROM) device or a Random Access Memory (RAM) device. Any other suitable type of memory device may also be used for memory 530. Memory 530 may include code and data 531 to be accessed by processor 510 using bus 550. Memory 530 may further include an operating system 533 and application programs 535, the application programs 535 including at least one program that allows processor 510 to perform the video encoding or decoding methods described herein. For example, the application programs 535 may include applications 1 through N, which further include a video encoding or decoding application (simply a video coding application) that performs the video encoding or decoding methods described herein.

The bus system 550 may include a power bus, a control bus, a status signal bus, and the like, in addition to a data bus. For clarity of illustration, however, the various buses are designated in the figure as bus system 550.

Optionally, the translator device 500 may also include one or more output devices, such as a display 570. In one example, the display 570 may be a touch-sensitive display that incorporates a display with a touch-sensitive unit operable to sense touch input. A display 570 may be connected to the processor 510 via the bus 550.

In order to better understand the image prediction process in the encoding method and the decoding method of the embodiments of the present application, some related concepts and basic contents of inter prediction will be described in detail below.

Inter prediction refers to finding a matched reference block for a current image block in a current image in a reconstructed image, and using a pixel value of a pixel point in the reference block as a predicted value of a pixel point in the current image block (this process is called Motion Estimation (ME)).

Motion estimation is to try multiple reference blocks in a reference image for a current image block, and then finally determine one or two reference blocks (two reference blocks are needed for bidirectional prediction) from the multiple reference blocks by using rate-distortion optimization (RDO) or other methods, and perform inter prediction on the current image block by using the reference blocks.

The motion information of the current image block includes indication information of a prediction direction (usually forward prediction, backward prediction, or bi-directional prediction), one or two Motion Vectors (MVs) pointing to a reference block, and indication information of a picture in which the reference block is located (usually referred to as reference frame index).

Forward prediction refers to selecting a reference image from a forward reference image set for a current image block to obtain a reference block. Backward prediction refers to selecting a reference image from a backward reference image set by a current image block to obtain a reference block. Bi-directional prediction refers to selecting one reference picture from each of a forward reference picture set and a backward reference picture set to obtain a reference block. When the bidirectional prediction method is used, two reference blocks exist in a current coding block, each reference block needs to indicate a motion vector and a reference frame index, and then a predicted value of a pixel point in a current image block is determined according to pixel values of pixel points in the two reference blocks.

In HEVC, there are two inter prediction modes, AMVP mode and merge mode respectively.

In the AMVP mode, a spatial or temporal neighboring coded block (marked as a neighbor block) of a current coded block is traversed, a candidate motion vector list is constructed according to motion information of each neighbor block, an optimal motion vector is determined from the candidate motion vector list according to a rate distortion cost, and the candidate motion information with the minimum rate distortion cost is used as a Motion Vector Predictor (MVP) of the current coded block.

The positions of the adjacent blocks and the traversal order of the adjacent blocks are predefined. The rate-distortion cost may be calculated according to formula (1), where J is a rate-distortion cost (rate-distortion cost), SAD is a Sum of Absolute Differences (SAD) between a pixel predicted value obtained by performing motion estimation using a candidate motion vector predicted value and an original pixel value, R is a code rate, λ is a lagrange multiplier, and an encoding end transmits an index value of the selected motion vector predicted value in the candidate motion vector list and a reference frame index value to a decoding end. Further, the encoding end may perform motion search in a neighborhood with the MVP as a center to obtain an actual motion vector of the current encoding block, and then transmit a difference (motion vector difference) between the MVP and the actual motion vector to the decoding end.

J＝SAD+λR(1)

In addition, the AMVP mode may be classified into an AMVP mode based on a translational model and an AMVP mode based on a non-translational model according to a motion model.

In the merge mode, a candidate motion information list is constructed according to motion information of a coded unit adjacent to a current coding unit in a spatial domain or a temporal domain, then optimal motion information is determined from the candidate motion information list through rate distortion cost to be used as motion information of the current coding unit, and finally an index value (marked as merge index, the same below) of the position of the optimal motion information in the candidate motion information list is transmitted to a decoding end.

In merge mode, the current coding unit spatial and temporal candidate motion information may be as shown in fig. 7, where the spatial candidate motion information is from spatially neighboring 5 blocks (a0, a1, B0, B1, and B2), and if a neighboring block is not available or is intra-predicted for the prediction mode, the neighboring block is not added to the candidate motion information list.

The temporal candidate motion information of the current coding unit may be obtained by scaling the MV of the corresponding position block in the reference frame according to the Picture Order Count (POC) of the reference frame and the current frame. The method for acquiring the position block corresponding to the reference frame may first determine whether a block with a position T in the reference frame is available, and if not, select a block with a position C.

When the translation model is used for prediction, all pixels in the coding unit adopt the same motion information, and then motion compensation is carried out according to the motion information to obtain the prediction value of the pixels of the coding unit. However, in the real world, the motion is various, there are many objects with non-translational motion, such as rotating objects, roller coasters rotating in different directions, some special effects in fireworks and movies launched, especially moving objects in User Generated Content (UGC) scenes, and coding efficiency of the moving objects is greatly affected if a block motion compensation technology based on a translational motion model in the current coding standard is adopted, so that prediction based on the non-translational motion model is provided for improving coding effect.

The non-translational motion model prediction means that the same motion model is used at the encoding and decoding end to deduce the motion information of each sub-motion compensation unit in the current encoding block, and then motion compensation is carried out according to the motion information of the sub-motion compensation units to obtain the prediction sub-block of each sub-block, so that the prediction efficiency is improved. Common non-translational motion models are 4-parameter affine motion models or 6-parameter affine motion models.

Generally, the same or similar topographical features tend to be present near the same geographic location. Therefore, for the positioning layer, there is often a certain correlation (e.g., similar texture) between multiple mesh pictures near the same geographic location in the positioning layer. If the multi-view grid pictures near the same geographic position in the positioning layer are combined into an image sequence when the positioning layer is coded, inter-frame prediction coding is carried out on the image sequence, the data volume of residual pictures of the grid pictures obtained according to the inter-frame prediction process is small, the data volume of code streams generated by final coding is further small, and therefore the storage cost occupied by the code streams generated by coding can be reduced.

An image encoding method and an image decoding method according to embodiments of the present application are described in detail below with reference to the drawings.

Fig. 8 is a schematic diagram of a process of an image encoding method according to an embodiment of the present application.

The method illustrated in fig. 8 may be performed by an encoding device or encoder. Fig. 8 shows a main process of an image encoding method according to an embodiment of the present application, in the method shown in fig. 8, images with similar geographic locations may be combined into an image sequence (or images with similar image contents may be combined into an image sequence), and then encoding is performed by using an encoding method based on inter-frame prediction to obtain a code stream. Here, the inter-prediction encoding refers to an encoding method that employs an inter-prediction method when predicting an image.

Because the similarity of the image contents of the images adjacent to the geographical position is high, a predicted image is obtained by performing inter-frame prediction on the images in the image sequence, and a residual image of the image is obtained according to the obtained predicted image. The data volume of the finally obtained residual image is small, the data volume of the code stream generated by final coding is also small, and therefore the storage space occupied by the code stream obtained by coding can be reduced.

In order to further reduce the storage space occupied by the code stream obtained by encoding, before encoding the images in the image sequence or in the encoding process of the images in the image sequence, the exclusive or processing or the inversion processing can be performed, and then the images in the image sequence are encoded. Therefore, under the condition that the pixel values of the images in the image sequence contain continuous placeholders, the data volume of the images is reduced, and further the code stream generated by encoding occupies less storage space.

Specifically, after the image is obtained, the pixel values of the image may be subjected to exclusive-or processing or inversion processing, or after the picture is obtained, images adjacent to each other in the geographic position may be combined into an image sequence, and then the pictures in the image sequence may be subjected to exclusive-or processing or inversion processing.

As shown in fig. 9, after an image is acquired, the image is subjected to exclusive or processing or inversion processing, then images with similar positions are selected from the processed images to form an image sequence, and then the image sequence is encoded based on inter-frame prediction encoding to obtain a code stream.

As shown in fig. 10, after the images are obtained, the images with similar geographic positions are combined into an image sequence, then the images in the image sequence are subjected to xor processing or negation processing, and then the processed image sequence is encoded based on an inter-frame prediction encoding mode to obtain a code stream.

The following first describes the image decoding method according to the embodiment of the present application in detail with reference to fig. 11.

Fig. 11 is a schematic flowchart of an image decoding method according to an embodiment of the present application. The method shown in fig. 11 may be performed by a decoding apparatus or a decoder. The method shown in fig. 11 includes steps 1001 to 1004, and the steps 1001 to 1004 will be described in detail below.

1001. And acquiring a code stream.

The code stream obtained in step 1001 may be a code stream obtained by encoding in the encoding method shown in fig. 14 below.

1002. And acquiring a residual image of the grid image in the image sequence according to the code stream.

In step 1002, the residual block of the current image block may be obtained by analyzing the code stream, and a specific analysis process may refer to a decoding related process shown in fig. 3.

The image sequence comprises a plurality of grid images, and the corresponding geographic positions of the grid images are close or the image contents of the grid images are close. Specifically, that the geographic locations corresponding to the plurality of grid images are close or the image contents of the plurality of grid images are close may mean that the plurality of grid images satisfy the first condition.

The first condition can be embodied in various forms.

Optionally, the first condition may be that a distance between geographic positions corresponding to at least two grid images in the plurality of grid images in the image sequence is smaller than a preset distance.

Optionally, the first condition may be that the similarity of the image contents of at least two grid images in the image sequence is greater than or equal to a preset similarity.

Alternatively, the first condition may be that image contents of at least two mesh images of the plurality of mesh images correspond to the same geographical area.

Further, at least two mesh images among the plurality of mesh images may be mesh images of adjacent frames to each other.

That is, the at least two mesh images satisfying the first condition are adjacent frames to each other. For example, the mesh image 1, the mesh image 2, and the mesh image 3 in the above-described image sequence satisfy the above-described first condition. Then, the mesh image 1, the mesh image 2, and the mesh image 3 may be the ith frame, the (i + 1) th frame, and the (i + 2) th frame in the image sequence, respectively. Wherein i is a positive integer.

1003. And performing inter-frame prediction on the grid images in the image sequence to obtain a predicted image of the grid images in the image sequence.

The process of obtaining the predicted image of the mesh image in the image sequence by inter-frame prediction in step 1003 may refer to the decoding correlation process shown in fig. 3.

1004. And obtaining the grid images in the image sequence according to the residual images of the grid images in the image sequence and the predicted images of the grid images in the image sequence.

In step 1004, the mesh image in the image sequence may be obtained by superimposing a residual image of the mesh image in the image sequence and a predicted image of the mesh image in the image sequence. It should be understood that, in the method illustrated in fig. 11, the prediction image of the mesh image may be composed of prediction blocks of the respective image blocks in the mesh image, and the residual image of the mesh image may be composed of residual blocks of the respective image blocks in the mesh image. Therefore, in the method of fig. 11, in the process of analyzing the code stream to finally obtain the grid image in the image sequence, the decoding operation may be performed with the image block as a basic unit, specifically, in step 1002, a residual block of an image block of the grid image in the image sequence may be obtained according to the code stream, then, in step 1003, inter-frame prediction is performed on the image block to obtain a prediction block of the image block, and then, in step 1004, according to the residual block and the prediction block, a corresponding image block is finally obtained. After obtaining the image blocks, the image blocks may be spliced into a mesh image, so that at the decoding end, the mesh image is obtained according to the residual image of the mesh image and the predicted image of the mesh image.

The specific implementation of the above step 1004 can refer to the decoding related process shown in fig. 3.

In this embodiment of the application, before or during encoding of a mesh image in an image sequence, an encoding end may further perform inversion processing or exclusive or processing on pixel values of the mesh image in the image sequence to further reduce a storage space occupied by a code stream generated by encoding, and correspondingly, during or after decoding, a decoding end may also perform inversion processing or exclusive or processing on a corresponding image, thereby obtaining a final image. This processing mode will be described in detail below.

Specifically, in the method shown in fig. 11, after the mesh images of the image sequence are obtained by decoding, the mesh images in the image sequence may be processed to obtain the final mesh image.

As shown in fig. 12, after obtaining the mesh image of the image sequence by decoding, the method shown in fig. 11 further includes:

1005. and processing the grid images in the image sequence to obtain the processed grid images.

The pixel values of the grid images in the image sequence are represented by M bits, each bit takes the value of 0 or 1, and M is an integer greater than 1.

The processed mesh image and the mesh image obtained in the above step 1005 may satisfy a first relationship.

The first relationship: the value of the pixel value of the processed grid image is opposite to the value of the pixel value of the grid image.

Specifically, under the first relationship, the value of the ith bit of the N bits of the pixel values of the grid images in the image sequence is opposite to the value of the ith bit of the N bits of the pixel values of the grid images in the processed image sequence, and the N bits of the pixel values of the grid images in the image sequence and the N bits of the pixel values of the grid images in the processed image sequence are located at the same position; n bits of pixel values of the grid images in the image sequence are located behind and adjacent to a first bit of the pixel values of the grid images in the image sequence, the first bit is a bit with a value of 1 and the highest digit in the pixel values of the grid images in the image sequence, i and N are positive integers, i is not more than N, and N is less than M.

After the mesh images of the image sequence are obtained by decoding, in addition to performing the inversion process on the pixel values of the mesh images of the image sequence, the exclusive or process may be performed on the pixel values of the mesh images of the image sequence.

Therefore, the processed mesh image and the mesh image obtained in the above step 1005 may satisfy a second relationship in addition to the first relationship.

The second relationship is: the pixel values of the processed grid image are the exclusive or result of the pixel values.

Specifically, under the second relationship, the value of the 1 st bit of the N bits of the grid image in the processed image sequence is opposite to the value of the 1 st bit of the N bits of the grid image in the image sequence, and the value of the (i + 1) th bit of the N bits of the grid image in the processed image sequence is the result of performing exclusive or processing on the value of the (i + 1) th bit of the N bits of the grid image in the image sequence and the ith bit of the N bits of the grid image in the processed image sequence; the N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to a first bit of the pixel values of the mesh images in the image sequence, the first bit being a bit having a value of 1 and a highest number of bits among the pixel values of the mesh images in the image sequence, or the N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to a highest bit of the pixel values of the mesh images in the image sequence.

In addition, under the second relation, the positions of the N bits of the pixel values of the grid images in the image sequence are the same as the positions of the N bits of the pixel values of the grid images in the processed image sequence, the number of the ith bit is higher than the number of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M.

In the method shown in fig. 11, the mesh images in the image sequence may be processed after the mesh images in the image sequence are decoded, or the residual images of the mesh images in the mesh images may be processed after the residual images are decoded, which will be described in detail below.

As shown in fig. 13, after step 1002, step 1003a may be performed.

1003a, processing the residual image to obtain a processed residual image.

When step 1004 is executed after step 1003a, step 1004 is to obtain a mesh image in the image sequence from the processed residual image and a predicted image of the mesh image in the image sequence.

The pixel value of the residual image is represented by M bits, each bit takes the value of 0 or 1, and M is an integer greater than 1.

The processed residual image and the residual image obtained in step 1003a may satisfy the third relationship.

The third relation is: the value of the pixel value of the processed residual image is opposite to the value of the pixel value of the residual image.

Specifically, in a third relationship, a value of an ith bit of the N bits of the pixel value of the residual image is opposite to a value of an ith bit of the N bits of the pixel value of the processed residual image, and the N bits of the pixel value of the residual image and the N bits of the pixel value of the processed residual image are located at the same position. N bits of the pixel values of the residual image are located behind and adjacent to a first bit of the pixel values of the residual image, the first bit is a bit with a value of 1 and the highest digit in the pixel values of the residual image, i and N are positive integers, i is not more than N, and N is less than M.

In step 1003a, in addition to performing an inversion process on the pixel values of the residual image, an exclusive or process may be performed on the pixel values of the residual image.

Therefore, the processed residual image and the residual image obtained in step 1003a may satisfy the fourth relationship in addition to the third relationship.

The fourth relationship: the pixel values of the processed residual image are the exclusive or result of the pixel values.

Specifically, under the fourth relationship, the value of the 1 st bit of the N bits of the processed residual image is opposite to the value of the 1 st bit of the N bits of the residual image, and the value of the (i + 1) th bit of the N bits of the processed residual image is the result of performing exclusive or processing on the value of the (i + 1) th bit of the N bits of the residual image and the ith bit of the N bits of the processed residual image. The N bits of the pixel value of the residual image are located after and adjacent to a first bit of the pixel value of the residual image, the first bit being a bit having a value of 1 and a highest bit number among the pixel values of the residual image, or the N bits of the pixel value of the residual image are located after and adjacent to a highest bit of the pixel value of the residual image.

In addition, under the fourth relation, the positions of N bits of the pixel value of the residual image are the same as the positions of N bits of the pixel value of the processed residual image, the number of bits of the ith bit is higher than the number of bits of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M;

In the present application, when the encoding end encodes the mesh image in the image sequence, the encoding end may use either lossless encoding or lossy encoding, and correspondingly, the decoding end needs to perform decoding in a manner matching with the encoding end.

Optionally, as an embodiment, the obtaining, according to the code stream in step 1002, a residual image of the mesh image in the image sequence includes: and performing inverse transformation, inverse quantization and entropy decoding on the code stream to obtain a residual image.

Optionally, as an embodiment, the obtaining, according to the code stream in step 1002, a residual image of the mesh image in the image sequence includes: and carrying out entropy decoding processing on the code stream to obtain a residual error image.

Optionally, as an embodiment, the code stream is obtained by encoding a positioning layer.

Optionally, as an embodiment, the pixel values of the positioning layer include rasterized elevation data.

Optionally, in the first to fourth relationships, a value of M may be any one of 8, 10, and 12.

The image decoding method according to the embodiment of the present application is described in detail above with reference to fig. 11 to 13, and the image encoding method according to the embodiment of the present application is described in detail below from the perspective of the encoding end with reference to fig. 14.

Fig. 14 is a schematic flowchart of an image encoding method according to an embodiment of the present application. The method shown in fig. 14 may be performed by an encoding apparatus or encoder. The method shown in fig. 14 includes steps 2001 to 2003, and steps 2001 to 2003 are described in detail below.

2001. A sequence of images is acquired.

2002. And performing inter-frame prediction on the grid images in the image sequence to obtain a residual image.

Optionally, the inter-frame prediction of the mesh image in the image sequence to obtain a residual image includes: performing inter-frame prediction on the grid images in the image sequence to obtain a predicted image; and obtaining a residual image of the grid image according to the grid image and the predicted image in the image sequence.

After obtaining the predicted image, the grid image may be subtracted from a residual image of the grid image to obtain a residual image of the grid image.

In addition, the image sequence comprises a plurality of grid images, and the corresponding geographic positions of the grid images are close or the image contents of the grid images are close. Specifically, that the geographic locations corresponding to the plurality of grid images are close or the image contents of the plurality of grid images are close may mean that the plurality of grid images satisfy the first condition.

The first condition can be embodied in various forms.

The preset distance can also be a distance threshold, and the size of the preset distance can be flexibly set according to actual needs. For example, the above-mentioned preset distance may be set to 3m, and when the distance between the corresponding geographical positions of the two mesh images is less than 3m, the two mesh images satisfy the first condition. Here, 3m is merely an example, and the preset distance may be set to 5m, 6m, and so on, and in any case, any suitable preset distance may be set as required.

Further, the at least two mesh images may be mesh images of adjacent frames therebetween.

2003. And coding the residual image to obtain a coded code stream.

In the method shown in fig. 14, the prediction image of the above-described mesh image may be composed of prediction blocks of the respective image blocks in the mesh image, and the residual image of the mesh image may be composed of residual blocks of the respective image blocks in the mesh image. When the coding end carries out coding, the residual image can be divided into image blocks, then a prediction block of each image block is obtained, a residual block of each image block is obtained according to each image block and the residual block of each image block, and then the residual image of the grid image is obtained.

In this embodiment of the application, before or during encoding of a mesh image in an image sequence, an encoding end may also perform inversion processing or exclusive or processing on pixel values of the mesh image in the image sequence, so as to further reduce a storage space occupied by a code stream generated by encoding.

Specifically, in the method shown in fig. 14, before encoding the mesh images in the image sequence, the mesh images in the image sequence may be processed, and then the processed mesh images may be encoded.

As shown in fig. 15, step 2002a is performed before step 2002 is performed.

2002a, processing the grid images in the image sequence to obtain processed grid images.

After step 2002a, when step 2002 is executed, step 2002 is to perform inter prediction on the processed mesh image to obtain a residual image.

The processed mesh image and the mesh image obtained in the above step 2002a may satisfy a fifth relationship.

The fifth relationship is: the value of the pixel value of the processed grid image is opposite to the value of the pixel value of the grid image.

Specifically, in the fifth relationship, the value of the ith bit of the N bits of the pixel values of the grid images in the image sequence is opposite to the value of the ith bit of the N bits of the pixel values of the grid images in the processed image sequence, and the N bits of the pixel values of the grid images in the image sequence and the N bits of the pixel values of the grid images in the processed image sequence are located at the same position.

In addition, under the fifth relationship, N bits of the pixel values of the grid images in the image sequence are located after and adjacent to the first bit of the pixel values of the grid images in the image sequence, the first bit is a bit whose value is 1 and whose number of bits is the highest among the pixel values of the grid images in the image sequence, i and N are both positive integers, i is not greater than N, and N is less than M.

Further, the corresponding coding performance of N is different under different values, and when N takes a certain specific value, the corresponding coding performance is optimal, and the number of bits reduced is the most.

As shown in fig. 16, when the pixel values of the mesh image correspond to 8 bits in total, a certain number of bits can be reduced when the inversion processing is performed on N bits in the pixel values of the mesh image, and when N is 3, the degree of reduction in the number of bits is maximized, and the corresponding encoding performance is also optimal.

In the actual encoding process, the value of N may be set according to the result of the test or experience, for example, when the pixel values of the mesh image correspond to 8 bits in total, N-3 or N-4 may be selected, which may achieve better encoding performance and reduce the data amount of the mesh image as much as possible.

In the present application, in addition to the inversion processing of the pixel values of the mesh images in the image sequence, the exclusive or processing may also be performed on the pixel values of the mesh images in the image sequence.

Therefore, the processed mesh image and the mesh image obtained in step 2002a may satisfy a sixth relationship in addition to the fifth relationship.

A sixth relationship: the pixel values of the processed grid image are the exclusive or result of the pixel values.

Specifically, in the sixth relationship, the value of the 1 st bit of the N bits of the mesh image in the processed image sequence is opposite to the value of the 1 st bit of the N bits of the mesh image in the image sequence, and the value of the (i + 1) th bit of the N bits of the mesh image in the processed image sequence is the result of performing the exclusive or processing on the value of the (i + 1) th bit of the N bits of the mesh image in the image sequence and the ith bit of the N bits of the mesh image in the processed image sequence.

In addition, under the sixth relationship, N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to a first bit of the pixel values of the mesh images in the image sequence, the first bit being a bit whose value is 1 and whose number of bits is the highest among the pixel values of the mesh images in the image sequence, or the N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to the highest bit of the pixel values of the mesh images in the image sequence. The positions of N bits of the pixel values of the grid images in the image sequence are the same as the positions of N bits of the pixel values of the grid images in the processed image sequence, the number of the ith bit is higher than the number of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M.

Further, the corresponding coding performance of N is different under different values, and when the value of N is larger, the corresponding coding performance is better, and the number of bits to be reduced is also larger.

As shown in fig. 17, when the pixel values of the mesh image correspond to 8 bits in total, when the exclusive or processing is performed on N bits in the pixel values of the mesh image, a certain number of bits can be reduced, and when N is 6, the degree of reduction in the number of bits is maximized, and the corresponding encoding performance is also optimized.

In the actual encoding process, the value of N may be set according to the result of the test or experience, for example, when the pixel values of the mesh image correspond to 8 bits, a larger value may be set for N, for example, N is set to 5 or 6, which can achieve better encoding performance and reduce the data amount of the mesh image as much as possible.

In the image encoding method of the present application, in addition to performing inversion processing or exclusive-or processing on the mesh images in the image sequence before encoding the mesh images in the image sequence, the inversion processing or exclusive-or processing may be performed on the residual images after obtaining the residual images of the mesh images in the image sequence. As described in detail below.

As shown in fig. 18, step 2003 may specifically include step 2003a and step 2003 b.

2003a, processing the residual image to obtain a processed residual image.

2003b, coding the processed residual error image to obtain a coded code stream.

The processed residual image and the residual image obtained in step 1003a may satisfy the seventh relationship.

A seventh relationship: the value of the pixel value of the processed residual image is opposite to the value of the pixel value of the residual image.

Specifically, in the seventh relationship, a value of an ith bit of the N bits of the pixel value of the residual image is opposite to a value of an ith bit of the N bits of the pixel value of the processed residual image, and the N bits of the pixel value of the residual image and the N bits of the pixel value of the processed residual image are located at the same position. N bits of the pixel values of the residual image are located behind and adjacent to a first bit of the pixel values of the residual image, the first bit is a bit with a value of 1 and the highest digit in the pixel values of the residual image, i and N are positive integers, i is not more than N, and N is less than M.

In step 2003a, in addition to the inversion of the pixel values of the residual image, the exclusive or of the pixel values of the residual image may be performed.

Therefore, the processed residual image and the residual image obtained in step 2003a may satisfy the eighth relationship in addition to the seventh relationship.

Eighth relationship: the pixel values of the processed residual image are the exclusive or result of the pixel values.

Specifically, in the eighth relationship, a value of an ith bit of the N bits of the pixel value of the residual image is opposite to a value of an ith bit of the N bits of the pixel value of the processed residual image, and a value of an i +1 th bit of the N bits of the processed residual image is a result of performing exclusive or processing on the value of the i +1 th bit of the N bits of the residual image and the ith bit of the N bits of the processed residual image.

In the eighth relationship, N bits of the pixel value of the residual image are located after and adjacent to a first bit of the pixel value of the residual image, the first bit being a bit whose value is 1 and whose number of bits is the highest, or N bits of the pixel value of the residual image are located after and adjacent to the highest bit of the pixel value of the residual image. The positions of N bits of the pixel value of the residual image are the same as the positions of N bits of the pixel value of the processed residual image, the number of bits of the ith bit is higher than the number of bits of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M.

In the image encoding method according to the embodiment of the present application, lossless encoding or lossy encoding may be used.

Optionally, as an embodiment, the encoding the residual image in step 2003 to obtain an encoded code stream includes: and transforming, quantizing and entropy coding the residual image to obtain a coded code stream.

By carrying out lossy coding, the code stream obtained by coding can occupy smaller storage space as much as possible.

Optionally, as an embodiment, the encoding the residual image in step 2003 to obtain an encoded code stream includes: and performing entropy coding processing on the residual image to obtain a coded code stream.

Through lossless coding, image distortion can be avoided as much as possible, and the final display effect of the image is ensured.

Optionally, as an embodiment, the grid map in the image sequence is from a self-positioning layer.

Optionally, in the fifth to eighth relationships, a value of M may be any one of 8, 10, and 12.

In the embodiment of the present application, the mesh images in the image sequence may include I-frame images and P-frame images. As shown in fig. 19, the image sequence includes 1I frame and 3P frames, and the P frames in the image sequence can be predicted by using inter-frame prediction. It should be understood that the image sequence shown in fig. 19 is only an illustration, and the number of the grid images included in the image sequence is not limited in the embodiment of the present application.

In addition, the image sequence in the embodiment of the present application may further include B frames.

In the embodiment of the present application, the mesh images in the image sequence may be from a positioning layer, and the positioning layer may be 2D plane data obtained by mapping 3D point cloud data.

Generally, 3D point cloud data often needs to be converted into 2D plane data as a positioning map layer due to the huge data amount. As shown in fig. 20, the 3D point cloud data includes data such as three-dimensional coordinates (x, y, z) and reflectivity (R), and when the data is converted into 2D plane data, the (x, y) of the 3D point cloud data can be directly used as the (x, y) coordinates (x and y are equivalent to the positions of pixels in a picture) of the 2D plane data, the height z in the 3D point cloud data is mapped onto the R channel of the 2D plane data, and the reflectivity R is mapped onto the G channel, so that the conversion of the 3D point cloud data into the 2D plane data is realized.

The following describes the effect of the image encoding method according to the embodiment of the present application with reference to specific test results.

As shown in table 1, sequence 1 and sequence 2 are two image sequences, respectively, and the two image sequences each include pictures in Portable Network Graphics (PNG) format, where sequence 1 includes 4 mesh pictures (1a.png, 1b.png, 1c.png, 1d.png), and sequence 2 also includes 4 mesh pictures (2a.png, 2b.png, 2c.png, 2 d.png).

When the sequence 1 and the sequence 2 are coded, compared with a conventional scheme in which high efficiency video coding-screen content coding (HEVC-SCC) is adopted for single compression, when an image sequence is coded by HEVC-SCC combined compression (which is equivalent to the coding method in the embodiment of the present application), the data amount of an obtained code stream is smaller.

For example, for sequence 1, the data amount after HEVC-SCC combined compression is reduced by 9.9% relative to the data amount of the original image sequence, and the data amount after HEVC-SCC alone compression is reduced by 9.5% relative to the data amount of the original image sequence. Compared with a mode of singly adopting HEVC-SCC combined compression, a code stream obtained by adopting a mode of HEVC-SCC combined compression plus data preprocessing (which is equivalent to that the exclusive-or processing or the inverse processing is carried out on the grid image in the image coding method in the embodiment of the application) has smaller data amount. For example, for sequence 1, the data amount of the code stream obtained by the HEVC-SCC combined compression method alone is reduced by 9.9% relative to the data amount of the original image sequence, and the data amount of the code stream obtained by the HEVC-SCC combined compression plus data preprocessing is reduced by 10.3% relative to the data amount of the original image sequence.

TABLE 1

The image decoding method and the encoding method according to the embodiments of the present application are described in detail above with reference to the drawings, and the image decoding apparatus and the image encoding apparatus according to the embodiments of the present application are described below with reference to fig. 21 to 24. It is to be understood that the image decoding apparatuses in fig. 21 to 24 are capable of performing the image decoding method of the embodiment of the present application, and the image encoding apparatuses in fig. 21 to 24 are capable of performing the image encoding method of the embodiment of the present application. In order to avoid unnecessary repetition, the description will be appropriately omitted below when describing the image decoding apparatus and the image encoding apparatus of the embodiments of the present application.

Fig. 21 is a schematic block diagram of an image decoding apparatus according to an embodiment of the present application.

The image decoding apparatus 10000 shown in fig. 21 includes an acquisition unit 10001 and a processing unit 10002. The image decoding apparatus 10000 can execute the image decoding method of the embodiment of the present application, and specifically, the image decoding apparatus 10000 can execute the image decoding method shown in fig. 11 to 13.

Fig. 22 is a schematic block diagram of an image encoding apparatus according to an embodiment of the present application.

The image encoding device 11000 shown in fig. 22 includes an acquisition unit 11001 and a processing unit 11002. The image encoding device 11000 can execute the image encoding method of the embodiment of the present application. Specifically, the image encoding device 11000 can execute the image encoding method shown in fig. 14, 15, and 18.

Fig. 23 is a schematic diagram of a hardware structure of an image decoding apparatus according to an embodiment of the present application.

The image decoding apparatus 12000 shown in fig. 23 (the image decoding apparatus 12000 may be specifically a computer device) includes a memory 12001, a memory 12002, a communication interface 12003, and a bus 12004. The memory 12001, the memory 12002, and the communication interface 12003 are communicatively connected to each other via a bus 12004.

The memory 12001 may be a Read Only Memory (ROM), a static memory device, a dynamic memory device, or a Random Access Memory (RAM). The memory 12001 may store a program, and when the program stored in the memory 12001 is executed by the memory 12002, the memory 12002 is used to perform the steps of the image decoding method according to the embodiment of the present application.

The memory 12002 may be a general-purpose Central Processing Unit (CPU), a microprocessor, an Application Specific Integrated Circuit (ASIC), a Graphics Processing Unit (GPU), or one or more integrated circuits, and is configured to execute a relevant program to implement the image decoding method according to the embodiment of the present invention.

The memory 12002 may also be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the image decoding method of the present application may be implemented by integrated logic circuits of hardware or instructions in the form of software in the memory 12002.

The memory 12002 may also be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, or discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present application may be implemented or performed.

A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 12001, and the processor 12002 reads information in the memory 12001, and in combination with hardware thereof, performs a function required to be performed by a unit included in the image decoding apparatus, or performs an image decoding method according to an embodiment of the method of the present application.

The communication interface 12003 enables communication between the image decoding apparatus 12000 and another device or a communication network using a transmission/reception apparatus such as, but not limited to, a transceiver. For example, information of the neural network to be constructed and training data required in constructing the neural network may be acquired through the communication interface 12003.

The bus 12004 may include a path for transferring information between respective components (e.g., the memory 12001, the memory 12002, and the communication interface 12003) of the image decoding apparatus 12000.

The acquiring means 10001 and the processing means 10002 in the image decoding apparatus 10000 correspond to the processor 12002 in the image decoding apparatus 12000.

Fig. 24 is a schematic hardware configuration diagram of an image encoding apparatus according to an embodiment of the present application. The image encoding apparatus 13000 shown in fig. 24 (the image decoding apparatus 13000 may be specifically a kind of computer device) includes a memory 13001, a processor 13002, a communication interface 13003, and a bus 13004. The memory 13001, the processor 13002 and the communication interface 13003 are communicatively connected to each other through a bus 13004.

The above definitions and explanations of the respective blocks in the image decoding apparatus 12000 are also applicable to the image encoding apparatus 13000, and will not be described in detail here.

The memory 13001 may be used for storing programs, the processor 13002 is used for executing the programs stored in the memory 13001, and when the programs stored in the memory 13001 are executed, the processor 13002 is used for executing the steps of the image coding method according to the embodiment of the present application.

In addition, when the image encoding device 13000 encodes an image, the image may be acquired through a communication interface, and then the acquired image is encoded to obtain encoded data, which may be transmitted to the video decoding apparatus through the communication interface 13003.

When the image coding device 13000 decodes an image, a video image may be acquired through the communication interface, and then the acquired image is decoded to obtain an image to be displayed.

Acquisition section 11001 and processing section 11002 in image coding apparatus 11000 described above correspond to processor 13002 in image coding apparatus 13000.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. An image decoding method, comprising:

acquiring a code stream;

acquiring a residual image of a grid image in an image sequence according to the code stream, wherein the image sequence comprises a plurality of grid images, and the grid images meet a first condition;

performing inter-frame prediction on the grid images in the image sequence to obtain a predicted image of the grid images in the image sequence;

and obtaining the grid images in the image sequence according to the residual images of the grid images in the image sequence and the predicted images of the grid images in the image sequence.

2. The method of claim 1, wherein the first condition is that a spacing between geographic locations corresponding to at least two of the plurality of grid images is less than a preset distance.

3. The method of claim 1, wherein the first condition is that a similarity of image contents of at least two of the plurality of mesh images is greater than or equal to a preset similarity.

4. The method of claim 1, wherein the first condition is that image content of at least two of the plurality of grid images correspond to a same geographic area.

5. The method of any of claims 2-4, wherein at least two of the plurality of grid images are grid images of adjacent frames in between each other.

6. The method of any one of claims 1-5, wherein pixel values of a grid image in the sequence of images are represented using M bits, each bit having a value of 0 or 1, M being an integer greater than 1, the method further comprising:

processing the grid images in the image sequence to obtain processed grid images;

wherein a value of an ith bit of the N bits of the pixel values of the mesh image in the image sequence is opposite to a value of an ith bit of the N bits of the pixel values of the mesh image in the processed image sequence, and the N bits of the pixel values of the mesh image in the image sequence are located at the same position as the N bits of the pixel values of the mesh image in the processed image sequence,

n bits of pixel values of the grid images in the image sequence are located behind and adjacent to a first bit of the pixel values of the grid images in the image sequence, the first bit is a bit with a value of 1 and the highest bit number in the pixel values of the grid images in the image sequence, i and N are positive integers, i is not more than N, and N is less than M.

7. The method of any one of claims 1-5, wherein pixel values of a grid image in the sequence of images are represented using M bits, each bit having a value of 0 or 1, M being an integer greater than 1, the method further comprising:

wherein a value of a1 st bit of the N bits of the mesh image in the processed image sequence is opposite to a value of a1 st bit of the N bits of the mesh image in the image sequence, and a value of an i +1 th bit of the N bits of the mesh image in the processed image sequence is a result of performing an exclusive or process on the value of the i +1 th bit of the N bits of the mesh image in the image sequence and the i-th bit of the N bits of the mesh image in the processed image sequence,

the N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to a first bit of the pixel values of the mesh images in the image sequence, the first bit being a bit whose value is 1 and whose number of bits is the highest among the pixel values of the mesh images in the image sequence, or the N bits of the pixel values of the mesh images in the image sequence are located after and adjacent to the highest bit of the pixel values of the mesh images in the image sequence,

the N bits of the pixel values of the grid images in the image sequence are the same as the positions of the N bits of the pixel values of the grid images in the processed image sequence, the number of the ith bit is higher than the number of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M.

8. The method according to any one of claims 1 to 5, wherein the pixel values of the residual image are represented by M bits, each bit having a value of 0 or 1, M being an integer greater than 1, and the obtaining the mesh image in the image sequence from the residual image of the mesh image in the image sequence and the predicted image of the mesh image in the image sequence comprises:

processing the residual image to obtain a processed residual image;

obtaining a grid image in the image sequence according to the processed residual image and a predicted image of the grid image in the image sequence;

wherein a value of an ith bit of the N bits of the pixel value of the residual image is opposite to a value of an ith bit of the N bits of the pixel value of the processed residual image, and the N bits of the pixel value of the residual image and the N bits of the pixel value of the processed residual image are located at the same position,

n bits of the pixel values of the residual image are located behind and adjacent to a first bit of the pixel values of the residual image, the first bit is a bit with a value of 1 and the highest digit in the pixel values of the residual image, i and N are positive integers, i is not less than N, and N is less than M.

9. The method according to any one of claims 1 to 5, wherein the pixel values of the residual image are represented by M bits, each bit having a value of 0 or 1, M being an integer greater than 1, and the obtaining the mesh image in the image sequence from the residual image of the mesh image in the image sequence and the predicted image of the mesh image in the image sequence comprises:

processing the residual image to obtain a processed residual image;

wherein the value of the 1 st bit of the N bits of the processed residual image is opposite to the value of the 1 st bit of the N bits of the residual image, and the value of the (i + 1) th bit of the N bits of the processed residual image is the result of performing exclusive or processing on the value of the (i + 1) th bit of the N bits of the residual image and the ith bit of the N bits of the processed residual image,

n bits of pixel values of the residual image are located after and adjacent to a first bit of pixel values of the residual image, the first bit being a bit having a value of 1 and a highest number of bits among the pixel values of the residual image, or the N bits of pixel values of the residual image are located after and adjacent to a highest bit of the pixel values of the residual image,

10. The method according to any one of claims 1 to 9, wherein said obtaining a residual image of a mesh image in an image sequence according to the codestream comprises:

and performing inverse transformation, inverse quantization and entropy decoding on the code stream to obtain the residual image.

11. The method according to any one of claims 1 to 9, wherein said obtaining a residual image of a mesh image in an image sequence according to the codestream comprises:

and carrying out entropy decoding processing on the code stream to obtain the residual image.

12. The method according to any one of claims 1-11, wherein the codestream is encoded from a positioning layer.

13. The method of claim 12, wherein the pixel values of the positioning layer comprise rasterized elevation data.

14. The method of any one of claims 1-13, wherein M has a value of any one of 8, 10, and 12.

15. An image encoding method, comprising:

acquiring an image sequence, wherein the image sequence comprises a plurality of grid images, and the grid images meet a first condition;

performing inter-frame prediction on the grid images in the image sequence to obtain a residual image;

and coding the residual image to obtain a coded code stream.

16. The method of claim 15, wherein the first condition is that a spacing between geographic locations corresponding to at least two of the plurality of grid images is less than a preset distance.

17. The method of claim 15, wherein the first condition is that a similarity of image contents of at least two of the plurality of mesh images is greater than or equal to a preset similarity.

18. The method of claim 15, wherein the first condition is that image content of at least two of the plurality of grid images correspond to a same geographic area.

19. The method of any of claims 16-18, wherein at least two mesh images of the plurality of mesh images are mesh images of adjacent frames to each other.

20. The method of any one of claims 15-19, wherein pixel values of a mesh image in the image sequence are represented using M bits, each bit having a value of 0 or 1, M being an integer greater than 1, the method further comprising, prior to inter-predicting the mesh image in the image sequence:

n bits of pixel values of the grid images in the image sequence are located behind and adjacent to a first bit of the pixel values of the grid images in the image sequence, the first bit is a bit with a value of 1 and the highest bit number in the pixel values of the grid images in the image sequence, i and N are positive integers, i is not more than N, and N is less than M;

the inter-predicting a mesh image in the image sequence comprises:

and performing inter-frame prediction on the processed grid image to obtain the residual image.

21. The method of any one of claims 15-19, wherein pixel values of a mesh image in the image sequence are represented using M bits, each bit having a value of 0 or 1, M being an integer greater than 1, the method further comprising, prior to inter-predicting the mesh image in the image sequence:

the positions of N bits of the pixel values of the grid images in the image sequence are the same as the positions of N bits of the pixel values of the grid images in the processed image sequence, the number of the ith bit is higher than the number of the (i + 1) th bit, i and N are positive integers, i is less than or equal to N, and N is less than M;

the inter-predicting a mesh image in the image sequence comprises:

22. The method according to any one of claims 15 to 19, wherein the pixel value of the residual image is represented by M bits, each bit takes a value of 0 or 1, M is an integer greater than 1, and the encoding of the residual image to obtain an encoded code stream includes:

processing the residual image to obtain a processed residual image;

coding the processed residual error image to obtain the coded code stream;

23. The method according to any one of claims 15 to 19, wherein the pixel value of the residual image is represented by M bits, each bit takes a value of 0 or 1, M is an integer greater than 1, and the encoding of the residual image to obtain an encoded code stream includes:

processing the residual image to obtain a processed residual image;

coding the processed residual error image to obtain the coded code stream;

wherein a value of an ith bit of the N bits of the pixel value of the residual image is opposite to a value of an ith bit of the N bits of the pixel value of the processed residual image, and a value of an (i + 1) th bit of the N bits of the processed residual image is a result of performing exclusive-or processing on the value of the (i + 1) th bit of the N bits of the residual image and the ith bit of the N bits of the processed residual image,

24. The method according to any of claims 15-23, wherein encoding the residual image to obtain an encoded code stream comprises:

and transforming, quantizing and entropy coding the residual image to obtain a coded code stream.

25. The method according to any of claims 15-23, wherein encoding the residual image to obtain an encoded code stream comprises:

and performing entropy coding processing on the residual image to obtain a coded code stream.

26. A method according to any of claims 15-25, wherein the grid pictures in the sequence of images are from self-positioning layers.

27. The method of claim 26, wherein the pixel values of the positioning layers comprise rasterized elevation data.

28. The method of any one of claims 15-27, wherein M has a value of any one of 8, 10, and 12.

29. An image decoding apparatus, characterized in that the image decoding apparatus comprises means for performing the method of any of claims 1-14.

30. An image encoding apparatus, characterized in that the image encoding apparatus comprises means for performing the method of any one of claims 15-28.

31. An image decoding apparatus, comprising:

a memory for storing a program;

a processor for executing the memory-stored program, the processor performing the method of any of claims 1-14 when the memory-stored program is executed by the processor.

32. An image encoding device characterized by comprising:

a memory for storing a program;

a processor for executing the memory-stored program, the processor performing the method of any of claims 15-28 when the memory-stored program is executed by the processor.

33. An electronic device, characterized in that it comprises an image decoding device according to claim 31 and/or an image encoding device according to claim 32.

34. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program executable by a processor, which processor performs the method of any one of claims 1-14 or 15-28 when the computer program is executed by the processor.