CN112230127B - Circuit interference detection method and device, terminal equipment and storage medium - Google Patents

Circuit interference detection method and device, terminal equipment and storage medium Download PDF

Info

Publication number
CN112230127B
CN112230127B CN202011214758.7A CN202011214758A CN112230127B CN 112230127 B CN112230127 B CN 112230127B CN 202011214758 A CN202011214758 A CN 202011214758A CN 112230127 B CN112230127 B CN 112230127B
Authority
CN
China
Prior art keywords
edge time
edge
time
circuit
cycle period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202011214758.7A
Other languages
Chinese (zh)
Other versions
CN112230127A (en
Inventor
苏小燕
黄茂涵
汤瑞智
吴贤生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PAX Computer Technology Shenzhen Co Ltd
Original Assignee
PAX Computer Technology Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PAX Computer Technology Shenzhen Co Ltd filed Critical PAX Computer Technology Shenzhen Co Ltd
Priority to CN202011214758.7A priority Critical patent/CN112230127B/en
Publication of CN112230127A publication Critical patent/CN112230127A/en
Application granted granted Critical
Publication of CN112230127B publication Critical patent/CN112230127B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Telephone Function (AREA)

Abstract

The application is applicable to the technical field of electronics and provides a circuit interference detection method, a circuit interference detection device, terminal equipment and a storage medium. Detecting a signal output by a detected circuit by a control detecting circuit to obtain a detecting signal output by the detecting circuit; respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice; acquiring a first average edge time according to the first edge time in a first cycle period; acquiring a second average edge time according to the second edge time in the first cycle period; when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value, outputting first error information for indicating that the detected circuit is interfered, and judging whether the circuit is interfered according to the first edge time and the second edge time of the detection signal so as to warn a user to timely check an interference source, thereby improving the running stability and safety of the mobile sales terminal.

Description

Circuit interference detection method and device, terminal equipment and storage medium
Technical Field
The application belongs to the technical field of electronics, and particularly relates to a circuit interference detection method, a circuit interference detection device, terminal equipment and a storage medium.
Background
With the popularization of cashless payment methods and the development of electronic payment technologies, more and more payment scenarios can realize cashless completion transactions, wherein a mobile sales terminal (POS) is the earliest developed cashless payment method and is also the currently more mainstream cashless payment method.
Because the POS machine relates to financial transaction, the safety when guaranteeing to trade is especially critical, when the POS machine receives outside or inside interference, for example, external signal invasion, frequency channel interference and electromagnetic detection etc. lead to POS machine to appear safety invasion, communication abnormality and circuit trouble scheduling problem easily to influence trade safety, therefore how to promote the security of POS machine is the current problem that needs to solve urgently.
Disclosure of Invention
In view of this, the embodiments of the present application provide a method, an apparatus, a terminal device, and a storage medium for detecting circuit interference, where when a POS machine is subject to external or internal interference, for example, external signal intrusion, frequency band interference, electromagnetic detection, etc., the POS machine is prone to problems such as security intrusion, communication abnormality, circuit failure, etc., so that transaction security is affected, resulting in a problem that the POS machine has poor security.
A first aspect of an embodiment of the present application provides a circuit interference detection method, including:
the control detection circuit detects the signal output by the detection circuit and acquires the detection signal output by the detection circuit;
respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice;
acquiring a first average edge time according to the first edge time in a first cycle period;
acquiring a second average edge time according to the second edge time in the first cycle period;
and outputting first error information for indicating that the detected circuit has interference when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value.
A second aspect of an embodiment of the present application provides a circuit interference detection device, including:
the acquisition module is used for controlling the detection circuit to detect the signal output by the detected circuit and acquiring the detection signal output by the detection circuit;
the acquisition module is further used for respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice;
the acquisition module is further used for respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice;
The computing module is used for acquiring a first average edge time according to the first edge time in a first cycle period;
the computing module is further used for obtaining second average edge time according to the second edge time in the first cycle period;
and the detection module is used for outputting first error information for indicating that the detected circuit is interfered when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value.
A third aspect of the embodiments of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor is configured to implement the steps of the method for detecting circuit interference provided in the first aspect of the embodiments of the present application when the computer program is executed.
A fourth aspect of the embodiments of the present application provides a computer readable storage medium storing a computer program, which when executed by a processor implements the steps of the method for detecting circuit interference provided in the first aspect of the embodiments of the present application.
According to the circuit interference detection method provided by the first aspect of the embodiment of the application, the detection circuit is controlled to detect the signal output by the detected circuit, and the detection signal output by the detected circuit is obtained; respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice; acquiring a first average edge time according to the first edge time in a first cycle period; acquiring a second average edge time according to the second edge time in the first cycle period; when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value, outputting first error information for indicating that the detected circuit is interfered, and judging whether the circuit is interfered according to the first edge time and the second edge time of the detection signal so as to warn a user to timely check an interference source, thereby improving the running stability and safety of the mobile sales terminal.
It will be appreciated that the advantages of the second to fourth aspects may be found in the relevant description of the first aspect and are not repeated here.
Drawings
Fig. 1 is a schematic flow chart of a circuit interference detection method according to an embodiment of the present application;
fig. 2 is a second flowchart of a circuit interference detection method according to an embodiment of the present application;
fig. 3 is a third flowchart of a circuit interference detection method according to an embodiment of the present application;
fig. 4 is a fourth flowchart of a circuit interference detection method according to an embodiment of the present application;
fig. 5 is a fifth flowchart of a circuit interference detection method according to an embodiment of the present application;
fig. 6 is a sixth flowchart of a circuit interference detection method according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a circuit interference detection device according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a terminal device provided in an embodiment of the present application;
fig. 9 is another schematic structural diagram of a terminal device according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in this specification and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
In addition, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
The embodiment of the application provides a circuit interference detection method which can be applied to any terminal equipment comprising a communication circuit or capable of performing drive control on the communication circuit, such as a POS machine and a cash register, or a computing device with data processing and control functions, which is connected with the POS machine or the cash register in a wired or wireless communication manner. . The computing device may be a mobile phone, a tablet computer, a wearable device, a vehicle-mounted device, an Augmented Reality (AR)/Virtual Reality (VR) device, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a personal digital assistant (personal digital assistant, PDA), or the like, and the embodiments of the present application do not limit the specific type of the terminal device.
In an application, the terminal device may include a detection circuit and a detected circuit. The detection circuit of the terminal device may select a detected circuit to perform interference detection according to actual needs, for example, the detected circuit may include a peripheral interface circuit, a processor circuit, a signal receiving/transmitting circuit, and the like, the detection circuit obtains a detection signal from the detected circuit and determines whether the circuit has interference by analyzing fluctuation of the detection signal, and when the detection signal does not have interference, the detection signal may be a periodic signal such as a pulse signal, a sinusoidal signal, and the like, and may specifically be a rectangular wave signal, a square wave signal, a trapezoidal wave signal, a triangular wave signal, a sawtooth wave signal, a bell wave signal, a step wave signal, and the like.
As shown in fig. 1, the circuit interference detection method provided in the embodiment of the present application includes the following steps S101 to S105:
step S101, a control detection circuit detects a signal output by a detected circuit and acquires a detection signal output by the detection circuit.
In application, the processor controls the detection circuit to detect the signal output by the detected circuit, acquires the detection signal output by the detection circuit, when the detected circuit has interference, the detection signal reflects the fluctuation corresponding to the interference in the waveform, and records as one fluctuation when the waveform of the detection signal is distorted compared with the preset waveform.
Step S102, a first edge time and a second edge time when the detection signal continuously fluctuates twice are respectively obtained.
In application, since the fluctuation has periodicity, when primary fluctuation occurs, corresponding secondary fluctuation occurs, and therefore the first edge time and the second edge time obtained respectively when two continuous fluctuations occur are the edge time of the two fluctuations in one period of the detection signal. The detection circuit may acquire the first edge time and the second edge time through a comparator, an operational amplifier, or the like.
For example, assuming that the detection signal is a square wave, the detection signal has a minimum voltage vmin and a maximum voltage vmax, and is further provided with a reference voltage v1 and a reference voltage v2, wherein vmin < v1 < v2 < vmax, v1 approaches vmin, and v2 approaches vmax; specifically, the detection signal may be input to the positive electrode of the first comparator and the positive electrode of the second comparator, the reference voltage v1 is input to the negative electrode of the first comparator, and the reference voltage v2 is input to the negative electrode of the second comparator, so as to obtain a corresponding first detection signal and second detection signal, obtain a first time when the level of the first detection signal changes from low to high, that is, a start time of one fluctuation, obtain a second time when the level of the second detection signal changes from low to high, that is, an end time of one fluctuation, obtain a first edge time according to a difference value between the first time and the second time, obtain a third time when the level of the first detection signal changes from high to low, that is, a start time of two fluctuations, obtain a fourth time when the level of the second detection signal changes from high to low, that is, an end time of two fluctuations, and obtain a second edge time according to a difference value between the third time and the fourth time.
The detection circuit may further obtain the first detection signal and the second detection signal through devices such as an exclusive or gate, an encoder, an adder, and a plurality of nor gates, so as to integrate the first detection signal and the second detection signal in two paths into one path of detection signal, for example, assuming that the first detection signal and the second detection signal are obtained through the exclusive or gate, when the level of the exclusive or gate changes from low to high, the first time is a start time of one fluctuation, when the level of the exclusive or gate changes from high to low, the second time is a finish time of one fluctuation, the first edge time is obtained according to a difference between the first time and the second time, when the level of the exclusive or gate changes from low to high again, the third time is a start time of two fluctuations, and when the level of the exclusive or gate changes from high to low again, the fourth time is a finish time of two fluctuations, and the second edge time is obtained according to a difference between the third time and the fourth time. The method for acquiring the first edge time and the second edge time can be adjusted according to actual needs, and the specific method for acquiring the first edge time and the second edge time is not limited in any way. The preset waveform of the detection signal is obtained from pre-experiment data.
Step S103, acquiring a first average edge time according to the first edge time in a first cycle period;
step S104, obtaining a second average edge time according to the second edge time in the first cycle period;
step S105, outputting first error information for indicating that the detected circuit has interference when the first average edge time exceeds a first preset threshold or the second average edge time exceeds a second preset threshold.
In application, the first preset threshold value and the second preset threshold value may be numerical values or intervals, which is not limited in this application. The first preset threshold may include a first risk threshold, where the first risk threshold is used to adjust a size of the first preset threshold; specifically, when the first preset threshold is a numerical value, the first risk threshold may be added to or subtracted from the numerical value, and when the first preset threshold is a section, the first risk threshold may be added to or subtracted from the maximum value of the section, or the first risk threshold may be added to or subtracted from the minimum value of the section; the second preset threshold may include a second risk threshold, the second risk threshold being used to adjust a size of the second preset threshold; specifically, when the second preset threshold is a numerical value, the second risk threshold may be added to or subtracted from the numerical value, and when the second preset threshold is a section, the second risk threshold may be added to or subtracted from the maximum value of the section, or the second risk threshold may be added to or subtracted from the minimum value of the section. The first preset threshold value and the second preset threshold value can be set according to actual needs, and the first risk threshold value and the second risk threshold value can also be set according to actual anti-risk capacity of an actual detected circuit.
In one embodiment, step S105 includes:
and turning on an interrupt to stop acquiring the first edge time and the second edge time when the first error information is outputted, and storing all of the first edge time and the second edge time acquired since the start of detecting the detected circuit.
In the application, when the first average edge time exceeds a first preset threshold value or when the second average edge time exceeds a second preset threshold value, outputting first error information to inform a user that the circuit has interference, opening an interrupt to stop acquiring the first edge time and the second edge time, and storing all the first edge time and the second edge time acquired after the detected circuit starts to be detected so that the user can analyze the interference; all the first edge time and the second edge time acquired after the detected circuit is detected from the beginning can be stored locally or in the cloud.
In application, when the first error information for indicating that the circuit has interference is output, the function of the corresponding circuit of the POS machine can be disabled, and other circuits of the POS machine can be disabled to protect the circuit of the POS machine from being damaged.
As shown in fig. 2, in one embodiment, based on the embodiment corresponding to fig. 1, step S103 includes:
and S201, deleting a maximum value and a minimum value in the n first edge times, and then taking an average value to obtain a first average edge time.
Correspondingly, step S104 includes:
step S202, deleting b maximum values and b minimum values in the n second edge times, and then taking an average value to obtain a second average edge time; wherein n is more than or equal to 1, n is more than 2a, and n is more than 2b.
In application, the first cycle period may include n first edge times and n second edge times, and the first cycle period may be set according to actual needs and used for collecting all the first edge times and the second edge times in the cycle to calculate an average first edge time and a second average edge time; for example, assuming that n=30, a=3, and b=3, after 3 maxima and 3 minima of 30 first edge times are deleted, the remaining 24 first edge times are averaged to obtain a first average edge time, and after 3 maxima and 3 minima of 30 second edge times are deleted, the remaining 24 second edge times are averaged to obtain a second average edge time. The first cycle period, n, a and b may be adjusted according to actual needs, where n is greater than or equal to 1, n is greater than 2a, n is greater than 2b, a and b may be equal or unequal, and the embodiment of the present application is not limited in any way.
In application, the first average edge time and the second average edge time can be improved in calculation speed and data accuracy by sampling the first edge time and the second edge time for a plurality of times in the first cycle period and removing a plurality of maximum values and minimum values, so that the first average edge time and the second average edge time can better reflect the interference condition of the current circuit.
As shown in fig. 3, in one embodiment, based on the embodiment corresponding to fig. 1, step S102 further includes the following steps S301 to S303:
step S301, verifying whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold.
In application, the second cycle period can be set according to actual needs and used for collecting all the first edge time and the second edge time in the period to verify whether the third preset threshold value is exceeded; the third preset threshold may be a specific value or an interval, and the embodiment of the present application does not limit the second cycle period and the size of the third preset threshold.
Step S302, when the first edge time and the second edge time in the second cycle period both exceed a third preset threshold, determining that the first edge time and the second edge time are abnormal, and suspending obtaining the first edge time and the second edge time within a preset time.
In the application, after the first edge time and the second edge time are temporarily stopped to be acquired within the preset time, the step of re-entering the first edge time and the second edge time when the detection signal continuously fluctuates twice is respectively acquired; wherein, pause is in the preset time, namely open the interrupt in the preset time to play the effect of restarting the timer.
Step S303, when at least one of the first edge time and the second edge time in the second cycle period does not exceed a third preset threshold, it is determined that the first edge time and the second edge time are obtained normally, and the step S103 is entered.
In the application, whether the first edge time and the second edge time in the second cycle period exceed a third preset threshold value is verified, whether the acquisition of the first edge time and the second edge time is normal can be judged, and when the acquisition is abnormal, the timer is paused and restarted in the preset time, so that the problem of whether the timer is abnormal can be solved.
For example, assuming that there is one first edge time and one second edge time in the second cycle period, the third preset threshold is 0 to 0.02; specifically, when the first edge time is 0.01 second and the second edge time is 0.01 second, that is, when at least one of the first edge time and the second edge time in the second cycle period does not exceed a third preset threshold, judging that the first edge time and the second edge time are obtained normally; or when the first edge time is 0.01 second and the second edge time is 0.03 second, that is, when at least one of the first edge time and the second edge time in the second cycle period does not exceed a third preset threshold value, judging that the first edge time and the second edge time are obtained normally; or when the first edge time is 0.03 second and the second edge time is 0.03 second, namely when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal in acquisition, and suspending the acquisition of the first edge time and the second edge time in the preset time. And when at least one of the first edge time and the second edge time in the second cycle period is smaller than or equal to the third preset threshold value, judging that the first edge time and the second edge time are obtained normally.
As shown in fig. 4, in one embodiment, based on the embodiment corresponding to fig. 3, following step S302, the following steps S401 and S403 are further included:
step S401, verifying whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold;
step S402, when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, restarting the mobile sales terminal, and reacquiring the first edge time and the second edge time;
step S403, when at least one of the first edge time and the second edge time in the second cycle period does not exceed a third preset threshold, determining that the first edge time and the second edge time are normal, and proceeding to step S103.
In the application, after the step of re-entering the first edge time and the second edge time when the detection signal continuously and twice fluctuates is respectively obtained after the timer abnormality is eliminated, the problem of whether the POS machine is halted is checked by restarting the POS machine when the first edge time and the second edge time are judged to be abnormal for the second time.
As shown in fig. 5, in one embodiment, based on the embodiment corresponding to fig. 4, following step S402, the following steps S501 and S503 are further included:
step S501, verifying whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold;
step S502, when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, and outputting second error information for indicating that the mobile sales terminal has a fault;
step S503, when at least one of the first edge time and the second edge time in the second cycle period does not exceed a third preset threshold, determining that the first edge time and the second edge time are normal, and proceeding to step S103.
In the application, after the step of re-entering the first edge time and the second edge time when the POS machine crashes and the detection signal continuously and twice fluctuates is eliminated, when the first edge time and the second edge time are judged to be abnormal for the third time, the second error information used for indicating the POS machine fault is output to inform the user that the POS machine needs to be maintained.
In one embodiment, step S503 includes:
and turning on an interrupt to stop acquiring the first edge time and the second edge time when the second error information is outputted, and storing all of the first edge time and the second edge time acquired since the start of detecting the detected circuit.
In the application, when the second average edge time exceeds the first preset threshold value or when the second average edge time exceeds the second preset threshold value, outputting second error information for indicating that the POS machine has a fault to inform a user that the POS machine needs to be maintained, opening an interrupt to stop acquiring the first edge time and the second edge time, and storing all the first edge time and the second edge time acquired after the detected circuit starts to be detected so that the user can analyze the fault.
As shown in fig. 6, the circuit interference detection method provided in the embodiment of the present application includes the following steps S601 to S613:
step S601, controlling a detection circuit to detect a signal output by a detected circuit, acquiring a detection signal output by the detection circuit, and entering step S602;
step S602, respectively obtaining a first edge time and a second edge time when the detection signal continuously fluctuates twice, and entering step S603;
Step S603, verifying whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold, if yes, entering step S604, if no, entering step S609;
step S604, when the first edge time and the second edge time in the second cycle period both exceed a third preset threshold, determining that the first edge time and the second edge time are abnormal, suspending obtaining the first edge time and the second edge time in a preset time, and entering step S605;
step S605, verifying whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold, if so, entering step S606, and if not, entering step S609;
step S606, when the first edge time and the second edge time in the second cycle period both exceed a third preset threshold, determining that the first edge time and the second edge time are abnormal, restarting the mobile sales terminal, and re-acquiring the first edge time and the second edge time, and entering step S607;
step S607, verifying whether the first edge time and the second edge time in the second cycle period exceed a third preset threshold, if yes, proceeding to step S608, otherwise proceeding to step S609;
Step S608, when the first edge time and the second edge time in the second cycle period both exceed a third preset threshold, determining that the first edge time and the second edge time are abnormal, and outputting a second error message for indicating that the mobile sales terminal has a fault;
step S609, when at least one of the first edge time and the second edge time in the second cycle period does not exceed a third preset threshold, determining that the first edge time and the second edge time are normal, and proceeding to step S610;
step S610, after deleting a maximum values and a minimum values in the n first edge times, taking an average value to obtain a first average edge time, and entering step S611;
step S611, after b maximum values and b minimum values in the n second edge times are deleted, averaging is performed to obtain a second average edge time, when the first average edge time exceeds a first preset threshold or the second average edge time exceeds a second preset threshold, step S612 is entered, and when the first average edge time and the second average edge time do not exceed the first preset threshold, step S613 is entered; wherein n is more than or equal to 1, n is more than 2a, and n is more than 2b;
Step S612, outputting first error information for indicating that the detected circuit has interference;
step S613, turning on an interrupt to stop the acquisition of the first edge time and the second edge time.
In application, steps S601 to S611 are the same as the methods implemented in the foregoing embodiments, and are not repeated here. In step S612, when the first average edge time and the second average edge time do not exceed the first preset threshold, it indicates that there is no interference in the detected circuit, and the interrupt is turned on to stop the acquisition of the first edge time and the second edge time and record the first edge time information and the second edge time information, so as to provide the user with the history data to be consulted.
According to the circuit interference detection method, the detection circuit is controlled to detect the signal output by the detected circuit, and the detection signal output by the detection circuit is obtained; respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice; acquiring a first average edge time according to the first edge time in a first cycle period; acquiring a second average edge time according to the second edge time in the first cycle period; when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value, outputting first error information for indicating that the detected circuit is interfered, and judging whether the circuit is interfered according to the first edge time and the second edge time of the detection signal so as to warn a user to timely check an interference source, thereby improving the running stability and safety of the mobile sales terminal.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic of each process, and should not limit the implementation process of the embodiment of the present application in any way.
As shown in fig. 7, the embodiment of the present application further provides a circuit interference detection device, which is configured to perform the steps in the embodiment of the circuit interference detection method. The circuit interference detection means may be virtual means (virtual appliance) in the terminal device, which are executed by a processor of the terminal device, or the terminal device itself.
As shown in fig. 7, a circuit interference detection device 7 provided in an embodiment of the present application includes:
an acquisition module 701, configured to control a detection circuit to detect a signal output by a detected circuit, and acquire a detection signal output by the detection circuit;
the acquiring module 701 is further configured to acquire a first edge time and a second edge time when the detection signal fluctuates twice consecutively, respectively;
a calculating module 702, configured to obtain a first average edge time according to the first edge time in the first cycle period;
the calculating module 702 is further configured to obtain a second average edge time according to the second edge time in the first cycle period;
A detection module 703, configured to output first error information indicating that the detected circuit has interference when the first average edge time exceeds a first preset threshold or the second average edge time exceeds a second preset threshold.
In one embodiment, the computing module 702 further includes:
the first computing unit is used for removing a maximum value and a minimum value in the n first edge times and then taking an average value to obtain a first average edge time;
the second computing unit is used for removing b maximum values and b minimum values in the n second edge times and then taking an average value to obtain a second average edge time; wherein n is more than or equal to 1, n is more than 2a, and n is more than 2b.
In one embodiment, the circuit interference detection device further includes:
the first verification module is used for verifying whether the first edge time and the second edge time in the second cycle period exceed a third preset threshold value or not;
and when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, and suspending to acquire the first edge time and the second edge time in the preset time.
A second verification module, configured to verify whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold;
and when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, restarting the mobile sales terminal, and reacquiring the first edge time and the second edge time.
A third verification module, configured to verify whether the first edge time and the second edge time in the second cycle period exceed a third preset threshold;
and when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, and outputting second error information for indicating that the mobile sales terminal has faults.
And the interrupt module is used for opening an interrupt to stop the acquisition of the first edge time and the second edge time when the first average edge time and the second average edge time do not exceed a first preset threshold value.
In application, each module in the circuit interference detection device can be a software program module, can be realized by different logic circuits integrated in a driver, and can also be realized by a plurality of distributed processors.
As shown in fig. 8, the embodiment of the present application further provides a terminal device 8 including: at least one processor 80 (only one processor is shown in fig. 8), a memory 81, and a computer program 82 stored in the memory 81 and executable on the at least one processor 80, the steps in the various circuit disturbance detection method embodiments described above being implemented when the computer program 82 is executed by the processor 80.
In application, the processor may be a central processing unit (Central Processing Unit, CPU), which may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
In applications, the memory may in some embodiments be an internal storage unit of the terminal device, such as a hard disk or a memory of the terminal device. The memory may in other embodiments also be an external storage device of the terminal device, such as a plug-in hard disk provided on the terminal device, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card) or the like. Further, the memory may also include both an internal storage unit of the terminal device and an external storage device. The memory is used to store an operating system, application programs, boot loader (BootLoader), data, and other programs, etc., such as program code for a computer program, etc. The memory may also be used to temporarily store data that has been output or is to be output.
As shown in fig. 9, the embodiment of the present application further provides a terminal device 9 including: at least one processor 90 (only one processor is shown in fig. 9), a memory 91, a detection circuit 93, a detected circuit 94, and a computer program 92 stored in the memory 91 and executable on the at least one processor 90, the steps of the various circuit disturbance detection method embodiments described above being implemented when the processor 90 executes the computer program 92.
In application, the processor sends a control signal to the detection circuit, the detection circuit acquires the detection signal from the detected circuit according to the control signal, and the detection circuit analyzes the detection signal and then sends first error information, second error information or opening and interrupting information to the processor.
It should be noted that, because the content of information interaction and execution process between the above devices/modules is based on the same concept as the method embodiment of the present application, specific functions and technical effects thereof may be referred to in the method embodiment section, and will not be described herein again.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional modules is illustrated, and in practical application, the above-described functional allocation may be performed by different functional modules according to needs, i.e. the internal structure of the apparatus is divided into different functional modules to perform all or part of the functions described above. The functional modules in the embodiment may be integrated in one processing module, or each module may exist alone physically, or two or more modules may be integrated in one module, where the integrated modules may be implemented in a form of hardware or a form of software functional modules. In addition, the specific names of the functional modules are only for distinguishing from each other, and are not used for limiting the protection scope of the application. The specific working process of the modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
The embodiments of the present application also provide a computer readable storage medium storing a computer program, where the computer program when executed by a processor implements the steps of the embodiments of the method for detecting circuit interference described above.
The embodiments of the present application provide a computer program product, which when run on a terminal device, causes the terminal device to perform the steps in the embodiments of the method for detecting circuit interference.
The integrated modules, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the present application implements all or part of the flow of the method of the above embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, where the computer program, when executed by a processor, may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to a terminal device, a recording medium, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Such as a U-disk, removable hard disk, magnetic or optical disk, etc.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative modules and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed terminal device and method may be implemented in other manners. For example, the above-described embodiments of the terminal device are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be other manners of division in actual implementation, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or modules, which may be in electrical, mechanical or other forms.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical modules, i.e., may be located in one place, or may be distributed over a plurality of network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (8)

1. A method for detecting circuit interference, comprising:
the control detection circuit detects the signal output by the detection circuit and acquires the detection signal output by the detection circuit;
respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice;
Acquiring a first average edge time according to the first edge time in a first cycle period;
acquiring a second average edge time according to the second edge time in the first cycle period;
outputting first error information for indicating that the detected circuit has interference when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value;
after the first edge time and the second edge time when the detection signal continuously fluctuates twice are respectively obtained, the method further comprises the steps of:
verifying whether the first edge time and the second edge time in a second cycle period both exceed a third preset threshold;
when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, and suspending obtaining the first edge time and the second edge time in the preset time;
the method is applied to the mobile sales terminal;
the step of determining that the first edge time and the second edge time are abnormal, after suspending the acquisition of the first edge time and the second edge time within a preset time, includes:
Verifying whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold;
and when the first edge time and the second edge time in the second cycle period exceed three preset thresholds, judging that the first edge time and the second edge time are abnormal, restarting the mobile sales terminal, and reacquiring the first edge time and the second edge time.
2. The circuit disturbance detection method according to claim 1, wherein the first cycle period includes n first edge times and n second edge times;
the obtaining a first average edge time according to the first edge time in the first cycle period includes:
removing a maximum value and a minimum value in the n first edge times, and then taking an average value to obtain a first average edge time;
the obtaining a second average edge time according to the second edge time in the first cycle period includes:
b maximum values and b minimum values in the n second edge times are deleted, and then an average value is obtained, so that a second average edge time is obtained;
wherein n is more than or equal to 1, n is more than 2a, and n is more than 2b.
3. The circuit interference detection method of claim 1, wherein said determining that said first edge time and said second edge time are abnormal, after restarting said mobile sales terminal and reacquiring said first edge time and said second edge time, comprises:
verifying whether the first edge time and the second edge time in the second cycle period exceed a third preset threshold;
and when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, and outputting second error information for indicating that the mobile sales terminal has faults.
4. The circuit disturbance detection method according to claim 3, wherein the method further comprises:
and when outputting the first error information or the second error information, opening an interrupt to stop acquiring the first edge time and the second edge time, and storing all the first edge time and the second edge time acquired after starting to detect the detected circuit.
5. The circuit disturbance detection method according to claim 1, further comprising:
And when the first average edge time and the second average edge time do not exceed a first preset threshold value, opening an interrupt to stop acquisition of the first edge time and the second edge time.
6. A circuit disturbance detection device, comprising:
the acquisition module is used for respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice;
the acquisition module is further used for respectively acquiring a first edge time and a second edge time when the detection signal continuously fluctuates twice;
the computing module is used for acquiring a first average edge time according to the first edge time in a first cycle period;
the computing module is further used for obtaining second average edge time according to the second edge time in the first cycle period;
the detection module is used for outputting first error information for indicating that the detected circuit is interfered when the first average edge time exceeds a first preset threshold value or the second average edge time exceeds a second preset threshold value;
the first verification module is used for verifying whether the first edge time and the second edge time in the second cycle period exceed a third preset threshold value or not;
When the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, and suspending obtaining the first edge time and the second edge time in the preset time;
a second verification module, configured to verify whether the first edge time and the second edge time in the second cycle period both exceed a third preset threshold;
and when the first edge time and the second edge time in the second cycle period exceed a third preset threshold value, judging that the first edge time and the second edge time are abnormal, restarting the mobile sales terminal, and reacquiring the first edge time and the second edge time.
7. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 1 to 5 when executing the computer program.
8. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the method according to any one of claims 1 to 5.
CN202011214758.7A 2020-11-04 2020-11-04 Circuit interference detection method and device, terminal equipment and storage medium Active CN112230127B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011214758.7A CN112230127B (en) 2020-11-04 2020-11-04 Circuit interference detection method and device, terminal equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011214758.7A CN112230127B (en) 2020-11-04 2020-11-04 Circuit interference detection method and device, terminal equipment and storage medium

Publications (2)

Publication Number Publication Date
CN112230127A CN112230127A (en) 2021-01-15
CN112230127B true CN112230127B (en) 2024-03-19

Family

ID=74121873

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011214758.7A Active CN112230127B (en) 2020-11-04 2020-11-04 Circuit interference detection method and device, terminal equipment and storage medium

Country Status (1)

Country Link
CN (1) CN112230127B (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105364A (en) * 1988-10-14 1990-04-17 Sanyo Electric Co Ltd Capstan servo circuit for rotary head type digital audio tape recorder
JPH06104740A (en) * 1992-09-18 1994-04-15 Sony Corp Measuring circuit for edge time of input signal and digital pll device
JPH10111133A (en) * 1996-10-08 1998-04-28 Japan Aviation Electron Ind Ltd Optical interference angular velocimeter with anomaly detecting function
CN107087285A (en) * 2017-04-18 2017-08-22 珠海格力电器股份有限公司 A kind of Radio frequency interference detection method and device
CN107367633A (en) * 2016-05-11 2017-11-21 佛山市顺德区美的电热电器制造有限公司 Zero-cross processing method, device and equipment for voltage zero-crossing detection circuit
CN107906673A (en) * 2017-11-03 2018-04-13 广东美的制冷设备有限公司 Opening-closing structure detection control method, air conditioner and the readable storage medium storing program for executing of air conditioner
CN107991587A (en) * 2017-11-27 2018-05-04 北京腾控科技有限公司 A kind of fault arc detection method detected by electric arc pulse signal starting
CN110376946A (en) * 2019-07-23 2019-10-25 广东美的制冷设备有限公司 Control method, electric appliance and the computer readable storage medium of electric appliance output power

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8744336B2 (en) * 2008-08-27 2014-06-03 Qualcomm Incorporated Interference detection apparatus and method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105364A (en) * 1988-10-14 1990-04-17 Sanyo Electric Co Ltd Capstan servo circuit for rotary head type digital audio tape recorder
JPH06104740A (en) * 1992-09-18 1994-04-15 Sony Corp Measuring circuit for edge time of input signal and digital pll device
JPH10111133A (en) * 1996-10-08 1998-04-28 Japan Aviation Electron Ind Ltd Optical interference angular velocimeter with anomaly detecting function
CN107367633A (en) * 2016-05-11 2017-11-21 佛山市顺德区美的电热电器制造有限公司 Zero-cross processing method, device and equipment for voltage zero-crossing detection circuit
CN107087285A (en) * 2017-04-18 2017-08-22 珠海格力电器股份有限公司 A kind of Radio frequency interference detection method and device
CN107906673A (en) * 2017-11-03 2018-04-13 广东美的制冷设备有限公司 Opening-closing structure detection control method, air conditioner and the readable storage medium storing program for executing of air conditioner
CN107991587A (en) * 2017-11-27 2018-05-04 北京腾控科技有限公司 A kind of fault arc detection method detected by electric arc pulse signal starting
CN110376946A (en) * 2019-07-23 2019-10-25 广东美的制冷设备有限公司 Control method, electric appliance and the computer readable storage medium of electric appliance output power

Also Published As

Publication number Publication date
CN112230127A (en) 2021-01-15

Similar Documents

Publication Publication Date Title
US20180203986A1 (en) Fingerprint Recognition Method and Apparatus, and Touchscreen Terminal
US20160378691A1 (en) System, apparatus and method for protecting a storage against an attack
US10303883B2 (en) Firmware verification through data ports
US9542557B2 (en) Snoop-based kernel integrity monitoring apparatus and method thereof
CN111552434A (en) Securing a memory device
CN110345100A (en) Monitoring method, device, equipment and the readable storage medium storing program for executing of server fan rotating speed
KR101976717B1 (en) Method for authenticating and controlling authority secure devices for can
CN110457907A (en) A kind of firmware program detecting method and device
CN112230127B (en) Circuit interference detection method and device, terminal equipment and storage medium
CN111767270A (en) Data migration method, device, server and storage medium
US8065179B1 (en) Method and apparatus for providing a utility-based model for security software revenue generation
WO2018188542A1 (en) Counting method, counter, and storage medium
CN109041238B (en) Carrier configuration detection method, device, equipment and medium
CN110244222B (en) Limit origin positioning method and device of motor, terminal equipment and storage medium
WO2018026303A1 (en) Method and system for detecting remote access during activity on the pages of a web resource
US20100127767A1 (en) Integrated Circuit Device Including Noise Filter
CN112067991B (en) Motor locked rotor detection method, detection device, terminal equipment and storage medium
CN215814142U (en) Interrupt output device and electronic apparatus
CN113918382A (en) Method, apparatus, device and readable storage medium for resetting
KR20210105678A (en) Detecting abnormal data flow in storage writing process through current charging of capacitor
CN116451178B (en) Sensor abnormality processing method, device, equipment and storage medium
CN113394785B (en) Method and device for determining control strategy of active filter and readable storage medium
CN114928378A (en) Single-wire signal transmission method and device and electronic equipment
CN114428464B (en) Robot cluster control interaction method and device, terminal equipment and storage medium
KR102158773B1 (en) Pulse Width Modulator and method for PWM signal monitoring using the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant