CN112217397A - Power supply circuit of quick-charging power chip - Google Patents
Power supply circuit of quick-charging power chip Download PDFInfo
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- CN112217397A CN112217397A CN202011126583.4A CN202011126583A CN112217397A CN 112217397 A CN112217397 A CN 112217397A CN 202011126583 A CN202011126583 A CN 202011126583A CN 112217397 A CN112217397 A CN 112217397A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J2207/20—Charging or discharging characterised by the power electronics converter
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a power supply circuit of a quick-charging power supply chip, which comprises a power supply, a starting unit, a power supply unit and a forced resonance unit, wherein the zero-voltage starting function of a switching power supply is realized by combining an auxiliary winding of a secondary feedback type switching power supply and a PMOS (P-channel metal oxide semiconductor) tube.
Description
Technical Field
The application relates to the field of switching power supplies, in particular to a power supply circuit of a quick-charging power supply chip.
Background
The power density and the volume of the fast-charging products in the market put higher demands, that is, the power density is higher in the case of smaller volume, and an effective way to solve the above problem is to add ZVS (Zero Voltage Switch) function to the fast-charging products.
In the prior art, a zero-voltage switch control circuit is formed by additionally adding an MOSFET power tube, a capacitor and a transformer winding, so that the conduction or switching loss of the transformer power tube in a quick-charging product and an adapter is reduced, and the output power density is improved.
The above method effectively solves the problem of output power density, however, the additional addition of MOSFET power tube, capacitor and transformer winding is not favorable for the reduction of the volume of the charger and the adapter, and the circuit design is relatively complex.
Disclosure of Invention
In order to solve the problem of reducing the volume of a charger and an adapter under the condition of improving the power density, the invention provides a power supply circuit of a quick-charging power supply chip, which comprises a power supply, a starting unit, a power supply unit and a forced resonance unit, wherein,
the power supply comprises a primary winding, a secondary winding, a first auxiliary winding, a second power switch and a detection resistor;
the starting unit comprises a starting capacitor;
the power supply unit comprises a low-voltage power supply unit and a high-voltage power supply unit and is used for supplying power to a power management chip, wherein the high-voltage power supply unit comprises the second auxiliary winding and a first power switch of a PMOS (P-channel metal oxide semiconductor) structure, and the high-voltage power supply unit is used for supplying high-voltage power supply voltage to the power management chip after the low-voltage power supply unit is cut off;
the forced resonance unit comprises a second auxiliary winding, a first power switch and a starting capacitor, wherein the drain electrode of the first power switch is connected with the common ends of the second auxiliary winding and the first auxiliary winding, the grid electrode of the first power switch is connected with a first pin of a power management chip, the source electrode of the first power switch is grounded through the starting capacitor, the other end of the second auxiliary winding is grounded, and the forced resonance unit is used for generating forced resonance voltage when the power flyback finishes being in an interrupted mode.
In some embodiments of the present application, the low voltage power supply unit further includes the first auxiliary winding and a power regulator, and is configured to directly provide a low voltage power supply voltage to the power management chip.
In some embodiments of the present application, when the power supply voltage of the power management chip is greater than a preset threshold, the low-voltage power supply unit is turned off, and the high-voltage power supply unit is turned on, so as to charge the starting capacitor through the first power switch.
In some embodiments of the present application, the power management chip further includes a mode determining unit, a zero voltage driving unit, and a valley bottom conducting unit, wherein
The input end of the mode judging unit is connected with the second pin of the power management chip, and the output end of the mode judging unit is connected with the third pin of the power management chip and used for generating a mode judging signal when the second power switch outputs a low level;
the input end of the zero voltage driving unit is connected with the input end of the mode judging unit, and the output end of the zero voltage driving unit is connected with the first pin and used for generating a ZVS driving signal of switching frequency when the power supply is in an intermittent mode so as to drive the first power switch;
the valley bottom conduction unit is respectively connected with the zero voltage driving unit and the mode judging unit and used for generating a driving signal to the second power switch.
In some embodiments of the present application, when a DRV/gate signal that is a low level signal is detected, a first zero-crossing signal before the DRV/gate signal is converted into the high level signal is obtained, and the zero-voltage driving unit is caused to generate the ZVS driving signal to the first power switch based on the first zero-crossing signal, so as to force the power supply to resonate.
In some embodiments of the present application, the power management chip further includes a bus voltage compensation unit, configured to obtain an input bus voltage division signal through a fifth pin of the power management chip, and obtain a compensation voltage signal and/or a compensation current signal representing an input bus voltage through the input bus voltage division signal.
In some embodiments of the present application, the power management chip further includes a bus voltage compensation unit, configured to obtain an input bus voltage division signal through the second pin of the power management chip, and obtain a compensation voltage signal and/or a compensation current signal representing an input bus voltage through the input bus voltage division signal.
In some embodiments of the present application, the mode determination unit further includes a zero-crossing detection module, a mode determination module, a main driving module, and a logic control module, wherein,
the zero-crossing detection module, the mode judgment module, the logic control module and the main drive module are sequentially connected, the input end of the zero-crossing detection module is connected to the second pin of the power management chip, and the output end of the main drive module is connected to the fourth pin of the power management chip.
In some embodiments of the present application, the zero voltage driving unit includes a ZVS module and a ZVS driving module, wherein,
the ZVS module and the ZVS driving module are sequentially connected, the input end of the ZVS module is connected to one output end of the zero-crossing detection module, and the output end of the ZVS driving module is connected to the first pin of the power management chip.
In some embodiments of the present application, the valley conduction unit further comprises a clock module and a valley conduction module, wherein,
the clock module is respectively connected with the ZVS module, the valley bottom conduction module and the logic control module, and the valley bottom conduction module is respectively connected with the zero-crossing detection module, the mode judgment module, the logic control module and the ZVS module.
Compared with the prior art, the invention has the following beneficial effects:
the invention discloses a power supply circuit of a quick-charging power supply chip, which comprises a power supply, a starting unit, a power supply unit and a forced resonance unit, wherein the zero-voltage starting function of a switching power supply is realized by combining an auxiliary winding of a secondary feedback type switching power supply and a PMOS (P-channel metal oxide semiconductor) tube.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a power supply circuit of a fast charging power chip according to the present invention;
fig. 2 is a schematic structural diagram of a power supply circuit of a fast charging power chip according to another embodiment of the present invention;
fig. 3 is a schematic structural diagram of a mode determination unit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In order to solve the above problem, an embodiment of the present application provides a power supply circuit of a fast charging type power chip, including a power supply, a starting unit, a power supply unit, and a forced resonance unit, wherein, as shown in fig. 1,
the power supply comprises a primary winding Lp, a secondary winding Ls, a first auxiliary winding Laux1, a second auxiliary winding Laux2, a second power switch M2 and a detection resistor Rcs;
the starting unit comprises a starting capacitor Cvcc;
the power supply unit comprises a low-voltage power supply unit and a high-voltage power supply unit, and is used for supplying power to a power management chip, wherein the high-voltage power supply unit comprises the second auxiliary winding Laux2 and a first power switch M1 with a PMOS structure, and the high-voltage power supply unit is used for supplying high-voltage power supply voltage to the power management chip after the low-voltage power supply unit is cut off;
the forced resonance unit comprises the second auxiliary winding Laux2, the first power switch M1 and the starting capacitor Cvcc, wherein the drain of the first power switch M1 is connected with the common end of the second auxiliary winding Laux2 and the first auxiliary winding Laux1, the gate of the first power switch M1 is connected with the first pin driver of the power management chip, the source of the first power switch M1 is grounded through the starting capacitor Cvcc, the other end of the second auxiliary winding Laux2 is grounded, and the forced resonance unit is used for generating a forced resonance voltage when the power flyback is in the discontinuous mode.
It should be noted that, in the circuit with zero voltage start function (ZVS), the forced resonant circuit includes the auxiliary winding, the capacitor and the power switch, and the circuit is simplified based on the above function, and the reduction of the circuit loss is considered by the skilled person. Therefore, the auxiliary winding and the power switch of the forced resonance unit of the embodiment are shared with the high-voltage power supply circuit of the power management chip, and the capacitor of the forced resonance unit is shared with the starting capacitor Cvcc of the power management chip, so that the aims of simplifying the circuit, reducing the circuit loss and effectively reducing the size of the switching power supply are fulfilled.
When the output of the power supply is high voltage, namely the voltage value is greater than the preset voltage, and the second auxiliary winding Laux2 is in the flyback stage, the low-voltage power supply unit is cut off, and the high voltage supplies power to the starting capacitor Cvcc through the first power tube M1; when the power transformer is in a demagnetization stage and the first power tube M1 is not turned on, the first power tube M1, the second auxiliary winding Laux2 and the starting capacitor Cvcc form a forced resonance unit to generate a forced resonance voltage, so that the drain voltage of the second power switch M2 is reduced to be near a zero point, and zero voltage or zero current turn-on or turn-off of the second power switch M2 is realized, that is, for other power supplies, the turn-on loss or the turn-off loss of the power switch needs to be reduced, the circuit disclosed by the invention can be used for realizing the purpose.
In order to reduce the power loss and improve the power efficiency, in a preferred embodiment of the present application, the low voltage power supply unit further includes the first auxiliary winding Laux1 and a power regulator LDO, for directly providing a low voltage power supply voltage VccL to the power management chip.
Specifically, when the output voltage of the power supply is lower than a preset voltage value, that is, the output voltage is lower, in order to enable the supply voltage of the power management chip to reach the Vcc voltage requirement, voltage regulation needs to be performed through the LDO; when the power output voltage is high, i.e., the power output voltage is greater than the preset voltage value, the loss of the low-voltage power supply unit increases with the increase of the power supply, thereby reducing the power efficiency.
In order to improve the power efficiency, in a preferred embodiment of the present application, when the power supply voltage of the power management chip is greater than a preset threshold, the low voltage power supply unit is turned off, and the high voltage power supply unit is turned on, so as to charge the starting capacitor through the first power switch M1.
Specifically, the power management chip power supply circuit of this application includes two power supply units, high voltage power supply unit and low pressure power supply unit, when power output voltage is high, adopts high voltage power supply unit to power efficiency has been improved.
In order to improve the power efficiency, in a preferred embodiment of the present application, as shown in fig. 1, the power management chip further includes a mode determining unit, a zero voltage driving unit, and a valley bottom conducting unit, wherein
The input end of the mode judging unit is connected with the second pin Zcd of the power management chip, and the output end of the mode judging unit is connected with the fourth pin Gate of the power management chip, and is used for generating a mode judging signal when the second power switch outputs a low level;
the input end of the zero voltage driving unit is connected with the input end of the mode judging unit, and the output end of the zero voltage driving unit is connected with the first pin driver and used for generating a ZVS driving signal of a switching frequency when the power supply is in an intermittent mode so as to drive the first power switch M1;
the valley bottom conducting unit is respectively connected with the zero voltage driving unit and the mode judging unit, and is used for generating a driving signal gate to the second power switch M2.
In order to further improve the efficiency of the power supply, in a preferred embodiment of the present application, when a DRV/gate signal that is a low level signal is detected, a first zero-crossing signal before the DRV/gate signal is converted into the high level signal is obtained, and the zero-voltage driving unit is caused to generate the ZVS driving signal to the first power switch based on the first zero-crossing signal, so that the power supply is forced to resonate.
In this embodiment, when the second power switch M2 outputs the DRV/gate signal at a low level and senses the first zero-crossing signal Valley of the voltage of the second auxiliary winding Laux2, the mode determining unit outputs a DCM (discontinuous mode) signal to operate the switching power supply in DCM; when the first zero-crossing signal Valley is not sensed, a CCM (continuous mode) signal is output, so that the switching power supply operates in CCM.
It should be noted that, the mode of determining the operating mode by sensing the zero-crossing signal may also be performed by sensing the output/input voltage or current variation to determine the DCM and CCM of the switching power supply, or may be performed by sensing the voltage or current variation of the switching power supply through an external circuit.
In this embodiment, when the switching power supply operates in DCM, the zero-voltage driving unit receives a second zero-crossing signal crest corresponding to a rising edge of the voltage of the second auxiliary winding Laux2, performs pulse width modulation on the second zero-crossing signal crest, and drives the first power switch M1 to be turned on, and the power supply is turned off after a certain time according to the pulse width energy storage of the second zero-crossing signal crest, so that the drain voltage or current of the second power switch M2 is reduced to near the zero point, thereby providing a condition for the second power switch M2 to implement zero-voltage/zero-current conduction in the next period.
In this embodiment, the valley bottom conducting unit is respectively connected to the zero voltage driving unit and the mode determining unit, and when the switching power supply operates in DCM, receives the clock signal CLK after receiving the second zero-crossing signal creet, obtains the first zero-crossing signal valley as the valley bottom conducting signal QR after receiving the clock signal CLK, and drives the second switch M2 to conduct at zero voltage or zero current.
It should be noted that, the Valley bottom conduction unit receives the ZVS driving signal, and then receives the clock signal CLK to obtain the first zero-cross signal Valley as the Valley bottom conduction signal QR. This is because the clock signal CLK is the turn-on information of the main switch power transistor of the switching power supply entering the next cycle, that is, the second power switch M2 needs to be turned on after receiving the clock signal CLK, so that the first zero-cross signal Valley obtained after receiving the clock signal CLK is the Valley-bottom conducting signal QR, and the turn-on of the second power switch M2 at zero voltage or zero current is realized.
It should be noted that, the ZVS driving signal should be received before the bottom-valley turn-on signal QR is output, because the ZVS driving signal is a driving signal for turning on the first power switch M1, and the precondition for achieving the turning-on of the second power switch M2 at zero voltage or zero current is to reduce the drain voltage or current of the second power switch M2 to near zero, and the turning-on of the first power switch M1 is to achieve the reduction of the drain voltage or current of the second power switch M2 to near zero.
In order to further improve the power efficiency, in some embodiments of the present application, as shown in fig. 2, a bus voltage compensation unit is further included, configured to obtain an input bus voltage division signal through a fifth pin comp of the power management chip, and obtain a compensation voltage signal and/or a compensation current signal representing the input bus voltage through the input bus voltage division signal.
In order to further improve the power efficiency, in some embodiments of the present application, as shown in fig. 1, a bus voltage compensation unit is further included, configured to obtain an input bus voltage division signal through the second pin Zcd of the power management chip, and obtain a compensation voltage signal and/or a compensation current signal representing the input bus voltage through the input bus voltage division signal.
According to the two embodiments, the bus voltage compensation unit and the zero voltage driving unit can implement pulse width modulation on the ZVS signal, and the pulse width modulation on the ZVS signal can change the on-time of the first power switch M1, so as to change the energy storage of the switching power supply transformer in the resonance stage. That is, the present disclosure may achieve zero voltage or zero current actuation of the second power switch M2 for different input bus voltages.
In order to improve the power efficiency, in some embodiments of the present application, as shown in fig. 2 and 3, the mode determination unit further includes a zero-crossing detection module, a mode determination module, a main driving module, and a logic control module, wherein,
the zero-crossing detection module, the mode judgment module, the logic control module and the main drive module are sequentially connected, the input end of the zero-crossing detection module is connected to the second pin Zcd of the power management chip, and the output end of the main drive module is connected to the fourth pin Gate of the power management chip.
In order to improve power efficiency, in some embodiments of the present application, as shown in fig. 2, the zero voltage driving unit includes a ZVS module and a ZVS driving module, wherein,
the ZVS module and the ZVS driving module are sequentially connected, the input end of the ZVS module is connected to one output end of the zero-crossing detection module, and the output end of the ZVS driving module is connected to the first pin driver of the power management chip.
The following example shows how the pulse width modulation of the ZVS signal is performed according to different input bus voltages.
The ZVS module comprises a capacitor and a preset voltage value Vth and/or a preset current value Ith;
the frequency modulation mode of the switch M1 of the first power switch comprises any one or any combination of the following modes:
when the bus voltage compensation unit receives an input bus voltage division signal and outputs a compensation voltage signal V of the bus voltage, the ZVS module takes the compensation voltage signal V as a reference voltage signal Vref, and charges the capacitor with the preset current Ith to enable the compensation voltage signal V to reach the reference voltage Vref;
when the bus voltage compensation unit receives an input bus voltage division signal and outputs a compensation current signal I of the bus voltage, the ZVS module takes the compensation current signal I as the capacitor charging current to charge the capacitor to reach a preset voltage value Vth.
It should be noted that, the bus voltage supplementing unit obtains the supplementing voltage V, the supplementing voltage V is used as the reference voltage Vref, when the preset current Ith is constant, the time duration for charging the capacitor to make the voltage of the capacitor reach the reference voltage Vref is related to the value of the input bus voltage Vin, when the input bus voltage value is relatively higher, the higher the obtained supplementing voltage V is, the higher the reference voltage Vref is, the longer the time for the capacitor to reach the reference voltage Vref is under the condition that the preset current Ith is not changed, so that the pulse width of the ZVS signal is wider, and conversely, when the input bus voltage Vin is relatively smaller, the pulse width of the ZVS signal adjusted is narrower.
It can be understood that the compensation current signal I is obtained by the bus voltage supplement module, and when the compensation current signal I is used as a charging current to charge the capacitor to reach the preset voltage value Vth, the charging current is related to the input bus voltage Vin, and when the input bus voltage Vin is relatively high, the obtained compensation current signal I is relatively small, that is, the charging current is relatively small. It can be understood that, under the condition that the preset voltage Vth of the capacitor is constant, the charging current is smaller and the time for the charging current to reach the preset voltage Vth is longer, so that the pulse width of the ZVS signal is wider, and conversely, when the input bus voltage Vin is relatively smaller, the pulse width of the ZVS signal adjusted by the charging current is narrower.
In order to improve the power efficiency, in some embodiments of the present application, as shown in fig. 2, the valley conductive unit further includes a clock module and a valley conductive module, wherein,
the clock module is respectively connected with the ZVS module, the valley bottom conduction module and the logic control module, and the valley bottom conduction module is respectively connected with the zero-crossing detection module, the mode judgment module, the logic control module and the ZVS module.
In this embodiment, when the flyback of the switching power supply is in the discontinuous mode, the zero-crossing signal of the falling edge of the second auxiliary winding Laux2 sensed by the zero-crossing detection module is the first zero-crossing signal Valley. When the flyback of the switching power supply is in the discontinuous mode, the zero-crossing signal of the rising edge of the second auxiliary winding Laux2 sensed by the zero-crossing detection module is the second zero-crossing signal crest.
After the switching power supply flyback finishes being in the discontinuous mode and the first power switch M1 is turned off, the Valley bottom conduction module receives a first zero-cross signal Valley obtained after the clock module generates the clock signal CLK, and the first zero-cross signal Valley is the Valley bottom conduction signal QR.
Through the technical scheme who uses this application, utilize vice limit reaction type switching power supply auxiliary winding to combine with the PMOS pipe and realize switching power supply's zero voltage and open the function, compare the circuit simple relatively with prior art, circuit components and parts are few, are favorable to the reduction of charger and adapter volume to adopt low voltage power supply unit and high voltage power supply unit, improved power efficiency.
Corresponding to the power supply circuit of the fast charging power supply chip in the embodiment of the present application, the embodiment of the present application further provides a zero voltage switching control method applied to a switching power supply, which is applied to a switching power supply including a main switching power tube and a transformer, and includes:
receiving a first zero-crossing signal valley, and outputting to enable the switching power supply to be in a discontinuous mode DCM;
acquiring a ZVS (zero voltage switching) signal of a first second zero-crossing signal creet after a clock signal CLK (clock signal), and outputting to enable the switching power supply transformer to enter an energy storage stage;
and acquiring a first zero-crossing signal valley after the ZVS signal, and outputting to enable the main switch power tube M2 of the switching power supply to realize zero-voltage and/or zero-current starting.
In the above embodiment, when the flyback of the switching power supply is completed and the first zero-crossing signal Valley signal is received, the switching power supply enters DCM, which indicates that the main switching power tube M2 of the switching power supply can turn on a zero-voltage or zero-current function.
It should be noted that, when the switching power supply enters DCM and acquires the clock signal CLK, it indicates that the main switching power tube of the switching power supply is about to enter the next cycle, and at this time, the ZVS signal is acquired through the second zero-crossing signal crest, and the ZVS signal is output to control the transformer of the switching power supply to store energy, so as to provide conditions for realizing the zero-voltage or zero-current start of the main switching power tube of the switching power supply in the next step.
It should be noted that the ZVS signal controls the switching power supply to be turned on after energy is stored, so that the voltage or current of the main switching power tube of the switching power supply is reduced to zero, thereby realizing zero-voltage or zero-current starting. It can be understood that the first zero-crossing signal valley sensed after the ZVS signal indicates that the voltage or current of the main switching power tube of the switching power supply has decreased to the zero point, and therefore, the disclosure defines the first zero-crossing signal valley after the ZVS signal as the valley-bottom conduction signal QR for turning on the main switching power tube of the switching power supply.
In another embodiment, when the first zero-crossing signal Valley is not received, the output makes the switching power supply in the continuous mode CCM; and acquiring the clock signal CLK, and outputting to turn on the switching power supply main switching power tube M0.
It should be noted that, when the switching power supply does not receive the first zero-crossing signal Valley at the stage of completing the resonance in the flyback, the zero-crossing point of the switching power supply is CCM, and the Valley-free conduction signal QR is output, so that the switching power supply main switching power tube M0 is started to enter the next cycle through the output of the clock signal CLK.
In another embodiment, the step of obtaining the ZVS signal of the first and second zero-crossing signals crest after the clock signal CLK and outputting the ZVS signal to make the switching power supply transformer enter the energy storage stage includes:
receiving the clock signal CLK;
receiving the first second zero-crossing signal crest;
acquiring a compensation voltage signal V or a compensation current signal I representing an input bus voltage Vin;
outputting a ZVS signal after pulse width adjustment to enable the transformer switching power supply to enter an energy storage stage;
it should be noted that, after the switching power supply receives the second zero-crossing signal crest, it will generate a ZVS signal with adjustable pulse width, and the pulse width adjustment of the ZVS signal is performed based on the compensation voltage signal V or the compensation current signal I representing the input bus voltage Vin, so that the compensation voltage signal V or the compensation current signal I representing the input bus voltage Vin needs to be obtained.
It should be further noted that the pulse width modulation of the ZVS signal is performed to achieve a zero-voltage or zero-current function for different input bus voltages Vin. It can be understood that the pulse width of the ZVS signal determines the energy storage of the transformer in the resonant stage of the switching power supply, and thus determines whether the main switching power tube M2 of the switching power supply can achieve zero-voltage or zero-current starting, so the present disclosure designs ZVS signal pulse width adjustment.
It should be particularly noted that the ZVS signal pulse width adjustment is performed by receiving the second zero-crossing signal crest to start the ZVS signal adjustment function. Specifically, a supplementary voltage signal V is received, the compensation voltage signal V is used as a reference voltage Vref, a preset current Ith charging time is obtained, and the ZVS signal pulse width is adjusted according to the charging time; the other mode is that a supplementary current signal I is received, the compensation current signal I is used as charging current, charging time length is obtained, and the pulse width of the ZVS signal is adjusted according to the charging time length.
In another embodiment, the specific step of obtaining the first zero-crossing signal valley after the ZVS signal and outputting the zero-voltage and/or zero-current switching of the main switching power tube M2 of the switching power supply includes:
receiving the pulse width adjusted ZVS signal;
acquiring a first zero-crossing signal valley behind the pulse width adjusted ZVS signal;
and outputting a valley bottom conduction signal QR to enable the switching power supply main switching power tube M2 to realize zero voltage and or zero current starting.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not necessarily depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (10)
1. A power supply circuit of a quick-charging power supply chip is characterized by comprising a power supply, a starting unit, a power supply unit and a forced resonance unit, wherein,
the power supply comprises a primary winding, a secondary winding, a first auxiliary winding, a second power switch and a detection resistor;
the starting unit comprises a starting capacitor;
the power supply unit comprises a low-voltage power supply unit and a high-voltage power supply unit and is used for supplying power to a power management chip, wherein the high-voltage power supply unit comprises the second auxiliary winding and a first power switch of a PMOS (P-channel metal oxide semiconductor) structure, and the high-voltage power supply unit is used for supplying high-voltage power supply voltage to the power management chip after the low-voltage power supply unit is cut off;
the forced resonance unit comprises a second auxiliary winding, a first power switch and a starting capacitor, wherein the drain electrode of the first power switch is connected with the common ends of the second auxiliary winding and the first auxiliary winding, the grid electrode of the first power switch is connected with a first pin of a power management chip, the source electrode of the first power switch is grounded through the starting capacitor, the other end of the second auxiliary winding is grounded, and the forced resonance unit is used for generating forced resonance voltage when the power flyback finishes being in an interrupted mode.
2. The circuit of claim 1, wherein the low voltage power supply unit further comprises the first auxiliary winding and a power regulator for providing a low voltage supply voltage directly to the power management chip.
3. The circuit of claim 2, wherein when the power supply voltage of the power management chip is greater than a preset threshold, the low voltage power supply unit is turned off, and the high voltage power supply unit is turned on to charge the starting capacitor through the first power switch.
4. The circuit of claim 1, wherein the power management chip further comprises a mode determination unit, a zero voltage driving unit and a valley conduction unit, wherein
The input end of the mode judging unit is connected with the second pin of the power management chip, and the output end of the mode judging unit is connected with the third pin of the power management chip and used for generating a mode judging signal when the second power switch outputs a low level;
the input end of the zero voltage driving unit is connected with the input end of the mode judging unit, and the output end of the zero voltage driving unit is connected with the first pin and used for generating a ZVS driving signal of switching frequency when the power supply is in an intermittent mode so as to drive the first power switch;
the valley bottom conduction unit is respectively connected with the zero voltage driving unit and the mode judging unit and used for generating a driving signal to the second power switch.
5. The circuit of claim 4, wherein when a DRV/gate signal is detected as a low level signal, a first zero crossing signal before the DRV/gate signal is converted to the high level signal is obtained, and the zero voltage driving unit is enabled to generate the ZVS driving signal to the first power switch based on the first zero crossing signal, so as to force the power supply to resonate.
6. The circuit of claim 5, further comprising a bus voltage compensation unit, configured to obtain an input bus voltage division signal through a fifth pin of the power management chip, and obtain a compensation voltage signal and/or a compensation current signal representing an input bus voltage through the input bus voltage division signal.
7. The circuit of claim 5, further comprising a bus voltage compensation unit configured to obtain an input bus voltage divided signal through the second pin of the power management chip, and obtain a compensation voltage signal and/or a compensation current signal representing an input bus voltage through the input bus voltage divided signal.
8. The circuit of claim 4, wherein the mode decision unit further comprises a zero crossing detection module, a mode decision module, a main drive module, and a logic control module, wherein,
the zero-crossing detection module, the mode judgment module, the logic control module and the main drive module are sequentially connected, the input end of the zero-crossing detection module is connected to the second pin of the power management chip, and the output end of the main drive module is connected to the fourth pin of the power management chip.
9. The circuit of claim 8, wherein the zero voltage drive unit comprises a ZVS module and a ZVS drive module, wherein,
the ZVS module and the ZVS driving module are sequentially connected, the input end of the ZVS module is connected to one output end of the zero-crossing detection module, and the output end of the ZVS driving module is connected to the first pin of the power management chip.
10. The circuit of claim 9, wherein the valley conduction unit further comprises a clock module and a valley conduction module, wherein,
the clock module is respectively connected with the ZVS module, the valley bottom conduction module and the logic control module, and the valley bottom conduction module is respectively connected with the zero-crossing detection module, the mode judgment module, the logic control module and the ZVS module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202011126583.4A CN112217397A (en) | 2020-10-20 | 2020-10-20 | Power supply circuit of quick-charging power chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011126583.4A CN112217397A (en) | 2020-10-20 | 2020-10-20 | Power supply circuit of quick-charging power chip |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010068638A (en) * | 2008-09-11 | 2010-03-25 | Seiko Epson Corp | Ac adaptor |
| CN104010406A (en) * | 2013-02-27 | 2014-08-27 | 台达电子工业股份有限公司 | Led driver |
| CN110829846A (en) * | 2019-10-12 | 2020-02-21 | 陕西亚成微电子股份有限公司 | Zero-voltage switch control circuit and method applied to switching power supply |
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2020
- 2020-10-20 CN CN202011126583.4A patent/CN112217397A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010068638A (en) * | 2008-09-11 | 2010-03-25 | Seiko Epson Corp | Ac adaptor |
| CN104010406A (en) * | 2013-02-27 | 2014-08-27 | 台达电子工业股份有限公司 | Led driver |
| CN110829846A (en) * | 2019-10-12 | 2020-02-21 | 陕西亚成微电子股份有限公司 | Zero-voltage switch control circuit and method applied to switching power supply |
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Application publication date: 20210112 |