CN112214451A - High-speed monitoring recording equipment and method based on system on chip - Google Patents
High-speed monitoring recording equipment and method based on system on chip Download PDFInfo
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- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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Abstract
The invention provides high-speed monitoring and recording equipment and a method based on a system on a chip, which are characterized in that the equipment takes an FPGA chip as a core processor, utilizes a solid state disk to store data, directly controls the solid state disk to read and write through the FPGA, is provided with a high-speed connector interface to extract received bus data, utilizes an electronic disk control module to read the bus data and configuration files through clock signal control and writes the data into the hard disk according to the read index. According to the invention, through the FPGA and the solid state disk, the long-time storage of FC data and the high-speed reading, filtering and storage are realized, the power failure protection of the data is supported, the data security is improved, and the use power consumption of the device is reduced.
Description
Technical Field
The invention relates to the technical field of airborne high-speed monitoring and recording, in particular to high-speed monitoring and recording equipment and a method based on a system on chip.
Background
With the development of avionics technology, the requirements on data traffic, transmission rate and interference rejection are becoming higher and higher. Because the optical fiber is used as a transmission medium, the optical fiber has the advantages of small quality, high information transmission capacity, small attenuation, strong anti-interference capability and the like, and the adoption of the optical fiber to replace the traditional cable is a necessary trend of airborne network development. The airborne optical fiber network is used as a communication platform for connecting each terminal of airborne equipment with a central control system and is a neural system of the airplane. Fiber Channel (FC) technology has become one of the main research directions in the new generation of high performance networks of avionics systems. Data monitoring is not required in the research, development, test and maintenance processes of the airborne FC network, and the monitoring is an important means for the research and operation of the FC network.
When the aircraft carries out flight test, need keep and the record to the data of avionics network, conveniently carry out the later stage analysis, prior art when the aircraft test, because the consumption is too high, has restricted traditional monitored control system based on PC's use.
Disclosure of Invention
In order to solve the technical problems, the invention provides high-speed monitoring and recording equipment and a method based on a system on a chip.
The invention provides a high-speed monitoring and recording device based on a system on a chip, which comprises a processor unit, a high-speed connector interface, a clock circuit, a FLASH module, a DDR2 module and an electronic disk, wherein the processor is respectively connected with the high-speed connector, the clock circuit, the FLASH module and the DDR2 module,
further, the processor unit includes: FC interface module, frame classification module, data cache module, clock synchronization module, electronic disk control module and data forwarding control module, frame classification module with FC interface module data connection divide into ASM frame data and clock data with the data that receive, and transmit respectively the data cache module with in the clock synchronization module, clock synchronization module with data forwarding control module data connection, electronic disk control module respectively with data cache module with clock synchronization module data connection receives monitoring record data and clock information data, electronic disk control module with data forwarding control module connects, forwards the configuration file, electronic disk control module passes through high speed connector interface connection electronic disk, through the interface with the electronic disk carries out the instruction interaction.
Furthermore, the high-speed connection interface is provided with two interfaces A and B, the interface A is connected with the FC monitoring port and the FC interface module, and the FC interface module and the FC monitoring port are respectively provided with two interfaces which are correspondingly connected through the interface A; and the interface B is connected with the electronic disk control module and the electronic disk.
Furthermore, the electronic disk is a solid state disk, and at least two solid state disks are provided.
The invention also provides a high-speed monitoring and recording method based on the system on chip based on the recording equipment, which comprises the following specific steps:
s1: and receiving FC data, wherein an FC receiving module receives an FC data packet through a high-speed connector interface, adds a time tag into the received FC data packet, and sends the FC data packet with the time tag to a frame classification module.
S2: and data classification, wherein the frame classification module identifies the received FC data, divides the received FC data into ASM frame data and clock data, and respectively sends the data to the data cache module and the clock synchronization module.
S3: and data caching processing, wherein the ASM frame data is input into the data caching module to wait for being written into an electronic disk, meanwhile, the clock synchronization module extracts clock information of the received clock data and performs synchronization processing, sends the processed clock data to the data caching module to be integrated with the cached ASM frame data, and writes the integrated ASM frame data into a data card through a data card control module.
S4: initializing and reading configuration information, controlling the read-write module to initialize by the electronic disk, detecting whether the state of the hard disk is normal or not, if the state of the hard disk is abnormal, initializing again through a peripheral reset circuit, if the state of the hard disk is normal, reading a last written tail address from a fixed sector A of the hard disk, reading data information such as a specified IP address and a configuration enabling mark from a fixed sector B, and judging whether the configuration information of the data processing card needs to be updated or not according to the acquired configuration enabling mark.
S5: and data writing, namely reading the configuration file information forwarded by the data forwarding control module according to the judgment result if the configuration information needs to be updated, acquiring the index number of the hard disk, judging whether the data writing operation is the first data writing operation or not according to the index number, if the data writing operation is the first data writing operation, the head address of the current writing operation is about to be a fixed sector C, writing the system time mark and the head address data, and if the data writing operation is not the first writing operation, acquiring the head address writing data of the current writing operation from the hard disk based on the index value.
Further, the time marked by the time tag is the time when the first data word in the FC frame is received.
Further, in the data classifying step, the clock data includes ELS frame data and RTC clock primitive data.
Furthermore, in the data writing process, the head and tail addresses and the time mark information of the writing operation are refreshed after data is written each time, whether the main/auxiliary disks are fully written or not is judged, if the main/auxiliary disks are fully written, the data writing is stopped, the hard disk full identification information is juxtaposed, and if the main/auxiliary disks are not fully written, the next writing operation is performed on the valid data.
The invention has the following beneficial effects:
1. the FPGA chip is used as a core processor unit, so that the power consumption of the device is reduced, and the power consumption requirement during the airplane test is met.
2. The hard disk is provided with a fixed sector storage index number, an FC bus data frame is recorded to the hard disk to generate a hard disk index file, the power-on times of the system is determined according to the hard disk index number, and a write operation address is obtained, so that the power-down protection function is achieved, the recorded data in the hard disk are not damaged, and the data security is improved.
Drawings
FIG. 1 is a diagram of the hardware architecture of the device of the present invention;
FIG. 2 is a functional block diagram of the device logic of the present invention;
FIG. 3 is a device data processing flow diagram of the present invention;
fig. 4 is a control flow chart of the electronic disk controlling the read-write module according to the invention.
Detailed Description
In the following description, technical solutions in the embodiments of the present invention are clearly and completely described, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
An embodiment 1 of the present invention provides a high-speed monitoring and recording device based on a system on a chip, and as shown in fig. 1, an internal hardware structure of the device includes a processor unit, a high-speed connector interface, a clock circuit, a fiber channel protocol module, a DDR2 module, and an electronic disk, where the processor unit uses an FPGA as a processing control chip to receive, transmit, and process data, the high-speed connector interface includes two interfaces a and B, which are respectively connected to the electronic disk and an FC data monitoring terminal and used to receive data from the FC data monitoring terminal and transmit and store data to the electronic disk, and the DDR2 module includes a data cache module and a clock synchronization module for caching the received data, so as to avoid data loss when the data size is too large.
As shown in fig. 2 and fig. 3, the processor unit further includes an FC receiving module, a frame classifying module, an electronic disk control module, and a data forwarding control module, wherein the FC receiving module is connected to an FC monitoring port through the high-speed connector interface to transmit FC data, two FC receiving modules are provided, and are correspondingly connected to the FC monitoring port 0 and the FC monitoring port 1, respectively, the FC receiving module is connected to the frame classifying module to transmit the received FC data to the frame classifying module to identify and classify the data, the frame classifying module is connected to the data caching module and the clock synchronizing module, respectively, the data caching module and the clock synchronizing module are connected to the electronic disk control module to transmit the data to be recorded and the clock information to be recorded to the electronic disk control module, and the data forwarding control module is connected to the clock synchronizing module and the electronic disk control module, respectively, a clock signal and a forwarded configuration file are received, respectively.
And the electronic disk control module is connected with the electronic disk and sends data index, time mark and bus data to the electronic disk.
Example 2
Embodiment 2 of the present invention provides a high-speed monitoring record setting method based on a system on chip based on the recording device of embodiment 1, which includes the following specific steps:
the FC data are received by the FC module, the FC receiving module receives an FC data packet through a high-speed connector interface, meanwhile, a time label is added to the received FC data packet, the FC data packet with the time label is sent to the frame classification module, and the time marked in the time label is the time when the first data word in the received FC frame arrives.
And identifying and classifying the data, wherein the frame classification module identifies the received FC data into ASM frame data and clock data, and respectively sends the data to the data cache module and the clock synchronization module, wherein the clock data comprises ELS frame data and RTC clock primitive data.
And data caching processing, wherein the ASM frame data is input into the data caching module to wait for being written into the electronic disk, meanwhile, the clock synchronization module extracts clock information of the received clock data and performs synchronization processing, sends the processed clock data to the data caching module to be integrated with the cached ASM frame data, and writes the clock data into the electronic disk through the electronic disk control module.
As shown in fig. 4, after receiving the time stamp and the bus data, the electronic disk control module writes the data into the electronic disk, which includes the following specific processes:
initializing and reading configuration information, detecting whether the state of a hard disk is normal or not after the electronic disk control module is electrified, if the state of the hard disk is abnormal, initializing again through a peripheral reset circuit, if the state of the hard disk is normal, reading a last written tail address from a fixed sector A of the hard disk, reading data information such as a specified IP address and a configuration enabling mark from a fixed sector B, judging whether the configuration information of the recording equipment needs to be updated or not according to the acquired configuration enabling mark, monitoring an update request of the information such as the IP address, the port number and the configuration enabling in real time by the electronic disk control module, and updating relevant information in the sector B in time after monitoring the update request.
According to the judgment result, if the configuration information needs to be updated, reading the configuration file information forwarded by the data forwarding control module, acquiring the index number of the hard disk, judging whether the data writing operation is the first time according to the index number, if the index number of the hard disk is 0, judging that the data is written for the first time, adding 1 to the index number, writing the index number into a fixed sector stored in the hard disk index, updating the index file of the hard disk, if the data is written for the first time, defining the current writing operation first address as a fixed sector C, and writing the system time mark and the first address data;
if the index number of the read hard disk is not zero, namely the data is not written for the first time, acquiring the first address write-in data of the current write operation from the hard disk based on the acquired index value;
when the written data is in place, the data is continuously written into the hard disk, wherein the size of the electronic disk control module is fixed to 240kB in normal writing operation each time, the data writing time in the embodiment is 100ms, the data is timed by the timing module, the size of the electronic disk control module is fixed to 16kB in writing operation when the data is overtime, and 0 is supplemented to the end when the data is insufficient. And refreshing the head and tail addresses and the time mark information of the write operation after the fixed data volume is written every time, judging whether the main disk and the auxiliary disk are fully written, stopping data write if the data are fully written, juxtaposing the full identification information of the hard disk, waiting for the data to be valid if the data are not fully written, and performing the next write operation.
The invention is not limited to the foregoing embodiments. The invention extends to any novel feature or any novel combination of features disclosed in this specification and any novel method or process steps or any novel combination of features disclosed.
Claims (8)
1. The high-speed monitoring and recording device based on the system on chip is characterized by comprising a processor unit, a high-speed connector interface, a clock circuit, a FLASH module, a DDR2 module and an electronic disk, wherein the processor is respectively connected with the high-speed connector, the clock circuit, the FLASH module and the DDR2 module.
2. The system-on-chip based high-speed monitoring recording device according to claim 1, wherein the processor unit comprises: FC interface module, frame classification module, clock synchronization module, data cache module, electronic disk control module and data forwarding control module, frame classification module with FC interface module data connection divide into ASM frame data and clock data with the data that receive, and transmit respectively the module with in the clock synchronization module, clock synchronization module with data forwarding control module data connection, electronic disk control module respectively with data cache module with clock synchronization module data connection receives monitoring record data and clock information data, electronic disk control module with data forwarding control module connects, forwards the configuration file, electronic disk control module passes through high-speed connector interface connection electronic disk, through the interface with the electronic disk carries out the instruction interaction.
3. The high-speed monitoring and recording device based on the system-on-chip according to claim 1, wherein the high-speed connection interface has two interfaces, namely an interface a and an interface B, the interface a connects the FC monitoring port with the FC interface module, and the FC interface module and the FC monitoring port have two ports, and are correspondingly connected through the interface a; and the interface B is connected with the electronic disk control module and the electronic disk.
4. The high-speed monitoring and recording device based on the system-on-chip as claimed in claim 1, wherein the electronic disk is a solid state disk, and at least two solid state disks are provided.
5. A high-speed monitoring and recording method based on a system on chip is characterized by comprising the following steps:
s1: and receiving FC data, wherein an FC receiving module receives an FC data packet through a high-speed connector interface, adds a time tag into the received FC data packet, and sends the FC data packet with the time tag to a frame classification module.
S2: and data classification, wherein the frame classification module identifies the received FC data, divides the received FC data into ASM frame data and clock data, and respectively sends the data to the data cache module and the clock synchronization module.
S3: and data caching processing, wherein the ASM frame data is input into the data caching module to wait for being written into the electronic disk, meanwhile, the clock synchronization module extracts clock information of the received clock data and performs synchronization processing, sends the processed clock data to the data caching module to be integrated with the cached ASM frame data, and writes the clock data into the electronic disk through the electronic disk control module.
S4: initializing and reading configuration information, controlling the read-write module to initialize by the electronic disk, detecting whether the state of the hard disk is normal or not, if the state of the hard disk is abnormal, initializing again through a peripheral reset circuit, if the state of the hard disk is normal, reading a last written tail address from a fixed sector A of the hard disk, reading data information such as a specified IP address and a configuration enabling mark from a fixed sector B, and judging whether the configuration information of the recording equipment needs to be updated or not according to the acquired configuration enabling mark.
S5: and data writing, namely reading the configuration file information forwarded by the data forwarding control module according to the judgment result if the configuration information needs to be updated, acquiring the index number of the hard disk, judging whether the data writing operation is the first data writing operation or not according to the index number, if the data writing operation is the first data writing operation, the head address of the current writing operation is about to be a fixed sector C, writing the system time mark and the head address data, and if the data writing operation is not the first writing operation, acquiring the head address writing data of the current writing operation from the hard disk based on the index value.
6. The high-speed monitoring and recording method based on the system-on-chip as claimed in claim 5, wherein the time stamp is the time when the first data word in the FC frame arrives.
7. The system-on-chip based high-speed monitoring recording method according to claim 5, wherein in the data classifying step, the clock data comprises ELS frame data and RTC clock primitive data.
8. The high-speed monitoring and recording method based on the SOC according to any one of claims 5-7, wherein during the data writing process, the head and tail addresses and the time scale information of the writing operation are refreshed after each data writing, and whether the main/auxiliary disks are fully written is determined, if the main/auxiliary disks are fully written, the data writing is stopped, the hard disk full identification information is juxtaposed, and if the main/auxiliary disks are not fully written, the next writing operation is performed on the valid data.
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