CN112202677B - Hardware acceleration query method, system, electronic equipment and storage medium - Google Patents

Hardware acceleration query method, system, electronic equipment and storage medium Download PDF

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CN112202677B
CN112202677B CN202011052043.6A CN202011052043A CN112202677B CN 112202677 B CN112202677 B CN 112202677B CN 202011052043 A CN202011052043 A CN 202011052043A CN 112202677 B CN112202677 B CN 112202677B
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data stream
index value
hardware acceleration
linked list
preset array
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CN112202677A (en
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杨卫东
李峰
程剑
陈维
童超
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China Mobile Communications Group Co Ltd
China Mobile Hangzhou Information Technology Co Ltd
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China Mobile Communications Group Co Ltd
China Mobile Hangzhou Information Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/74Address processing for routing
    • H04L45/745Address table lookup; Address filtering
    • H04L45/7453Address table lookup; Address filtering using hashing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The embodiment of the invention relates to the field of communication, and discloses a hardware acceleration query method, a system, electronic equipment and a storage medium. In the embodiment of the invention, the hardware acceleration query method comprises the following steps: acquiring p groups of characteristic values of the data stream; performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively; carrying out XOR operation on the p hash values, and taking the operation result as an index value corresponding to the data stream; inquiring a preset array according to the index value; the preset array comprises data streams which need to execute hardware acceleration and preset index values of the data streams which need to execute the hardware acceleration. The Hash algorithm in the hardware acceleration query process is modified by combining with the actual use scene of the home gateway, compared with the method adopting single characteristic value operation, the regularity of the internal characteristic value of the data stream is reduced, and the Hash collision in the Hash algorithm is reduced on the premise of ensuring the actual transmission time.

Description

Hardware acceleration query method, system, electronic equipment and storage medium
Technical Field
The embodiment of the invention relates to the field of communication, in particular to the field of hardware acceleration.
Background
Generally, when judging whether hardware acceleration is performed on a data stream, an intelligent gateway performs index query from a stored preset array, and in order to improve query efficiency, a hash storage mode is generally adopted, a certain characteristic value of the data stream is calculated by a hash function to obtain a corresponding hash value, and the hash value is used as an index to be searched in the preset array.
Ideally, one data flow corresponds to one hash value, but there are cases where a plurality of data flows need to be processed to correspond to the same hash value, which is called hash collision. The characteristics of data flow in the home gateway have regularity, for example, most of destination IPs in the local area network system are in the same network segment (e.g., 192.168.1. X), the high order bits of the addresses are completely consistent, the low order bits are slightly different, if the characteristic values are not properly selected, many hash conflicts exist, so that the query complexity is high, and the query efficiency is reduced.
Disclosure of Invention
The embodiment of the invention aims to provide a hardware acceleration query method, a hardware acceleration query system, electronic equipment and a storage medium, and the purpose of reducing hash collision in the query process is achieved.
In order to solve the above technical problem, an embodiment of the present invention provides a hardware acceleration query method, including the following steps:
acquiring p groups of characteristic values of the data stream; p is an integer greater than 1;
performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
performing exclusive or operation on the p hash values, and taking an operation result as an index value corresponding to the data stream;
inquiring a preset array according to the index value; the preset array comprises data streams needing to execute hardware acceleration and preset index values of the data streams needing to execute the hardware acceleration.
The embodiment of the invention also provides a hardware acceleration query system, which comprises:
an acquisition module: acquiring p groups of characteristic values of the data stream; p is an integer greater than 1;
a hashing module: performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
an exclusive-or module: performing exclusive or operation on the p hash values, and taking an operation result as an index value corresponding to the data stream;
the query module: inquiring a preset array according to the index value; the preset array comprises data streams needing hardware acceleration and preset index values of the data streams needing hardware acceleration.
An embodiment of the present invention also provides an electronic device, including: at least one processor; and (c) a second step of,
a memory communicatively coupled to the at least one processor; wherein, the first and the second end of the pipe are connected with each other,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the hardware accelerated query method described above.
The embodiment of the present invention further provides a computer-readable storage medium, which stores a computer program, wherein the computer program is executed by a processor to implement the above-mentioned hardware accelerated query method.
In the embodiment of the invention, the hash operation is respectively carried out on the p groups of characteristic values in the calculation of the index value, and then the XOR operation is carried out on the operation result, so that the regularity of the characteristic values in the data stream is reduced and the distribution of the index value is more random and uniform compared with the single characteristic value operation. Compared with the operation of traversing all characteristic values, the method only uses p groups of characteristic values and simple Hash operation and XOR operation, and is more suitable for the use requirement of the home gateway in time performance. The method and the device have the advantages that the practical use scene of the home gateway is combined, the Hash algorithm in the hardware acceleration query process is improved, and Hash conflicts in the Hash algorithm are reduced on the premise that the practical transmission time is guaranteed.
In addition, the p sets of feature values include: a free combination of destination IP DIP, destination port DPORT, source IP SIP and source port. For the application scenario home gateway in the embodiment of the present invention, a data flow may be uniquely determined by feature values of a destination IP DIP, a source IP SIP, a destination port DPORT, and a source port. The characteristics of the data stream are mixed by utilizing p groups of characteristic value operation and all participate in the operation, so that the distribution of the index values is more uniform, the generation of hash conflicts is greatly reduced, and the conflicts are avoided as much as possible in the calculation stage.
In addition, the creating of the preset array comprises: if a plurality of data streams needing to execute hardware acceleration have the same index value, creating a linked list for the same index value in the preset array, and placing the plurality of data streams into the linked list; the querying a preset array according to the index value includes: and if the linked list is inquired in the preset array according to the index value, executing traversal inquiry on the linked list. The method for solving the hash conflict comprises the steps of establishing a linked list for the same index value, placing a plurality of data streams to be processed in the linked list, executing traversal query on the linked list and determining the data streams needing hardware acceleration.
In addition, before executing the traversal query on the linked list, the method further comprises: if the number of the data streams in the linked list is larger than N, converting the linked list into a red-black tree to execute query; after querying a preset array according to the index value, the method further includes: if the number of the converted data streams in the red and black tree is less than M, converting the red and black tree into the linked list to execute query, wherein N and M are natural numbers, and N is greater than M. For the Hash collision processing mode, a simple linked list mode is changed into dynamic control, the threshold value of the dynamic control is determined by the performance of the actual home gateway, the red-black tree storage is changed into the red-black tree storage when the threshold value N is exceeded, and the red-black tree is restored into the linked list when the threshold value M is lower; for example, the query traversal time is 10ms when the number of data streams is N, and the traversal time is 5ms when the number of data streams is M. The time complexity of a traditional conflict linked list is O (n), namely when conflicts occur, particularly when the conflicts are concentrated on a certain linked list, hash storage can be degraded into a common linked list, and at the moment, the query efficiency of a hardware acceleration rule is O (n). In order to avoid the situation, the proposal carries out the dynamic control reconstruction on the conflict linked list.
In addition, after the converting the linked list into the red and black tree and executing the query, the method further comprises the following steps: and expanding the preset array. The traditional hash algorithm is generally expanded when the capacity of the array is 75%, and in combination with the actual use scenario of the embodiment of the invention, in order to guarantee the network delay, the preset array is also expanded after the linked list is converted into the red-black tree.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
FIG. 1 is a diagram of a system architecture for a hardware accelerated query system in an embodiment of the invention;
FIG. 2 is a flowchart of a hardware accelerated query method according to a first embodiment of the invention;
FIG. 3 is a diagram illustrating a hardware accelerated query method according to a first embodiment of the present invention;
FIG. 4 is a flowchart of a hardware accelerated query method according to a second embodiment of the present invention;
FIG. 5 is a diagram illustrating a chain table and a red-black tree in a hardware accelerated query method according to a second embodiment of the present invention;
FIG. 6 is a diagram of a hardware accelerated query system provided in accordance with a third embodiment of the invention;
fig. 7 is a schematic diagram of an electronic device provided in accordance with a fourth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments. The following embodiments are divided for convenience of description, and should not constitute any limitation to the specific implementation manner of the present invention, and the embodiments may be mutually incorporated and referred to without contradiction.
As shown in fig. 1, the execution subject of the embodiment of the present invention is an electronic device, which includes a home gateway. The environment for data stream transmission is generally entered into the gateway from the acceleration controller 02, processed by the CPU 01 of the software controller, and then forwarded out from the output port of the acceleration controller 02 (the dashed normal stream in fig. 1). However, when hardware acceleration is started and the data flow exceeds a certain peak speed (generally, the speed exceeds 100Mbits/s, depending on the performance of the router), the data flow enters the acceleration controller 02, and it is queried whether the data flow is an accelerated data flow in the preset array memory 03, if so, the home gateway will immediately send the data flow after knowing the destination of the data flow without waiting for any confirmation, so as to improve the throughput, and reduce the delay and the router CPU/memory utilization, i.e. the real-line flow in fig. 1.
It should be noted that the acceleration controller 01, the preset array memory 02, and the preset array update controller 03 in the hardware acceleration system shown in fig. 1 may be independent devices, or may be functional modules that are integrated in the same device and can implement corresponding functions, for example, the preset array memory 03 and the preset array update controller 04 are integrated in an inquiry apparatus, and the acceleration controller 02 is another independent device. The acceleration controller 02 acquires information on the data stream that needs to be accelerated from the inquiring apparatus, and determines the data stream on which acceleration is to be performed based on the information. The embodiment of the present application does not limit the form of the hardware acceleration system shown in fig. 1.
A first embodiment of the present invention relates to a hardware acceleration query method, and a specific flow is shown in fig. 2.
Step 101, acquiring p groups of characteristic values of a data stream; p is an integer greater than 1;
102, performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
103, performing exclusive or operation on the p hash values, and taking an operation result as an index value corresponding to the data stream;
step 104, inquiring a preset array according to the index value; the preset array comprises data streams which need to execute hardware acceleration and preset index values of the data streams which need to execute the hardware acceleration.
The electronic device obtains p groups of characteristic values of the data stream to be processed, performs a hash operation on the p groups of characteristic values in a grouping manner, then performs an exclusive or operation on an operation result to obtain an index value of the data stream to be processed, and queries in a preset array according to the index value, wherein a process schematic diagram is shown in fig. 3.
The following describes implementation details of the hardware acceleration query method of the present embodiment in detail, and the following is only provided for facilitating understanding of the implementation details and is not necessary for implementing the present embodiment.
For step 101, obtaining feature values of the data stream to be processed, and freely combining the feature values into p groups, wherein the feature values include: the destination IP DIP, the destination port DPORT, the source IP SIP, and the source port SPORT, and for the home gateway, the destination IP DIP, the source IP SIP, the destination port DPORT, and the source port SPORT may uniquely determine a data flow, which is a characteristic value representative of a data flow. As an example, the value of p in the p groups of feature values is obtained as 2, the first group is DIP and DPORT, and the second group is SIP and SPORT. In the embodiment of the invention, p groups of characteristic value operations are utilized to improve the condition that the data stream adopts single characteristic value calculation, so that the distribution of index values is more uniform, and the probability of hash collision is reduced.
And 102, performing hash operation on the obtained p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively. For example, when the value of p is 2, two groups of feature values are respectively subjected to hash operation to obtain two groups of corresponding hash values; connecting character strings of the first group of characteristic values DIP and DPORT, substituting a hash function to carry out hash operation, and outputting a first hash value corresponding to the first group; and connecting the character strings of the second group of characteristic values SIP and SPORT, substituting the character strings into a hash function to carry out hash operation, and outputting a second hash value corresponding to the second group.
And 103, performing exclusive or operation on the p obtained hash values, and taking an operation result as an index value corresponding to the data stream. For example, the xor operation is performed on the first hash value and the second hash value obtained in the example of step 102 to obtain a final index value. The process of the exclusive-or operation is equivalent to that the characteristic value is subjected to internal random operation, so that the distribution of the index value is more uniform, the regularity of the characteristic value is further reduced, and the probability of hash collision is reduced.
For step 104, inquiring a preset array according to the index value obtained by the exclusive-or operation; the preset array comprises: and the preset index value of each data stream needing to execute hardware acceleration. In the process of inquiring the preset array, if a preset index value identical to the index value exists in the preset array, acquiring a data stream which is corresponding to the preset index value in the preset array and needs to execute hardware acceleration; and comparing the data stream with the data stream needing to execute hardware acceleration, and if the data stream is the same, executing the hardware acceleration on the data stream. In an example, the data stream to be processed is Q, the index value obtained after the xor operation is performed through the operation steps is Q, when the preset array is queried, if the preset index value Q ' is the same as the index value Q, the data stream Q ' corresponding to the preset index value Q ' and needing to be subjected to hardware acceleration is obtained, the data stream Q and the data stream Q ' are further compared, and if the data stream Q is the same as the data stream Q ' needing to be subjected to hardware acceleration, the hardware acceleration is performed on the data stream Q.
Comparing the data stream to be processed with the data stream needing to execute hardware acceleration according to other characteristic values except the p groups of characteristic values; other characteristic values include one or any combination of the following: the method comprises the steps of target MAC, source MAC, ethernet type code EType, IP message priority DSCP, outer VLAN value of data stream, inner VLAN value of data stream and user PORT UNI _ PORT. For example, after the calculated index value Q is the same as the preset index value Q', by comparing the destination MAC and the source MAC of the calculated index value Q, it is queried whether the data stream Q to be processed is a data stream that needs to execute hardware acceleration in the preset array.
In one example, the creation of the preset array includes: if a plurality of data streams needing to execute hardware acceleration have the same index value, creating a linked list for the same index value in a preset array, and placing the plurality of data streams into the linked list; the querying a preset array according to the index value includes: and if the linked list is inquired in a preset array according to the index value, executing traversal inquiry on the linked list. For example, if the preset index values corresponding to the data streams a, B, and C that need to execute hardware acceleration are all Z, a linked list is created for the preset index value Z in a preset array, the data streams a, B, and C are all placed in the linked list, the index value of the data stream Z to be processed is Z 'through the above calculation, and the index value Z' is the same as the preset index value Z when the preset array is queried, the linked list is traversed to compare whether the data stream Z to be processed is the same as the data streams a, B, and C that need to execute hardware acceleration, if the data stream Z to be processed after traversal query is finally the same as the data stream C that needs to execute hardware acceleration, the data stream Z to be processed performs hardware acceleration, and if the data stream Z after traversal query is different from the data streams a, B, and C that need to execute hardware acceleration, the data stream Z to be processed does not perform hardware acceleration.
In the embodiment of the invention, the hash operation is respectively carried out on the p groups of characteristic values in the calculation of the index value, and then the XOR operation is carried out on the operation result, so that compared with the single characteristic value operation, the regularity of the characteristic values in the data stream is reduced, and the distribution of the index values is more random and uniform. Compared with traversing all the eigenvalue operations, the method only uses p groups of eigenvalues and simple Hash operation and XOR operation, and is more suitable for the use requirement of the home gateway in time performance. The method and the device for the hash algorithm are combined with the practical use scene of the home gateway, the hash algorithm in the hardware acceleration query process is modified, and the hash collision in the hash algorithm is reduced on the premise of ensuring the practical transmission time.
The second embodiment of the present invention relates to a hardware acceleration query method, and the specific flow is shown in fig. 4.
Step 201, dynamically adjusting a preset array;
step 202, acquiring p groups of characteristic values of the data stream; p is an integer greater than 1;
step 203, performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
step 204, performing XOR operation on the p hash values, and taking the operation result as an index value corresponding to the data stream;
step 205, querying a preset array according to the index value; the preset array comprises data streams which need to execute hardware acceleration and preset index values of the data streams which need to execute the hardware acceleration.
Steps 202 to 205 in this embodiment are substantially the same as those in the first embodiment, and are not described again. Step 201 of the present embodiment will be specifically described below.
If a plurality of data streams needing to execute hardware acceleration have the same index value, creating a linked list for the same index value in a preset array, and placing the plurality of data streams into the linked list; querying a preset array according to the index value, including: and if the linked list is inquired in the preset array according to the index value, executing traversal inquiry on the linked list.
In one example, if the number of data streams in the linked list is greater than N, the linked list is converted into a red-black tree to execute query; after the preset array is inquired according to the index value, if the number of the data streams in the converted red-black tree is less than M, the red-black tree is restored to a linked list to execute inquiry, wherein N and M are natural numbers, and N is greater than M. In one example, when the number of data streams in the linked list is N according to the actual performance of the home gateway, the traversal query time is 10ms, and when the number of data streams in the red and black tree is M, the traversal query time is 5ms. After the linked list is created, when the number of data streams in the linked list is greater than N, the linked list is converted into a red and black tree state to execute traversal query, and the red and black tree state occupies more memories to reduce query time, which is specifically shown in fig. 5. And when the number of the data streams in the red and black tree state is less than M, restoring the red and black tree into a linked list to execute traversal query, and reducing the load of a memory space.
The time complexity of solving the hash collision linked list by the traditional method is O (n), namely when the linked list is generated by the collision, particularly when the collision is concentrated to a certain linked list, the hash storage is degraded into a common linked list, and the query efficiency of the hardware acceleration rule is O (n). In order to avoid the situation, the proposal dynamically modifies the linked list, and when the number of data streams in the conflict linked list exceeds N, the linked list is converted into a red-black tree, and the time complexity is O (lgn); if the number of data streams in the red and black tree is less than M, the red and black tree is restored to a linked list, and the time complexity is O (n). The state of the query linked list is dynamically adjusted through the threshold, so that the query traversal time can be ensured, the actual application scene of the home gateway is met, and the user experience is improved.
In one example, after converting the linked list into a red-black tree and executing the query, the method further comprises: and expanding the preset array. The condition for expanding the preset array at present is to expand when the array capacity reaches 75% of the total capacity, but in combination with the actual use scenario of the present proposal, in order to guarantee the network delay, when the number of data streams stored in a certain linked list exceeds a threshold N, that is, after the query time exceeds a threshold 10ms, dynamic expansion also needs to be performed. In the embodiment of the invention, when the capacity of the array reaches 75% of the total capacity or the data stream stored in a certain linked list exceeds the threshold value N, the preset array is expanded, and the purpose of controlling the query time delay is achieved. In practical application, the maximum storage quantity of the home gateway hardware acceleration rule is 32K, the scheme considers implementation scenes and performance requirements, defaults to 1024 the size of an initial preset array, and increases by adopting a standard of 2 times when dynamic expansion is executed at the later stage.
The steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, so long as the same logical relationship is included, which are all within the protection scope of the present patent; it is within the scope of the patent to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
A third embodiment of the present invention relates to a hardware-accelerated query system, as shown in fig. 6, including:
the acquisition module 301: acquiring p groups of characteristic values of the data stream; p is an integer greater than 1;
the hash module 302: performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
exclusive or module 303: carrying out XOR operation on the p hash values, and taking the operation result as an index value corresponding to the data stream;
the query module 304: inquiring a preset array according to the index value; the preset array comprises data streams which need to execute hardware acceleration and preset index values of the data streams which need to execute the hardware acceleration.
In the obtaining module 301, p sets of feature values in the data stream to be processed are obtained. Wherein, the p group characteristic values comprise free combination of destination IP DIP, destination port DPORT, source IP SIP and source port SPORT, and p is an integer larger than 1. For example, p takes 2, the first set of feature values takes DIP and DPORT, and the second set of feature values takes SIP and PORT.
In the hashing module 302, hash operations are performed on the p groups of feature values obtained by the obtaining module 301, so as to obtain p hash values corresponding to the p groups of feature values. For example, when p is 2, performing hash operation on the first group of feature values DIP and DPORT to obtain a first hash value; and carrying out hash operation on the second group of characteristic values SIP and SPORT to obtain a second hash value. The characteristics of the data stream are mixed to participate in the operation, so that the index values are distributed more uniformly, and the probability of hash collision is reduced.
In the xor module 303, the xor operation is performed on the p hash values obtained by the hash module 302, and the operation result is used as an index value corresponding to the data stream. For example, when p is 2, after the hash operation process, performing an exclusive or operation on the first hash value obtained by the first group and the second hash value obtained by the second group, and the operation result is an index value corresponding to the data stream. The XOR operation is to perform internal random operation on the characteristic value again, so that the regularity of the characteristic value is reduced, and hash collision is further reduced.
For the query module 304, querying a preset array according to the index value obtained by the xor operation; the preset array comprises data streams which need to execute hardware acceleration and preset index values of the data streams which need to execute the hardware acceleration.
In one example, if the index value exists in a preset array, acquiring a data stream which needs to execute hardware acceleration and corresponds to the index value in the preset array; and comparing the data stream with the data stream needing to execute hardware acceleration, and executing the hardware acceleration on the data stream if the data stream is the same as the data stream needing to execute the hardware acceleration. Comparing the data stream with the data stream needing to execute hardware acceleration according to other characteristic values except the p groups of characteristic values; other characteristic values include one or any combination of the following: the method comprises the steps of target MAC, source MAC, ethernet type code EType, IP message priority DSCP, outer VLAN value of data stream, inner VLAN value of data stream and user PORT UNI _ PORT.
In addition, the creation of the preset array comprises: if a plurality of data streams needing to execute hardware acceleration have the same index value, creating a linked list for the same index value in a preset array, and placing the plurality of data streams into the linked list; inquiring a preset array according to the index value, wherein the inquiring comprises the following steps: and if the linked list is inquired in a preset array according to the index value, executing traversal inquiry on the linked list.
Before executing traversal query on the linked list, the method further comprises the following steps: if the number of the data streams in the linked list is greater than N, converting the linked list into a red-black tree to execute query; after querying a preset array according to the index value, the method further includes: if the number of the converted data streams in the red and black tree is less than M, converting the red and black tree into the linked list to execute query, wherein N and M are natural numbers, and N is greater than M. For example, when the number of data streams in the linked list is measured to be N according to the actual performance of the home gateway, the traversal query time is 10ms; and when the number of data streams in the red and black tree is M, the traversal query time is 5ms.
In one example, after converting the linked list into a red-black tree and executing the query, the method further includes: and expanding the preset array.
It should be understood that this embodiment is a system example corresponding to the above embodiment, and that this embodiment can be implemented in cooperation with the above embodiment. The related technical details mentioned in the above embodiments are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related technical details mentioned in the present embodiment can also be applied to the above embodiments.
It should be noted that each module referred to in this embodiment is a logical module, and in practical applications, one logical unit may be one physical unit, may be a part of one physical unit, and may be implemented by a combination of multiple physical units. In addition, in order to highlight the innovative part of the present invention, elements that are not so closely related to solving the technical problems proposed by the present invention are not introduced in the present embodiment, but this does not indicate that other elements are not present in the present embodiment.
A fourth embodiment of the invention relates to an electronic device, as shown in FIG. 7, comprising at least one processor 401; and the number of the first and second groups,
a memory 402 communicatively coupled to the at least one processor 401; wherein the content of the first and second substances,
the memory 402 stores instructions executable by the at least one processor to enable the at least one processor to perform the hardware accelerated query method described above.
Where the memory and processor are connected by a bus, the bus may comprise any number of interconnected buses and bridges, the buses connecting together one or more of the various circuits of the processor and the memory. The bus may also connect various other circuits such as peripherals, voltage regulators, power management circuits, etc., which are well known in the art, and therefore, will not be described any further herein. A bus interface provides an interface between the bus and the transceiver. The transceiver may be one element or a plurality of elements, such as a plurality of receivers and transmitters, providing a means for communicating with various other apparatus over a transmission medium. The data processed by the processor is transmitted over a wireless medium via an antenna, which further receives the data and transmits the data to the processor.
The processor is responsible for managing the bus and general processing and may also provide various functions including timing, peripheral interfaces, voltage regulation, power management, and other control functions. While the memory may be used to store data used by the processor in performing operations.
A fifth embodiment of the present invention relates to a computer-readable storage medium storing a computer program. The computer program realizes the above-described method embodiments when executed by a processor.
That is, as can be understood by those skilled in the art, all or part of the steps in the method for implementing the embodiments described above may be implemented by a program instructing related hardware, where the program is stored in a storage medium and includes several instructions to enable a device (which may be a single chip, a chip, or the like) or a processor (processor) to execute all or part of the steps of the method described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of practicing the invention, and that various changes in form and detail may be made therein without departing from the spirit and scope of the invention in practice.

Claims (9)

1. A hardware acceleration query method is applied to a home gateway and comprises the following steps:
acquiring p groups of characteristic values of the data stream; p is an integer greater than 1;
performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
performing exclusive-or operation on the p hash values, and taking an operation result as an index value corresponding to the data stream;
querying a preset array according to the index value; the preset array comprises data streams needing hardware acceleration and preset index values of the data streams needing hardware acceleration;
wherein the creating of the preset array comprises:
if a plurality of data streams needing to execute hardware acceleration have the same index value, creating a linked list for the same index value in the preset array, and placing the plurality of data streams into the linked list;
the querying a preset array according to the index value includes:
and if the linked list is inquired in the preset array according to the index value, executing traversal inquiry on the linked list.
2. The method of claim 1, wherein the querying a predetermined array according to the index value comprises:
if the index value exists in the preset array, acquiring a data stream which needs to execute hardware acceleration and corresponds to the index value in the preset array;
and comparing the data stream with the data stream needing to execute hardware acceleration, and executing the hardware acceleration on the data stream if the data stream is the same as the data stream needing to execute the hardware acceleration.
3. The method according to claim 2, wherein the comparing the data stream with the data stream requiring hardware acceleration comprises:
comparing the data stream with the data stream needing to execute hardware acceleration according to other characteristic values except the p groups of characteristic values; the other characteristic values comprise one of the following or any combination thereof: the method comprises the steps of target MAC, source MAC, ethernet type code EType, IP message priority DSCP, data stream outer layer VLAN value, data stream inner layer VLAN value and user PORT UNI _ PORT.
4. The hardware accelerated query method of claim 1, wherein the p sets of feature values comprise: a free combination of destination IP DIP, destination port DPORT, source IP SIP and source port SPORT.
5. The hardware accelerated query method of claim 1, wherein before performing the traversal query on the linked list, further comprising:
if the number of the data streams in the linked list is greater than N, converting the linked list into a red-black tree to execute query;
after querying a preset array according to the index value, the method further includes:
if the number of the converted data streams in the red and black tree is less than M, converting the red and black tree into the linked list to execute query, wherein N and M are natural numbers, and N is greater than M.
6. The hardware accelerated query method of claim 5, wherein after the converting the linked list into a red-black tree and performing the query, further comprising:
and expanding the preset array.
7. A hardware accelerated query system, comprising:
an acquisition module: acquiring p groups of characteristic values of the data stream; p is an integer greater than 1;
a hashing module: performing hash operation on the p groups of characteristic values respectively to obtain p hash values corresponding to the p groups of characteristic values respectively;
an exclusive-or module: performing exclusive-or operation on the p hash values, and taking an operation result as an index value corresponding to the data stream;
the query module: inquiring a preset array according to the index value; the preset array comprises data streams needing hardware acceleration and preset index values of the data streams needing hardware acceleration;
wherein the creating of the preset array comprises:
if a plurality of data streams needing to execute hardware acceleration have the same index value, creating a linked list for the same index value in the preset array, and placing the plurality of data streams into the linked list;
the querying a preset array according to the index value includes:
and if the linked list is inquired in the preset array according to the index value, executing traversal inquiry on the linked list.
8. An electronic device, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein, the first and the second end of the pipe are connected with each other,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the hardware accelerated query method of any of claims 1 to 6.
9. A computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the hardware accelerated query method of any one of claims 1 to 6.
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