CN112198602A

CN112198602A - Optical receiver and method for adjusting position of chip

Info

Publication number: CN112198602A
Application number: CN202011413389.4A
Authority: CN
Inventors: 宋小飞; 廖传武; 贺亮; 王志文
Original assignee: Dalian Youxun Technology Co Ltd; Wuhan Qianxi Technology Co ltd
Current assignee: Dalian Youxun Technology Co Ltd; Wuhan Qianxi Technology Co ltd
Priority date: 2020-12-07
Filing date: 2020-12-07
Publication date: 2021-01-08

Abstract

The present disclosure relates to an optical receiver and a method of adjusting a position of a chip. The optical receiver includes: a housing; a fiber optic adapter disposed outside and coupled to the housing; an optical splitter disposed inside the housing; a plurality of lenses disposed independently of each other and adjacent to the optical splitter; and a plurality of chips configured to convert light entering the housing via the fiber optic adapter into an electrical signal, wherein each of the plurality of chips is disposed on a side of the respective lens away from the optical splitter, and a plurality of chip carriers disposed perpendicular to a first direction of the light illumination, each of the plurality of chips is coupled to the respective chip carrier, and a light-sensitive surface of the chip is perpendicular to the first direction of the light. The embodiments of the present disclosure can improve the coupling efficiency of the optical receiver and reduce the cost of the optical receiver.

Description

Optical receiver and method for adjusting position of chip

Technical Field

Embodiments of the present disclosure relate generally to the field of optical communications, and more particularly, to an optical receiver and a method of adjusting a position of a chip.

Background

With the popularization of the 5G technology, the demand for increasing the data transmission rate is more urgent. Data transmission using light as a medium is an effective method. In the field of optical communications, optical receivers are a common component. In an optical receiver, an optical signal carrying data is projected onto a lens and then onto a chip, thereby converting the optical signal to acquire data information contained in the optical signal.

However, in the existing solutions, the coupling manner between the lens and the chip is many-to-many coupling, which often causes great difficulty in the actual operation of the coupling, which in turn causes difficulty in reaching the standard of the response current.

Disclosure of Invention

According to a first aspect of the present disclosure, an optical receiver is provided. The optical receiver includes: a housing; a fiber optic adapter disposed outside and coupled to the housing; an optical splitter disposed inside the housing; a plurality of lenses disposed independently of each other and adjacent to the optical splitter; and a plurality of chips configured to convert light entering the housing via the fiber optic adapter into an electrical signal, wherein each of the plurality of chips is disposed on a side of the respective lens away from the optical splitter, and a plurality of chip carriers disposed perpendicular to a first direction of the light illumination, each of the plurality of chips is coupled to the respective chip carrier, and a light-sensitive surface of the chip is perpendicular to the first direction of the light.

According to the embodiment of the disclosure, the coupling difficulty of the lens is reduced, and meanwhile, the response current can be optimized under the condition of reducing the cost.

In some embodiments, each chip carrier is cuboid and comprises: a first surface and a second surface, the second surface being opposite to the first surface along the first direction; and a plurality of third surfaces parallel to the first direction and extending from the first surface to the second surface, the plurality of third surfaces including a top surface, a bottom surface, and two side surfaces extending from the top surface to the bottom surface; wherein a respective chip is coupled to the first surface, the chip carrier further comprising circuitry disposed adjacent the chip.

In some embodiments, the circuitry comprises: a first line portion coupled on the first surface; and a second line portion coupled on the top surface, and wherein the first line portion and the second line portion collectively form an L-shape as viewed along a second direction perpendicular to the side surface.

In some embodiments, the chip includes a first negative electrode, a positive electrode, and a second negative electrode, each electrode adjacent to a respective first line portion.

In some embodiments, the plurality of lines includes three lines juxtaposed in a direction perpendicular to the second direction, the three lines being a first ground line, a signal line, and a second ground line in this order, and being coupled to the first negative electrode, the positive electrode, and the second negative electrode of the chip in this order by wires.

In some embodiments, the first ground line has a first ground line width in the second direction, the second ground line has a second ground line width in the second direction, the signal line has a signal line width in the second direction, wherein the first ground line width is equal to the second ground line width.

In some embodiments, the first ground line and the signal line are a first distance apart in the second direction, and the second ground line and the signal line are a second distance apart in the second direction, wherein the first distance is equal to the second distance.

In some embodiments, the first ground line width, the signal line width, and the first distance are determined based on a height of the chip carrier in a third direction perpendicular to the first direction and the second direction, a thickness of the chip carrier in the first direction, a dielectric constant of the chip carrier, a thickness of the line, and a target impedance value of the line.

In some embodiments, the optical receiver further includes a transgroup amplifier, and the chip carrier has a line therein coupled to the transgroup amplifier.

According to a second aspect of the present disclosure, there is provided a method for adjusting a position of a chip provided in the optical receiver according to the first aspect, the method comprising: monitoring a response current on the chip; moving the chip in the first direction by a first X-axis movement step until the monitored response current no longer increases; moving the chip in a second direction perpendicular to the first direction by a first Y-axis moving step until the response current no longer increases; moving the chip in a third direction perpendicular to the first direction by a first Z-axis moving step until the response current no longer increases; moving the chip in the first direction by a second X-axis movement step until the monitored response current no longer increases, wherein the second X-axis movement step is less than the first X-axis movement step; moving the chip in the second direction by a second Y-axis step size until the monitored response current no longer increases, wherein the second Y-axis step size is less than the first Y-axis step size; moving the chip along the third direction by a second Z-axis moving step until the monitored response current does not increase any more, wherein the second Z-axis moving step is smaller than the first Z-axis moving step; rotating the chip about the first direction in X-axis rotation steps until the monitored response current no longer increases; rotating the chip about the second direction by a Y-axis rotation step until the monitored response current no longer increases; and rotating the chip about the third direction in a Z-axis rotation step until the monitored response current no longer increases.

Drawings

The drawings are included to provide a better understanding of the present solution and are not intended to limit the present application.

Fig. 1 shows a perspective view of a conventional multi-channel optical receiver.

Fig. 2 shows an optical path diagram of the multi-channel optical receiver of fig. 1.

Fig. 3 shows a schematic perspective view of a multi-channel optical receiver according to an embodiment of the present disclosure.

Fig. 4 shows an optical path diagram of the multi-channel optical receiver of fig. 3.

Fig. 5 shows a schematic diagram of a coupling of a chip and a chip carrier according to an embodiment of the disclosure.

Fig. 6 shows a cross-sectional view of a line according to an embodiment of the present disclosure.

FIG. 7 shows a flow chart of a method of adjusting the position of a chip according to the present disclosure.

Detailed Description

The following description of the exemplary embodiments of the present application, taken in conjunction with the accompanying drawings, includes various details of the embodiments of the application for the understanding of the same, which are to be considered exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present application. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

In describing embodiments of the present disclosure, the terms "include" and its derivatives should be interpreted as being open-ended, i.e., "including but not limited to. The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first," "second," and the like may refer to different or the same object. Other explicit and implicit definitions are also possible below.

A conventional optical receiver 10 is described below with reference to fig. 1 and 2. The optical receiver 10 generally includes a housing 11 and a fiber optic adapter 12 coupled to the housing 11. The fiber optic adapters 12, also referred to as pins, are used to couple to optical fibers (not shown) and transfer light conducted through the optical fibers into the housing 11. As shown in fig. 1, an optical splitter substrate 13 and optical splitters 14 located on the optical splitter substrate 13 are provided in the housing 11. The optical splitter substrate 13 may be coupled to the inner surface of the case 11 in various ways. The optical splitter 14 splits the light transmitted via the fiber adapter 12 into a plurality of parallel beams. The frequencies of these beams may be different from each other. As shown in fig. 1, an array lens 15 is provided at one side of the optical splitter 14, and the array lens 15 is used to focus parallel light into convergent light. The array lens 15 is provided with a plurality of lenses associated with each other, which respectively correspond to a plurality of wavelengths of light transmitted through the optical fiber, for example, one lens on the array lens 15 is used to focus light having a wavelength of 750 nm into convergent light, and another lens on the array lens 15 is used to focus light having a wavelength of 400 nm into convergent light. It should be noted that the numerical values listed here are merely illustrative, and the specific wavelength of light may be adjusted according to different scenarios.

As shown in fig. 1, and with reference to fig. 2, the light receiver 10 further includes a prism 18 disposed behind the array lens 15. As shown in fig. 2, the prism 18 may have a 45 ° edge angle. The array lens 15 and the prism 18 may be connected by a glue 151, and the glue 151 may be formed by glue. The light passing through the array lens 15 may be reflected by the reflection surface of the prism 18 to be turned by 90 °. As shown, the light receiver 10 also includes a chip 17 disposed horizontally below the prism 18. The light reflected and thus deflected by 90 ° impinges exactly perpendicularly on the light-sensitive surface of the chip 17. The chip 17 may convert the received optical signal into an electrical signal so as to analyze the electrical signal, thereby implementing data transmission.

During use of the optical receiver 10, the light beams of different wavelengths need to be focused so that the light can be accurately focused on the photosensitive surface of the chip 17. However, in the prior art solutions shown in fig. 1 and 2, since the lenses are integrated on the array lens 15 in association with each other, adjustment of one lens affects adjustment of the other lenses on the array lens 15. After a certain lens adjustment is completed, the already adjusted lens needs to be re-adjusted due to the adjustment of the next lens. In such a design, it is difficult to ensure that the plurality of lenses on the array lens 15 are properly adjusted to the proper positions. In summary, the coupling difficulty of the array lens in the existing design is large, which results in low coupling efficiency.

An exemplary implementation of the optical receiver 20 according to an embodiment of the present disclosure is described below in conjunction with fig. 3-6.

As shown in fig. 3, the optical receiver 20 generally includes a housing 21, a fiber optic adapter 22 disposed outside the housing 21 and coupled to the housing 21, an optical splitter 24, and a plurality of lenses 25. The housing 21, the optical fiber adapter 22, the optical splitter substrate 23, and the optical splitter 24 are substantially the same as the housing 11, the optical fiber adapter 12, the optical splitter substrate 13, and the optical splitter 14 in the conventional optical receiver 10 shown in fig. 1, and their descriptions will be omitted.

Referring to fig. 3, a plurality of lenses 25 are provided independently of each other and adjacent to the optical splitter 24. Accordingly, the plurality of chips 27 are provided so as to correspond to the plurality of lenses 25, and each of the plurality of chips 27 is provided on a side of the corresponding lens 25 away from the optical splitter 24. These chips 27 are used to convert light entering the housing 21 via the fiber optic adapter 22 into electrical signals. As shown, the optical receiver further includes a plurality of chip-carriers 28, the chip-carriers 28 being arranged perpendicular to the first direction L1 followed by the light irradiation. The chips 27 are coupled to the respective chip carriers 28 such that the light-sensitive surfaces 275 of the chips 27 are also perpendicular to the first direction L1.

According to an embodiment of the present disclosure, each lens 25 of the plurality of lenses 25 has a chip 27 and a chip carrier 28 corresponding thereto, such that the optical paths through the lenses 25 do not interfere with each other. The adjustment of a certain lens 25 and its corresponding chip 27 does not adversely affect the other lenses 25. The multiple beams of light passing through the optical splitter 24 may be irradiated onto a chip 27 disposed on a chip carrier 28 through respective lenses 25 to be accordingly converted into electrical signals for subsequent processing.

By replacing the existing array lens 15 with a plurality of individually arranged lenses 25, decoupling of the lenses suitable for light of different wavelengths can be achieved. This facilitates independent adjustment of the light of different wavelengths, thereby improving the yield of the optical receiver 20.

As shown in fig. 3, in some embodiments, the lens 25 may be adhered to a lens block 26, and the lens block 26 may be adhered to the inside of the housing 1. Although four lenses 25, a corresponding four chips 27 and a corresponding four chip carriers 28 are shown in fig. 3 and 4, it should be understood that the numbers listed here are merely illustrative and that the optical receiver 20 may include more or fewer lenses, chips and corresponding chip carriers, the specific numbers being determined according to actual requirements.

Further, referring to fig. 2 and 4, it can be understood that the optical path according to fig. 4 does not require the 45 ° prism 18, that is, the optical path does not need to be vertically converted but is directly irradiated onto the vertically mounted chip 27, as compared to the conventional optical path. Compared to the difficulty of adjusting the plurality of lenses coupled together in the existing circuit, the optical receiver 20 according to the embodiment of the present disclosure greatly reduces the difficulty of production and manufacturing. In addition, since the cost of the single lens 25 and the chip 27 is much smaller than that of the lens and the chip formed in an array, the optical receiver 20 according to the embodiment of the present disclosure can effectively reduce the manufacturing cost.

In the prior art, since the plurality of chips 27 are coupled to each other, if the chips 27 are vertically disposed, the movement of one chip may affect other chips on the chip array, and such a disposing manner needs to consider the position accuracy of the plurality of chips at the same time, so that the requirement on the chip processing technology is extremely high. On the basis of the existing process, it is impossible to ensure the accuracy of optical path adjustment while vertically placing the chips 27 in an array form.

According to the embodiment of the present disclosure, since the plurality of chips 27 are independent and decoupled from each other, it is not necessary to consider the interaction of the plurality of chips 27 at the same time, and thus vertical mounting of the chips 27 can be achieved. That is, in the embodiment of the present disclosure, the prism 18 can be omitted. The refraction of the optical path can be reduced by omitting the prism 18, which is common in prior art solutions. This helps to further simplify the optical path and thereby reduce the dissipation of the optical signal. In addition, the manufacturing cost is further reduced.

In some embodiments, each chip carrier 28 may be cuboid and include a plurality of surfaces. As shown in fig. 5, the surfaces include a first surface 281 and a second surface 282 that are oppositely disposed along a first direction L1. The chip carrier 28 may also include a plurality of third surfaces. These third surfaces are surfaces parallel to the first direction L1 and extending from the first surface 281 to the second surface 282. As shown, the plurality of third surfaces includes a top surface 283-1, a bottom surface 283-2, and two side surfaces 283-3 extending from the top surface 283-1 to the bottom surface 283-2.

As shown in fig. 3, the respective chip 27 is coupled to the first surface 281, and the chip carrier 28 further includes a plurality of lines 30. The line 30 is adjacent to the chip 27, and this arrangement helps to reduce the distance between the line 30 and the chip 27, thereby reducing the manufacturing cost of the optical receiver 20.

In some embodiments, each of the plurality of lines 30 may include two line portions, a first line portion 3011 and a second line portion 3012. The first line portion 3011 is coupled to the first surface 281 of the chip carrier 28, and the second line portion 3012 is coupled to the top surface 283-1 of the chip carrier 28. As shown in fig. 6, the first line portion 3011 and the second line portion 3012 collectively form an L-shape as viewed along a second direction L2 perpendicular to the side surface 283-3 of the chip carrier 28.

In some embodiments, as shown in fig. 5, chip 27 includes a first negative electrode 271, a positive electrode 273, and a second negative electrode 272. With each electrode adjacent a respective first line portion 3011.

In certain embodiments, the plurality of lines 30 includes three lines arranged side-by-side along a second direction L2 that is perpendicular to the first direction L1. As shown in fig. 5, along the second direction L2, three lines are a first ground line 301, a signal line 303, and a second ground line 302 in this order, and are coupled to the first negative electrode 271, the positive electrode 273, and the second negative electrode 272 of the chip 27 in this order by wiring.

In some embodiments, as shown in fig. 5, the first ground wire 301 has a first ground wire width W1 in the second direction L2, and the second ground wire has a second ground wire width W2 in the second direction L2. Similarly, the signal line 303 has a signal line width W3 in the second direction L2. In some embodiments, the first ground width W1 may be equal to the second ground width W2. In this way, the first ground line 301 and the second ground line 302 can be better matched, thereby securing symmetry of the two ground lines with respect to the signal line 303. The stability of the electrical signal is guaranteed.

In some embodiments, the first ground line 301 and the signal line 303 are separated by a first distance D1 in the second direction L2, and the second ground line 302 and the signal line 303 are separated by a second distance D2 in the second direction L2. In certain embodiments, the first distance D1 may be equal to the second distance D2. In this way, the stability of the electrical signal can be guaranteed. Further, such an arrangement can also increase the operability of adjustment.

In some embodiments, since the first ground line width W1 may be equal to the second ground line width W2, and the first distance D1 between the first ground line 301 and the signal line 303 is equal to the second distance D2 between the second ground line 302 and the signal line 303, only the values of the first distance D1, the first ground line width W1, and the signal line width W3 need to be determined in the specific selection of the line parameters.

The process of adjusting the first distance D1, the first ground line width W1, and the signal line width W3 is described below. As shown in fig. 5, the chip carrier 28 has a height H1 in the first direction L1 and a thickness H3 in the third direction L3. In addition, once the material of the chip carrier 28 is determined, its dielectric constant is also fixed. These parameters can be known by measurement or by interrogation. As shown in fig. 6, the line 30 has a thickness T. In some embodiments, the thickness T is determined according to the needs of the user. During the adjustment process, these parameters are known and determined.

Since the impedance value of the line 30 changes according to the changes of the first distance D1, the first ground line width W1, and the signal line width W3, the impedance value of the line 30 is known in real time by fine-tuning these three parameters. When the deviation between the real-time obtained impedance value and the target impedance value Z is less than a certain threshold value. Appropriate values of the first distance D1, the first ground line width W1, and the signal line width W3 can be determined thereby. In this way, the response current of the optical receiver 20 can be further improved.

In some embodiments, the optical receiver 20 may also include a transgroup amplifier 29. As shown in fig. 3, the transgroup amplifier 29 is coupled to a line 30 on the chip carrier 28. The transgroup amplifier 29 and the chip carrier 28 are bonded inside the housing 1, and the designed lines are led out to the same plane as the transgroup amplifier 29 to facilitate bonding of the chip 27 and the transgroup amplifier 29.

A method 700 for adjusting the position of the chip 27 is described below with reference to fig. 7. The chip 27 may be the chip described hereinabove.

The method 700 begins at step 702. At step 704, the response current on the chip 27 is monitored. At step 706, the chip 27 is moved in the first direction by a first X-axis movement step until the monitored response current no longer increases. At step 708, the chip 27 is moved in a second direction perpendicular to the first direction by a step size in the first Y-axis movement until the response current no longer increases. At step 710, the chip 27 is moved in a third direction perpendicular to the first direction by a first Z-axis movement step until the response current no longer increases.

Based on the above steps, by roughly adjusting the movement of the chip 27 in the first direction, the second direction, and the third direction, a local maximum of the response current is obtained, whereby the approximate position of the chip 27 can be roughly determined.

The method 700 then continues to step 712 by moving the chip 27 in the first direction by a second X-axis movement step that is less than the first X-axis movement step until the monitored response current no longer increases. At step 714, the chip 27 is moved in the second direction by a second Y-axis movement step, which is less than the first Y-axis movement step, until the monitored response current no longer increases. At step 716, the chip 27 is moved in the third direction by a second Z-axis movement step, which is smaller than the first Z-axis movement step, until the monitored response current does not increase any more.

The steps of the above adjustments at

steps

712, 714, and 716 are shorter compared to the adjustments at

steps

706, 708, and 710. That is, steps 712, 714, and 716 accomplish fine translation in three directions.

At step 718, the chip 27 is rotated in an X-axis rotation step around the first direction until the monitored response current no longer increases. At step 720, the chip 27 is rotated in Y-axis rotation steps around the second direction until the monitored response current no longer increases. At step 722, and in Z-axis rotation steps, the chip 27 is rotated about the third direction until the monitored response current no longer increases.

Steps

718, 720, 722 relate to fine adjustment in three rotational directions. The position and orientation of the chip 27 are finely adjusted by six degrees of freedom (three translations and three rotations). By monitoring the response current during the adjustment process, it is ensured that the response current gets a maximum value, thereby achieving an accurate positioning of the chip 27. The method 700 ends at step 724.

In an embodiment according to the present disclosure, an optical receiver that is easy to implement is provided, the coupling efficiency of a lens can be optimized to a great extent, and the manufacturing cost can be greatly reduced, while the yield can be ensured.

Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. An optical receiver, comprising:

a housing (21);

a fiber optic adapter (22) disposed outside the housing (21) and coupled to the housing (21);

an optical splitter (24) provided inside the housing (21);

a plurality of lenses (25) arranged independently of each other and adjacent to the optical splitter (24);

a plurality of chips (27) configured to convert light entering the housing (21) via the fiber optic adapter (22) into electrical signals, wherein each chip of the plurality of chips (27) is disposed on a side of the respective lens (25) distal from the optical splitter (24), and

a plurality of chip carriers (28) arranged perpendicular to a first direction (L1) of the light illumination, each chip of the plurality of chips (27) being coupled to a respective chip carrier (28), and a light sensitive surface (275) of the chip (27) being perpendicular to the first direction (L1) of the light;

each chip carrier (28) is cuboid and comprises:

a first surface (281) and a second surface (282), the second surface (282) being opposite to the first surface (281) along the first direction (L1); and

a plurality of third surfaces parallel to the first direction (L1) and extending from the first surface (281) to the second surface (282), the plurality of third surfaces comprising a top surface (283-1), a bottom surface (283-2), and two side surfaces (283-3) extending from the top surface (283-1) to the bottom surface (283-2);

wherein a respective chip (27) is coupled to the first surface (281), the chip carrier (28) further comprising a line (30) arranged adjacent to the chip (27), and

wherein the line (30) comprises:

a first circuit portion (3011) coupled on the first surface (281); and

a second line portion (3012) coupled on the top surface (283-1),

and wherein the first line portion (3011) and the second line portion (3012) jointly form an L-shape, viewed along a second direction (L2) perpendicular to the side surface (283-3).

2. The optical receiver of claim 1, wherein the optical receiver further comprises a light source,

wherein the chip (27) comprises a first negative electrode (271), a positive electrode (273) and a second negative electrode (272), wherein each electrode is adjacent to a respective first line portion (3011).

3. The optical receiver according to claim 2, said plurality of lines (30) comprising three lines juxtaposed along a direction perpendicular to said second direction (L2), said three lines being in turn a first ground line (301), a signal line (303) and a second ground line (302) and being in turn coupled by wiring to said first negative electrode (271), said positive electrode (273) and said second negative electrode (272) of said chip (27).

4. The optical receiver of claim 3, wherein the first ground line (301) has a first ground line width (W1) in the second direction (L2), the second ground line has a second ground line width (W2) in the second direction (L2), the signal line (303) has a signal line width (W3) in the second direction (L2), wherein the first ground line width (W1) is equal to the second ground line width (W2).

5. The optical receiver of claim 4, wherein the first ground line (301) and the signal line (303) are at a first distance (D1) in the second direction (L2), the second ground line (302) and the signal line (303) are at a second distance (D2) in the second direction (L2), wherein the first distance (D1) is equal to the second distance (D2).

6. The optical receiver of claim 5, wherein the first ground line width (W1), signal line width (W3), and first distance (D1) are determined based on a height (H3) of the chip carrier (28) in a third direction (L3) perpendicular to the first direction (L1) and the second direction (L2), a thickness (H1) of the chip carrier (28) in the first direction (L1), a dielectric constant of the chip carrier (28), a thickness (T) of the line (30), and a target impedance value (Z) of the line (30).

7. The optical receiver of claim 1, further comprising a transgroup amplifier (29), the chip carrier (28) having lines disposed therein coupled to the transgroup amplifier (29).

8. A method for adjusting a position of a chip (27), the chip (27) being provided in an optical receiver according to any one of claims 1 to 7, the method comprising:

monitoring a response current on the chip (27);

moving the chip (27) in the first direction (L1) in a first X-axis movement step until the monitored response current no longer increases;

moving the chip (27) in a second direction (L2) perpendicular to the first direction (L1) in a first Y-axis movement step until the response current no longer increases;

moving the chip (27) in a third direction (L3) perpendicular to the first direction (L1) in a first Z-axis movement step until the response current no longer increases;

moving the chip (27) in the first direction (L1) in a second X-axis movement step until the monitored response current no longer increases, wherein the second X-axis movement step is smaller than the first X-axis movement step;

moving the chip (27) in the second direction (L2) in a second Y-axis movement step until the monitored response current no longer increases, wherein the second Y-axis movement step is less than the first Y-axis movement step;

moving the chip (27) in the third direction (L3) in a second Z axis movement step until the monitored response current no longer increases, wherein the second Z axis movement step is less than the first Z axis movement step;

rotating the chip (27) about the first direction (L1) in X-axis rotation steps until the monitored response current no longer increases;

rotating the chip (27) about the second direction (L2) in Y-axis rotation steps until the monitored response current no longer increases; and

rotating the chip (27) about the third direction (L3) in Z-axis rotation steps until the monitored response current no longer increases.