CN112187048A - Low-power-consumption correction circuit and automatic correction method for output voltage - Google Patents
Low-power-consumption correction circuit and automatic correction method for output voltage Download PDFInfo
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- CN112187048A CN112187048A CN202011388180.7A CN202011388180A CN112187048A CN 112187048 A CN112187048 A CN 112187048A CN 202011388180 A CN202011388180 A CN 202011388180A CN 112187048 A CN112187048 A CN 112187048A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/081—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters wherein the phase of the control voltage is adjustable with reference to the AC source
- H02M1/082—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters wherein the phase of the control voltage is adjustable with reference to the AC source with digital control
Abstract
The invention provides a low-power-consumption correction circuit with output voltage and a method, relates to the technical field of electronic elements, and mainly solves the technical problem that a linear voltage converter is high in static power consumption. The invention comprises a source follower and a voltage correction unit connected with the source follower; the voltage correction unit comprises a voltage sensing module, a digital control module and a reference voltage control module which are connected in sequence; and the source electrode follower is connected with the voltage sensing module and the reference voltage control module. The source follower is adopted to replace the linear voltage converter, and the source follower can not generate static power consumption, so that the power consumption of the system on chip of the sensor can be effectively reduced; meanwhile, the voltage correction unit and the voltage correction method are designed, so that the defect that the voltage output of the source follower is unstable is effectively avoided. Therefore, the circuit has the advantages of low power consumption, stable output and larger application value.
Description
Technical Field
The invention relates to the technical field of electronic elements, in particular to a low-power-consumption correction circuit and an automatic correction method for output voltage.
Background
Under the rapid development of the current wireless communication technology system, the research and development of a wireless radio frequency integrated circuit with low cost, high efficiency and low power consumption is increasingly urgent, the world is entering an internet of things era that various systems need to collect and exchange data, and in the internet of things that sensors transmit data in a wireless mode, if the sensors are powered by batteries, the power consumption is limited and must last for a long time, WiFi with low power consumption and low voltage plays a crucial role. In the power supply structure design of the System on Chip (SoC) of the sensor, the upper layer adopts a plurality of linear voltage converters, and the number of the linear voltage converters is two. One is direct current voltage reduction (VIN-to-VOUT) to provide low voltage to the core circuit of the lower layer, and the other is to make the analog or digital load circuits of the lower layer have good isolation to each other, so as to improve the transmission efficiency. In terms of power consumption, improvement can be made mainly from two places, first, the dynamic current of the load is reduced. While the system is operating, this is the most direct and effective way to reduce power consumption, however, this improvement method must be a trade-off evaluation with the overall performance, and the complexity is too high; second, the quiescent current of the linear voltage converter is reduced. When data is not transmitted, the system enters a sleep standby mode, and the linear voltage converter is still turned on to provide a stable output voltage despite the extremely low power consumption of the load. It is therefore important to reduce the quiescent current of the linear voltage converter. Therefore, how to reduce the static power consumption of the linear voltage converter is the most problem to be solved.
Under the traditional architecture of the linear voltage converter, the voltage converter can be divided into a core stage and an output stage. The core stage mainly includes an error amplifier for stabilizing an output voltage (Vout) by a reference Voltage (VREF) and a feedback Voltage (VFB); the output stage is composed of a high voltage pass transistor (Mpass), a feedback resistor, and a load capacitor. In order to achieve a smaller quiescent current design, the feedback resistors are usually not designed to be too small, and the ratio of the two feedback resistors is designed according to the reference voltage and the required output voltage. The pass transistor needs to have a certain driving capability to bear a high power load, and when the maximum current is outputted, the W/L ratio needs to be properly designed to ensure that Vo is greater than 2vds (sat) to ensure that the error amplifier operates in the saturation region. The power consumption of the circuit is partially proportional, and if the static power consumption of microampere or below is to be achieved, the price is to increase the area, and to allow operation at low voltage, the design difficulty is also increased.
Disclosure of Invention
One of the objectives of the present invention is to solve the technical problem of high static power consumption of the prior art linear voltage converter. In order to achieve the purpose, the invention provides the following technical scheme: the invention relates to a low-power consumption correction circuit of output voltage, which comprises a source follower and a voltage correction unit connected with the source follower.
Furthermore, the voltage correction unit comprises a voltage sensing module, a digital control module and a reference voltage control module which are connected in sequence; and the source electrode follower is connected with the voltage sensing module and the reference voltage control module.
Further, the source follower comprises a transistor M1 and a voltage-stabilizing capacitor C1. The grid and the drain of the transistor M1 are respectively connected with a reference voltage and an input voltage, the source is connected with a load, and the voltage stabilizing capacitor C1 is connected between the source of the transistor M1 and the ground end; an output port is arranged between the source electrode of the transistor M1 and the load; the current output to the load by the source follower is dynamic current; the source follower can step down the input voltage through the transistor M1 to form an output voltage; the voltage correction unit corrects the reference voltage so that the output voltage meets a preset range, and at the moment, the dynamic current is transmitted to the load.
Preferably, the transistor M1 is an N-MOS transistor.
Further, the voltage sensing module includes a first comparator and a second comparator. A positive phase port of the first comparator is connected to the output voltage, and a negative phase port of the first comparator is connected to a first target voltage; and a positive phase port of the second comparator is connected to the output voltage, and a negative phase port of the second comparator is connected to a second target voltage. The output ends of the first comparator and the second comparator are connected with the digital control module. The voltage sensing module can compare the output voltage with the first target voltage and the second target voltage respectively, and output high and low level signals according to comparison results of the output voltage which is higher than the first target voltage, lower than the second target voltage and falls between the second target voltage and the first target voltage respectively.
Further, the first comparator includes a transistor M2, a transistor M3, a transistor M4, a transistor M5, a transistor M6, a transistor M7, and a transistor M8. The transistor M2 and the transistor M3 form a differential pair, and the transistor M4 and the transistor M5 form a current mirror; the source of the transistor M2 is connected with the source of the transistor M3, and the drain of the transistor M2 and the drain of the transistor M3 are respectively connected with the drain of the transistor M4 and the drain of the transistor M5; the source of the transistor M4 and the source of the transistor M5 are both connected to the input voltage; the grid electrode of the transistor M4, the drain electrode of the transistor M4 and the grid electrode of the transistor M5 are connected; the gate of the transistor M2 and the gate of the transistor M3 are connected to the first target voltage and the output voltage respectively. The drain of the transistor M6 is connected with the source of the transistor M2 and the source of the transistor M3, the source is connected to the ground, and the gate of the transistor M8 are connected to a bias voltage; the source of the transistor M8 is connected to ground, and the drain of the transistor M7 are both connected to the output terminal; the source of the transistor M7 is connected to the input voltage, and the gate is connected to the drain of the transistor M3 and the drain of the transistor M5.
Further, the second comparator includes a transistor M9, a transistor M10, a transistor M11, a transistor M12, a transistor M13, a transistor M14, and a transistor M15. The transistor M9 and the transistor M10 form a differential pair, and the transistor M11 and the transistor M12 form a current mirror; the source of the transistor M9 is connected with the source of the transistor M10, and the drain of the transistor M9 and the drain of the transistor M10 are respectively connected with the drain of the transistor M11 and the drain of the transistor M12; the source of the transistor M11 and the source of the transistor M12 are both connected to the input voltage; the grid electrode of the transistor M11, the drain electrode of the transistor M11 and the grid electrode of the transistor M12 are connected; the gate of the transistor M9 and the gate of the transistor M10 are respectively connected to the second target voltage and the output voltage. The drain of the transistor M13 is connected with the source of the transistor M9 and the source of the transistor M10, the source is connected to the ground, and the gate of the transistor M15 are connected to a bias voltage; the source of the transistor M15 is connected to ground, and the drain of the transistor 14 are both connected to an output terminal; the source of the transistor M14 is connected to the input voltage, and the gate is connected to the drain of the transistor M10 and the drain of the transistor M12.
Preferably, the transistor M4, the transistor M5, the transistor M7, the transistor M11, the transistor M12 and the transistor M14 are P-MOS transistors, and the transistor M2, the transistor M3, the transistor M6, the transistor M8, the transistor M9, the transistor M10, the transistor M13 and the transistor M15 are N-MOS transistors.
Further, the digital control module is provided with an oscillator, and the oscillator is a 32KHz oscillator. The oscillator comprises a D trigger and a multivariate ripple transfer adder; the oscillator is used for carrying out bit operation and logic operation on the high-low level signal transmitted by the voltage sensing module to form a correction error.
Further, the reference voltage control module is a multiplexer. The multiplexer is provided with a plurality of input ports with voltage levels. The multiplexer can correct the reference voltage according to the correction error calculated by the digital control module and output the corrected voltage to the source follower.
The invention also provides an automatic correction method of the output voltage, which comprises the low-power consumption correction circuit. The voltage sensing module comprises a first comparator and a second comparator; the digital control module is provided with an oscillator; the oscillator comprises a D trigger and a multivariate ripple transfer adder, and the automatic correction method comprises the following steps:
s1, setting a standard specification voltage and a preset proportion, and calculating a first target voltage and a second target voltage according to the standard specification voltage and the preset proportion;
s2, the source follower is connected with an initial reference voltage and an input voltage, and the initial reference voltage and the input voltage are reduced through the source follower to generate an output voltage;
s3, the voltage sensing module compares the output voltage with the first target voltage and the second target voltage, and determines whether the output signals of the first comparator and the second comparator are low level signals and high level signals; if yes, executing step S4, otherwise, executing steps S5-S7; the output of the first comparator and the output of the second comparator are both high and low level signals, and the high and low level signals comprise low level signals and high level signals;
s4, the reference voltage control module directly outputs the initial reference voltage to the source follower, and the source follower outputs dynamic current to a load;
s5, the voltage sensing module respectively transmits the output signals of the first comparator and the second comparator to the digital control module;
s6, the digital control module performs bit operation and logic operation on the high and low level signals to generate a correction error;
s7, the reference voltage control module performs error correction on the initial reference voltage according to the correction error to form a corrected reference voltage and transmits the corrected reference voltage to the source follower, the accessed initial reference voltage of the source follower is updated to the corrected reference voltage, the updated output voltage is output to the voltage sensing module, and the step S3 is executed.
Further, in step S3, when the output voltage is higher than the first target voltage, the first comparator and the second comparator both output high level signals; when the output voltage is not higher than the first target voltage and not lower than the second target voltage, the first comparator and the second comparator respectively output a low level signal and a high level signal; when the output voltage is lower than the second target voltage (VR-lov), the first comparator and the second comparator both output low level signals.
Further, the step S6 further includes the following steps:
s60, converting the high-low level signal into an operation addend and an output signal by adopting the D trigger and logic operation to form a first operand;
s61, carrying out XOR logical operation on the first operand to form a second operand;
and S62, adding the second operand through a multi-element ripple transfer adder twice to generate a third operand, and performing error correction and output on the initial reference voltage by the reference voltage control module according to the third operand.
The low-power consumption correction circuit and the automatic correction method for the output voltage provided by the invention at least have the following beneficial technical effects:
the linear voltage converter is replaced by the source follower, so that the source follower does not have static current and does not generate static power consumption, and the power consumption of the system on chip of the sensor can be effectively reduced; on the other hand, the source follower is easily affected by process deviation, temperature variation and input voltage adjustment, so that the output dynamic current is unstable. Therefore, the structure has low power consumption, stable output and larger application value.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of the overall structure of the low power consumption correction circuit of the present invention;
FIG. 2 is a schematic circuit diagram of the source follower of the present invention;
FIG. 3 is a schematic diagram of the circuit structure of the voltage sensing module of the present invention;
FIG. 4 is a schematic diagram of a digital control module according to the present invention;
FIG. 5 is a schematic diagram illustrating the structure and calibration of a reference voltage control module according to the present invention;
FIG. 6 is a flow chart of an auto-calibration method of the present invention;
FIG. 7 is a schematic diagram of a calibration process of the reference voltage control module in the automatic calibration method according to the present invention.
In the figure, 1, a source follower; 2. a voltage correction unit; 20. a voltage sensing module; 200. a first comparator; 201. a second comparator; 21. a digital control module; 22. a reference voltage control module; vin, input voltage; vout, output voltage; VR, voltage of standard specification; IL, dynamic current; VR-hiv, a first target voltage; VR-lov, a second target voltage; vref, reference voltage; vb, bias voltage.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be described in detail below. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the examples given herein without any inventive step, are within the scope of the present invention.
In the design of a power supply structure of a System on Chip (SoC) such as a sensor, a plurality of linear voltage converters are usually adopted in an upper layer structure in the prior art, and the linear voltage converters can generate static current, so that the static power consumption of the SoC is increased, the development of low-power consumption and low-voltage WiFi products is not facilitated, and the invention starts to reduce the static power consumption. See the examples below for details.
The first embodiment is as follows:
referring to fig. 1, the present invention provides an embodiment of a low power consumption correction circuit for an output voltage, which includes a source follower 1 and a voltage correction unit 2 connected to the source follower 1. Specifically, the voltage calibration unit 2 includes a voltage sensing module 20, a digital control module 21 and a reference voltage control module 22 connected in sequence, and the source follower 1 is connected to both the voltage sensing module 20 and the reference voltage control module 22. It should be noted that, in order to reduce power consumption, when data is not transmitted, the system enters a sleep standby mode, and at this time, although the load power consumption is very low, the linear voltage converter still needs to be turned on to provide a stable output voltage, and in this process, a static current occurs, which generates a certain static power consumption. The source follower can effectively improve the technical problem, the source follower does not have static current, the source follower is easy to operate at low voltage, but is easily influenced by process deviation, temperature variation and input voltage adjustment, so that the output voltage is unstable and may exceed the voltage range acceptable by a load. Therefore, the invention adopts a correction technology to adjust the reference voltage and ensure that the output voltage is controlled in a voltage range acceptable by a load, thereby realizing lower power consumption than a linear voltage converter.
Referring to fig. 2, the source follower 1 includes a transistor M1 and a voltage stabilizing capacitor C1. Specifically, the gate and the drain of the transistor M1 are respectively connected to a reference voltage Vref and a wide-range input voltage Vin, the source is connected to the load 3 (such as an analog or digital load circuit), and the voltage-stabilizing capacitor C1 is connected between the source of the transistor M1 and the ground for further voltage stabilization, and the capacitance value thereof usually does not exceed 10 uF. An output port is arranged between the source of the transistor M1 and the load 3, the output port outputs a dynamic current IL for the load 3, and outputs an output voltage Vout for correcting the reference voltage Vref. The reference voltage Vref is used to control the on and off of the transistor M1, and the output voltage Vout is determined according to the magnitude of the dynamic current IL, which is the reference voltage Vref minus a driving voltage calculated by the dynamic current IL. The relationship between the output voltage Vout and the dynamic current IL is: the larger the dynamic current IL, the lower the output voltage Vout. Therefore, the output voltage Vout can be determined to fall within the preset range by adjusting the reference voltage Vref, so as to control the dynamic current IL within the acceptable range. Further, the source follower 1 can step down the input voltage Vin through the transistor M1 to form an output voltage Vout, and the voltage correction unit 2 corrects the reference voltage Vref such that the output voltage Vout meets a preset range (see the following description), and at this time, the dynamic current IL is transmitted to the load 3. It should be noted that the dynamic current IL is determined according to the actual condition of the load 3, and the initial value of the reference voltage Vref may be the driving voltage of the transistor M1 determined by the dynamic current IL. Preferably, the transistor M1 is an N-MOS transistor.
Referring to fig. 3, the voltage sensing module 20 includes a first comparator 200 and a second comparator 201. The positive phase port of the first comparator 200 is connected to the output voltage Vout, the negative phase port is connected to the first target voltage VR-hiv, the positive phase port of the second comparator 201 is connected to the output voltage Vout, the negative phase port is connected to the second target voltage VR-lov, and the output terminals of the first comparator 200 and the second comparator 201 are both connected to the digital control module 21. The voltage sensing module 20 can compare the output voltage Vout with the first target voltage VR-hiv and the second target voltage VR-lov, respectively, and output high and low level signals respectively according to the comparison result between the output voltage Vout higher than the first target voltage VR-hiv and lower than the second target voltage VR-lov and the second target voltage VR-lov and the first target voltage VR-hiv. The preset range of the output voltage Vout is: the second target voltage VR-lov and the first target voltage VR-hiv are respectively the minimum acceptable input voltage and the maximum acceptable input voltage of the load connected to the source follower 1. The first target voltage VR-hiv and the second target voltage VR-lov are calculated as shown in example II.
Further, the first comparator 200 includes transistors M2-M8. Specifically, the transistor M2 and the transistor M3 form a differential pair, and the transistor M4 and the transistor M5 form a current mirror. In the differential pair and the current mirror, a source of a transistor M2 is connected with a source of a transistor M3, a drain of a transistor M2 and a drain of a transistor M3 are respectively connected with a drain of a transistor M4 and a drain of a transistor M5, a source of a transistor M4 and a source of a transistor M5 are both connected with an input voltage Vin, a gate of the transistor M4, a drain of a transistor M4 and a gate of the transistor M5 are all connected, and a gate of the transistor M2 and a gate of the transistor M3 are respectively connected with a first target voltage VR-hiv and an output voltage Vout. The drain of the transistor M6 is connected to the source of the transistor M2 and the source of the transistor M3, the source is connected to ground, and the gate of the transistor M8 and the gate thereof are connected to the bias voltage Vb. The source of the transistor M8 is connected to ground, and the drain of the transistor M7 and the drain of the transistor M8 are both connected to the output terminal. The source electrode of the transistor M7 is connected to the input voltage Vin, and the gate electrode is connected to the drain electrode of the transistor M3 and the drain electrode of the transistor M5; the second comparator 201 includes transistors M9-M15. Specifically, the transistor M9 and the transistor M10 form a differential pair, and the transistor M11 and the transistor M12 form a current mirror. In the differential pair and the current mirror, a source of the transistor M9 is connected to a source of the transistor M10, a drain of the transistor M9 and a drain of the transistor M10 are respectively connected to a drain of the transistor M11 and a drain of the transistor M12, a source of the transistor M11 and a source of the transistor M12 are both connected to the input voltage Vin, a gate of the transistor M11, a drain of the transistor M11 and a gate of the transistor M12 are all connected, and a gate of the transistor M9 and a gate of the transistor M10 are respectively connected to the second target voltage VR-lov and the output voltage Vout. The drain of the transistor M13 is connected to the source of the transistor M9 and the source of the transistor M10, the source is connected to ground, and the gate of the transistor M15 and the gate thereof are connected to the bias voltage Vb. The source of the transistor M15 is connected to ground, and the drain of the transistor M and the drain of the transistor 14 are connected to the output terminal. The source of the transistor M14 is connected to the input voltage Vin, and the gate is connected to the drain of the transistor M10 and the drain of the transistor M12. Preferably, the transistor M4, the transistor M5, the transistor M7, the transistor M11, the transistor M12 and the transistor M14 are P-MOS transistors, and the transistor M2, the transistor M3, the transistor M6, the transistor M8, the transistor M9, the transistor M10, the transistor M13 and the transistor M15 are N-MOS transistors.
Referring to fig. 4, the digital control module 21 is provided with an oscillator, preferably a 32KHz oscillator, for performing bit operation and logic operation on the high and low level signals transmitted from the voltage sensing module 20 to form a correction error. The oscillator is provided with a D flip-flop (D flip-flop), a Logic circuit, and a multi-element ripple transfer adder, which are known in the art and will not be described herein.
Referring to fig. 5, the reference voltage control module 22 is a multiplexer, the multiplexer is provided with a plurality of voltage level input ports, and the multiplexer 22 can correct the reference voltage Vref according to the correction error calculated by the digital control module 21 and output the corrected voltage to the source follower 1.
The specific implementation scheme is as follows: in the step-down stage, the input voltage Vin is input through the drain of the transistor M1, the reference voltage Vref is input through the gate of the transistor M1, the output voltage Vout is stepped down to the difference between the reference voltage Vref and the driving voltage under the driving voltage determined by the dynamic current IL, and the output voltage Vout is transmitted to the differential pair of the first comparator 200, the current mirror, and the differential pair of the second comparator 201 and the current mirror circuit through the source of the transistor M1.
When the output voltage Vout is higher than the first target voltage VR-hiv, the output current of the transistor M6 as a current source in the first comparator 200 decreases through the transistor M2 to the transistor M4, so that the potentials of the gate of the transistor M4 and the gate of the transistor M5 rise, and the potential of the drain of the transistor M5 falls, and the input voltage Vin outputs a high-level signal (indicated by "1") to the output port Ohiv through the transistor M7. In the second comparator 201, the output voltage Vout is greater than the second target voltage VR-lov, the output current of the transistor M13 serving as a current source decreases toward the transistor M11 through the transistor M9, the potentials of the gate of the transistor M11 and the gate of the transistor M12 increase, and the potential of the drain of the transistor M12 decreases, and the input voltage Vin outputs a high level signal (indicated by "1") to the output port Olov through the transistor M14, at this time, the high level signal output by the voltage sensing module 20 is 11; when the output voltage Vout is between the second target voltage VR-lov and the first target voltage VR-hiv, in the first comparator 200, the current of the transistor M6 as a current source flows into the transistor M4 via the transistor M2, the gate of the transistor M4 is connected to the gate of the transistor M5 and the drain of the transistor M2, and the drain potential of the transistor M5 rises, so that the gate voltage of the transistor M7 is substantially equal to the input voltage Vin, the transistor M7 is turned off, and the transistor M8 outputs a low-level signal (indicated by "0") to the output port Ohiv. In the second comparator (201), according to the same analysis that the output voltage Vout is greater than the second target voltage VR-lov, the output voltage Vout outputs a high level signal (indicated by "1") to the output port Olov through the transistor M14, and at this time, the high-low level signal output by the voltage sensing module 20 is 01. Similarly, when the output voltage Vout is lower than the second target voltage VR-lov, the high-low level signal output by the analysis voltage sensing module 20 is 00 as described above.
The high and low level signals output by the output voltage sensing module 20 sequentially pass through a D flip-flop, a Logic circuit, and a multi-element ripple transfer adder in the digital control module 21 to form a correction error, and the correction error is corrected with respect to the reference voltage Vref by the multiplexer of the reference voltage control module 22, and the corrected voltage is output to the source follower 1. Thus, a voltage correction is performed, and if a correction fails to make the output voltage Vout fall within the preset range of [ VR-lov, VR-hiv ], the correction is performed a plurality of times as described above.
Example two:
referring to fig. 6, the present invention further provides an embodiment of an automatic output voltage calibration method, including the low power consumption calibration circuit described in the first embodiment, wherein the voltage sensing module 20 includes a first comparator 200 and a second comparator 201, and the digital control module 21 is provided with an oscillator, and the oscillator includes a D flip-flop and a multi-element ripple transfer adder. The automatic correction method of the present embodiment includes the following steps;
and S1, setting the standard specification voltage and the preset proportion, and calculating the first target voltage and the second target voltage according to the standard specification voltage and the preset proportion. Specifically, the standard specification voltage is determined according to the load 3 connected to the low power consumption correction circuit, and the calculation formulas of the first target voltage and the second target voltage are respectively described as follows:
VR-Hiv=VR*（1+W） （1）
VR-lov=VR*（1-W） （2）
VR-Hiv is a first target voltage value, VR-lov is a second target voltage value, W is a preset proportion, the preset proportion is preferably 10%, and VR is a standard voltage value.
S2, the source follower 1 is connected with the initial reference voltage and the input voltage, and the initial reference voltage and the input voltage are reduced by the source follower 1 to generate the output voltage. The output voltage is determined according to the magnitude of the dynamic current, which is the initial reference voltage minus a driving voltage calculated by the dynamic current, the magnitude of the dynamic current IL is determined according to the load 3 to which the low power consumption correction circuit is connected, and the value of the initial reference voltage may be the driving voltage of the transistor M1 determined by the dynamic current.
S3, the voltage sensing module 20 compares the output voltage with a first target voltage and a second target voltage, and determines whether the output signals of the first comparator and the second comparator are low level signals and high level signals; if yes, executing step S4, otherwise, executing steps S5-S7; the outputs of the first comparator 200 and the second comparator (201) are high and low level signals, and the high and low level signals comprise low level signals and high level signals;
s4, the reference voltage control module 22 directly outputs the initial reference voltage to the source follower 1, and the source follower 1 outputs the dynamic current to the load 3;
s5, the voltage sensing module 20 transmits the output signals of the first comparator and the second comparator to the digital control module 21 respectively;
s6, the digital control module 21 performs bit operation and logic operation on the high and low level signals to generate a correction error;
s7, the reference voltage control module 22 performs error correction on the initial reference voltage according to the correction error to form a corrected reference voltage and transmits the corrected reference voltage to the source follower 1, the initial reference voltage accessed by the source follower 1 is updated to the corrected reference voltage, and the updated output voltage is output to the voltage sensing module 20, and then the step S3 is performed.
Further, in step S3, the output voltage is higher than the first target voltage, and both the first comparator 200 and the second comparator 201 output high level signals; or, the output voltage is not higher than the first target voltage and not lower than the second target voltage, and the first comparator 200 and the second comparator 201 output a low level signal and a high level signal respectively; or, the output voltage is lower than the second target voltage, and both the first comparator 200 and the second comparator 201 output low level signals. The output results of the first comparator 200 and the second comparator 201 are output voltages shown in table 1.
Referring to fig. 4, the digital control module 21 is internally provided with a 32KHz oscillator with extremely low power consumption, and mainly aims to realize regular correction in a hardware manner and ensure that the output voltage is within a preset range when the digital control module is used for a long time. In this embodiment, 3-bit is used as the calibration accuracy, and when more bits are designed, the adjustable sensitivity is higher in the same adjustable voltage range; or the adjustable voltage range is wider under the same adjustable sensitivity. The digital control module 21 in step S6 further includes the following steps:
s60, using D flip-flop and logic operation to convert the high and low level signals into operation addend and output signals, forming a first operand, which is set to N, a for description. Specifically, the output results of the first comparator 200 and the second comparator 201 pass through the D flip-flop, and then undergo logic operation, so that two bits generate four bits. For example, the outputs of the first comparator 200 and the second comparator 201 are both low, and N is obtained after the D flip-flop and the Logic circuit, where a [2:0] = 0001; the outputs of the first comparator 200 and the second comparator 201 are both high, and N, A [2:0] =1001 is obtained after the D flip-flop and the Logic circuit; the outputs of the first comparator 200 and the second comparator 201 are low and high respectively, and then the outputs are processed by a D flip-flop and a Logic circuit to obtain N, a [2:0] = 0000. Thus, the output signals of addends A [2:0] and N are generated through the above steps. Wherein, N represents a sign or a carry, "1" is a negative sign; "0" is a positive sign. For example, N, a [2:0] =1001, stands for "-1"; n, a [2:0] =0001, for "+ 1", see truth table 1 for details.
S61, XOR the first operand to form a second operand, which is A'. Specifically, a [2:0] and N are XOR-Exclusive-OR operated to produce a new addend, e.g., N, A [2:0] =1001, and N is XOR-operated with each bit of A [2:0], respectively, with the result: n, a' [2:0] = 1110.
S62, the second operand is added by the two multi-element ripple pass adder to generate a third operand, which is set as Q, and the reference voltage control module 22 performs error correction and output on the initial reference voltage according to the third operand. Specifically, the multiple ripple pass adder is a three-bit ripple pass adder, Q2: 0 is the addend generated by the positive edge trigger of the previous Q2: 0 through DFF, and the addend is then followed by the second operand and the carry N of step S41, and the sum Q2: 0 is generated by the three-bit ripple pass adder, and its value represents the control signal of the reference voltage. For example, Q × [2:0] =100, N, a' [2:0] =1110, and Q × [2:0] + a [2:0] + N is added for each bit, and the result is: q [2:0] =100+110+1=1011, the fourth bit is an overflow bit, no value is taken, and only the last three bits are taken to obtain Q [2:0] =011, wherein, initially, Q [2:0] = 100.
In the present embodiment, the reference voltage controller 22 is a multiplexer, specifically an 8-to-1 multiplexer, having eight voltage levels of input signals and one voltage output. The reference voltage controller 22 receives the third operand of the correction output of the digital control module 21 and selects a matching correction reference voltage by the operand. A calibration comparison table is shown in table 2, for example, Q [2:0] =111, and the calibration reference voltage is Vref +4 Δ V; q [2:0] =000, and the corrected reference voltage is Vref-3 Δ V, where Vref is the initial reference voltage and Δ V is the corrected unit voltage (e.g., VR is one tenth of the standard voltage).
The specific embodiment is as follows: the external input voltage Vin is reduced by the source follower 1, and the output voltage Vout is unstable and may exceed the voltage range acceptable by the load, so that the output voltage Vout needs to be used to determine whether the reference voltage Vref needs to be corrected, thereby achieving the purpose of correcting the output voltage Vout. Specifically, the output voltage Vout has three cases, (1) is higher than the first target voltage VR-hiv; (2) below a second target voltage VR-lov; (3) between the second target voltage VR-lov and the first target voltage VR-hiv. If the voltage is between the second target voltage VR-lov and the first target voltage VR-hiv, no correction is needed for (3), and the other two cases require the start of the correction procedure. When the output voltage Vout is inputted into the voltage sensing module 20, the module compares the output voltage Vout with the first target voltage VR-hiv and the second target voltage VR-lov to output a high/low signal. When the output voltage Vout is in the conditions (1), (2), and (3), 11, 00, and 01 are output, respectively. The high and low level signals need to be logically and-operated in the digital control module 21 to determine the correction error signal.
When the output signal of the voltage sensing module 20 is 11, in step S40, the first operand N, a [2:0] =1001 is output through D flip-flop and logic operation according to the truth table (see table 1), in step S41, the second operand N, a' [2:0] =1110 is output through XOR logic operation, in step S42, the third operand Q [2:0] =011 is output through two ternary ripple transfer adder operations, and Q [2:0] =011 is stored in the adder, which is denoted as Q × 2:0] =011, for the next participation in operation. Q [2:0] =011 is a final correction error, correction output is carried out in the reference voltage control module 22, according to a reference voltage correction comparison table, the correction error is-delta V, the correction reference voltage output by the reference voltage control module 22 is Vref-delta V, namely the initial reference voltage is reduced by 1 correction unit voltage, a first correction reference voltage is obtained, and the correction reference voltage is input to the source follower 1. If the output voltage Vout does not fall within the range of the condition (3) (between the second target voltage VR-lov and the first target voltage VR-hiv), further correction is required, steps S2-S7 are executed, the third operand Q [2:0] =010 calculated for the second time, the output of the reference voltage is corrected to Vref-2 Δ V according to the reference voltage correction look-up table; if the output voltage Vout does not fall within the range of the condition (3) (between the second target voltage VR-lov and the first target voltage VR-hiv), continuing to perform a third correction, wherein the third calculated third operand Q [2:0] =001, and the corrected reference voltage output by the reference voltage control module 22 is Vref-3 Δ V according to the reference voltage correction look-up table; if the output voltage Vout does not fall within the range of the condition (3) (between the second target voltage VR-lov and the first target voltage VR-hiv), the fourth correction is continued, the fourth calculated third operand Q [2:0] =000, and the corrected reference voltage output by the reference voltage control module 22 is Vref-4 Δ V according to the reference voltage correction look-up table. In the above step, if the output voltage Vout falls within the range of the condition (3), the calibration is completed, and the pole follower 1 outputs a stable dynamic current to the load 3.
Similarly, when the output signal of the voltage sensing module 20 is 01, according to the above steps, the error Q [2:0] =100 is corrected, the correction error is 0, and according to the reference voltage correction look-up table, the corrected reference voltage is Vref, that is, the initial reference voltage, at this time, the pole follower 1 directly outputs a stable dynamic current to the load 3 without performing voltage correction. When the output signal of the voltage sensing module 20 is 00, according to the above steps, the error Q [2:0] =101 is corrected, the correction error is + Δ V, and according to the reference voltage correction look-up table, the corrected reference voltage output by the reference voltage control module 22 is Vref + Δ V, that is, the initial reference voltage is increased by 1 correction unit voltage, so as to obtain the corrected reference voltage. The calibration reference voltage is input to the source follower 1, and steps S2-S7 are executed until the output voltage Vout falls within the range of the condition (3), the calibration procedure is ended, and the pole follower 1 outputs a stable dynamic current to the load 3.
After the steps are completed, the dynamic adjustment process of the output voltage Vout is realized, and the value of the output voltage Vout is kept to fall into a preset range.
TABLE 1 truth table
TABLE 2 reference voltage correction look-up table
In summary, the linear voltage converter is replaced by the source follower, so that the source follower does not have static current and does not generate static power consumption, and the power consumption of the system on chip of the sensor can be effectively reduced; on the other hand, the source follower is easily affected by process deviation, temperature variation and input voltage adjustment, so that the output dynamic current is unstable. Therefore, the structure has low power consumption, stable output and larger application value.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. A low-power consumption correction circuit of output voltage is characterized by comprising a source follower (1) and a voltage correction unit (2) connected with the source follower (1);
the voltage correction unit (2) comprises a voltage sensing module (20), a digital control module (21) and a reference voltage control module (22) which are connected in sequence; the source follower (1) is connected with the voltage sensing module (20) and the reference voltage control module (22).
2. The low power consumption correction circuit according to claim 1, wherein the source follower (1) comprises a transistor M1, a voltage stabilizing capacitor C1;
the grid electrode and the drain electrode of the transistor M1 are respectively connected with a reference voltage (Vref) and an input voltage (Vin), and the source electrode is connected with a load (3); the voltage stabilizing capacitor C1 is connected between the source of the transistor M1 and the ground terminal;
an output port is arranged between the source electrode of the transistor M1 and the load (3); the current output by the source follower (1) to the load (3) is dynamic current (IL);
the source follower (1) drops the input voltage (Vin) through the transistor M1 to form an output voltage (Vout); the voltage correction unit (2) corrects the reference voltage (Vref) such that the output voltage (Vout) meets a preset range, at which time the dynamic current (IL) is transmitted to the load (3).
3. The low power consumption correction circuit according to claim 2, characterized in that the voltage sensing module (20) comprises a first comparator (200) and a second comparator (201);
a positive phase port of the first comparator (200) is connected to the output voltage (Vout) and a negative phase port is connected to a first target voltage (VR-hiv);
the positive phase port of the second comparator (201) is connected with the output voltage (Vout), and the negative phase port is connected with a second target voltage (VR-lov);
the output ends of the first comparator (200) and the second comparator (201) are connected with the digital control module (21);
the voltage sensing module (20) compares the output voltage (Vout) with the first target voltage (VR-hiv) and the second target voltage (VR-lov) respectively, and outputs high and low level signals according to the comparison result of the output voltage (Vout) which is higher than the first target voltage (VR-hiv), lower than the second target voltage (VR-lov) and falls between the second target voltage (VR-lov) and the first target voltage (VR-hiv).
4. The low power consumption correction circuit according to claim 3, wherein the first comparator (200) comprises a transistor M2, a transistor M3, a transistor M4, a transistor M5, a transistor M6, a transistor M7, and a transistor M8;
the transistor M2 and the transistor M3 form a differential pair, and the transistor M4 and the transistor M5 form a current mirror; the source of the transistor M2 is connected with the source of the transistor M3, and the drain of the transistor M2 and the drain of the transistor M3 are respectively connected with the drain of the transistor M4 and the drain of the transistor M5; the source of the transistor M4, the source of the transistor M5 are both connected to the input voltage (Vin); the grid electrode of the transistor M4, the drain electrode of the transistor M4 and the grid electrode of the transistor M5 are connected; the gate of the transistor M2 and the gate of the transistor M3 are respectively connected to the first target voltage (VR-hiv) and the output voltage (Vout);
the drain of the transistor M6 is connected with the source of the transistor M2 and the source of the transistor M3, the source is connected to the ground terminal, and the gate of the transistor M8 are connected to a bias voltage (Vb); the source of the transistor M8 is connected to ground, and the drain of the transistor M7 are both connected to the output terminal; the source of the transistor M7 is connected to the input voltage (Vin), and the gate is connected to the drain of the transistor M3 and the drain of the transistor M5.
5. The low power consumption correction circuit according to claim 3, wherein the second comparator (201) comprises a transistor M9, a transistor M10, a transistor M11, a transistor M12, a transistor M13, a transistor M14, and a transistor M15;
the transistor M9 and the transistor M10 form a differential pair, and the transistor M11 and the transistor M12 form a current mirror; the source of the transistor M9 is connected with the source of the transistor M10, and the drain of the transistor M9 and the drain of the transistor M10 are respectively connected with the drain of the transistor M11 and the drain of the transistor M12; the source of the transistor M11, the source of the transistor M12 are both connected to the input voltage (Vin); the grid electrode of the transistor M11, the drain electrode of the transistor M11 and the grid electrode of the transistor M12 are connected; the gate of the transistor M9 and the gate of the transistor M10 are respectively connected to the second target voltage (VR-lov) and the output voltage (Vout);
the drain of the transistor M13 is connected with the source of the transistor M9 and the source of the transistor M10, the source is connected to the ground terminal, and the gate of the transistor M15 are connected to a bias voltage (Vb); the source of the transistor M15 is connected to ground, and the drain of the transistor 14 are both connected to an output terminal; the source of the transistor M14 is connected to the input voltage (Vin), and the gate is connected to the drain of the transistor M10 and the drain of the transistor M12.
6. Low power consumption correction circuit according to claim 3, characterized in that the digital control module (21) is provided with an oscillator; the oscillator comprises a D trigger and a multivariate ripple transfer adder;
the oscillator is used for carrying out bit operation and logic operation on high and low level signals transmitted by the voltage sensing module (20) to form a correction error.
7. The low power consumption calibration circuit according to claim 6, wherein the reference voltage control module (22) is a multiplexer;
the multiplexer is provided with a plurality of input ports with voltage levels; the multiplexer (22) can correct the reference voltage (Vref) according to the correction error calculated by the digital control module (21), and output the corrected voltage to the source follower (1).
8. An automatic output voltage correction method, which is applied to the low power consumption correction circuit of any one of claims 1-7;
the voltage sensing module (20) comprises a first comparator (200) and a second comparator (201); the digital control module (21) is provided with an oscillator; the oscillator comprises a D trigger and a multivariate ripple transfer adder; the automatic correction method comprises the following steps:
s1, setting a standard specification voltage and a preset proportion, and calculating a first target voltage and a second target voltage according to the standard specification voltage and the preset proportion;
s2, the source follower (1) is connected with an initial reference voltage and an input voltage, and the voltage is reduced by the source follower (1) to generate an output voltage;
s3, the voltage sensing module (20) compares the output voltage with the first target voltage and the second target voltage respectively, and whether output signals of the first comparator (200) and the second comparator (201) are low-level signals and high-level signals respectively is judged; if yes, executing step S4, otherwise, executing steps S5-S7; the outputs of the first comparator (200) and the second comparator (201) are high and low level signals, and the high and low level signals comprise low level signals and high level signals;
s4, the reference voltage control module (22) directly outputs the initial reference voltage to the source follower (1), and the source follower (1) outputs dynamic current to a load (3);
s5, the voltage sensing module (20) transmits the output signals of the first comparator and the second comparator to the digital control module (21) respectively;
s6, the digital control module (21) performs bit operation and logic operation on the high and low level signals, generates a correction error and transmits the correction error to the reference voltage control module (22);
s7, the reference voltage control module (22) performs error correction on the initial reference voltage according to the correction error to form a corrected reference voltage and transmits the corrected reference voltage to the source follower (1), the initial reference voltage of the source follower (1) is updated to the corrected reference voltage, the updated output voltage is output to the voltage sensing module (20), and the step S3 is executed.
9. The automatic correction method according to claim 8, wherein the step S3 is specifically:
when the output voltage is higher than the first target voltage, the first comparator (200) and the second comparator (201) both output high-level signals;
when the output voltage is not higher than the first target voltage and not lower than the second target voltage, the first comparator (200) and the second comparator (201) respectively output a low level signal and a high level signal;
when the output voltage is lower than the second target voltage, the first comparator (200) and the second comparator (201) both output low level signals.
10. The automatic correction method according to claim 8, wherein said step S6 further comprises the steps of:
s60, converting the high-low level signal into an operation addend and an output signal by adopting the D trigger and logic operation to form a first operand;
s61, carrying out XOR logical operation on the first operand to form a second operand;
and S62, adding the second operand through a multi-element ripple transfer adder twice to generate a third operand, and the reference voltage control module (22) performs error correction and output on the reference voltage according to the third operand.
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