CN112186804B - Method and system for bus voltage unbalance and harmonic compensation of island microgrid - Google Patents

Method and system for bus voltage unbalance and harmonic compensation of island microgrid Download PDF

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CN112186804B
CN112186804B CN202011095159.8A CN202011095159A CN112186804B CN 112186804 B CN112186804 B CN 112186804B CN 202011095159 A CN202011095159 A CN 202011095159A CN 112186804 B CN112186804 B CN 112186804B
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inverter
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slave
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CN112186804A (en
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申红帅
菅永
曹彬
曹雪源
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Cecep Wind Power Corp
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H02J3/388—Islanding, i.e. disconnection of local power supply from the network
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/24—Arrangements for preventing or reducing oscillations of power in networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/24—Arrangements for preventing or reducing oscillations of power in networks
    • H02J3/241—The oscillation concerning frequency
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/26—Arrangements for eliminating or reducing asymmetry in polyphase networks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/50—Arrangements for eliminating or reducing asymmetry in polyphase networks

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Abstract

The invention relates to a method and a system for compensating voltage unbalance and harmonic waves of an isolated island microgrid bus, which are characterized by comprising the following steps: 1) selecting one inverter with the largest capacity in the microgrid as a master inverter, and taking the other inverters in the microgrid as slave inverters; 2) obtaining current in a load of the microgrid, and performing component separation on the obtained load current; 3) generating a reference current command value from the inverter based on each component of the load current; 4) obtaining a current tracking error of the slave inverter; 5) generating a PWM (pulse-width modulation) signal after the obtained current tracking error passes through a slave inverter current inner loop controller; 6) the slave inverter controls the turn-off of the IGBT according to the generated PWM signal, further controls the output compensation current of the slave inverter, and completes the unbalance of the bus voltage of the island microgrid and the harmonic compensation.

Description

Method and system for bus voltage unbalance and harmonic compensation of island microgrid
Technical Field
The invention relates to a method and a system for compensating voltage unbalance and harmonic waves of an isolated island microgrid bus, and belongs to the field of microgrid power quality control research.
Background
When the inverter is connected with the load and operates, if the algorithm of the inverter is not improved, the output voltage of the inverter is unbalanced and distorted due to the existence of the nonlinear unbalanced mixed load, and further the voltage of a bus of the connected microgrid is unbalanced and distorted. The unbalanced and distorted voltage not only causes great harm to the electric equipment in the microgrid, but also influences the stable operation of the inverter. Therefore, the inverter can complete the conversion of the electric energy form and ensure that the inverter can still provide high-quality electric energy under the nonlinear unbalanced mixed load.
In order to solve the problem of voltage imbalance when the inverter operates with a three-phase unbalanced load, a method for researching the three-phase inverter imbalance in the prior art is provided for adding a delta/Y transformer between the inverter and the three-phase unbalanced load, so that a current path can be provided for an unbalanced current generated by the three-phase unbalanced load, and the problem of the inverter output voltage imbalance is solved, but extra cost is undoubtedly increased. Aiming at the problem of voltage distortion when an inverter operates with a nonlinear load, the control method of the unbalanced nonlinear mixed load of the micro-source inverter in the prior art provides that the output voltage of the inverter is converted into a direct current quantity through a d-q rotating coordinate, then the direct current quantity is filtered, and the filtered direct current quantity is sent to a PI (proportional integral) controller, so as to achieve the purposes of tracking the output voltage with a fundamental wave reference voltage and filtering harmonic waves in the output voltage, however, the control method can only inhibit 5 and 7 harmonic waves, and when 3k harmonic waves exist, the control method is not applicable. The prior art also proposes a method for adjusting the output impedance of the inverter to be capacitive by feeding back the inductor current through an integrator, which can improve the distortion rate of the output voltage, but the selection of the optimal virtual capacitance value is tedious. The prior art also provides a droop control method for reducing the output voltage distortion rate of an inverter, which shares harmonic current by using inverters connected in parallel to achieve the purpose of reducing the output voltage distortion rate.
In summary, the above methods are all directed to the quality problem of the inverter output voltage when the load is single nonlinear or unbalanced, and do not consider the coexistence situation of nonlinear unbalanced mixed loads in the actual power distribution network.
Disclosure of Invention
In view of the above problems, an object of the present invention is to provide a method and a system for compensating for voltage imbalance and harmonics of an islanded microgrid bus, which take into account the coexistence of nonlinear and unbalanced loads in an actual microgrid.
In order to achieve the purpose, the invention adopts the following technical scheme: an island micro-grid bus voltage unbalance and harmonic compensation method comprises the following steps:
1) selecting one inverter with the largest capacity in the microgrid as a master inverter, and taking the other inverters in the microgrid as slave inverters;
2) acquiring current in a load of a microgrid, and performing component separation on the acquired load current to obtain each component of the load current;
3) generating a reference current command value from the inverter based on each component of the load current;
4) acquiring the actual output current value of the slave inverter, and making a difference between the actual output current value and the reference current command value of the slave inverter to obtain the current tracking error of the slave inverter;
5) generating a PWM (pulse-width modulation) signal after the obtained current tracking error passes through a slave inverter current inner loop controller;
6) and the slave inverter controls the turn-off of the IGBT according to the generated PWM signal, so as to control the output compensation current of the slave inverter and complete the unbalanced bus voltage and harmonic compensation of the island microgrid.
Further, the master inverter and the slave inverter in the step 1) both adopt a three-phase four-leg topology structure.
Further, the specific process of step 2) is as follows:
2.1) obtaining the load current i of the microgridoabc：
Figure BDA0002723478640000021
Wherein,
Figure BDA0002723478640000022
and
Figure BDA0002723478640000023
the components of fundamental positive sequence current, fundamental negative sequence current and zero sequence current in the load are respectively; i ishThe harmonic current effective value corresponding to the harmonic sub-harmonic; h is the harmonic frequency; n is the maximum harmonic number; k is a number, i.e. K is 1,2,3, …, K;
Figure BDA0002723478640000024
the initial phase of each harmonic current; w is the rated angular frequency of the system; t is time;
2.2) for the obtained load current ioabcCarrying out fundamental wave rotation coordinate transformation to obtain load current after fundamental wave rotation coordinate transformation:
Figure BDA0002723478640000025
wherein idIs a load current ioabcAt dqD-axis component under a rotating coordinate system; i.e. iqIs a load current ioabcAt dqA q-axis component in a rotating coordinate system; i.e. i0Is zero sequence current; theta1Is the initial phase of the fundamental positive sequence current component; theta2Is the initial phase of the fundamental negative sequence current component; thetahIs the initial phase of the harmonic current; i.e. ioa、iobAnd iocThree-phase currents in the load are respectively;
Figure BDA0002723478640000026
is zero sequence current in the load; t (theta as wt)abc/dq0For the selected fundamental wave rotation coordinate transformation, theta is the phase of the fundamental wave;
2.3) applying a load current ioabcAfter the fundamental wave rotation coordinate transformation is carried out, the fundamental wave positive sequence current in the load
Figure BDA0002723478640000027
Conversion to a direct current component, fundamental negative-sequence current in the load
Figure BDA0002723478640000028
Converting into 2 frequency multiplication components, converting harmonic current in the load into 6k harmonic, filtering by a low pass filter LPF to obtain direct current of the load current
Figure BDA0002723478640000031
2.4) direct current
Figure BDA0002723478640000032
Performing inverse transformation of the fundamental wave rotation coordinate to obtain a loadMedium fundamental positive sequence current
Figure BDA0002723478640000033
2.5) applying a load current ioabcMinus zero sequence current
Figure BDA0002723478640000034
Sum fundamental positive sequence current
Figure BDA0002723478640000035
Obtaining a fundamental negative-sequence current in a load
Figure BDA0002723478640000036
And the sum of the individual harmonic currents.
Further, the fundamental wave rotation coordinate transformation T (θ ═ wt) selected in the step 2.2) is performedabc/dq0Comprises the following steps:
Figure BDA0002723478640000037
further, the specific process of step 3) is as follows:
negative sequence current of fundamental wave in load
Figure BDA0002723478640000038
Multiplying the sum of the harmonic currents by a scaling factor khThen, the reference current is superimposed on the original fundamental wave command value of the slave inverter as the reference current command value of the slave inverter
Figure BDA0002723478640000039
Figure BDA00027234786400000310
Wherein iohIs iohIs a harmonic current in the load; m isnAnd khAll are proportionality coefficients.
Further, the proportion in the step 3)Coefficient mnAnd khThe determination principle of (2) is as follows:
Figure BDA00027234786400000311
Figure BDA00027234786400000312
wherein,
Figure BDA00027234786400000313
rated power of the main inverter;
Figure BDA00027234786400000314
rated power of each slave inverter is respectively; m is0、m1…mnThe specific coefficients are rated power of the inverters respectively; k is a radical of1、k2…khThe specific coefficients of rated power of each slave inverter are respectively;
each inverter shares fundamental current in the load according to the rated power of the inverter; harmonic current and fundamental negative sequence current components in the load are shared by each slave inverter according to the rated power of the slave inverter; and the zero sequence current in the load is shared by the fourth bridge arm of the master-slave inverter.
Further, the PWM modulation signal u in the step 5)SPWMComprises the following steps:
uSPWM＝GPR(s)(i* Labc-iLabc)
wherein G isPR(s) is a transfer function from the inverter current inner loop controller, and:
Figure BDA00027234786400000315
wherein k ispIs a proportionality coefficient; k is a radical ofvhIs the resonance coefficient at each harmonic frequency; w is achThe cut-off frequency at each subharmonic frequency for the corresponding PR adjuster;w0is the fundamental frequency; s is a complex variable.
An island microgrid bus voltage imbalance and harmonic compensation system comprising:
the inverter selecting module is used for selecting one inverter with the largest capacity in the microgrid as a master inverter and taking the other inverters in the microgrid as slave inverters;
the component separation module is used for acquiring current in a load of the microgrid and performing component separation on the acquired load current to obtain each component of the load current;
the reference current instruction generating module is used for generating a reference current instruction value of the slave inverter according to each component of the load current;
the current tracking error determining module is used for acquiring the actual output current value of the slave inverter and making a difference between the actual output current value and the reference current instruction value of the slave inverter to obtain the current tracking error of the slave inverter;
the modulation signal generation module is used for generating PWM modulation signals after the obtained current tracking errors pass through the slave inverter current inner loop controller;
and the output compensation current control module is used for controlling the turn-off of the IGBT of the slave inverter according to the generated PWM signal, further controlling the output compensation current of the slave inverter and completing the voltage unbalance and harmonic compensation of the isolated island microgrid bus.
A processor comprises computer program instructions, wherein the computer program instructions are used for realizing the steps corresponding to the island microgrid bus voltage unbalance and harmonic compensation method when being executed by the processor.
A computer readable storage medium, which stores computer program instructions, wherein the computer program instructions, when executed by a processor, are used for implementing the steps corresponding to the island microgrid bus voltage unbalance and harmonic compensation method.
Due to the adoption of the technical scheme, the invention has the following advantages: the invention fully utilizes the residual available capacity of the slave inverter, embeds the power quality control function into the slave inverter, quickly and accurately compensates harmonic waves and negative sequence current components in the load, realizes compensation control on the output voltage quality of the inverter, reduces the system cost, improves the output voltage quality of the inverter and can be widely applied to the field of micro-grid power quality control research on the premise of considering the coexistence of nonlinear and unbalanced loads in an actual power distribution network and not changing the original function of the slave inverter.
Drawings
FIG. 1 is a schematic diagram of a main inverter dual closed loop control;
FIG. 2 is a diagram of an inverter parallel equivalent circuit based on master-slave control;
FIG. 3 is a control block diagram of the slave inverter in the method of the present invention;
fig. 4 is a block diagram of the parallel overall control of the inverters in the embodiment of the present invention;
fig. 5 is a schematic diagram of the inverter operating with only a non-linear load according to the embodiment of the present invention, in which fig. 5(a) is a schematic diagram of an output voltage of the inverter, fig. 5(b) is a schematic diagram of an output current of the master inverter, and fig. 5(c) is a schematic diagram of an output current of the slave inverter;
fig. 6 is a schematic diagram of an inverter operating with only unbalanced load according to an embodiment of the present invention, where fig. 6(a) is a schematic diagram of an output voltage of the inverter, fig. 6(b) is a schematic diagram of an output current of a master inverter, and fig. 6(c) is a schematic diagram of an output current of a slave inverter;
fig. 7 is a schematic diagram of the inverter operating with the nonlinear unbalanced hybrid load in the embodiment of the present invention, where fig. 7(a) is a schematic diagram of an output voltage of the inverter, fig. 7(b) is a schematic diagram of an output current of the master inverter, and fig. 7(c) is a schematic diagram of an output current of the slave inverter.
Detailed Description
The present invention is described in detail below with reference to the attached drawings. It is to be understood, however, that the drawings are provided solely for the purposes of promoting an understanding of the invention and that they are not to be construed as limiting the invention.
As shown in fig. 1, a voltage-current double closed-loop control is adopted for the master inverter to maintain the voltage at the output terminal stable, and to act as a voltage source, so as to provide a voltage reference for other slave inverters. The essential cause of the quality reduction of the output voltage of the inverter caused by the nonlinear unbalanced hybrid load can be analyzed according to fig. 1, and it can be known from fig. 1 that:
Figure BDA0002723478640000051
wherein, UOIs the output voltage; u shapeNFor a given reference voltage; gP(s) Main inverter U0To UNA transfer function between; zofThe fundamental wave equivalent output impedance of the main inverter; i.e. iofIs the fundamental current in the load;
Figure BDA0002723478640000052
is the harmonic equivalent output impedance of the main inverter; i.e. iohIs a harmonic current in the load.
From the above equation, the cause of the quality degradation of the inverter output voltage is mainly the harmonic current i in the loadohAnd negative and zero sequence components in the fundamental current, given a reference voltage UNIs purely sinusoidal. Therefore, when a nonlinear unbalanced load is connected to the output side of the inverter, the output voltage of the inverter will be distorted and unbalanced.
As shown in FIG. 2, which is an equivalent circuit diagram of the inverter based on the master-slave control with the nonlinear unbalanced hybrid load, it can be seen that if the output voltage U is to be reducedOThe key is to reduce the output impedance Z of the inverter1Negative sequence, zero sequence and harmonic voltage drop over(s).
Example one
Based on the above description, as shown in fig. 3, the present embodiment provides an island microgrid bus voltage imbalance and harmonic compensation method, including the following steps:
1) and selecting one inverter with the largest capacity in the micro-grid as a master inverter, and using the other inverters in the micro-grid as slave inverters, wherein the master inverter and the slave inverters both adopt a three-phase four-bridge arm topological structure.
2) Obtaining a load current i in a microgridoabcAnd for the obtained load current ioabcCarrying out component separation to obtain a load current ioabcWherein the load current ioabcThe components of the method comprise fundamental positive sequence current, fundamental negative sequence current, zero sequence current and each harmonic current, and specifically comprise the following steps:
2.1) obtaining the load current i in the microgridoabc：
Figure BDA0002723478640000053
Wherein,
Figure BDA0002723478640000054
and
Figure BDA0002723478640000055
the components of fundamental positive sequence current, fundamental negative sequence current and zero sequence current in the load are respectively; i ishThe harmonic current effective value corresponding to the harmonic sub-harmonic; h is the harmonic frequency; n is the maximum harmonic number; k is a number, i.e. K is 1,2,3, …, K;
Figure BDA00027234786400000619
the initial phase of each harmonic current; w is the rated angular frequency of the system; t is time.
2.2) for the obtained load current ioabcCarrying out fundamental wave rotation coordinate transformation to obtain load current after fundamental wave rotation coordinate transformation:
Figure BDA0002723478640000061
wherein idIs a load current ioabcD-axis component in dq rotation coordinate system; i.e. iqIs a load current ioabcA q-axis component in a dq rotation coordinate system; i.e. i0Is zero sequence current; theta1Is the initial phase of the fundamental positive sequence current component; theta2Is a fundamental negative-sequence current componentThe initial phase of (1); thetahIs the initial phase of the harmonic current; i.e. ioa、iobAnd iocThree-phase currents in the load are respectively;
Figure BDA0002723478640000062
is zero sequence current in the load; t (theta as wt)abc/dq0For the selected fundamental rotating coordinate transformation, θ is the fundamental phase, and:
Figure BDA0002723478640000063
2.3) applying a load current ioabcAfter the fundamental wave rotation coordinate transformation is carried out, the fundamental wave positive sequence current in the load
Figure BDA00027234786400000620
Conversion to a direct current component, fundamental negative-sequence current in the load
Figure BDA0002723478640000064
Converting into 2 frequency multiplication components, converting harmonic current in the load into 6k harmonic, filtering by a low pass filter LPF to obtain direct current of the load current
Figure BDA0002723478640000065
2.4) direct current
Figure BDA0002723478640000066
Performing inverse transformation of the rotating coordinate of the fundamental wave to obtain the positive sequence current of the fundamental wave in the load
Figure BDA0002723478640000067
2.5) applying a load current ioabcMinus zero sequence current
Figure BDA0002723478640000068
Sum fundamental positive sequence current
Figure BDA0002723478640000069
Obtaining a fundamental negative-sequence current in a load
Figure BDA00027234786400000610
And the sum of the individual harmonic currents.
3) According to load current ioabcGenerates a reference current command value from the inverter
Figure BDA00027234786400000611
The method specifically comprises the following steps:
negative sequence current of fundamental wave in load
Figure BDA00027234786400000612
Multiplying the sum of the harmonic currents by a scaling factor khThen, the reference current is superimposed on the original fundamental wave command value of the slave inverter as the reference current command value of the slave inverter
Figure BDA00027234786400000613
Figure BDA00027234786400000614
Wherein iohIs a harmonic current in the load; m isnAnd khAre all proportionality coefficients, and mnAnd khThe determination principle of (2) is as follows:
Figure BDA00027234786400000615
Figure BDA00027234786400000616
wherein,
Figure BDA00027234786400000617
rated power of the main inverter;
Figure BDA00027234786400000618
rated power of each slave inverter is respectively; m is0、m1…mnThe specific coefficients are rated power of the inverters respectively; k is a radical of1、k2…khThe specific coefficients of rated power of each slave inverter are respectively. The inverters share fundamental positive sequence current in the load according to the rated power of the inverters, harmonic current and fundamental negative sequence current in the load are shared by the inverters according to the rated power of the inverters, and zero sequence current in the load is shared by a fourth bridge arm of the master inverter and the slave inverter.
4) Obtaining actual output current value i from inverterLabcAnd compares it with a reference current command value of the slave inverter
Figure BDA0002723478640000071
And performing subtraction to obtain the current tracking error of the slave inverter.
5) The obtained current tracking error passes through a slave inverter current inner loop controller to generate a PWM (pulse width modulation) modulation signal uSPWMWherein the PWM modulation signal uSPWMComprises the following steps:
uSPWM＝GPR(s)(i* Labc-iLabc) (8)
wherein G isPR(s) is a transfer function from the inverter current inner loop controller, and:
Figure BDA0002723478640000072
wherein k ispIs a proportionality coefficient; k is a radical ofvhIs the resonance coefficient at each harmonic frequency; w is achA cut-off frequency at each subharmonic frequency for a corresponding PR (proportional resonance) regulator; w is a0Is the fundamental frequency; s is a complex variable.
6) From the inverter on the basis of the generated PWM modulation signal uSPWMThe turn-off of an IGBT (insulated gate bipolar transistor) is controlled, so that the output compensating current of the slave inverter is controlled, the compensation control of the output voltage quality of the master inverter is realized, and the island microgrid is completedThe system comprises bus voltage unbalance and harmonic compensation, wherein tracking of each component in load current can be well achieved by adopting a multi-resonance PR controller.
The method for compensating the voltage unbalance and the harmonic of the isolated island microgrid bus is described in detail by taking 2 inverters as a specific embodiment:
as shown in fig. 4, the master inverter provides only the fundamental current component in the load, while all the harmonic currents in the load and the fundamental negative-sequence current are provided by the slave inverter, and the zero-sequence current is shared by the fourth leg of the master inverter and the slave inverter. In this embodiment, 2 inverters are taken as an example of parallel operation, and a master-slave inverter hybrid load model with nonlinear imbalance is built under a PSCAD simulation environment to verify the feasibility of the method of the present invention, wherein the master-slave inverters all adopt a three-phase four-wire system topology structure, and the conditions of voltage and current waveforms output by the master inverter and current waveforms output by the slave inverter under three working conditions of nonlinear load, unbalanced load and nonlinear imbalance hybrid load are observed through simulation, and the simulation results are respectively shown in fig. 5, fig. 6 and fig. 7.
As shown in fig. 5, for the inverter only having a non-linear load to operate, the output voltage of the inverter, the output current of the master inverter and the output current of the slave inverter are schematically shown, it can be seen that, in 0-1 s, the load voltage and the output current of the master inverter and the slave inverter are seriously distorted, and the harmonic content is large; at the time 1s, harmonic compensation is applied from the inverter, and most of the harmonic current in the load is supplied from the inverter through effective control of the inverter, so that as can be seen from fig. 5(a), the load voltage waveform is effectively improved, and the harmonic component is greatly reduced.
As shown in fig. 6, in order to operate the inverter with only unbalanced load, the output voltage of the inverter, the output current of the main inverter and the output current of the slave inverter are illustrated schematically, and it can be seen that serious imbalance occurs between the phase voltages of the load and between the phase currents output by the main inverter and the slave inverter; at time 1s, the inverter is put into unbalance compensation, as can be seen from fig. 6(c), the inverter mainly supplies the negative-sequence current in the load, and as can be seen from fig. 6(a), the unbalance between the phase voltages of the load is effectively suppressed.
As shown in fig. 7, for the inverter with the nonlinear unbalanced hybrid load to operate, the output voltage of the inverter, the output current of the master inverter and the output current of the slave inverter are schematically shown, and it can be seen that, in 0-1 s, the load voltage and the output current of the master inverter and the slave inverter are seriously distorted, and the harmonic content and the degree of unbalance are large; at the moment of 1s, compensation is input from the inverter, most of harmonic current, fundamental negative sequence and zero sequence current in the load are supplied through the slave inverter through effective control of the slave inverter, and harmonic and unbalance in load voltage and output current of the master inverter are effectively suppressed.
Example two
The embodiment provides an island microgrid bus voltage unbalance and harmonic compensation system, includes:
the inverter selecting module is used for selecting one inverter with the largest capacity in the microgrid as a master inverter and taking the other inverters in the microgrid as slave inverters;
the component separation module is used for acquiring current in a load of the microgrid and performing component separation on the acquired load current to obtain each component of the load current;
the reference current instruction generating module is used for generating a reference current instruction value of the slave inverter according to each component of the load current;
the current tracking error determining module is used for acquiring the actual output current value of the slave inverter and making a difference between the actual output current value and the reference current instruction value of the slave inverter to obtain the current tracking error of the slave inverter;
the modulation signal generation module is used for generating PWM modulation signals after the obtained current tracking errors pass through the slave inverter current inner loop controller;
and the output compensation current control module is used for controlling the turn-off of the IGBT of the slave inverter according to the generated PWM signal by the slave inverter so as to control the output compensation current of the slave inverter, realize the compensation control of the output voltage quality of the master inverter and finish the unbalanced bus voltage and harmonic compensation of the island microgrid.
EXAMPLE III
The embodiment provides a processor, which includes computer program instructions, where the computer program instructions are used for implementing the steps corresponding to the island microgrid bus voltage imbalance and harmonic compensation method described above when the computer program instructions are executed by the processor.
Example four
The embodiment provides a computer readable storage medium, which stores computer program instructions, wherein the computer program instructions, when executed by a processor, are used to implement the steps corresponding to the islanding microgrid bus voltage imbalance and harmonic compensation method.
The above embodiments are only used for illustrating the present invention, and the structure, connection mode, manufacturing process, etc. of the components may be changed, and all equivalent changes and modifications performed on the basis of the technical solution of the present invention should not be excluded from the protection scope of the present invention.

Claims (9)

1. An island micro-grid bus voltage unbalance and harmonic compensation method is characterized by comprising the following steps:
1) selecting one inverter with the largest capacity in the microgrid as a master inverter, and taking the other inverters in the microgrid as slave inverters;
2) acquiring current in a load of a microgrid, and performing component separation on the acquired load current to obtain each component of the load current;
3) according to each component of the load current, generating a reference current instruction value of the slave inverter, wherein the specific process comprises the following steps:
negative sequence current of fundamental wave in load
Figure FDA0003399077950000011
Multiplying the sum of the harmonic currents by a scaling factor khThen, the reference current is superimposed on the original fundamental wave command value of the slave inverter as the reference current command value of the slave inverter
Figure FDA0003399077950000012
Figure FDA0003399077950000013
Wherein iohIs a harmonic current in the load; m isnAnd khAll are proportionality coefficients; h is the harmonic frequency; n is the maximum harmonic number;
Figure FDA0003399077950000014
is the fundamental positive sequence current in the load;
4) acquiring the actual output current value of the slave inverter, and making a difference between the actual output current value and the reference current command value of the slave inverter to obtain the current tracking error of the slave inverter;
5) generating a PWM (pulse-width modulation) signal after the obtained current tracking error passes through a slave inverter current inner loop controller;
6) and the slave inverter controls the turn-off of the IGBT according to the generated PWM signal, so as to control the output compensation current of the slave inverter and complete the unbalanced bus voltage and harmonic compensation of the island microgrid.
2. An island microgrid bus voltage unbalance and harmonic compensation method as claimed in claim 1, characterized in that the master inverter and the slave inverter in step 1) both adopt a three-phase four-leg topology structure.
3. The islanding microgrid bus voltage unbalance and harmonic compensation method according to claim 1, characterized in that the specific process of the step 2) is as follows:
2.1) obtaining the load current i of the microgridoabc：
Figure FDA0003399077950000015
Wherein,
Figure FDA0003399077950000016
and
Figure FDA0003399077950000017
the components of fundamental positive sequence current, fundamental negative sequence current and zero sequence current in the load are respectively; i ishThe harmonic current effective value corresponding to the harmonic sub-harmonic; h is the harmonic frequency; n is the maximum harmonic number; k is a number, i.e. K is 1,2,3, …, K;
Figure FDA0003399077950000018
the initial phase of each harmonic current; w is the rated angular frequency of the system; t is time;
2.2) for the obtained load current ioabcCarrying out fundamental wave rotation coordinate transformation to obtain load current after fundamental wave rotation coordinate transformation:
Figure FDA0003399077950000021
wherein idIs a load current ioabcD-axis component in dq rotation coordinate system; i.e. iqIs a load current ioabcA q-axis component in a dq rotation coordinate system; i.e. i0Is zero sequence current; theta1Is the initial phase of the fundamental positive sequence current component; theta2Is the initial phase of the fundamental negative sequence current component; thetahIs the initial phase of the harmonic current; i.e. ioa、iobAnd iocThree-phase currents in the load are respectively;
Figure FDA0003399077950000022
is zero sequence current in the load; t (theta as wt)abc/dq0For the selected fundamental wave rotation coordinate transformation, theta is the phase of the fundamental wave;
2.3) applying a load current ioabcAfter the fundamental wave rotation coordinate transformation is carried out, the fundamental wave positive sequence current in the load
Figure FDA0003399077950000023
Conversion to a direct current component, fundamental negative-sequence current in the load
Figure FDA0003399077950000024
Converting into 2 frequency multiplication components, converting harmonic current in the load into 6k harmonic, filtering by a low pass filter LPF to obtain direct current of the load current
Figure FDA0003399077950000025
2.4) direct current
Figure FDA0003399077950000026
Performing inverse transformation of the rotating coordinate of the fundamental wave to obtain the positive sequence current of the fundamental wave in the load
Figure FDA0003399077950000027
2.5) applying a load current ioabcMinus zero sequence current
Figure FDA0003399077950000028
Sum fundamental positive sequence current
Figure FDA0003399077950000029
Obtaining a fundamental negative-sequence current in a load
Figure FDA00033990779500000210
And the sum of the individual harmonic currents.
4. An island microgrid bus voltage unbalance and harmonic compensation method as claimed in claim 3, characterized in that the fundamental wave rotating coordinate transformation T (θ ═ wt) selected in the step 2.2) isabc/dq0Comprises the following steps:
Figure FDA00033990779500000211
5. an isolated column of claim 4The island microgrid bus voltage unbalance and harmonic compensation method is characterized in that the proportionality coefficient m in the step 3)nAnd khThe determination principle of (2) is as follows:
Figure FDA00033990779500000212
Figure FDA00033990779500000213
wherein,
Figure FDA00033990779500000214
rated power of the main inverter;
Figure FDA00033990779500000215
rated power of each slave inverter is respectively; m is0、m1…mnThe specific coefficients are rated power of the inverters respectively; k is a radical of1、k2…khThe specific coefficients of rated power of each slave inverter are respectively;
each inverter shares fundamental current in the load according to the rated power of the inverter; harmonic current and fundamental negative sequence current components in the load are shared by each slave inverter according to the rated power of the slave inverter; and the zero sequence current in the load is shared by the fourth bridge arm of the master-slave inverter.
6. An island microgrid bus voltage unbalance and harmonic compensation method as claimed in claim 1, characterized in that the PWM modulation signal u in step 5) isSPWMComprises the following steps:
uSPWM＝GPR(s)(i* Labc-iLabc)
wherein G isPR(s) is a transfer function from the inverter current inner loop controller, and:
Figure FDA0003399077950000031
wherein k ispIs a proportionality coefficient; k is a radical ofvhIs the resonance coefficient at each harmonic frequency; w is achThe cut-off frequency at each subharmonic frequency for the corresponding PR adjuster; w is a0Is the fundamental frequency; s is a complex variable.
7. An island microgrid bus voltage unbalance and harmonic compensation system, comprising:
the inverter selecting module is used for selecting one inverter with the largest capacity in the microgrid as a master inverter and taking the other inverters in the microgrid as slave inverters;
the component separation module is used for acquiring current in a load of the microgrid and performing component separation on the acquired load current to obtain each component of the load current;
a reference current instruction generating module, configured to generate a reference current instruction value of the slave inverter according to each component of the load current, where the specific process is as follows:
negative sequence current of fundamental wave in load
Figure FDA0003399077950000032
Multiplying the sum of the harmonic currents by a scaling factor khThen, the reference current is superimposed on the original fundamental wave command value of the slave inverter as the reference current command value of the slave inverter
Figure FDA0003399077950000033
Figure FDA0003399077950000034
Wherein iohIs a harmonic current in the load; m isnAnd khAll are proportionality coefficients; h is the harmonic frequency; n is the maximum harmonic number;
Figure FDA0003399077950000035
is the fundamental positive sequence current in the load;
the current tracking error determining module is used for acquiring the actual output current value of the slave inverter and making a difference between the actual output current value and the reference current instruction value of the slave inverter to obtain the current tracking error of the slave inverter;
the modulation signal generation module is used for generating PWM modulation signals after the obtained current tracking errors pass through the slave inverter current inner loop controller;
and the output compensation current control module is used for controlling the turn-off of the IGBT of the slave inverter according to the generated PWM signal, further controlling the output compensation current of the slave inverter and completing the voltage unbalance and harmonic compensation of the isolated island microgrid bus.
8. A processor, characterized by comprising computer program instructions, wherein the computer program instructions when executed by the processor are used for realizing the corresponding steps of the island microgrid bus voltage unbalance and harmonic compensation method of any one of claims 1-6.
9. A computer readable storage medium having stored thereon computer program instructions, wherein the computer program instructions when executed by a processor are configured to implement the corresponding steps of the islanded microgrid bus voltage imbalance and harmonic compensation method of any one of claims 1-6.
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