CN112165318B - High-side signal-to-low side circuit, electronic equipment and motor vehicle - Google Patents

High-side signal-to-low side circuit, electronic equipment and motor vehicle Download PDF

Info

Publication number
CN112165318B
CN112165318B CN202010970380.7A CN202010970380A CN112165318B CN 112165318 B CN112165318 B CN 112165318B CN 202010970380 A CN202010970380 A CN 202010970380A CN 112165318 B CN112165318 B CN 112165318B
Authority
CN
China
Prior art keywords
mos tube
circuit
low
signal
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010970380.7A
Other languages
Chinese (zh)
Other versions
CN112165318A (en
Inventor
丁齐兵
王云
郑鲲鲲
薛静
王飞
郝炳贤
任广辉
刘建
马玫娟
张建华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Greater Bay Area Institute of Integrated Circuit and System
Original Assignee
Guangdong Greater Bay Area Institute of Integrated Circuit and System
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangdong Greater Bay Area Institute of Integrated Circuit and System filed Critical Guangdong Greater Bay Area Institute of Integrated Circuit and System
Priority to CN202010970380.7A priority Critical patent/CN112165318B/en
Publication of CN112165318A publication Critical patent/CN112165318A/en
Application granted granted Critical
Publication of CN112165318B publication Critical patent/CN112165318B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/14—Modifications for compensating variations of physical values, e.g. of temperature
    • H03K17/145—Modifications for compensating variations of physical values, e.g. of temperature in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/002—Switching arrangements with several input- or output terminals
    • H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Amplifiers (AREA)

Abstract

The application discloses a circuit, electronic equipment and motor vehicle for converting a high-side signal into a low-side signal. The circuit for converting high-side signals into low-side signals comprises: a compensation circuit and a conversion circuit; the compensation circuit is connected with the conversion circuit and is used for compensating parasitic capacitance in the conversion circuit; the compensation circuit includes: the first MOS transistor, the second MOS transistor, the third MOS transistor and the first resistor; the conversion circuit is used for converting a high-side input signal into a low-side signal and outputting the low-side signal. The parasitic capacitance generated in the circuit due to the rapid rise of the power supply voltage is compensated by the compensation circuit, so that the rise of the low-side output signal is restrained, the stability of the low-side output signal is kept, and the accuracy of a detection circuit connected with the low-side output signal is further improved.

Description

High-side signal-to-low side circuit, electronic equipment and motor vehicle
Technical Field
The application relates to the field of circuits, in particular to a circuit for converting a high-side signal into a low-side signal, electronic equipment and a motor vehicle.
Background
In the existing circuit for converting high-side signal into low-side signal, when the power supply voltage of the operational amplifier is rapidly increased, the output signal of the low side is also increased under the condition that the input signal of the high side is unchanged due to the influence of parasitic capacitance in the circuit. The raised low-side output signal can cause false alarm of the detection circuit, interfere with the detection result of the detection circuit, and cause the turn-off of the whole circuit.
In view of the foregoing, it is desirable to provide a high-side signal-to-low side circuit, electronic device, and motor vehicle that maintain stability of the low-side output signal.
Disclosure of Invention
In order to solve the problems, the application provides a circuit for converting a high-side signal into a low-side signal, electronic equipment and a motor vehicle.
In a first aspect, the present application provides a circuit for converting a high-side signal to a low-side signal, including: a compensation circuit and a conversion circuit;
the compensation circuit is connected with the conversion circuit and is used for compensating parasitic capacitance in the conversion circuit; the compensation circuit includes: the first MOS transistor, the second MOS transistor, the third MOS transistor and the first resistor;
the conversion circuit is used for converting a high-side input signal into a low-side signal and outputting the low-side signal.
Preferably, the gate end and the drain end of the first MOS tube are both connected with the gate end of the second MOS tube, the gate end is also connected with one end of the first resistor, and the source end is connected with the source end, the ground end and the conversion circuit of the second MOS tube;
the drain end of the second MOS tube is connected with the conversion circuit;
the other end of the first resistor is connected with the drain end of the third MOS tube;
and the source end of the third MOS tube is connected with the gate end of the third MOS tube and the conversion circuit.
Preferably, the conversion circuit includes: the operational amplifier, the second resistor, the third resistor, the fourth MOS tube and the fifth MOS tube;
the positive input end of the operational amplifier is connected with one end of the third resistor and the source end of the fifth MOS tube, the reverse input end of the operational amplifier is connected with the first differential input end of the high-side input signal, and the output end of the operational amplifier is connected with the gate end of the fifth MOS tube;
the other end of the third resistor is connected with a second differential input end of the high-side input signal;
the drain end of the fifth MOS tube is connected with the source end of the fourth MOS tube;
the drain end of the fourth MOS tube is connected with one end of the second resistor, the low-side signal output end and the drain end of the second MOS tube, and the gate end of the fourth MOS tube is connected with the gate end of the third MOS tube;
the other end of the second resistor is grounded.
Preferably, the substrate of the fourth MOS transistor is connected to the substrate of the third MOS transistor and the second differential input terminal of the high-side input signal.
Preferably, a power end of the operational amplifier is connected with a second differential input end of the high-side input signal, and a floating ground end is connected with a gate end of the fourth MOS tube.
Preferably, the first MOS tube and the second MOS tube are both N-type MOS tubes, and the third MOS tube is a P-type high-voltage MOS tube.
Preferably, the fourth MOS transistor is a P-type high voltage MOS transistor.
In a second aspect, the present application proposes an electronic device, including the high-side signal to low-side circuit.
Preferably, the electronic device includes: smart phones, computers, tablet computers, wearable smart devices, artificial smart devices, and car computers.
In a third aspect, the present application proposes a motor vehicle comprising said electronic device.
The application has the advantages that: the parasitic capacitance generated in the circuit due to the rapid rise of the power supply voltage is compensated by the compensation circuit, so that the rise of the low-side output signal is restrained, the stability of the low-side output signal is kept, and the accuracy of a detection circuit connected with the low-side output signal is further improved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for the purpose of illustrating preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 is a schematic diagram of a circuit module for converting high-side signals to low-side signals;
fig. 2 is a schematic circuit diagram of a high-side signal to low-side signal conversion provided in the present application.
Description of the reference numerals
101 compensation circuit 102 conversion circuit
Differential signal V1 first differential input signal of Vdiff high-side input signal
V2 second differential input signal GND ground
Supply voltage Vlow of Vhigh operational amplifier and floating ground voltage of operational amplifier
A1 operational amplifier R1 first resistor
R2 second resistor R3 third resistor
MN1 first MOS tube MN2 second MOS tube
MP_HV3 third MOS transistor MP_HV4 fourth MOS transistor
MP_5 fifth MOS transistor Vout low-side signal output end
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
In a first aspect, according to an embodiment of the present application, a circuit for converting a high-side signal to a low-side signal is provided, as shown in fig. 1, including: a compensation circuit 101 and a conversion circuit 102. The compensation circuit 101 is connected to the conversion circuit 102 for compensating parasitic capacitance in the conversion circuit 102.
The conversion circuit 102 is configured to convert a high-side input signal into a low-side signal and output the low-side signal.
As shown in fig. 2, the compensation circuit 101 includes: the MOS transistor comprises a first MOS transistor MN1, a second MOS transistor MN2, a third MOS transistor MP_HV3 and a first resistor R1. The gate end and the drain end of the first MOS tube MN1 are connected with the gate end of the second MOS tube MN2, the gate end is also connected with one end of the first resistor R1, and the source end is connected with the source end, the grounding end GND and the conversion circuit 102 of the second MOS tube MN 2. The drain end of the second MOS tube MN2 is connected with the conversion circuit 102, the other end of the first resistor R1 is connected with the drain end of the third MOS tube MP_HV3, and the source end of the third MOS tube MP_HV3 is connected with the gate end thereof and the conversion circuit 102.
As shown in fig. 2, the conversion circuit 102 includes: the operational amplifier A1, the second resistor R2, the third resistor R3, the fourth MOS tube MP_HV4 and the fifth MOS tube MP_5. The positive input end of the operational amplifier A1 is connected with one end of the third resistor R3 and the source end of the fifth MOS tube MP_5, the reverse input end is connected with the first differential input end of the high-side input signal, and the output end is connected with the gate end of the fifth MOS tube MP_5. The other end of the third resistor R3 is connected with a second differential input end of the high-side input signal; the drain end of the fifth MOS tube MP_5 is connected with the source end of the fourth MOS tube MP_HV 4; the drain end of the fourth MOS tube MP_HV4 is connected with one end of the second resistor R2, the low-side signal output end Vout and the drain end of the second MOS tube MN2, and the gate end is connected with the gate end of the third MOS tube MP_HV 3; the other end of the second resistor R2 is grounded (connected to the ground GND). The differential input signal is divided into a first differential input signal V1 and a second differential input signal V2, wherein the first differential input signal V1 is input through a first differential input terminal and the second differential input signal V2 is input through a second differential input terminal.
The substrate of the fourth MOS tube MP_HV4 is connected with the substrate of the third MOS tube MP_HV3 and the second differential input end of the high-side input signal.
The power end 1 of the operational amplifier A1 is connected with the second differential input end of the high-side input signal, and the floating ground end 2 is connected with the gate end of the fourth MOS tube MP_HV 4.
In the embodiment of the application, the first MOS transistor MN1 and the second MOS transistor MN2 are both N-type MOS transistors, and the third MOS transistor mp_hv3 is a P-type high-voltage MOS transistor. The fourth MOS tube MP_HV4 is a P-type high-voltage MOS tube.
In a second aspect, according to an embodiment of the present application, an electronic device is further provided, including the circuit for converting a high-side signal to a low-side signal.
An electronic device, comprising: smart phones, computers, tablet computers, wearable smart devices, artificial smart devices, car computers, and the like.
In a third aspect, according to an embodiment of the present application, there is also provided a motor vehicle including the above-described electronic device.
In the method, the parasitic capacitance generated in the circuit due to the rapid rise of the power supply voltage is compensated by the compensation circuit, so that the rise of the low-side output signal is restrained, the stability of the low-side output signal is kept, the accuracy of a detection circuit connected with the low-side output signal is further improved, and the false turn-off of the circuit is prevented.
The foregoing is merely a preferred embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (6)

1. A high-side signal-to-low side circuit comprising: a compensation circuit and a conversion circuit;
the compensation circuit is connected with the conversion circuit and is used for compensating parasitic capacitance in the conversion circuit; the compensation circuit includes: the first MOS transistor, the second MOS transistor, the third MOS transistor and the first resistor;
the conversion circuit is used for converting a high-side input signal into a low-side signal and outputting the low-side signal;
the gate end and the drain end of the first MOS tube are connected with the gate end of the second MOS tube, the gate end is also connected with one end of the first resistor, and the source end is connected with the source end, the grounding end and the conversion circuit of the second MOS tube;
the drain end of the second MOS tube is connected with the conversion circuit;
the other end of the first resistor is connected with the drain end of the third MOS tube;
the source end of the third MOS tube is connected with the gate end of the third MOS tube and the conversion circuit;
the conversion circuit includes: the operational amplifier, the second resistor, the third resistor, the fourth MOS tube and the fifth MOS tube;
the positive input end of the operational amplifier is connected with one end of the third resistor and the source end of the fifth MOS tube, the reverse input end of the operational amplifier is connected with the first differential input end of the high-side input signal, and the output end of the operational amplifier is connected with the gate end of the fifth MOS tube;
the other end of the third resistor is connected with a second differential input end of the high-side input signal;
the drain end of the fifth MOS tube is connected with the source end of the fourth MOS tube;
the drain end of the fourth MOS tube is connected with one end of the second resistor, the low-side signal output end and the drain end of the second MOS tube, and the gate end of the fourth MOS tube is connected with the gate end of the third MOS tube;
the other end of the second resistor is grounded;
the substrate of the fourth MOS tube is connected with the substrate of the third MOS tube and the second differential input end of the high-side input signal;
and the power end of the operational amplifier is connected with the second differential input end of the high-side input signal, and the floating ground end is connected with the gate end of the fourth MOS tube.
2. The high-side signal-to-low side circuit of claim 1, wherein the first MOS transistor and the second MOS transistor are both N-type MOS transistors, and the third MOS transistor is a P-type high-voltage MOS transistor.
3. The high-side signal-to-low side circuit of claim 1, wherein the fourth MOS transistor is a P-type high-voltage MOS transistor.
4. An electronic device comprising a high-side signal-to-low-side circuit according to any one of claims 1 to 3.
5. The electronic device of claim 4, comprising: smart phones, computers, tablet computers, wearable smart devices, artificial smart devices, and car computers.
6. A motor vehicle comprising an electronic device according to claim 5.
CN202010970380.7A 2020-09-15 2020-09-15 High-side signal-to-low side circuit, electronic equipment and motor vehicle Active CN112165318B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010970380.7A CN112165318B (en) 2020-09-15 2020-09-15 High-side signal-to-low side circuit, electronic equipment and motor vehicle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010970380.7A CN112165318B (en) 2020-09-15 2020-09-15 High-side signal-to-low side circuit, electronic equipment and motor vehicle

Publications (2)

Publication Number Publication Date
CN112165318A CN112165318A (en) 2021-01-01
CN112165318B true CN112165318B (en) 2023-07-25

Family

ID=73858555

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010970380.7A Active CN112165318B (en) 2020-09-15 2020-09-15 High-side signal-to-low side circuit, electronic equipment and motor vehicle

Country Status (1)

Country Link
CN (1) CN112165318B (en)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235738A (en) * 1992-02-21 1993-09-10 Hitachi Ltd Output buffer circuit
JPH07122990A (en) * 1993-10-27 1995-05-12 Fujitsu Ltd Output control circuit
CN1117172A (en) * 1993-06-17 1996-02-21 株式会社鹰山 Computational circuit
US6163217A (en) * 1998-11-12 2000-12-19 Fujitsu Limited Operational amplifier
CN103560760A (en) * 2013-11-13 2014-02-05 丹纳赫（上海）工业仪器技术研发有限公司 Amplification circuit and measurement device
CN104079266A (en) * 2013-03-26 2014-10-01 北京同方微电子有限公司 Analog high-order power function generation circuit used for temperature compensation of crystal oscillator
CN105048808A (en) * 2015-08-25 2015-11-11 华为技术有限公司 Voltage conversion circuit, method and polyphase parallel power supply system
CN106026616A (en) * 2016-06-15 2016-10-12 中山大学 Adaptive slope compensation circuit without capacitor structure
CN107251400A (en) * 2015-02-27 2017-10-13 高通股份有限公司 Many level switch adjuster circuits and method with finite states machine control
CN110943612A (en) * 2018-09-25 2020-03-31 深圳市华芯邦科技有限公司 Load current detection circuit and method for switching power supply converter

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235738A (en) * 1992-02-21 1993-09-10 Hitachi Ltd Output buffer circuit
CN1117172A (en) * 1993-06-17 1996-02-21 株式会社鹰山 Computational circuit
JPH07122990A (en) * 1993-10-27 1995-05-12 Fujitsu Ltd Output control circuit
US6163217A (en) * 1998-11-12 2000-12-19 Fujitsu Limited Operational amplifier
CN104079266A (en) * 2013-03-26 2014-10-01 北京同方微电子有限公司 Analog high-order power function generation circuit used for temperature compensation of crystal oscillator
CN103560760A (en) * 2013-11-13 2014-02-05 丹纳赫（上海）工业仪器技术研发有限公司 Amplification circuit and measurement device
CN107251400A (en) * 2015-02-27 2017-10-13 高通股份有限公司 Many level switch adjuster circuits and method with finite states machine control
CN105048808A (en) * 2015-08-25 2015-11-11 华为技术有限公司 Voltage conversion circuit, method and polyphase parallel power supply system
CN106026616A (en) * 2016-06-15 2016-10-12 中山大学 Adaptive slope compensation circuit without capacitor structure
CN110943612A (en) * 2018-09-25 2020-03-31 深圳市华芯邦科技有限公司 Load current detection circuit and method for switching power supply converter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
一种具有过温和短路保护的低压LDO设计;王玉胜;马强;白文娟;王子欧;;现代电子技术(22);全文 *

Also Published As

Publication number Publication date
CN112165318A (en) 2021-01-01

Similar Documents

Publication Publication Date Title
KR20190013828A (en) The overcurrent protection circuit of the display panel and its gate driver on array (GOA) circuit
US8648849B2 (en) Buffer circuit
US20190097633A1 (en) High-voltage level-shifter circuitry
US9054517B1 (en) Smart diagnosis and protection circuits for ASIC wiring fault conditions
US9762231B2 (en) Transistors configured for gate overbiasing and circuits therefrom
US20230188136A1 (en) Common-mode transient suppression protection circuit for digital isolator
US6236236B1 (en) 2.5 volt input/output buffer circuit tolerant to 3.3 and 5 volts
US20060267641A1 (en) Transmission line driver circuit
CN100481440C (en) Semiconductor device
CN112165318B (en) High-side signal-to-low side circuit, electronic equipment and motor vehicle
CN109417606B (en) Level converter capable of outputting positive and negative voltages
US20090207539A1 (en) I/o circuit
CN116470855B (en) Operational amplifier circuit, operational amplifier and linear power supply
CN219960563U (en) Common mode noise suppression circuit and digital isolator
US11894843B2 (en) Level shift circuit
CN108880233B (en) Charge pump circuit
CN113285706B (en) Voltage level conversion circuit
US10867989B2 (en) Driving circuit having electrostatic discharge protection
CN109787613B (en) Driving circuit of output stage and electronic equipment
CN108781071B (en) Square wave generating method and square wave generating circuit
CN116707516B (en) Active receiving circuit and isolation chip
CN220139232U (en) Protection circuit, voltage detection circuit, protection system and chip
US20240154408A1 (en) Semiconductor device
CN107817378B (en) Voltage detection circuit used on IO
CN112953505B (en) Push-pull output buffer with self-protection function

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB03 Change of inventor or designer information

Inventor after: Ding Qibing

Inventor after: Zhang Jianhua

Inventor after: Wang Yun

Inventor after: Zheng Kunkun

Inventor after: Xue Jing

Inventor after: Wang Fei

Inventor after: Hao Bingxian

Inventor after: Ren Guanghui

Inventor after: Liu Jian

Inventor after: Ma Meijuan

Inventor before: Ding Qibing

CB03 Change of inventor or designer information
GR01 Patent grant
GR01 Patent grant