CN112151558A - Method for active area isolation in image sensor pixel cells - Google Patents
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- 238000005516 engineering process Methods 0.000 description 14
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- 150000004767 nitrides Chemical class 0.000 description 3
- 238000003702 image correction Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
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- H01L27/14643—Photodiode arrays; MOS imagers
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Abstract
The invention provides a method for isolating active regions in an image sensor pixel unit, which realizes the switch function by arranging a grid structure between active regions to be isolated in the image sensor pixel unit, thereby realizing the electrical isolation of the active regions, avoiding the area loss caused by counter doping, reducing the breakdown risk, avoiding the increase of the interface of Si and the oxide thereof, reducing the dark current and white point in the image sensor caused by the oxide isolation and improving the performance of the image sensor.
Description
Technical Field
The invention relates to a method for active area isolation in an image sensor pixel cell.
Background
The conventional image sensor mainly includes a pixel array, a timing control module, an analog signal processing module, an analog-to-digital conversion module, and the like, wherein the pixel array is a core part for implementing a photoelectric conversion function. The pixel array is composed of a certain number of pixel units, the pixel units include, but are not limited to, a photosensitive region and peripheral circuits for signal reading, and the peripheral circuits are composed of active regions (such as MOS transistors, including, but not limited to, active regions of a transfer transistor, a row selection transistor, a reset transistor and a source follower transistor) for realizing different functions. As the size of the device is continuously reduced, the distance between the active regions is closer, and the isolation between different active regions is very important.
Fig. 1 is a schematic diagram of a prior art active region isolation method by inversion doping. Wherein, 1 is a reset transistor, 2 is a row selection transistor, 3 is a signal amplifier (source follower transistor), 4 is a charge reading region (floating diffusion region), 6 is a photoelectric signal conversion device (photodiode), 7 is a control switch transistor (transfer transistor), 8 is a signal reading region, 9 is a working voltage access region, 10 is a doping region introduced subsequently, 12 is an inversion doping region opposite to 10, and the inversion doping region 12 forms an inversion back-to-back PN junction between the charge reading region 4 and the signal reading region 8 to prevent carriers from diffusing between active regions. The method has few defects, but the required size is large, a depletion layer appears in a reverse back-to-PN junction caused by inversion doping, the area loss of an isolation region is caused, the introduced capacitance is large, the risk of PN junction breakdown is accompanied, in addition, the inversion doping isolation method can influence the subsequent doping process, the subsequent doping process is widely applied to the formation of an active region, the influence is that the subsequent doping process needs to avoid an inversion doping region and becomes narrow in a process window, the doping process of the subsequent doping region 10 cannot be self-aligned, pattern exposure needs to be additionally carried out on the isolation region, and the process difficulty is increased.
Fig. 2 is a schematic diagram illustrating an active region isolation method through an oxide insulating layer in the prior art. Similarly, 1 is a reset transistor, 2 is a row selection transistor, 3 is a signal amplifier (source follower transistor), 4 is a charge reading region (floating diffusion region), 6 is a photoelectric signal conversion device (photodiode), 7 is a control switch transistor (transfer transistor), 8 is a signal reading region, 9 is an operating voltage access region, and 10 is a doping region introduced later. Unlike the prior art of fig. 1, 11 is an oxide insulating layer region, and specifically, a trench with a certain depth is etched on a substrate and then the substrate is filled with an oxide, or the substrate Si is covered with a nitride with a designed pattern and the exposed substrate is oxidized, and then the nitride is removed, so as to realize the oxidation isolation between the charge reading region 4 and the signal reading region 8. The oxide insulating layer isolation method has the advantages of difficulty in breakdown, small size and small capacitance, and has the disadvantages of more defects, increased oxide interfaces (namely, the side wall and the bottom of the oxide insulating layer region 11 are the interfaces of Si and the oxide thereof) can generate stress, and defects are easily formed to cause electron capture, so that the dark current of the device is increased, the probability of occurrence of white spots is increased, and the performance of the device is attenuated. Furthermore, the bird's beak structure is formed if the nitride cap oxidation method is used, so that the available active area is reduced and a step occurs on the surface of the substrate.
Disclosure of Invention
The invention aims to provide a method for separating an active area in a pixel unit of an image sensor, which saves the size and the area, reduces the breakdown risk, reduces the dark current and the white point and improves the performance of the image sensor.
Based on the above consideration, the present invention provides a method for active area isolation in an image sensor pixel unit, wherein a gate structure is disposed between active areas to be isolated in the image sensor pixel unit to implement a switching function, thereby implementing electrical isolation of the active areas.
Preferably, a bias voltage is applied to the gate structure to perform a switching function, thereby achieving electrical isolation of the active region.
Preferably, the bias voltage of the gate structure for isolating the N-type active region and the bias voltage of the gate structure for isolating the P-type active region are different.
Preferably, for the N-type active region isolation, the threshold voltage is between 0V and 10V, and when the bias voltage is less than the threshold voltage, the gate structure is in an off state; when the bias voltage is greater than the threshold voltage, the gate structure is in an on state.
Preferably, for P-type active region isolation, the threshold voltage is between-10V and 0V, and when the bias voltage is greater than the threshold voltage, the gate structure is in an off state; and when the bias voltage is less than the threshold voltage, the grid structure is in an opening state.
Preferably, the doping type and concentration of the gate structure material are different, and the bias voltage of the gate structure for isolating the active region is different.
Preferably, if the doping type of the gate structure material is N-type, the larger the doping concentration is, the threshold voltage is negatively biased, and if the doping type of the gate structure material is P-type, the larger the doping concentration is, the threshold voltage is positively biased.
Preferably, the work function of the gate structure material is different, and the bias voltage of the gate structure for isolating the active region is different.
Preferably, if the work function of the gate structure material is between 4.6 and 5.2, the threshold voltage is biased positively if the work function is larger, and is biased negatively if the work function of the gate structure material is between 4.0 and 4.4.
Preferably, a charge resides on the gate structure, and the electrical isolation of the active region is achieved by the resident charge.
Preferably, the gate structure is used for isolation in the channel length direction when there is no shallow trench isolation structure in the channel width direction of the active region.
Preferably, the active region to be isolated includes: a transfer transistor, a row selection transistor, a reset transistor, and an active region of one or more of the source follower transistors.
According to the method for isolating the active regions in the pixel unit of the image sensor, the gate structures are arranged between the active regions to be isolated in the pixel unit of the image sensor to realize the switching function, so that the electrical isolation of the active regions is realized, the area loss caused by counter doping can be avoided, the breakdown risk is reduced, the increase of the interface of Si and the oxide thereof is avoided, and the dark current and the white spot in the image sensor caused by oxide isolation are reduced. In addition, the active area isolation method can be better suitable for the subsequent doping technology, the subsequently introduced doping technology is widely applied to active area formation, the area of the subsequent doping technology can be saved, the potential interference between a doping area and an adjacent doping area or an electronic storage area can be reduced by saving the area of the subsequent doping technology, the process window of the subsequent doping technology is enlarged, the subsequent doping area of the doping technology is continuous, the continuous doping area can reduce the pattern correction required by pattern exposure, and the pattern exposure is required by the subsequent doping technology, so that the device performance loss caused by improper image correction is reduced, and the image sensor performance is improved.
Drawings
Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments thereof, which proceeds with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of a prior art active region isolation method by inversion doping;
FIG. 2 is a schematic diagram of an active region isolation method by an oxide insulating layer according to the prior art;
fig. 3 is a schematic diagram of the method for active area isolation in an image sensor pixel cell according to the present invention.
In the drawings, like or similar reference numbers indicate like or similar devices (modules) or steps throughout the different views.
Detailed Description
In order to solve the above-mentioned problems in the prior art, the present invention provides a method for isolating active regions in an image sensor pixel unit, in which a gate structure is disposed between active regions to be isolated in the image sensor pixel unit to implement a switching function, thereby implementing electrical isolation of the active regions, avoiding area loss due to counter doping, reducing a breakdown risk, avoiding an increase in an interface between Si and an oxide thereof, reducing dark current and white spots in the image sensor due to oxide isolation, and improving image sensor performance.
In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof. The accompanying drawings illustrate, by way of example, specific embodiments in which the invention may be practiced. The illustrated embodiments are not intended to be exhaustive of all embodiments according to the invention. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
Fig. 3 is a schematic diagram of the method for active area isolation in an image sensor pixel cell according to the present invention. The method comprises the following steps of firstly, setting 1 as a reset transistor, setting 2 as a row selection transistor, setting 3 as a signal amplifier (source follower transistor), setting 4 as a charge reading area (floating diffusion area), setting 6 as a photoelectric signal conversion device (photodiode), setting 7 as a control switch transistor (transfer transistor), setting 8 as a signal reading area, setting 9 as a working voltage access area, and setting 10 as a doping area introduced later. Unlike the prior art, 5 is a gate structure disposed between the charge readout region 4 and the signal readout region 8, and a bias voltage is applied to the gate structure 5 through the contact 13, and the channel of the active region is controlled by the bias voltage to implement a switching function, thereby achieving electrical isolation of the active region.
Preferably, when there is no shallow trench isolation structure in the channel width direction of the active region, the gate structure 5 is used to perform isolation in the channel length direction.
In general, the bias voltage of the gate structure 5 for isolating the N-type active region and the bias voltage of the gate structure 5 for isolating the P-type active region are different.
Specifically, for the N-type active region isolation, the threshold voltage is between 0V and 10V, and when the bias voltage is less than the threshold voltage, the gate structure is in an off state; when the bias voltage is greater than the threshold voltage, the gate structure is in an on state. For P-type active region isolation, the threshold voltage is-10V to 0V, and when the bias voltage is greater than the threshold voltage, the gate structure is in a closed state; and when the bias voltage is less than the threshold voltage, the grid structure is in an opening state.
In addition, the doping type and concentration of the gate structure material are different, and the bias voltage of the gate structure for isolating the active region is different.
Preferably, if the doping type of the gate structure material is N-type, the larger the doping concentration is, the threshold voltage is negatively biased, and if the doping type of the gate structure material is P-type, the larger the doping concentration is, the threshold voltage is positively biased.
In addition, the work function of the gate structure material is different, and the bias voltage of the gate structure for isolating the active region is different.
Preferably, if the work function of the gate structure material is between 4.6 and 5.2, the threshold voltage is biased positively if the work function is larger, and is biased negatively if the work function of the gate structure material is between 4.0 and 4.4.
In other preferred embodiments, not shown, the electrical isolation of the active regions may also be achieved by the presence of charges in the gate structure 5.
According to the method for isolating the active regions in the pixel unit of the image sensor, the gate structures are arranged between the active regions to be isolated in the pixel unit of the image sensor to realize the switching function, so that the electrical isolation of the active regions is realized, the area loss caused by counter doping can be avoided, the breakdown risk is reduced, the increase of the interface of Si and the oxide thereof is avoided, and the dark current and the white spot in the image sensor caused by oxide isolation are reduced. In addition, the active area isolation method can be better suitable for the subsequent doping technology, the subsequently introduced doping technology is widely applied to active area formation, the area of the subsequent doping technology can be saved, the potential interference between a doping area and an adjacent doping area or an electronic storage area can be reduced by saving the area of the subsequent doping technology, the process window of the subsequent doping technology is enlarged, the subsequent doping area of the doping technology is continuous, the continuous doping area can reduce the pattern correction required by pattern exposure, and the pattern exposure is required by the subsequent doping technology, so that the device performance loss caused by improper image correction is reduced, and the image sensor performance is improved.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive. Furthermore, it will be obvious that the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. Several elements recited in the apparatus claims may also be implemented by one element. The terms first, second, etc. are used to denote names, but not any particular order.
Claims (12)
1. A method for active area isolation in an image sensor pixel cell,
a grid structure is arranged between active regions to be isolated in a pixel unit of the image sensor to realize a switching function, so that the electrical isolation of the active regions is realized.
2. The method of claim 1 for active area isolation in an image sensor pixel cell, wherein a bias voltage is applied across the gate structure to perform a switching function to achieve electrical isolation of the active area.
3. The method of claim 2, wherein a bias voltage of a gate structure used to isolate the N-type active region is different from a bias voltage of a gate structure used to isolate the P-type active region.
4. The method of claim 3, wherein for N-type active area isolation, the threshold voltage is between 0V and 10V, and when the bias voltage is less than the threshold voltage, the gate structure is in an off state; when the bias voltage is greater than the threshold voltage, the gate structure is in an on state.
5. The method of claim 3, wherein for P-type active area isolation, the threshold voltage is between-10V and 0V, and when the bias voltage is greater than the threshold voltage, the gate structure is in an off state; and when the bias voltage is less than the threshold voltage, the grid structure is in an opening state.
6. The method for active area isolation in an image sensor pixel cell of claim 4 or 5, wherein a doping type and a concentration of a gate structure material are different, and a bias voltage of a gate structure for isolating the active area is different.
7. The method as claimed in claim 6, wherein if the doping type of the gate structure material is N-type, the threshold voltage is negatively biased with a higher doping concentration, and if the doping type of the gate structure material is P-type, the threshold voltage is positively biased with a higher doping concentration.
8. The method for active area isolation in an image sensor pixel cell of claim 4 or 5, wherein a work function of a material of the gate structure is different and a bias voltage of the gate structure for isolating the active area is different.
9. The method of claim 8, wherein the larger the work function, the more positive the threshold voltage if the work function of the gate structure material is between 4.6 and 5.2, and wherein the smaller the work function, the less negative the threshold voltage if the work function of the gate structure material is between 4.0 and 4.4.
10. The method of claim 1 for active area isolation in an image sensor pixel cell, wherein a charge resides on the gate structure, by which electrical isolation of the active area is achieved.
11. The method of claim 1, wherein the gate structure is used for channel length direction isolation without a shallow trench isolation structure in the channel width direction of the active region.
12. The method of claim 1 for active area isolation in an image sensor pixel cell, wherein the active area to be isolated comprises: a transfer transistor, a row selection transistor, a reset transistor, and an active region of one or more of the source follower transistors.
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| CN201910575055.8A CN112151558A (en) | 2019-06-28 | 2019-06-28 | Method for active area isolation in image sensor pixel cells |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0086628A2 (en) * | 1982-02-16 | 1983-08-24 | Xerox Corporation | Photodiode array |
| US20020130348A1 (en) * | 2001-03-16 | 2002-09-19 | Tran Luan C. | 6F2 dram array, a dram array formed on a semiconductive substrate, a method of forming memory cells in a 6F2 dram array and a method of isolating a single row of memory cells in a 6F2 dram array |
| US20040092054A1 (en) * | 2002-11-12 | 2004-05-13 | Chandra Mouli | Grounded gate for reducing dark current in CMOS image sensors |
| US20090224328A1 (en) * | 2008-03-04 | 2009-09-10 | Shyh-Fann Ting | Semiconductor device |
| CN109904184A (en) * | 2019-03-25 | 2019-06-18 | 思特威(上海)电子科技有限公司 | Imaging sensor with the isolation structure for reducing dark current |
-
2019
- 2019-06-28 CN CN201910575055.8A patent/CN112151558A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0086628A2 (en) * | 1982-02-16 | 1983-08-24 | Xerox Corporation | Photodiode array |
| US20020130348A1 (en) * | 2001-03-16 | 2002-09-19 | Tran Luan C. | 6F2 dram array, a dram array formed on a semiconductive substrate, a method of forming memory cells in a 6F2 dram array and a method of isolating a single row of memory cells in a 6F2 dram array |
| US20040092054A1 (en) * | 2002-11-12 | 2004-05-13 | Chandra Mouli | Grounded gate for reducing dark current in CMOS image sensors |
| US20090224328A1 (en) * | 2008-03-04 | 2009-09-10 | Shyh-Fann Ting | Semiconductor device |
| CN109904184A (en) * | 2019-03-25 | 2019-06-18 | 思特威(上海)电子科技有限公司 | Imaging sensor with the isolation structure for reducing dark current |
Non-Patent Citations (1)
| Title |
|---|
| F.F.增田: "《计算机原理与设计》（下册）——存储与外设", 国防科技大学出版社, pages: 318 - 319 * |
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