CN112148201A

CN112148201A - Data writing method, device and storage medium

Info

Publication number: CN112148201A
Application number: CN201910559384.3A
Authority: CN
Inventors: 杜晓杰; 田永光
Original assignee: Loongson Technology Corp Ltd
Current assignee: Loongson Technology Corp Ltd
Priority date: 2019-06-26
Filing date: 2019-06-26
Publication date: 2020-12-29

Abstract

The invention provides a data writing method, a device and a storage medium, wherein the method comprises the following steps: receiving a write command input by a user, wherein the write command is used for requesting to write data to be written into a memory, and the write command comprises a write address of the data to be written; when the write address is located in a preset address field, pushing warning information, wherein the warning information is used for indicating that the write address is wrong; wherein the preset address field comprises an address range in which a target sector of the memory stores at least one network device address. The data writing method, the data writing device and the storage medium provided by the invention can solve the problem that the MAC address of the network equipment with a fixed address segment stored in the FLASH chip is randomly changed due to misoperation or the fact that the writing operation characteristic of the FLASH chip is not known when a user inputs a writing command related to the FLASH chip to a computer under the PMON in the prior art.

Description

Data writing method, device and storage medium

Technical Field

The present invention relates to computer technologies, and in particular, to a data writing method and apparatus, and a storage medium.

Background

Currently, some computers use a dedicated chipset (referred to as a "chipset") as a chipset of a computing system to provide north-south bridge functions for a processor. The bridge chip is integrated with two Gigabyte Media Access Control (GMAC) controllers, and the two GMAC controllers are connected with an external GMAC Physical layer (Physical, PHY) chip through an interface, and can be used as two network devices (also called network card devices) of a computer to realize network communication. For convenience of subsequent description, the two network devices are referred to as network device 1 and network device 2, respectively.

The bridge chip is externally connected with a FLASH chip, and the MAC addresses of two network devices of the bridge chip are stored in a fixed address section of a first Sector (Sector) of an address space of the FLASH chip. The PMON of the computer integrates 2 write commands of a FLASH chip externally connected with a bridge chip, namely a byte write command and a file write command. The byte writing command is used for writing data of one byte in the address space of the FLASH chip. And the file writing command is used for writing the data of one file in the address space of the FLASH chip. It should be understood that both the byte write command and the file write command are user-specified write addresses, i.e., the user specifies from which address of the address space of the FLASH chip the write needs to start.

In the prior art, when a user inputs a write command (for example, a byte write command or a file write command) related to a FLASH chip to a computer under a PMON, due to an operation error or an unknown characteristic of the write operation of the FLASH chip, a MAC address of a network device of a fixed address segment stored in the FLASH chip is easily changed at will (for example, the MAC address is erased, the MAC address is rewritten, etc.), and further, a situation that the computer has no MAC address or the MAC address conflicts with MAC addresses of other network devices in the same local area network occurs, resulting in a network communication failure of the computer.

Disclosure of Invention

The invention provides a data writing method, a data writing device and a storage medium, which are used for solving the problem that the MAC address of network equipment with a fixed address segment stored in a FLASH chip is randomly changed due to misoperation or incomprehensible writing operation characteristics of the FLASH chip when a user inputs a writing command related to the FLASH chip to a computer under PMON in the prior art.

A first aspect of the present invention provides a data writing method, including:

receiving a write command input by a user, wherein the write command is used for requesting to write data to be written into a memory, and the write command comprises a write address of the data to be written;

when the write address is located in a preset address field, pushing warning information, wherein the warning information is used for indicating that the write address is wrong; wherein the preset address field comprises an address range in which a target sector of the memory stores at least one network device address.

In one possible embodiment, the method further comprises:

and when the write address is not located in the preset address segment, writing the data to be written into the memory according to the write address.

In a possible implementation, the write command is a byte write command, and before pushing the warning information, the method further includes:

judging whether bytes identical to a preset value exist in the at least one network equipment address, wherein the preset value is the value of the bytes stored in the address space after the memory is erased;

and if the at least one network equipment address has bytes which are the same as the preset value, acquiring the preset address segment.

In a possible implementation manner, the write command is a byte write command, the start address of the preset address segment stores the start address of the at least one network device for the target sector, and the end address of the preset address segment stores the end address of the at least one network device for the target sector.

In a possible implementation manner, the write command is a file write command, and the preset address field is an address field of the target sector.

A second aspect of the present invention provides a data writing apparatus, comprising:

the device comprises a receiving module, a writing module and a processing module, wherein the receiving module is used for receiving a writing command input by a user, the writing command is used for requesting to write data to be written into a memory, and the writing command comprises a writing address of the data to be written;

the pushing module is used for pushing warning information when the write address is located in a preset address field, and the warning information is used for indicating that the write address is wrong; wherein the preset address field comprises an address range in which a target sector of the memory stores at least one network device address.

In a possible embodiment, the apparatus further comprises:

and the writing module is used for writing the data to be written into the memory according to the writing address when the writing address is not positioned in the preset address segment.

In one possible implementation, the write command is a byte write command, and the apparatus further includes:

a judging module, configured to judge whether a byte that is the same as a preset value exists in the at least one network device address before the pushing module pushes the warning information, where the preset value is a value of a byte stored in an address space after the memory is erased;

an obtaining module, configured to obtain the preset address segment when a byte that is the same as the preset value exists in the at least one network device address.

A third aspect of the present invention provides a data writing apparatus comprising: at least one processor and memory;

the memory stores computer-executable instructions; the at least one processor executes computer-executable instructions stored by the memory to perform the method of any of the first aspects.

A fourth aspect of the invention provides a computer readable storage medium having stored thereon program instructions which, when executed by a processor, implement the method of any of the first aspects.

According to the data writing method, the data writing device and the storage medium provided by the invention, the processor can judge whether the writing address is located in a preset address field storing the address of at least one network device according to the writing address carried by the writing command, and if the writing address is located in the preset address field, the writing command is not executed, but warning information used for indicating the writing address error is pushed. By the method, the address of the network equipment stored in the memory can be protected from being changed at will, and the problem that the MAC address of the network equipment stored in the fixed address section in the FLASH chip is changed at will due to misoperation or the fact that the writing operation characteristics of the FLASH chip are not known when a user inputs a writing command about the FLASH chip to the computer under the PMON can be solved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic diagram of a computer;

FIG. 2 is a flow chart illustrating a data writing method according to the present invention;

FIG. 3 is a schematic structural diagram of a data writing apparatus according to the present invention;

fig. 4 is a schematic structural diagram of another data writing apparatus provided in the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

A chipset refers to a group of integrated circuit chips that work together and are responsible for connecting the processor of a computer to other parts of the computer. In the computer field, the term chipset generally refers to two major motherboard chips, namely, a north bridge and a south bridge. Fig. 1 is a schematic structural diagram of a computer, and as shown in fig. 1, some computers currently use a dedicated bridge chip set (referred to as a bridge chip) as a chip set of a computing system to provide north and south bridge functions for a processor.

Media Access Control Address (MAC), also called hardware Address, is unique. Therefore, during network communications, the location of a network device is typically defined using a MAC address. Network communication failure can be caused by network devices having no MAC address or by a collision between a MAC address of a network device and MAC addresses of other network devices in the same lan.

The bridge chip is integrated with two GMAC controllers, and the two GMAC controllers are connected to an external GMAC Physical layer (PHY) chip (not shown in fig. 1) through an interface, and can be used as two network devices (also referred to as network card devices) of a computer to implement network communication of the computer. For convenience of subsequent description, the two network devices are referred to as network device 1 and network device 2, respectively.

Referring to fig. 1, the computer includes a processor, a bridge chip and a FLASH chip connected in sequence, wherein the FLASH chip is an additional external memory connected to the bridge chip for storing the MAC address and other information of the network device, compared to the prior art. Specifically, the above-mentioned bridge chip is externally connected with a FLASH chip, which may also be called a FLASH memory, and is a memory that still stores data information in a power-off state. The address space of the FLASH chip is composed of a plurality of sectors (sectors), each of which has a size of 4KB, and the memory address of each Sector is from 0x0000 to 0x0 fff. In the prior art, the MAC addresses of two network devices of a bridge chip are stored in the fixed address field of the first Sector0 of the address space of the FLASH chip. Specifically, the MAC address of network device 1 is stored in the address field of 0x0000 to 0x0005 of Sector0, and occupies 6 bytes. The MAC address of network device 2 is stored in the address field 0x0010 to 0x0015 of Sector0, and occupies 6 bytes.

The PMON is an open source code software which has the functions of a Basic Input Output System (BIOS) and a boot loader part. PMON is the "firmware" of a computer, and can be considered as a part of the computer's hardware, where the role is to initialize the hardware most fundamentally, and is the interface of the hardware with the operating system kernel. The PMON integrates 2 write commands of a FLASH chip externally connected with the bridge chip, namely a byte write command and a file write command. The byte writing command is used for writing data of one byte in the address space of the FLASH chip. And the file writing command is used for writing the data of one file in the address space of the FLASH chip. It should be understood that both the byte write command and the file write command are user-specified write addresses (i.e., the user is required to specify from which address of the address space of the FLASH chip to start writing).

The FLASH chip supports erasing according to the size of a Sector, namely an address space with the size of 4KB is erased at least each time, and the value of bytes stored in the erased address space is 0 xff. The writing operation of the FLASH chip is characterized in that new data can be written in after erasing. That is, the address space where new data is written must be the erased address space. In this document, the concepts of address space and address are equivalent, and this embodiment does not distinguish between them.

When a user inputs a byte write command to a computer under PMON and specifies that a write address of data to be written is between 0x0000 and 0x0005 or between 0x0010 and 0x0015 of Sector0, the processor does not perform an erase operation but directly performs a write operation when executing the byte write command. At this time, if the value stored in the write address on the FLASH chip is 0xff, that is, the value stored in the address space indicated by the write address at the current time is 0xff, the processor may mistakenly assume that the write address is the address after data erasure, and the processor directly executes the write operation, which results in rewriting the address of the network device stored in the FLASH chip.

For example, assume that the MAC address of network device 1 located at 0x0000-0x0005 of Sector0 is 00: 11: 22: AB: FF: 66. that is, the MAC address of the network device 1 is stored in the Sector0 of the FLASH chip, and occupies the address space of 6 bytes of the Sector 0. In other words, the MAC address of the network device 1 can be regarded as 6 groups of data, each group of data occupying one byte of address space. That is, 00 occupies one byte of address space, 11 occupies one byte of address space, 22 occupies one byte of address space, AB occupies one byte of address space, FF occupies one byte of address space, and 66 occupies one byte of address space.

In this scenario, for example, a user inputs a byte write command to the computer under PMON, and assuming that data to be written indicated by the byte write command is AC, the specified write address is 0x 0004. In this example, since the value stored at 0x0004 is 0xff (that is, the value stored at the write address 0x0004 is 0xff), at this time, the processor will consider that the write address 0x0004 is an address after data erasure, and then the processor will execute the write operation to rewrite the value stored at 0x0004 to AC, so that the MAC address of the network device 1 becomes 00: 11: 22: AB: AC: 66. if the data to be written indicated by the byte write command is AC, the specified write address is 0x 0005. In this example, since 0x0005 is stored as 0x66, it is not 0 xff; at this time, the processor may consider the write address as an address without erasing data, and in this scenario, the processor may not perform the write operation. I.e. the write failed.

That is, when the value stored in the address space corresponding to the write address specified by the byte write command is 0xff, the processor executes the byte write command, and replaces the originally stored value 0xff in the address space corresponding to the write address with the byte to be written indicated by the byte write command.

Accordingly, when a user inputs a file write command to the computer under PMON and specifies that the write address of the file to be written is located in the address field of 0x0000 to 0x0FFF of Sector0, the processor first performs an operation of erasing Sector0, which results in that the MAC address of network device 1 and the MAC address of network device 2 of the address fields of 0x0000 to 0x0015 stored in Sector0 are erased to 0 xff. After the processor finishes the operation of erasing Sector0, the processor writes the data of the file to be written into Sector0, starting from the write address specified by the file write command. At this time, if the write address of the file to be written is between 0x0000 and 0x0015, the MAC address of the network device 1 and the MAC address of the network device 2 are rewritten.

It should be appreciated that the processor described above, when performing a write operation to the FLASH chip, may perform the write operation through the bridge chip. Generally, the bridge chip executes the write operation to the FLASH chip through a Serial Peripheral Interface (SPI) controller, and thus, in some embodiments, the byte write command may also be referred to as an SPI byte write command, the file write command may also be referred to as an SPI file write command, and the SPI byte write command and the SPI file write command may be collectively referred to as an SPI write command.

It can be seen from the above description that due to the writing characteristics of the FLASH chip itself (that is, the address space for writing new data is always the erased address space, and the value stored in the erased address space is 0xFF, etc.), when a user inputs a write command for the FLASH chip to the computer, the MAC address of the network device in the fixed address segment stored in the FLASH chip is easily changed at will (the MAC address is erased, the MAC address is rewritten, etc.) due to an operation error or an ignorance of the writing operation characteristics of the FLASH chip, which further causes the computer to have no MAC address or the MAC address conflicts with the MAC addresses of other network devices in the same lan, thereby causing the network communication failure of the computer.

In view of the above-mentioned problems caused by the write characteristics of the FLASH chip itself, the present invention provides a data write-in method, wherein when executing a write-in command, the processor can determine whether the write-in address is located in a preset address segment storing an address of at least one network device according to a write-in address carried by the write-in command, and if the write-in address is located in the preset address segment, the processor does not execute the write-in command, but pushes warning information for indicating that the write-in address is incorrect. By the method, the addresses of the network equipment stored in the memory can be protected from being changed at will, and the problem that when a user inputs a write-in command about the FLASH chip into the computer, the MAC address of the network equipment of the fixed address segment stored in the FLASH chip is changed at will due to misoperation or the fact that the write-in operation characteristic of the FLASH chip is unknown can be solved. Wherein, the address of the network device is the MAC address of the network device.

The method provided by the invention can be applied to the electronic equipment comprising a memory, wherein the memory is used for storing the MAC address of the network equipment and has the following writing characteristics: the address space where new data is written must be the erased address space, and the erased address space stores a value of a preset value, which may be, for example, 0 xFF. For example, the memory may be the aforementioned FLASH chip.

Taking a FLASH chip as an example, the electronic device to which the method provided by the present invention is applied may be an electronic device (for example, a computer shown in fig. 1) that provides a north-south bridge function for a processor through a bridge chip and stores the MAC address of the network device of the bridge chip in the FLASH chip externally connected to the bridge chip. The electronic device may use PMON as "firmware" to perform the most basic initialization of the hardware of the electronic device, may use UEFI to perform the most basic initialization of the hardware of the electronic device, and may use other firmware to initialize the hardware of the electronic device. That is, the embodiment of the present invention does not limit the firmware used in the electronic device. That is to say, the method provided by the embodiment of the present invention is applicable to any electronic device using the FLASH chip, and is not listed here.

The execution main body of the data writing method provided by the invention can be a data writing device, and the data writing device can be a driving program, program code software, or a medium storing related execution codes, such as a U disk; alternatively, the data writing device may also be a physical device integrated or installed with relevant executable codes, for example, a chip, a Micro Controller Unit (MCU), a computer, or other electronic devices.

For example, the solution can be applied to a computer, the processor of which has the characteristics of high performance and low power consumption, and can be applied to a server, a high-performance computer, a low-power consumption data center, a personal high-performance computer, a high-end desktop application, a high-throughput computing application, industrial control, digital signal processing, a high-end embedded application, and the like.

The following describes the technical solution of the present invention in detail by taking a processor integrated or installed with relevant execution codes as an example, with reference to the computer structure shown in fig. 1, and with specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.

Fig. 2 is a schematic flow chart of a data writing method according to the present invention. As shown in fig. 2, the method includes:

s101, receiving a write command input by a user, wherein the write command is used for requesting to write data to be written into a memory, and the write command comprises a write address of the data to be written.

The write command may be, for example, the byte write command or the file write command. Of course, the write command may also be other types of write commands in the prior art, and details thereof are not described herein.

When the write command is a byte write command, the data to be written may be data of one byte size. When the write command is a file write command, the data to be written may be data of a file. In this scenario, the write command may further include a path where the file to be written is currently located.

The memory may be any memory having a writing feature that new data can be written after erasing, such as the FLASH chip.

S102, judging whether the write address is located in a preset address field storing the address of at least one network device. If yes, step S103 is executed, and if no, step S104 is executed.

The preset address field comprises an address range in which a target sector of the memory stores at least one network equipment address, namely, the target sector is a sector in which the network equipment address is stored in the FLASH chip. The predetermined address field may be specifically determined according to an address of at least one network device in the computer in the target sector and a writing characteristic of the memory.

Taking a memory as a FLASH chip as an example, if the write command is a byte write command, the start address of the preset address segment may store the start address of the at least one network device for a target sector, and the end address of the preset address segment may store the end address of the at least one network device for the target sector. Alternatively, the start address of the preset address segment may be smaller than the start address of the target sector for storing the at least one network device, and the end address of the preset address segment may be larger than the end address of the target sector for storing the at least one network device.

And if the write-in command is a file write-in command and the FLASH chip is erased according to the size of the sector, the preset address segment is the address segment of the target sector. Or, the preset address field includes an address field of a target sector. It should be understood that, if the FLASH chip is erased according to the block size, when the write command is a file write command, the preset address field is an address field of a block in which the target sector is located, or the preset address field includes an address field of a block in which the target sector is located. If the FLASH chip is erased according to the size of the whole piece, when the write-in command is a file write-in command, the preset address field is the address field of the piece where the target sector is located, or the preset address field comprises the address field of the piece where the target sector is located.

Assume that the MAC address of network device 1 is stored in the address field of 0x0000 to 0x0005 of Sector0 of the memory, occupying 6 bytes. The MAC address of network device 2 is stored in the address field 0x0010 to 0x0015 of Sector0 in the memory, and also occupies 6 bytes. Taking the FLASH chip as an example, if the write command is a byte write command, the predetermined address segment may be 0x0000 to 0x0015 of Sector 0. If the write command is a file write command and the FLASH chip is erased according to the size of the Sector, the predetermined address field may be, for example, 0x0000 to 0x0fff of Sector 0.

Optionally, in some embodiments, when the write command is a byte write command, the processor may further determine whether a byte that is the same as a preset value exists in the at least one network device address, where the preset value is a value of a byte stored in an address space after the memory is erased. If the at least one network device address has the byte which is the same as the preset value, the processor acquires the preset address segment again, and performs the judgment of the step S102 to determine whether the write address is located in the preset address segment in which the address of the at least one network device is stored.

If there is no byte in the at least one network device address that is the same as the preset value, the processor may process the write command according to a processing manner of an existing byte write command. That is, it is determined whether or not a write address designated by a write command is an address from which data has been erased, and if so, the write command is executed, and if not, the write command is not executed. At this time, since there is no byte with the same preset value in the at least one network device address, even if the write address specified by the write command falls within the address range in which the address of the network device is stored, the address of the network device is not rewritten.

S103, pushing warning information, wherein the warning information is used for indicating that the writing address is wrong.

When the write address specified by the write command input by the user is located in the preset address field storing the address of at least one network device, the processor does not execute the write command any more, but pushes warning information to inform the user that the write address is wrong. By the method, the problem that the address of the network equipment stored in the memory is changed at will can be avoided, and the problem that the network communication of the computer fails due to the change of the MAC address of the network equipment can be further avoided.

Optionally, in some embodiments, the warning information may also be used to instruct a user to rewrite a write address of the data to be written. That is, the warning information may further include a command line enabling the user to re-input a write address of data to be written.

And S104, writing the data to be written into the memory according to the write address.

Taking the memory as a FLASH chip as an example, when the write address specified by the write command input by the user is not located in the preset address segment storing the address of at least one network device, the foregoing process about how to write the data to be written according to the write command (byte write command or file write command) in the prior art can be referred to.

The data writing method provided by the present invention is explained by a specific example as follows:

taking the memory as a FLASH chip as an example, assume that the MAC address of the network device 1 is stored in the address field of 0x0000 to 0x0005 of Sector0 of the FLASH chip, and occupies 6 bytes. The MAC address of the network device 2 is stored in the address field 0x0010 to 0x0015 of Sector0 of the FLASH chip, and also occupies 6 bytes.

If the write command is a byte write command and the preset address field is 0x0000 to 0x0015 of Sector0, in this scenario, when the processor receives a byte write command input by a user under PMON, if the write address specified by the byte write command is located between 0x0000 and 0x0015 of Sector0, for example, 0x0001 of Sector0, the processor will refuse to execute the write command, and prompt the user of a write address error through a warning message, and prompt the user of rewriting the write address. If the write address specified by the byte write command is not located in 0x0000 to 0x0015 of Sector0, e.g., 0x0016 of Sector0, the processor performs the write operation according to the conventional write flow. For example, the processor first determines whether the value stored at the write address is 0xff, if so, performs the write operation, and if not, denies execution of the write command.

If the write command is a file write command, the preset address field is 0x0000 to 0x0FFF of Sector0, and the FLASH chip is erased according to the Sector size, in this scenario, when the processor receives the file write command input by the user under the PMON, if the write address specified by the file write command is located between 0x0000 to 0x0FFF of Sector0, for example, 0x0001 of Sector0, the processor will refuse to execute the write command, and prompt the user of a write address error through a warning message, and prompt the user of rewriting the write address. If the write address specified by the file write command is not located in 0x0000 to 0x0fff of Sector0, e.g., located in another Sector, the processor will perform the write operation according to the existing write flow. For example, the processor performs an erase operation of a sector and then performs a write operation according to a write address.

By the mode, the address of the network equipment stored in the Sector0 of the FLASH chip can be protected from being changed at will, the problem that the address of the network equipment stored in the FLASH chip is changed at will can be avoided, and the problem that network communication of a computer fails due to the fact that the MAC address of the network equipment is changed can be further avoided.

According to the data writing method provided by the invention, the processor can judge whether the writing address is located in a preset address field storing the address of at least one network device according to the writing address carried by the writing command, and if the writing address is located in the preset address field, the writing command is not executed, but warning information used for indicating the writing address error is pushed. By the method, the address of the network equipment stored in the memory can be protected from being changed at will, and the problem that the MAC address of the network equipment stored in the fixed address section in the FLASH chip is changed at will due to misoperation or the fact that the writing operation characteristics of the FLASH chip are not known when a user inputs a writing command about the FLASH chip to the computer under the PMON can be solved.

It should be understood that although the above embodiments all describe and describe how to protect the addresses of the network devices stored in the memory from being changed at will, the methods provided by the embodiments of the present invention are described and illustrated. However, it will be appreciated by those skilled in the art that the above embodiments may also be applied to protect any data stored in the memory from being altered at will. In this scenario, the preset address segment may be determined according to an address space where data to be protected is located, and the implementation manner is similar, which is not described herein again.

Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.

Fig. 3 is a schematic structural diagram of a data writing device according to the present invention. The data writing device may implement part or all of the processor through a combination of software and/or hardware, for example, the data writing device may be a chip on the processor, or the data writing device may be the processor, etc.

As shown in fig. 3, the data writing apparatus may include: a receiving module 11 and a pushing module 12. Wherein the content of the first and second substances,

a receiving module 11, configured to receive a write command input by a user, where the write command is used to request to write data to be written into a memory, and the write command includes a write address of the data to be written;

a pushing module 12, configured to push warning information when the write address is located in a preset address segment, where the warning information is used to indicate that the write address is incorrect; wherein the preset address field comprises an address range in which a target sector of the memory stores at least one network device address.

For example, when the write command is a byte write command, the start address of the preset address segment stores the start address of the at least one network device for the target sector, and the end address of the preset address segment stores the end address of the at least one network device for the target sector. And when the write-in command is a file write-in command, the preset address field is the address field of the target sector.

With continued reference to fig. 3, optionally, in some embodiments, the apparatus may further include:

and the writing module 13 is configured to write the data to be written into the memory according to the writing address when the writing address is not located in the preset address segment.

With reference to fig. 3, optionally, in some embodiments, when the write command is a byte write command, the apparatus may further include:

a determining module 14, configured to determine, before the pushing module 12 pushes the warning information, whether a byte that is the same as a preset value exists in the at least one network device address, where the preset value is a value of a byte stored in an address space after the memory is erased;

an obtaining module 15, configured to obtain the preset address segment when a byte that is the same as the preset value exists in the at least one network device address.

The data writing device provided by the invention can execute the method embodiment, and the realization principle and the technical effect are similar, and are not described again.

Fig. 4 is a schematic structural diagram of another data writing apparatus provided in the present invention. As shown in fig. 4, the data writing apparatus may include: at least one processor 21 and a memory 22. Fig. 4 shows a data writing apparatus as an example of a processor, in which,

and a memory 22 for storing a program. In particular, the program may include program code comprising computer operating instructions. The memory 22 may comprise high-speed RAM memory, and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.

The processor 21 is configured to execute the computer-executable instructions stored in the memory 22 to implement the data writing method in the foregoing embodiments, and the implementation principle and the technical effect are similar, and are not described herein again.

The processor 21 may be a Central Processing Unit (CPU), an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits configured to implement embodiments of the present invention.

Alternatively, in a specific implementation, if the communication interface, the memory 22 and the processor 21 are implemented independently, the communication interface, the memory 22 and the processor 21 may be connected to each other through a bus and perform communication with each other. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, or the like. The buses may be divided into address buses, data buses, control buses, etc., but do not represent only one bus or one type of bus.

Alternatively, in a specific implementation, if the communication interface, the memory 22 and the processor 21 are integrated on a chip, the communication interface, the memory 22 and the processor 21 may complete the same communication through an internal interface.

The present invention also provides a computer-readable storage medium, which may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes. Specifically, the computer-readable storage medium stores therein program instructions for the method in the above-described embodiment.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method of writing data, the method comprising:

2. The method of claim 1, further comprising:

3. The method of claim 1 or 2, wherein the write command is a byte write command, and wherein before the pushing the warning information, the method further comprises:

4. The method according to claim 1 or 2, wherein the write command is a byte write command, the start address of the preset address segment stores the start address of the at least one network device for the target sector, and the end address of the preset address segment stores the end address of the at least one network device for the target sector.

5. The method according to claim 1 or 2, wherein the write command is a file write command, and the predetermined address field is an address field of the target sector.

6. A data writing apparatus, characterized in that the apparatus comprises:

7. The apparatus of claim 6, further comprising:

8. The apparatus of claim 6 or 7, wherein the write command is a byte write command, the apparatus further comprising:

9. A data writing apparatus, comprising: at least one processor and memory;

the memory stores computer-executable instructions; the at least one processor executes computer-executable instructions stored by the memory to perform the method of any of claims 1-5.

10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored therein program instructions, which when executed by a processor, implement the method of any one of claims 1-5.