CN112134659B - Error recovery system supporting FDIR function - Google Patents

Abstract

The invention discloses an error recovery system supporting an FDIR function, which is arranged in a data link layer of each SpaceFobore node; the system comprises a master control state machine, a broadcast error recovery channel, a data error recovery channel and an FCT error recovery channel; the main control state machine is used for carrying out state control on the broadcast error recovery channel, the data error recovery channel and the FCT error recovery channel; the broadcast error recovery channel is used for carrying out normal number sending backup, correct confirmation clearing, error confirmation clearing and retransmission on the broadcast data according to the state of the main control state machine; the data error recovery channel is used for backing up the normal number of common data, correctly confirming and clearing, and incorrectly confirming and clearing and retransmitting according to the state of the main control state machine; the FCT error recovery channel is used for backing up the normal number of FCT data, correctly confirming and clearing, and carrying out error confirmation and clearing and resending according to the state of the main control state machine.

Description

Error recovery system supporting FDIR function

Technical Field

The invention relates to the field of aerospace engineering, in particular to an FDIR function applied to SpaceFobore nodes in an aerospace bus network, and particularly relates to an error recovery system supporting the FDIR function.

Background

With the continuous development of the aerospace technology, the complexity of the aerospace task is improved, and the aerospace data is developed in the large-scale, diversified and high-speed directions. Traditional interconnection buses such as 1553B bus, CAN bus and RS485 bus are more and more difficult to meet the current and future aerospace data processing requirements. The ESA provides a novel SpaceFobore internet bus protocol, supports point-to-point transmission and routing networking, and has a serial transmission rate of up to 6.25Gbps. Meanwhile, spaceFobore provides a virtual channel mechanism, so that data with different transmission requirements can be transmitted in a classified manner; providing QoS (Quality of Service ) mechanism, providing different priority dispatch service for different types of data; an FDIR (Fault Detection, isolation and Recovery) mechanism is provided, so that error recovery can be timely performed on transmitted data, and reliable guarantee is provided for data transmission. Due to the above characteristics of SpaceFibre, customized QoS service and reliable transmission guarantee can be provided for data transmission, and the SpaceFibre interconnection bus becomes a research hotspot.

The FDIR is a function which is important as a SpaceFobore node, the error recovery buffer is used for backing up the transmitted data, meanwhile, the backup is cleared when the data of the opposite party is received correctly, the backup data is retransmitted when the data of the opposite party is received incorrectly, and reliable guarantee is provided for data transmission. The data that SpaceFobore needs to be guaranteed are of three types: broadcast Data (BC), flow control words (FCT), normal Data (Data), the transmission priorities of the three types of Data are: BC > FCT > Data. The three types of data are numbered sequentially according to the transmission sequence when transmitted, CRC checksum is generated according to the corresponding data format, and framing is performed. After receiving the data, the opposite receiving node sends an acknowledgement to the local node: if the opposite node receives correctly, sending correct Acknowledgement (ACK) to the local node, wherein the ACK carries a data sequence number SEQ which is successfully received by the opposite node, and then the local node clears the data backup which is smaller than or equal to SEQ; if the opposite node receives errors, the opposite node sends error acknowledgement NACK to the local node, wherein the NACK carries the data sequence number SEQ which the opposite node has successfully received, various data backups smaller than or equal to SEQ are cleared locally, and then the data backups larger than SEQ in the buffer are retransmitted. During retransmission, all kinds of Data need to be retransmitted according to the priority of the Data, namely, all broadcasting Data BC is retransmitted firstly, then all FCT Data is retransmitted, and finally all common Data are retransmitted. Meanwhile, during retransmission, the sequence numbers need to be reordered and the checksum framing is re-checked.

In the whole error retransmission process, the stored data types are more, and the retransmission rule is more bit-complicated. The design of the error recovery cache structure affects the efficiency of retransmission, and the control algorithm of retransmission is key to implementing the FDIR function. A reasonable error recovery system and retransmission can provide efficient retransmission recovery efficiency of FDIR. Corresponding technical schemes are lacking at present.

Disclosure of Invention

The present invention aims to overcome the above drawbacks, and provides an error recovery system supporting FDIR function, which is disposed in each spacefibe node data link layer; the system comprises a master control state machine, a broadcast error recovery channel, a data error recovery channel and an FCT error recovery channel;

the main control state machine is used for carrying out state control on the broadcast error recovery channel, the data error recovery channel and the FCT error recovery channel;

the broadcast error recovery channel is used for carrying out normal number sending backup, correct confirmation clearing, error confirmation clearing and retransmission on the broadcast data according to the state of the main control state machine;

the data error recovery channel is used for backing up the normal number of common data, correctly confirming and clearing, and incorrectly confirming and clearing and retransmitting according to the state of the main control state machine;

The FCT error recovery channel is used for backing up the normal number of FCT data, correctly confirming and clearing, and carrying out error confirmation and clearing and resending according to the state of the main control state machine.

As an improvement of the above system, when the data backup and data transmission of the local node are performed in parallel and without delay; the main control state machine is in a normal number sending backup state;

when the local node receives the ACK, the main control state machine enters an ACK processing state; each error recovery channel can independently clear the data backup which is less than or equal to SEQ in each backup, wherein SEQ is the successfully received sequence number carried in ACK;

when the local node receives NACK, the main control state machine enters a NACK processing state; each error recovery channel firstly enters a data clearing state, and each error recovery channel can clear data backups which are less than or equal to SEQ in respective backups simultaneously, wherein SEQ is a sequence number which is carried in NACK and is successfully received; then entering a Data retransmission state, retransmitting the broadcast information firstly, generating a broadcast retransmission end signal BC_end_done after the retransmission is finished, retransmitting the FCT control word, generating an FCT retransmission end signal FCT_end_done after the retransmission is finished, retransmitting the Data control word finally, and generating a Data retransmission end signal data_end_done after the retransmission is finished; and after the data retransmission of each path of error recovery channel is finished, the main control state machine is restored to the normal number of transmission backup state, and the retransmission operation is finished.

As an improvement of the above system, the broadcast error recovery channel includes: a dual-port broadcast cache RAM, a broadcast address FIFO and a broadcast retransmission control state machine; the broadcast address FIFO is FWFFT type;

the broadcast cache RAM is used for storing original broadcast frame backup data sent by the broadcast framing module and retransmitted broadcast frame backup data;

the broadcast address FIFO is used for carrying out address identification record on original broadcast frame backup data and carrying out address identification record on repeated broadcast frame backup data; the specific process of the broadcast address FIFO for carrying out address identification recording on the original broadcast frame backup data is as follows:

when the broadcast cache RAM writes one word, the write pointer wr_ptr is added with 1; when writing to the broadcast frame end EBF, identifying the frame storage position; since the broadcasting frame tail consists of 4 bytes, the EBF character, the state STATUS, the broadcasting frame serial number BC_seq and the check code CRC are sequentially arranged from the lower position to the upper position; constructing an address identifier addr= { alter, wr_ptr, BC_seq } of a broadcast frame, and writing the corresponding address identifier into a broadcast address FIFO while writing the frame tail of the broadcast frame into the RAM; the alter is used as a retransmission control identifier and initialized to 0, and the alter is overturned once for each retransmission;

And the broadcast retransmission control state machine is used for clearing the confirmed broadcast frame backup data when the main control state machine enters the ACK state, clearing the confirmed broadcast frame backup data when the main control state machine enters the NACK state, and retransmitting the unacknowledged broadcast frame backup data by adopting a retransmission control algorithm.

As an improvement of the above system, when the master state machine enters the ACK state, the specific processing procedure of the broadcast retransmission control state machine includes:

step 101) the broadcast error recovery channel enters a broadcast backup clearing state from a waiting state, reads an address identifier of a broadcast address FIFO, acquires a minimum sequence number BC_seq=addr [7:0] of an unacknowledged broadcast frame in a broadcast cache RAM, and a RAM write address EBF_wr_ptr=addr [ wr_ptr ] of a frame tail of the broadcast frame;

step 102) comparing the SEQ carried in the ACK with the BC_seq of the output port of the broadcast address FIFO, wherein the BC_seq is the serial number of the first unrecovered broadcast frame, when BC_seq < = SEQ, reading out the address identification in the broadcast address FIFO, and simultaneously updating the read pointer, so that rd_ptr = EBF_wrptr+1, namely the read pointer points to the frame head of the next broadcast frame, and then the broadcast frame data and the backup thereof are simultaneously cleared; the broadcast buffer RAM normally receives the broadcast frames being transmitted;

Step 103) goes to step 102) until bc_seq > SEQ, that is, the remaining unacknowledged broadcast frames in the broadcast buffer RAM are cleared, and the broadcast error recovery channel returns to the waiting state after the clearing is completed.

As an improvement of the above system, when the master state machine enters the NACK state, the specific processing procedure of the broadcast retransmission control state machine includes:

step 201), the broadcast error recovery channel enters a broadcast backup clearing state from a waiting state, reads the address identifier of a broadcast address FIFO, acquires the minimum sequence number BC_seq=addr [7:0] of the unacknowledged broadcast frame in the broadcast cache RAM, and the RAM write address EBF_wr_ptr=addr [ wr_ptr ] of the frame end of the broadcast frame;

step 202) comparing the SEQ carried in NACK with BC_seq of the output port of the broadcast address FIFO, wherein BC_seq is the serial number of the first broadcast frame which is not recovered, when BC_seq < = SEQ, reading out the address identification in the broadcast address FIFO, and updating the read pointer at the same time, so that rd_ptr = EBF_wrptr+1, namely the read pointer refers to the frame head of the next broadcast frame, and after the broadcast frame which is being transmitted is backed up, the broadcast buffer RAM does not receive normal broadcast backup any more;

step 203) go to step 202) until bc_seq > SEQ, i.e. the remaining unacknowledged broadcast frames in the broadcast buffer RAM are cleared, then the broadcast error recovery channel enters a retransmission state, and the alter retransmission control symbol is inverted;

Step 204) a retransmission application is provided for the broadcast framing module, after receiving an enabling signal of the broadcast framing module, a broadcast cache RAM is read, rd_ptr=rd_ptr+1 is sent to the broadcast framing module for frame re-framing until the end of the broadcast frame is read; simultaneously, the broadcasting frame of the broadcasting frame re-framing module is backed up, the retransmitted broadcasting frame is written into a broadcasting buffer RAM, and simultaneously, when the frame is written into the tail of the broadcasting frame, a new address mark addr= { alter, wr_ptr, BC_seq } is constructed and written into a broadcasting address FIFO;

step 205) reading the output Addr of the broadcast address FIFO, if the highest bit of Addr is the same as the current alter retransmission controller, indicating that the broadcast buffer RAM is all the retransmitted broadcast frame backup data, and the original broadcast frame backup data is all retransmitted, and after the retransmission process is finished, returning the broadcast error recovery channel to the waiting state and generating a bc_recovery_done indication signal; otherwise, if the broadcast frames in the broadcast buffer RAM are still not retransmitted, the broadcast error recovery channel jumps to the retransmission state, and the step 204 is entered.

As an improvement of the above system, the data error recovery channel includes: a dual-port data cache RAM, a data address FIFO and a data retransmission control state machine; the data address FIFO is FWFFT;

The data buffer RAM is used for storing the original data frame backup data sent by the data framing module and the retransmitted data frame backup data;

the data address FIFO is used for carrying out address identification record on the original data frame backup data and carrying out address identification record on the retransmitted data frame backup data; the specific process of address identification recording of the original data frame backup data by the data address FIFO is as follows:

when the data cache RAM writes one word, the write pointer wr_ptr is added with 1; when writing to the data frame end EDF, identifying the frame storage position; since the frame tail EDF consists of 4 bytes, the EDF characters, the serial number data_seq of the Data frame and the 16-bit check code CRC are sequentially arranged from the lower bit to the upper bit; constructing an address identifier addr= { alter, wr_ptr, data_seq } of a Data frame, and writing the corresponding address identifier into a Data address FIFO while writing the frame tail of the Data frame into the RAM; the alter is used as a retransmission control identifier and initialized to 0, and the alter is overturned once for each retransmission;

and the data retransmission control state machine is used for clearing the confirmed data frame backup data when the main control state machine enters the ACK state, clearing the confirmed data frame backup data when the main control state machine enters the NACK state, and retransmitting the unacknowledged data frame backup data by adopting a retransmission control algorithm.

As an improvement of the above system, when the master control state machine enters the ACK state, the specific processing procedure of the data retransmission control state machine is as follows:

step 301), the Data error recovery channel enters a Data backup clearing state from a waiting state, reads the address identifier of the Data address FIFO, and obtains the minimum serial number data_seq=addr [7:0] of the unacknowledged Data frame in the current Data error recovery buffer, and the RAM write address edf_wr_ptr=addr [ wr_ptr ] of the frame end of the Data frame;

step 302) comparing the SEQ carried in the ACK with the data_seq of the output port of the Data address FIFO, wherein the data_seq is the sequence number of the first Data frame which is not recovered, when the data_seq < = SEQ, reading the address identifier in the Data address FIFO, and updating the read pointer at the same time, so that the rd_ptr = edf_wr_ptr+1, namely the read pointer points to the frame head of the next Data frame, and the Data frame Data and the backup thereof are simultaneously cleared; the data buffer RAM normally receives the data frame being transmitted;

step 303) go to step 302) until data_seq > SEQ, i.e. the Data frames remain unacknowledged in the Data cache RAM; the data error recovery channel then returns to the wait state.

As an improvement of the above system, when the master control state machine enters the NACK state, the specific processing procedure of the data retransmission control state machine is as follows:

Step 401), the Data error recovery channel enters a Data backup clearing state from a waiting state, reads the address identifier of the Data address FIFO, and obtains the minimum serial number data_seq=addr [7:0] of the unacknowledged Data frame in the current Data error recovery buffer, and the RAM write address edf_wr_ptr=addr [ wr_ptr ] of the frame end of the Data frame;

step 402) comparing the SEQ carried in NACK and the data_seq of the output port of the Data address FIFO, wherein the data_seq is the serial number of the first Data frame which is not recovered, when data_seq < = SEQ, reading the address identifier in the Data address FIFO, and updating the read pointer at the same time, so that rd_ptr = edf_wr_ptr+1, that is, the read pointer points to the frame head of the next Data frame, and then the Data frame Data and the backup thereof are cleared at the same time; after the data frame being transmitted is backed up, the data cache RAM does not receive normal data backup any more;

step 403) go to step 402) until data_seq > SEQ, i.e. the Data frame remaining unacknowledged in the Data buffer RAM, the Data error recovery channel enters a retransmission state and the alter retransmission control symbol is inverted;

step 404) if the retransmission of the broadcast frame and the FCT control word is finished, a retransmission application is provided to the data framing module, after receiving the enabling signal of the data framing module, the data buffer RAM is read, rd_ptr=rd_ptr+1 is sent to the data framing module for re-framing until the end of the data frame is read; simultaneously, backing up the Data frames of the Data framing module, writing the retransmitted Data frames into a Data cache RAM, and simultaneously constructing a new address identifier addr= { alter, wr_ptr, data_seq } and writing into a Data address FIFO when writing into the frame tail of the Data frames;

Step 405) reading the output Addr of the Data address FIFO, if the highest bit of Addr is the same as the current alter retransmission controller, indicating that the Data buffer RAM is all the retransmitted Data frame backup Data, and that the original Data frame backup Data is all retransmitted, ending the retransmission process, returning the Data error recovery channel to the waiting state, and generating a data_recovery_done indication signal; otherwise, the data frame backup is not performed in the data buffer RAM, and the data error recovery channel jumps back to the retransmission state, and the step 404 is entered.

As an improvement of the above system, the FCT error recovery channel includes: an FCT error recovery cache FIFO and an FCT retransmission control state machine; the FCT error recovery cache FIFO is FWFT type;

the FCT error recovery cache FIFO is used for storing original FCT backup data sent by the FCT generation module and storing retransmitted FCT backup data, wherein FCT_seq=FCT [23:16] can be obtained according to the FCT control word format; an alter retransmission controller is required in FCT retransmission control, and when valid FCT data is backed up, a new FCT format is constructed: new_FCT= { alter, FCT }; initializing an alter retransmission control symbol to 0, and turning over once per retransmission of the alter;

And the FCT retransmission control state machine is used for clearing the confirmed FCT backup data when the main control state machine enters the ACK state, and retransmitting the unacknowledged FCT backup by adopting a retransmission control algorithm after clearing the confirmed FCT backup data when the main control state machine enters the NACK state.

As an improvement of the above system, when the master control state machine enters the ACK state, the specific implementation process of the FCT retransmission control state machine is as follows:

step 501), the FCT error recovery channel enters the FCT backup clearing state from the waiting state, reads the output port of the FCT error recovery cache FIFO, and obtains the minimum sequence number fct_seq=fifo_out [23:16] of the unacknowledged FCT in the current FCT error recovery cache FIFO;

step 502) comparing the SEQ in the ACK with the fct_seq of the FCT error recovery cache output port, when fct_seq < = SEQ, indicating that FCTs in the FCT error recovery cache FIFO still have successfully acknowledged need to be cleared, enabling fifo_rd=1, reading out all FCTs making fct_seq < = SEQ and discarding, then the original FCT backup data is cleared, and the FCT cache normally receives the FCT being transmitted;

step 503) goes to step 502) until fct_seq > SEQ, i.e. the FCT error recovery cache FIFO has an unacknowledged FCT left, and after clearing, the FCT error recovery channel returns to the waiting state.

As an improvement of the above system, when the master control state machine enters the NACK state, the specific implementation procedure of the FCT retransmission control state machine is as follows:

step 601) the FCT error recovery channel enters a FCT backup clearing state from a waiting state, reads the output port of the FCT error recovery cache FIFO, and obtains the minimum sequence number fct_seq=fifo_out [23:16] of the unacknowledged FCT in the current FCT error recovery cache FIFO;

step 602) comparing the SEQ in NACK with the FCT_seq of the FCT error recovery cache output port, when FCT_seq < = SEQ, indicating that the FCT in the FCT error recovery cache FIFO still needs to be cleared after successful confirmation, enabling FIFO_rd=1, reading out all FCTs with FCT_seq < = SEQ and discarding, and clearing original FCT backup data; after the FCT which is being sent is backed up, the FCT error recovery cache FIFO does not receive normal data backup any more;

step 603) go to step 602) until fct_seq > SEQ, i.e. the FCT error recovery cache FIFO has an unacknowledged FCT left, then the FCT error recovery channel enters a retransmission state and the alter retransmission control symbol is inverted;

step 604), if the retransmission of the broadcast frame is finished, a retransmission application is provided to the FCT generation module, and after receiving the enabling signal of the FCT generation module, the FCT error recovery cache FIFO is read and sent to the FCT generation module for regeneration; meanwhile, backup is carried out on the FCT data regenerated by the FCT generating module, a New FCT backup format New_FCT= { alter and FCT }, and the New FCT backup format New_FCT= { alter and FCT } is written into an FCT error recovery cache FIFO;

Step 605) when the most significant bit of the data output by the output port of the FCT error recovery cache FIFO is the same as the current alter retransmission controller, indicating that the FCT error recovery cache FIFO is full of retransmitted FCT backups, the original FCT is all retransmitted, and after the retransmission process is finished, returning the FCT error recovery channel to a waiting state and generating an fct_recovery_done indication signal; otherwise, indicating that there are unrepeated FCT backups in the FCT error recovery cache FIFO, the FCT error recovery channel jumps to the resend state, and proceeds to step 604).

The invention has the advantages that:

1. the error recovery system has the advantage of small occupied cache resources;

2. the system of the invention carries out architecture design aiming at various data types, and has low delay in processing; the data can be backed up simultaneously when the data is transmitted, and the data can be backed up without delay; when receiving the correct acknowledgement ACK, the backup can be quickly cleared, and the sending backup of the new data is not influenced; when receiving the error acknowledgement NACK, the method can quickly clear the received backup and automatically resend the backup quickly according to the data priority;

3. the retransmission algorithm of the system is simple to control, and can perform multiple rounds of retransmission by controlling the transition of the retransmission control symbol, so that the original data and the retransmission data can be effectively identified.

Drawings

FIG. 1 is a block diagram of an error recovery system supporting FDIR functions in accordance with the present invention;

FIG. 2 is a schematic diagram of three State switches of the master State machine main_State of the present invention;

fig. 3 is a format of a broadcast frame;

FIG. 4 is a block diagram of a broadcast error recovery channel according to the present invention;

fig. 5 is a retransmission flow chart of the broadcast retransmission control state machine of the present invention;

FIG. 6 is a format of a data frame;

FIG. 7 is a block diagram of a data error recovery channel of the present invention;

fig. 8 is a retransmission flow chart of the data retransmission control state machine of the present invention;

fig. 9 is a format of an FCT frame;

FIG. 10 is a block diagram of an FCT error recovery channel of the present invention;

fig. 11 is a retransmission flow chart of the FCT retransmission control state machine of the present invention.

Detailed Description

The technical scheme of the invention is described in detail below with reference to the accompanying drawings.

The invention designs an error recovery system supporting an FDIR function in a data link layer of a SpaceFobore node. Error recovery includes an error recovery cache structure and an error recovery algorithm; the system comprises a Main control State machine main_State and 3 error recovery channels; the main control state machine is mainly used for realizing the control of error recovery cache, as shown in fig. 1; the 3 error recovery channels are used for backing up important data in the spaceFibe respectively: broadcast Data (BC), flow control words (FCT), and normal Data (Data). The 3 error recovery channels include: broadcast error recovery channel, data error recovery channel, and FCT error recovery channel.

The operational flow of error recovery is as follows:

when various data are transmitted, the transmitted data are backed up at the same time, and the data backup and the data transmission are executed in parallel without delay. At this time, the master State machine main_state is in a normal issue State (WAIT).

When the data of the receiving node is received correctly, the receiving node sends a data acknowledgement signal ACK (SEQ) according to the protocol, wherein SEQ represents the data sequence number that the receiving side has successfully received. After receiving the ACK (SEQ), the local node enters an ACK processing State (ACK) by the Main control State machine main_state. Each error recovery channel can simultaneously clear data backups less than or equal to SEQ in each backup. The clear operations are performed in parallel within each error recovery channel without affecting each other. And when the data is cleared, the data can be normally received and backed up, and the data transmission is not influenced and delayed. Because of the efficient internal structure of the error recovery channel, the clearing operation is simple and rapid, and redundant data backup reading operation is not needed, and the detailed description is shown in fig. 2.

When the data of the receiving node is received in error, the receiving node sends a data error acknowledgement signal NACK (SEQ) according to the specification of the protocol, wherein SEQ represents the data sequence number which the receiving side has successfully received. After receiving the NACK (SEQ), the local node enters a NACK processing State (NACK) by a Main control State machine main_State. Each path of error recovery channel firstly enters a data clearing state, and each path of error recovery channel can clear data backups which are less than or equal to SEQ in respective backups simultaneously; then enter the data retransmission state, expand the retransmission operation according to the priority of each buffer data: firstly retransmitting broadcast information, generating a broadcast retransmission end signal BC_end_done after retransmission is finished, retransmitting an FCT control word, generating an FCT retransmission end signal FCT_end_done after retransmission is finished, retransmitting a Data control word, and generating a Data retransmission end signal data_end_done after retransmission is finished; when the retransmission of the data of each path of error recovery cache channel is finished, the Main control State machine main_state is recovered to a normal transmission number State (WAIT), and the retransmission operation is finished.

The Main control State machine main_state is mainly used for controlling the State of the error recovery channel and informing the error recovery channel of which State is currently in the normal number backup State (WAIT), the ACK processing State (ACK) and the NACK processing State (NACK) so as to process. After receiving the ACK (SEQ), entering an ACK processing state, and returning to a data normal sending state (WAIT) when all backups in the error recovery channel are cleared, namely the rest backup serial numbers in all backups are larger than SEQ; and after receiving NACK (SEQ), entering a NACK processing state, and returning to a data normal transmission state (WAIT) when the backups in the error recovery channel are all retransmitted.

The broadcast error recovery channel is mainly used for backing up the normal number of the broadcast data, clearing the correct acknowledgement, clearing and retransmitting the error acknowledgement.

When the main control state machine is in a normal number sending state, the broadcast error recovery channel normally performs data backup. The backup data is a broadcast frame module which is subjected to framing, and the broadcast frame format is as follows: including a broadcast frame header, broadcast information, and broadcast frame trailer, the frame format is shown in fig. 3.

In order to facilitate the clearing and resending of the backup data, the present application proposes an efficient error recovery cache architecture: the backup data is stored by adopting a simple dual-port RAM structure, and meanwhile, address identification recording is carried out on the backup data by adopting a FWFT type FIFO structure, and the caching architecture is shown in figure 4:

The broadcast error recovery channel includes: a dual-port broadcast cache RAM, a broadcast address FIFO and a broadcast retransmission control state machine; the broadcast address FIFO is FWFFT type;

the broadcast cache RAM is used for storing original broadcast frame backup data sent by the broadcast framing module and retransmitted broadcast frame backup data; the broadcast framing module is a function module of the local node and is used for framing the received broadcast data;

the broadcast address FIFO is used for carrying out address identification record on original broadcast frame backup data and carrying out address identification record on retransmitted broadcast frame backup data;

the specific process of the broadcast address FIFO for carrying out address identification recording on the original broadcast frame backup data is as follows:

when the broadcast cache RAM writes one word, the write pointer wr_ptr is added with 1; when writing to the broadcast frame end EBF, identifying the frame storage position; since the broadcasting frame tail consists of 4 bytes, the sequence number BC_seq (EBF [23:16 ]) of the broadcasting frame and the check code CRC are sequentially from the lower order to the upper order; to identify the position of a broadcast frame in a broadcast cache RAM and timely acquire a sequence number BC_seq, an address identifier addr= { alter, wr_ptr, BC_seq of the broadcast frame is constructed, and the corresponding address identifier is written into a broadcast address FIFO while the frame end of the broadcast frame is written into the RAM; alter is initialized to 0 as a retransmission control identifier, and toggles once per retransmission. The retransmitted data is also backed up in the broadcast buffer RAM, and when the retransmission of the original data is finished, the highest bit of the address mark in the broadcast address FIFO is different from the alter mark before the retransmission, so that the original broadcast frame and the retransmitted broadcast frame can be distinguished.

And the broadcast retransmission control state machine is used for clearing the confirmed broadcast frame backup when the main control state machine enters the ACK state, and retransmitting the unacknowledged broadcast frame backup by adopting a retransmission control algorithm after clearing the confirmed broadcast frame backup when the main control state machine enters the NACK state. As shown in fig. 5, the algorithm flow is as follows:

(1) After the Main control state machine main_state enters NACK or ACK, the Main control state machine enters a data backup clearing state (Clear) from a waiting state (Wait), reads the address identifier of an address FIFO, and acquires the minimum sequence number BC_seq=addr [7:0] of a broadcast frame which is not confirmed in the current broadcast error recovery cache, and the RAM writing address EBF_wr_ptr=addr [ wr_ptr ] of the frame tail of the broadcast frame;

(2) And comparing SEQ (successfully received sequence number) carried in NACK or ACK with BC_seq of a broadcast address FIFO output port, reading out an address identifier in the address FIFO, updating a read pointer, enabling rd_ptr=EBF_wr_ptr+1, namely, enabling the read pointer to point to the frame head of the next broadcast frame, and simultaneously clearing the record and the backup of the broadcast frame. If the main_state is in the NACK processing state, after the broadcasting frame which is being transmitted is backed up, the broadcasting buffer does not receive the normal broadcasting backup any more; if the main_state is in the ACK processing state, the broadcast buffer normally receives the broadcast frame which is being transmitted, and has no influence on the transmission of the broadcast frame;

(3) Repeating the clearing operation until BC_seq > SEQ, namely, remaining unacknowledged broadcast frames in the broadcast cache RAM, entering a retransmission state (retransmission) if main_state is in a NACK processing state, and reversing an alter retransmission controller; if the main_state is in the ACK processing state, the clearing is finished, and a waiting state (Wait) is returned;

(4) And entering a retransmission state (end), providing a retransmission application for the broadcast framing module, reading the broadcast buffer RAM after receiving an enabling signal of the broadcast framing module, transmitting the read_ptr=rd_ptr+1 to the broadcast framing module for re-framing until the end of the broadcast frame is Read, and entering a Read address state (Read). At the same time of retransmitting, backing up a new broadcast frame of the broadcast framing module, writing the retransmitted broadcast frame into a broadcast buffer RAM, and simultaneously constructing a new address identifier addr= { alter, wr_ptr, BC_seq } and writing into an address FIFO when writing into the frame tail of the broadcast frame;

(5) After reading the output Addr of the address FIFO in the Read address state (Read), entering a judging state (Judge);

(6) In the judging state (Judge), if the highest bit of Addr is the same as the current alter retransmission controller, indicating that the broadcast buffer RAM is full of the retransmitted broadcast frames, the original broadcast frames are all retransmitted, and the retransmission process is ended to jump back to the waiting state (Wait) and generate a BC_end_done indication signal; otherwise, it indicates that the broadcast frames which are not retransmitted still remain in the broadcast buffer RAM, and the retransmission is continued after the retransmission state (end) is skipped.

The data error recovery channel is mainly used for normal number backup, correct confirmation clearing, and error confirmation clearing and retransmission of common data.

When the main control state machine is in a normal number sending state, the data error recovery channel normally performs data backup. The backup data is a data frame module which is subjected to framing, and the data frame format is as follows: the frame format comprises a data frame head, data information and a data frame tail, and is shown in fig. 6.

The data frame format is similar to the broadcast frame, except that the length of the data frame is not fixed, the longest data frame includes 64 data information of 32 bits, and the efficient error recovery buffer architecture of ram+fifo is also adopted, and the buffer architecture is shown in fig. 7:

the data error recovery channel includes: a dual-port data cache RAM, a data address FIFO and a data retransmission control state machine; the data address FIFO is FWFFT;

the data cache RAM is used for storing original data frame backup data sent by a data framing module (a function module of the local node, which is used for framing common data) and retransmitted data frame backup data;

the data address FIFO is used for carrying out address identification record on the data frame backup data and carrying out address identification record on the retransmitted data frame backup data;

The specific process of address identification recording of the data frame backup data by the data address FIFO is as follows:

when the data cache RAM writes one word, the write pointer wr_ptr is added with 1; when writing to the data frame end EDF, identifying the frame storage position; since the frame tail EDF consists of 4 bytes, the EDF characters, the serial number data_seq (EDF [15:8 ]) of the Data frame and a 16-bit check code CRC are sequentially arranged from the lower bit to the upper bit; to identify the position of a Data frame in RAM and timely acquire a sequence number data_seq, an address identifier addr= { alter, wr_ptr, data_seq } of a Data frame is constructed, and the corresponding address identifier is written into a Data address FIFO while the end of the Data frame is written into RAM; alter is initialized to 0 as a retransmission control identifier, and toggles once per retransmission. The retransmitted data is also backed up in the data buffer RAM, and when the retransmission of the original data is finished, the highest bit of the address mark in the data address FIFO is different from the alter mark before the retransmission, so that the original data frame and the retransmitted data frame can be distinguished.

And the data retransmission control state machine is used for clearing the confirmed data frame backup when the main control state machine enters the ACK state, and retransmitting the unacknowledged data frame backup by adopting a retransmission control algorithm after clearing the confirmed data frame backup when the main control state machine enters the NACK state. As shown in fig. 8, the algorithm flow is as follows:

(1) After the Main control state machine main_state enters NACK or ACK, the Main control state machine enters a Data backup clearing state (Clear) from a waiting state (Wait), reads the address identifier of an address FIFO, acquires the minimum serial number data_seq=addr [7:0] of a Data frame which is not confirmed in the current Data error recovery cache, and writes the RAM writing address EDF_wr_ptr=addr [ wr_ptr ] of the frame tail of the Data frame;

(2) And comparing the SEQ carried in NACK or ACK with the data_seq of the output port of the Data address FIFO, wherein the data_seq is the serial number of the first Data frame which is not recovered, when the data_seq < = SEQ, reading out the address identifier in the address FIFO, updating the read pointer, enabling the rd_ptr = EDF_wrptr+1, namely, the read pointer to point to the frame head of the next Data frame, and simultaneously clearing the Data frame record and backup. If the main_state is in the NACK processing state, after the data frame which is being transmitted is backed up, the data cache does not receive normal data backup any more; if the main_state is in the ACK processing state, the data buffer normally receives the data frame which is being transmitted, and the transmission of the data frame is not influenced;

(3) Repeating the clearing operation until data_seq > SEQ, namely, remaining unacknowledged Data frames in the Data cache RAM, entering a retransmission state (retransmission) if main_state is in a NACK processing state, and reversing an alter retransmission controller; if the main_state is in the ACK processing state, the clearing is finished, and a waiting state (Wait) is returned;

(4) And entering a retransmission state (retransmission), if the retransmission of the broadcast frame and the FCT control word is finished, providing a retransmission application for the data framing module, reading the data cache RAM after receiving an enabling signal of the data framing module, transmitting the data cache RAM with rd_ptr=rd_ptr+1 to the data framing module for re-framing until the frame tail of the data frame is Read, and entering a Read address state (Read). At the same time of retransmitting, backing up new Data frames of the Data framing module, writing the retransmitted Data frames into a Data cache RAM, and at the same time, constructing new address identifiers addr= { alter, wr_ptr and data_seq when writing the Data frames into the frame tail, and writing the new address identifiers addr= { alter, wr_ptr and data_seq into an address FIFO;

(5) After reading the output Addr of the address FIFO in the Read address state (Read), entering a judging state (Judge);

(6) In the judging state (Judge), reading the output Addr of the address FIFO, if the highest bit of the Addr is the same as the current alter retransmission controller, indicating that the Data frames in the Data cache RAM are all retransmitted, the original Data frames are all retransmitted, and the retransmission process is finished to jump back to the waiting state (Wait) and generate a data_end_done indication signal; otherwise, the data frame backup which is not retransmitted is still carried out in the data buffer RAM, and the retransmission state (end) is skipped to continue the retransmission.

Since the FCT control word is composed of only one 32bit word due to a format different from the broadcast frame and the data frame, the data format is shown as 9. As shown in fig. 10, the FCT error recovery channel includes: an FCT error recovery cache FIFO and an FCT retransmission control state machine; the FCT error recovery cache FIFO is FWFT type;

the FCT error recovery cache FIFO is used for storing and recording address identification of original FCT backup data sent by the FCT generation module (a function module of the node, which is used for generating FCT control words), and storing and recording address identification of retransmitted FCT backup data; an alter retransmission controller is required in FCT retransmission control, and when valid FCT data is backed up, a new FCT format is constructed: new_FCT= { alter, FCT }; initializing an alter retransmission control symbol to 0, and turning over once per retransmission of the alter; since the retransmitted FCT also needs to be backed up into the FCT error recovery cache FIFO again, when the retransmission of the original data is finished, the most significant bit of the address identifier in the FCT error recovery cache FIFO is different from the alter identifier before the retransmission, so that the original FCT and the retransmitted FCT can be distinguished.

And the FCT retransmission control state machine is used for clearing the confirmed FCT backup when the main control state machine enters the ACK state, and retransmitting the unacknowledged FCT backup by adopting a retransmission control algorithm after clearing the confirmed FCT backup when the main control state machine enters the NACK state. As shown in fig. 11, the algorithm flow is as follows:

(1) After the Main control state machine main_state enters NACK or ACK, the Main control state machine enters a Data backup clearing state (Clear) from a waiting state (Wait), reads the output port of the FCT error recovery cache FIFO, and acquires the minimum serial number data_seq=FIFO_out [7:0] of the unacknowledged FCT in the current FCT error recovery cache;

(2) Comparing the fct_seq of the output port of the FCT error recovery cache FIFO carried in NACK or ACK, when fct_seq < = SEQ, which indicates that FCTs in the FCT error recovery cache FIFO still have been successfully acknowledged need to be cleared, enabling fifo_rd=1, reading out all FCTs making fct_seq < = SEQ and discarding, and then clearing FCT backup. If the main_state is in the NACK processing state, after the backup of the FCT which is being sent, the FCT cache does not receive normal data backup any more; if the main_state is in the ACK processing state, the FCT cache normally receives the sending FCT, and the sending FCT is not influenced;

(3) Repeating the clearing operation until the FCT_seq > SEQ, namely, the unacknowledged FCT remains in the FCT error recovery cache FIFO, if the main_state is in a NACK processing state, entering a retransmission state (retransmission), and reversing an alter retransmission controller; if the main_state is in the ACK processing state, the clearing is finished, and a waiting state (Wait) is returned;

(4) And entering a retransmission state (retransmission), if the retransmission of the broadcast frame is finished, providing a retransmission application by the FCT generation module, reading the FCT error recovery cache FIFO after receiving an enabling signal of the FCT generation module, and transmitting the FCT error recovery cache FIFO to the FCT generation module for regeneration. At the same time of retransmitting, backing up the New FCT regenerated by the FCT generating module, constructing a New FCT backup format New_FCT= { alter, FCT }, and writing into an FCT error recovery cache FIFO;

(6) When the most significant bit of data output by the output port of the FCT error recovery cache FIFO is the same as the current alter retransmission controller, indicating that the FCT error recovery cache FIFO is full of retransmitted FCT backup, the original FCT is retransmitted, and the retransmission process is finished to jump back to a waiting state (Wait) and generates an FCT_recovery_done indication signal; otherwise, it indicates that there is still unrepeated FCT backup in the FCT error recovery cache FIFO, and the process jumps to the Resend state (Resend) to continue resending.

Finally, it should be noted that the above embodiments are only for illustrating the technical solution of the present invention and are not limiting. Although the present invention has been described in detail with reference to the embodiments, it should be understood by those skilled in the art that modifications and equivalents may be made thereto without departing from the spirit and scope of the present invention, which is intended to be covered by the appended claims.

Claims (2)

1. An error recovery system supporting an FDIR function is arranged in a data link layer of each SpaceFobore node; the system is characterized by comprising a main control state machine, a broadcast error recovery channel, a data error recovery channel and an FCT error recovery channel;

the main control state machine is used for carrying out state control on the broadcast error recovery channel, the data error recovery channel and the FCT error recovery channel;

the broadcast error recovery channel is used for carrying out normal number sending backup, correct confirmation clearing, error confirmation clearing and retransmission on the broadcast data according to the state of the main control state machine;

the data error recovery channel is used for backing up the normal number of common data, correctly confirming and clearing, and incorrectly confirming and clearing and retransmitting according to the state of the main control state machine;

the FCT error recovery channel is used for backing up the normal number of FCT data, correctly confirming and clearing, and carrying out error confirmation and clearing and resending according to the state of the main control state machine;

the broadcast error recovery channel includes: a dual-port broadcast cache RAM, a broadcast address FIFO and a broadcast retransmission control state machine; the broadcast address FIFO is FWFFT type;

the broadcast cache RAM is used for storing original broadcast frame backup data sent by the broadcast framing module and retransmitted broadcast frame backup data;

The broadcast address FIFO is used for carrying out address identification record on original broadcast frame backup data and carrying out address identification record on repeated broadcast frame backup data; the specific process of the broadcast address FIFO for carrying out address identification recording on the original broadcast frame backup data is as follows:

when the broadcast cache RAM writes one word, the write pointer wr_ptr is added with 1; when writing to the broadcast frame end EBF, identifying the frame storage position; since the broadcasting frame tail consists of 4 bytes, the EBF character, the state STATUS, the broadcasting frame serial number BC_seq and the check code CRC are sequentially arranged from the lower position to the upper position; constructing an address identifier addr= { alter, wr_ptr, BC_seq } of a broadcast frame, and writing the corresponding address identifier into a broadcast address FIFO while writing the frame tail of the broadcast frame into the RAM; the alter is used as a retransmission control identifier and initialized to 0, and the alter is overturned once for each retransmission;

the broadcast retransmission control state machine is used for clearing the confirmed broadcast frame backup data when the main control state machine enters an ACK state, clearing the confirmed broadcast frame backup data when the main control state machine enters a NACK state, and retransmitting the unacknowledged broadcast frame backup data by adopting a retransmission control algorithm;

When the main control state machine enters an ACK state, the specific processing procedure of the broadcast retransmission control state machine comprises the following steps:

step 101) the broadcast error recovery channel enters a broadcast backup clearing state from a waiting state, reads an address identifier of a broadcast address FIFO, acquires a minimum sequence number BC_seq=addr [7:0] of an unacknowledged broadcast frame in a broadcast cache RAM, and a RAM write address EBF_wr_ptr=addr [ wr_ptr ] of a frame tail of the broadcast frame;

step 102) comparing the SEQ carried in the ACK with the BC_seq of the output port of the broadcast address FIFO, wherein the BC_seq is the serial number of the first unrecovered broadcast frame, when BC_seq < = SEQ, reading out the address identification in the broadcast address FIFO, and simultaneously updating the read pointer, so that rd_ptr = EBF_wrptr+1, namely the read pointer points to the frame head of the next broadcast frame, and then the broadcast frame data and the backup thereof are simultaneously cleared; the broadcast buffer RAM normally receives the broadcast frames being transmitted;

step 103) turning to step 102) until BC_seq > SEQ, namely, clearing the remaining unacknowledged broadcast frames in the broadcast cache RAM, and returning the broadcast error recovery channel to a waiting state after clearing;

when the main control state machine enters a NACK state, the specific processing procedure of the broadcast retransmission control state machine comprises the following steps:

Step 201), the broadcast error recovery channel enters a broadcast backup clearing state from a waiting state, reads the address identifier of a broadcast address FIFO, acquires the minimum sequence number BC_seq=addr [7:0] of the unacknowledged broadcast frame in the broadcast cache RAM, and the RAM write address EBF_wr_ptr=addr [ wr_ptr ] of the frame end of the broadcast frame;

step 202) comparing the SEQ carried in NACK with BC_seq of the output port of the broadcast address FIFO, wherein BC_seq is the serial number of the first broadcast frame which is not recovered, when BC_seq < = SEQ, reading out the address identification in the broadcast address FIFO, and updating the read pointer at the same time, so that rd_ptr = EBF_wrptr+1, namely the read pointer refers to the frame head of the next broadcast frame, and after the broadcast frame which is being transmitted is backed up, the broadcast buffer RAM does not receive normal broadcast backup any more;

step 203) go to step 202) until bc_seq > SEQ, i.e. the remaining unacknowledged broadcast frames in the broadcast buffer RAM are cleared, then the broadcast error recovery channel enters a retransmission state, and the alter retransmission control symbol is inverted;

step 204) a retransmission application is provided for the broadcast framing module, after receiving an enabling signal of the broadcast framing module, a broadcast cache RAM is read, rd_ptr=rd_ptr+1 is sent to the broadcast framing module for frame re-framing until the end of the broadcast frame is read; simultaneously, the broadcasting frame of the broadcasting frame re-framing module is backed up, the retransmitted broadcasting frame is written into a broadcasting buffer RAM, and simultaneously, when the frame is written into the tail of the broadcasting frame, a new address mark addr= { alter, wr_ptr, BC_seq } is constructed and written into a broadcasting address FIFO;

Step 205) reading the output Addr of the broadcast address FIFO, if the highest bit of Addr is the same as the current alter retransmission controller, indicating that the broadcast buffer RAM is all the retransmitted broadcast frame backup data, and the original broadcast frame backup data is all retransmitted, and after the retransmission process is finished, returning the broadcast error recovery channel to the waiting state and generating a bc_recovery_done indication signal; otherwise, indicating that the broadcast frames which are not retransmitted still exist in the broadcast cache RAM, and jumping to a retransmission state by the broadcast error recovery channel, and entering step 204;

the data error recovery channel includes: a dual-port data cache RAM, a data address FIFO and a data retransmission control state machine; the data address FIFO is FWFFT;

the data buffer RAM is used for storing the original data frame backup data sent by the data framing module and the retransmitted data frame backup data;

the data address FIFO is used for carrying out address identification record on the original data frame backup data and carrying out address identification record on the retransmitted data frame backup data; the specific process of address identification recording of the original data frame backup data by the data address FIFO is as follows:

when the data cache RAM writes one word, the write pointer wr_ptr is added with 1; when writing to the data frame end EDF, identifying the frame storage position; since the frame tail EDF consists of 4 bytes, the EDF characters, the serial number data_seq of the Data frame and the 16-bit check code CRC are sequentially arranged from the lower bit to the upper bit; constructing an address identifier addr= { alter, wr_ptr, data_seq } of a Data frame, and writing the corresponding address identifier into a Data address FIFO while writing the frame tail of the Data frame into the RAM; the alter is used as a retransmission control identifier and initialized to 0, and the alter is overturned once for each retransmission;

The data retransmission control state machine is used for clearing the confirmed data frame backup data when the main control state machine enters an ACK state, clearing the confirmed data frame backup data when the main control state machine enters a NACK state, and retransmitting the unacknowledged data frame backup data by adopting a retransmission control algorithm;

when the main control state machine enters an ACK state, the specific processing procedure of the data retransmission control state machine is as follows:

step 301), the Data error recovery channel enters a Data backup clearing state from a waiting state, reads the address identifier of the Data address FIFO, and obtains the minimum serial number data_seq=addr [7:0] of the unacknowledged Data frame in the current Data error recovery buffer, and the RAM write address edf_wr_ptr=addr [ wr_ptr ] of the frame end of the Data frame;

step 302) comparing the SEQ carried in the ACK with the data_seq of the output port of the Data address FIFO, wherein the data_seq is the sequence number of the first Data frame which is not recovered, when the data_seq < = SEQ, reading the address identifier in the Data address FIFO, and updating the read pointer at the same time, so that the rd_ptr = edf_wr_ptr+1, namely the read pointer points to the frame head of the next Data frame, and the Data frame Data and the backup thereof are simultaneously cleared; the data buffer RAM normally receives the data frame being transmitted;

Step 303) go to step 302) until data_seq > SEQ, i.e. the Data frames remain unacknowledged in the Data cache RAM; then the data error recovery channel returns to a waiting state;

when the main control state machine enters a NACK state, the specific processing procedure of the data retransmission control state machine is as follows:

step 401), the Data error recovery channel enters a Data backup clearing state from a waiting state, reads the address identifier of the Data address FIFO, and obtains the minimum serial number data_seq=addr [7:0] of the unacknowledged Data frame in the current Data error recovery buffer, and the RAM write address edf_wr_ptr=addr [ wr_ptr ] of the frame end of the Data frame;

step 402) comparing the SEQ carried in NACK and the data_seq of the output port of the Data address FIFO, wherein the data_seq is the serial number of the first Data frame which is not recovered, when data_seq < = SEQ, reading the address identifier in the Data address FIFO, and updating the read pointer at the same time, so that rd_ptr = edf_wr_ptr+1, that is, the read pointer points to the frame head of the next Data frame, and then the Data frame Data and the backup thereof are cleared at the same time; after the data frame being transmitted is backed up, the data cache RAM does not receive normal data backup any more;

step 403) go to step 402) until data_seq > SEQ, i.e. the Data frame remaining unacknowledged in the Data buffer RAM, the Data error recovery channel enters a retransmission state and the alter retransmission control symbol is inverted;

Step 404) if the retransmission of the broadcast frame and the FCT control word is finished, a retransmission application is provided to the data framing module, after receiving the enabling signal of the data framing module, the data buffer RAM is read, rd_ptr=rd_ptr+1 is sent to the data framing module for re-framing until the end of the data frame is read; simultaneously, backing up the Data frames of the Data framing module, writing the retransmitted Data frames into a Data cache RAM, and simultaneously constructing a new address identifier addr= { alter, wr_ptr, data_seq } and writing into a Data address FIFO when writing into the frame tail of the Data frames;

step 405) reading the output Addr of the Data address FIFO, if the highest bit of Addr is the same as the current alter retransmission controller, indicating that the Data buffer RAM is all the retransmitted Data frame backup Data, and that the original Data frame backup Data is all retransmitted, ending the retransmission process, returning the Data error recovery channel to the waiting state, and generating a data_recovery_done indication signal; otherwise, indicating that the data frames which are not retransmitted still exist in the data cache RAM, and skipping back to a retransmission state by the data error recovery channel, and entering step 404);

the FCT error recovery channel includes: an FCT error recovery cache FIFO and an FCT retransmission control state machine; the FCT error recovery cache FIFO is FWFT type;

The FCT error recovery cache FIFO is used for storing original FCT backup data sent by the FCT generation module and storing retransmitted FCT backup data, wherein FCT_seq=FCT [23:16] can be obtained according to the FCT control word format; an alter retransmission controller is required in FCT retransmission control, and when valid FCT data is backed up, a new FCT format is constructed: new_FCT= { alter, FCT }; initializing an alter retransmission control symbol to 0, and turning over once per retransmission of the alter;

the FCT retransmission control state machine is used for clearing the confirmed FCT backup data when the main control state machine enters an ACK state, and retransmitting the unacknowledged FCT backup by adopting a retransmission control algorithm after clearing the confirmed FCT backup data when the main control state machine enters a NACK state;

when the main control state machine enters an ACK state, the specific implementation process of the FCT retransmission control state machine is as follows:

step 501), the FCT error recovery channel enters the FCT backup clearing state from the waiting state, reads the output port of the FCT error recovery cache FIFO, and obtains the minimum sequence number fct_seq=fifo_out [23:16] of the unacknowledged FCT in the current FCT error recovery cache FIFO;

step 502) comparing the SEQ in the ACK with the fct_seq of the FCT error recovery cache output port, when fct_seq < = SEQ, indicating that FCTs in the FCT error recovery cache FIFO still have successfully acknowledged need to be cleared, enabling fifo_rd=1, reading out all FCTs making fct_seq < = SEQ and discarding, then the original FCT backup data is cleared, and the FCT cache normally receives the FCT being transmitted;

Step 503) go to step 502) until fct_seq > SEQ, i.e. the FCT error recovery channel returns to the waiting state after the completion of the clearing, wherein the FCT remains unacknowledged FCT in the FCT error recovery cache FIFO;

when the main control state machine enters a NACK state, the specific implementation process of the FCT retransmission control state machine is as follows:

step 601) the FCT error recovery channel enters a FCT backup clearing state from a waiting state, reads the output port of the FCT error recovery cache FIFO, and obtains the minimum sequence number fct_seq=fifo_out [23:16] of the unacknowledged FCT in the current FCT error recovery cache FIFO;

step 602) comparing the SEQ in NACK with the FCT_seq of the FCT error recovery cache output port, when FCT_seq < = SEQ, indicating that the FCT in the FCT error recovery cache FIFO still needs to be cleared after successful confirmation, enabling FIFO_rd=1, reading out all FCTs with FCT_seq < = SEQ and discarding, and clearing original FCT backup data; after the FCT which is being sent is backed up, the FCT error recovery cache FIFO does not receive normal data backup any more;

step 603) go to step 602) until fct_seq > SEQ, i.e. the FCT error recovery cache FIFO has an unacknowledged FCT left, then the FCT error recovery channel enters a retransmission state and the alter retransmission control symbol is inverted;

Step 604), if the retransmission of the broadcast frame is finished, a retransmission application is provided to the FCT generation module, and after receiving the enabling signal of the FCT generation module, the FCT error recovery cache FIFO is read and sent to the FCT generation module for regeneration; meanwhile, backup is carried out on the FCT data regenerated by the FCT generating module, a New FCT backup format New_FCT= { alter and FCT }, and the New FCT backup format New_FCT= { alter and FCT } is written into an FCT error recovery cache FIFO;

step 605) when the most significant bit of the data output by the output port of the FCT error recovery cache FIFO is the same as the current alter retransmission controller, indicating that the FCT error recovery cache FIFO is full of retransmitted FCT backups, the original FCT is all retransmitted, and after the retransmission process is finished, returning the FCT error recovery channel to a waiting state and generating an fct_recovery_done indication signal; otherwise, indicating that there are unrepeated FCT backups in the FCT error recovery cache FIFO, the FCT error recovery channel jumps to the resend state, and proceeds to step 604).

2. The FDIR enabled error recovery system of claim 1, wherein the data backup and data transmission at the local node are performed in parallel and without delay; the main control state machine is in a normal number sending backup state;

When the local node receives the ACK, the main control state machine enters an ACK processing state; each error recovery channel can independently clear the data backup which is less than or equal to SEQ in each backup, wherein SEQ is the successfully received sequence number carried in ACK;

when the local node receives NACK, the main control state machine enters a NACK processing state; each error recovery channel firstly enters a data clearing state, and each error recovery channel can clear data backups which are less than or equal to SEQ in respective backups simultaneously, wherein SEQ is a sequence number which is carried in NACK and is successfully received; then entering a Data retransmission state, retransmitting the broadcast information firstly, generating a broadcast retransmission end signal BC_end_done after the retransmission is finished, retransmitting the FCT control word, generating an FCT retransmission end signal FCT_end_done after the retransmission is finished, retransmitting the Data control word finally, and generating a Data retransmission end signal data_end_done after the retransmission is finished; and after the data retransmission of each path of error recovery channel is finished, the main control state machine is restored to the normal number of transmission backup state, and the retransmission operation is finished.

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