CN112134454A - Frequency-pushing soft start control method and system of CLLC topological circuit and vehicle - Google Patents

Frequency-pushing soft start control method and system of CLLC topological circuit and vehicle Download PDF

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CN112134454A
CN112134454A CN202010989253.1A CN202010989253A CN112134454A CN 112134454 A CN112134454 A CN 112134454A CN 202010989253 A CN202010989253 A CN 202010989253A CN 112134454 A CN112134454 A CN 112134454A
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voltage value
cllc
wave
frequency
duty ratio
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CN112134454B (en
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王翼
汪易强
郭水保
刘宇
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Zhejiang Geely Holding Group Co Ltd
Ningbo Geely Automobile Research and Development Co Ltd
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Zhejiang Geely Holding Group Co Ltd
Ningbo Geely Automobile Research and Development Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection

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  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a frequency-push soft start control method and system of a CLLC topological circuit and a vehicle, and relates to the technical field of vehicles. The frequency-push soft start control method of the CLLC topological circuit comprises the following steps: when the CLLC topological circuit is in soft start, the wave sending frequency is controlled to be three times of the resonant frequency for wave sending, and the duty ratio of the wave sending is controlled to be a preset value. During soft start of the CLLC topological circuit, the duty ratio of the control wave gradually increases along with the increase of the voltage, and the change rate of the duty ratio of the control wave gradually increases along with the increase of the voltage. When the soft start of the CLLC topological circuit is finished, the control voltage reaches a target voltage value, and the duty ratio is controlled to reach 50%. The frequency of the wave emitted by the invention is three times of the resonance frequency, and the wave is emitted with the minimum duty ratio, so that the compatibility design of a hardware driving circuit is reduced, the impact current is ensured to be in a controllable range, the condition of larger impact current caused by the high voltage input by a bus is avoided, and the output voltage is rapidly increased.

Description

Frequency-pushing soft start control method and system of CLLC topological circuit and vehicle
Technical Field
The invention relates to the technical field of vehicles, in particular to a frequency-push soft start control method and system of a CLLC topological circuit and a vehicle.
Background
The conventional CLLC topological circuit is based on the integral scheme that alternating-current input voltage is directly connected to an APFC (active power factor correction) to correct charging input power factors after passing through an EMC (electromagnetic compatibility) filter circuit, and then a full-bridge CLLC topological circuit outputs rectified voltage to charge a battery.
At the starting time of the CLLC, the resonant capacitor and the output filter capacitor are not charged and are in a short-circuit state. When the switching tube is switched on, larger impact current occurs due to capacitance. Therefore, the soft start mode wave generation requires a control operation at the initial wave generation.
The wave-generating starting resonant cavity impact current is mainly the problem to be solved for CLLC soft start. Secondly, soft start under various load working conditions, resonance current symmetry and the like all require a soft start mode which is easy to operate and high in reliability. If the traditional CLLC soft start mode is adopted, when the input direct current bus voltage is higher (680Vdc-720Vdc), the impact current is still larger even if the frequency of the soft starting wave is three times of the resonance frequency (250 KHz-). In order to protect the circuit from working normally, an additional hardware design is required. Meanwhile, the overcurrent protection point designed by the control part is lifted, and the function of protecting normal working operation cannot be achieved. Therefore, under the condition of higher bus input, higher design standards are provided for the stability, cost and reliability of the driving circuit.
Disclosure of Invention
An object of the first aspect of the present invention is to provide a frequency-pulling soft-start control method for a CLLC topology, which solves the problem in the prior art that a CLLC topology circuit has too large current impact at the startup time.
Another object of the first aspect of the present invention is to solve the problem of current jump and poor stability in the prior art.
It is a further object of the first aspect of the present invention to solve the problems of inaccurate output voltage and large system error in the prior art.
It is a further object of the first aspect of the invention to solve the problem of prior art output voltage surges leading to hardware failures.
An object of the second aspect of the present invention is to provide a control system for implementing a frequency-pulling soft-start control method of a CLLC topology circuit.
It is an object of a third aspect of the invention to provide a vehicle incorporating a frequency-pushed soft start control system of a CLLC topology.
Particularly, the invention provides a frequency-push soft start control method of a CLLC topological circuit, which comprises the following steps:
when the CLLC topological circuit is in soft start, controlling the wave-emitting frequency to be three times of the resonance frequency for wave-emitting, and controlling the duty ratio of the wave-emitting frequency to be a preset value, wherein the preset value is the lowest value in the starting process of the CLLC topological circuit;
in the soft start process of the CLLC topological circuit, the duty ratio of the control wave gradually increases along with the increase of the voltage, and the change rate of the duty ratio of the control wave gradually increases along with the increase of the voltage;
and when the soft start of the CLLC topological circuit is finished, controlling the voltage to reach a target voltage value, and controlling the duty ratio to reach 50%, wherein the target voltage value is a rated voltage value when the CLLC topological circuit works.
Optionally, in the soft start process of the CLLC topology circuit, the wave-transmitting mode includes a frequency modulation mode; the frequency modulation mode is as follows: controlling periodic wave sending, wherein the period and the duty ratio of the wave sending are optionally modulated according to the output voltage, and the wave sending is carried out in the frequency modulation mode when the CLLC topological circuit is in soft start;
in the process that the duty ratio and the voltage continuously rise, the real-time voltage value of the CLLC topological circuit is periodically collected;
and when the real-time voltage value is smaller than a first preset voltage value, the wave sending mode is kept to be carried out according to the frequency modulation mode, wherein the first preset voltage value is larger than the target voltage value.
Optionally, in a certain wave-emitting period, obtaining a change rate of the duty ratio correspondingly according to the real-time voltage value acquired in the period; the change rate of the duty ratio is obtained by one-to-one correspondence of the change rate of the duty ratio and the voltage value according to a specified curve;
calculating the duty ratio of the next period according to the relationship between the change rate of the duty ratio and the duty ratio;
according to the process, wave sending is carried out periodically according to the duty ratio obtained through calculation;
wherein delay compensation is added when calculating the duty cycle.
Optionally, during the soft start of the CLLC topology circuit, the wave-sending mode further includes an intermittent mode, and the intermittent mode is used for protecting the CLLC topology circuit during the soft start;
the wave-emitting mode is in the frequency modulation mode, and in the process that the duty cycle and the real-time voltage value continuously rise, when the real-time voltage value is greater than the first preset voltage value, the wave-emitting mode is switched from the frequency modulation mode to the intermittent mode;
wherein the intermittent mode is as follows: and when the real-time voltage value rises to be larger than the first preset voltage value, wave sealing is controlled so as to reduce the real-time voltage value until the real-time voltage value is smaller than the target voltage value and then wave is sent again.
Optionally, when the wave-emitting mode is the intermittent mode, and the real-time voltage value is decreased to be smaller than a second preset voltage value in the decreasing process of the real-time voltage value, controlling the wave-emitting mode to be switched from the intermittent mode to the frequency modulation mode; and the second preset voltage value is smaller than the target voltage value.
Optionally, in the soft start process of the CLLC topology circuit, when the delay reaches a preset time after the duty ratio is increased to 50%, the soft start is ended; the time from the start of the soft start to the end of the delay is the soft start time.
Optionally, in the soft start process of the CLLC topology circuit, when the duty cycle is increased to 50% and then the delay is less than the preset time, the real-time voltage value reaches the target voltage value, and at the instant when the real-time voltage value reaches the target voltage value, the soft start is finished, and the time from the start of the soft start to the time when the real-time voltage value reaches the target voltage value is the soft start time.
Particularly, the invention also provides a frequency-pushed soft start control system of the CLLC topological circuit, which comprises a memory and a processor, wherein a control program is stored in the memory, and the control program is used for realizing the frequency-pushed soft start control method of the CLLC topological circuit when being executed by the processor.
In particular, the invention also provides a vehicle comprising the frequency-push soft start control system of the CLLC topological circuit.
According to the invention, when the CLLC topological circuit is in soft start, the frequency of the wave is three times of the resonance frequency, and the wave is transmitted with the minimum duty ratio, so that the compatibility design of a hardware driving circuit is reduced, the impact current is ensured to be in a controllable range, the condition of large impact current caused by high voltage input by a bus is avoided, and meanwhile, the output voltage is rapidly increased. In addition, the maximum impact current of the CLLC topological circuit during soft start is smaller than the maximum resonance current of the CLLC topological circuit during working, and the overcurrent protection threshold value is designed according to the maximum resonance working current, so that the protection response is safer.
After the soft start of the CLLC topological circuit is finished, the proportion of the steady state work to the control is 50%, and the duty ratio of the steady state work to the wave sending duty ratio of the traditional CLLC topological circuit is kept consistent, so that the technology can be compatible with the traditional technology, and the additional hardware and software resources are reduced.
According to the frequency modulation mode, the voltage of the CLLC topological circuit can be continuously increased, the duty ratio is continuously increased along with the increase of the voltage, and the smooth operation of soft start is ensured.
According to the invention, an intermittent protection function is added in the soft start process of the CLLC topological circuit, so that the hardware fault caused by sudden increase of the output voltage in the rapid soft start process can be prevented. Meanwhile, the whole soft start process can be ensured to be quicker.
The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments thereof, taken in conjunction with the accompanying drawings.
Drawings
Some specific embodiments of the invention will be described in detail hereinafter, by way of illustration and not limitation, with reference to the accompanying drawings. The same reference numbers in the drawings identify the same or similar elements or components. Those skilled in the art will appreciate that the drawings are not necessarily drawn to scale. In the drawings:
FIG. 1 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to one embodiment of the present invention;
FIG. 2 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to another embodiment of the present invention;
fig. 3 is a schematic flow chart of a frequency modulation mode process of a frequency-push soft start control method of a CLLC topology according to one embodiment of the present invention.
FIG. 4 is a designated graph of the wave duty ratio change rate of the frequency-push soft start control method of the CLLC topology circuit corresponding to the voltage value according to an embodiment of the present invention;
FIG. 5 is a diagram of hardware latency according to one embodiment of the present invention;
FIG. 6 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to yet another embodiment of the present invention;
FIG. 7 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit for wave launching in an intermittent mode according to one embodiment of the present invention;
FIG. 8 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to one embodiment of the present invention;
fig. 9 is a schematic block diagram of a frequency-pushed soft-start control system in accordance with one embodiment of the present invention.
Detailed Description
Fig. 1 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to one embodiment of the present invention. Specifically, the frequency-pushed soft-start control method of the CLLC topology circuit of this embodiment may include:
s10, when the CLLC topological circuit is in soft start, controlling the wave frequency to be three times of the resonance frequency to send waves, and controlling the duty ratio of the wave to be a preset value, wherein the preset value is the lowest value in the starting process of the CLLC topological circuit.
Specifically, the preset value of this embodiment may be 0 to 15%, and preferably, when the CLLC topology circuit is in soft start, the duty ratio of the wave generation is 10%.
S20 the duty cycle of the control wave gradually increases with the increase of the voltage and the rate of change of the duty cycle of the control wave gradually increases with the increase of the voltage during the soft start of the CLLC topology circuit.
Specifically, the duty ratio is gradually increased along with the increase of the voltage, the transient change is reduced, the sudden change of the starting current is prevented, and the stability is improved. When the bus voltage is small, the duty ratio change rate is small and the adjustment speed is slow. When the bus voltage is larger, the duty ratio change rate is larger, and the adjustment speed is high. Furthermore, the gradual increase in the rate of change of the duty cycle with increasing voltage allows for a smaller total soft start time.
And S30, when the soft start of the CLLC topological circuit is finished, controlling the voltage to reach a target voltage value, and controlling the duty ratio to reach 50%, wherein the target voltage value is a rated voltage value when the CLLC topological circuit works.
In the embodiment, when the CLLC topology circuit is in soft start, the frequency of the wave is three times of the resonant frequency, and the wave is sent with the minimum duty ratio, so that the compatibility design of a hardware driving circuit is reduced, the impact current is ensured to be within a controllable range, the situation of large impact current caused by high voltage input by a bus is avoided, and meanwhile, the output voltage is quickly increased.
The present embodiment emits wave in a mode of triple highest frequency and minimum duty cycle (< 50%, preferably 10%) when the CLLC topology circuit is in soft start, and the traditional CLLC switch always emits wave at a duty cycle of 50%. Therefore, the maximum impact current of the CLLC topological circuit during the soft start is smaller than the maximum resonance current of the CLLC topological circuit during the working period, and the overcurrent protection threshold value is designed according to the maximum current of the resonance working, so that the protection response is safer.
In addition, the wave duty ratio of the embodiment is gradually pushed from about 10% to 50%, so that transient change is reduced, sudden change of starting current is prevented, and stability is improved.
After the soft start of the CLLC topological circuit is finished, the steady-state work accounts for 50 percent, and the duty ratio of the steady-state work is kept consistent with the wave-sending duty ratio of the traditional CLLC topological circuit, so that the technology can be compatible with the traditional technology, and extra hardware and software resources are reduced.
As a specific embodiment of the present invention, during the soft start of the CLLC topology circuit, the wave-transmitting mode includes a frequency modulation mode; the frequency modulation mode is as follows: and controlling periodic wave sending, wherein the period and the duty ratio of the wave sending are modulated according to the output voltage, and the duty ratios of the wave sending with different periods are different.
In the soft start process of the CLLC topological circuit, the periodic wave generation is carried out, the duty ratio is gradually and steadily increased until the duty ratio is increased to 50% of the steady-state working duty ratio, and the output voltage lifting speed is increased to ensure the steady-state working state.
Fig. 2 is a schematic flow chart of a frequency-pushed soft-start control method of a CLLC topology circuit according to another embodiment of the present invention. More specifically, Y10 transmits waves in a frequency modulation mode when the CLLC topology circuit is in soft start;
y20 periodically collects the real-time voltage value of the CLLC topological circuit in the process of duty ratio and voltage rising;
y30 is to keep the wave-emitting mode to be carried out according to the frequency modulation mode when the real-time voltage value is smaller than a first preset voltage value, wherein the first preset voltage value is larger than the target voltage value.
According to the frequency modulation mode, the voltage of the CLLC topological circuit can be continuously increased, the duty ratio is continuously increased along with the increase of the voltage, and the soft start is ensured to be smoothly carried out.
Fig. 3 is a schematic flow chart of a frequency modulation mode process of a frequency-push soft start control method of a CLLC topology according to one embodiment of the present invention. Specifically, in a certain wave-emitting period, a10 obtains a change rate of a corresponding duty ratio according to a real-time voltage value acquired in the period; the change rate of the duty ratio is obtained by one-to-one correspondence of the change rate of the duty ratio and the voltage value according to a specified curve.
FIG. 4 is a designated graph of the wave duty ratio change rate of the frequency-push soft start control method of the CLLC topology circuit corresponding to the voltage value according to an embodiment of the present invention; specifically, the rate of change of the duty ratio is plotted against the voltage value as shown in fig. 4. The duty ratio change rate is adjusted according to the bus voltage, and when the bus voltage is low, the duty ratio change rate is low and the adjustment speed is low. When the bus voltage is larger, the duty ratio change rate is larger, and the adjustment speed is high. This approach allows for a smaller time for soft start of the CLLC topology. The specific address, the duty ratio change rate and the bus voltage value are corresponding curves which are debugged in advance.
A20, calculating the duty ratio of the next period according to the relationship between the change rate of the duty ratio and the duty ratio;
a30, periodically sending waves according to the calculated duty ratio according to the process;
wherein, when calculating the duty ratio, adding delay compensation.
FIG. 5 is a diagram illustrating hardware latency according to one embodiment of the present invention. Specifically, as shown in fig. 5, in actual engineering, hardware delay causes the actual duty ratio to be lower than the theoretical duty ratio. In order to prevent the influence of hardware delay, hardware delay compensation is added in the duty ratio calculation process, and a compensation value is given according to the actual working condition and a hardware circuit. Due to the fact that hardware delay compensation is added, output voltage can be adjusted more accurately, and system errors are reduced.
Fig. 6 is a schematic flow chart diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to yet another embodiment of the present invention. As a specific embodiment of the present invention, in the soft start process of the CLLC topology circuit, the wave-sending mode further includes an intermittent mode, and the intermittent mode is used to protect the CLLC topology circuit in the soft start process.
The mode of Y40 wave emission is in frequency modulation mode, and in the process of the duty cycle and the real-time voltage value rising continuously, when the real-time voltage value is larger than the first preset voltage value, the mode of wave emission is switched from frequency modulation mode to intermittent mode. Wherein, the intermittent mode is as follows: and controlling wave sealing when the real-time voltage value rises to be larger than a first preset voltage value so as to reduce the real-time voltage value until the real-time voltage value is smaller than the target voltage value and then sending the waves again. Specifically, the first preset voltage value may be about 20-30V added to the target voltage value, and preferably the first preset voltage value is about 20V added to the target voltage value.
In the embodiment, the intermittent protection function is added in the soft start process of the CLLC topological circuit, so that the hardware fault caused by sudden increase of the output voltage in the quick soft start process can be prevented. Meanwhile, the whole soft start process can be ensured to be quicker.
As a specific embodiment of the present invention, when the wave-emitting mode is the intermittent mode, and the real-time voltage value decreases to be less than the second preset voltage value in the process of decreasing the real-time voltage value, Y50 controls the wave-emitting mode to switch from the intermittent mode to the frequency modulation mode; and the second preset voltage value is smaller than the target voltage value. Specifically, the second preset voltage value may be the target voltage value minus 10-15V, and preferably the second preset voltage value is the target voltage value minus 10V.
In this embodiment, in the soft start process of the CLLC topology circuit, the wave-sending start is performed in the frequency modulation mode, and when the real-time voltage value is greater than the target voltage value by about 20V, the wave-sending mode is switched to the intermittent mode. In the intermittent mode, because the voltage is large, the wave is sealed firstly, the real-time voltage value will slowly drop, and the wave is sent when the target voltage value is reached. If the real-time voltage value is reduced too fast, the real-time voltage value is easy to be reduced to be less than the target voltage value by 10V, and the real-time voltage value needs to be further increased at the moment, so that the intermittent mode is switched to the frequency modulation mode for wave transmission. The above process is repeated. The switching of the wave-sending mode in the embodiment of the year adopts a first preset voltage value and a second preset voltage value, the first preset voltage value is greater than a target voltage value by 20V, and the second preset voltage value is less than the target voltage value by 10V, so that the condition that the voltage is more unstable due to the fact that the wave-sending mode is continuously switched between a frequency modulation mode and an intermittent mode is avoided.
Fig. 7 is a schematic flow chart of the frequency-pushed soft-start control method of the CLLC topology circuit according to an embodiment of the present invention, for wave launching in an intermittent mode. In the intermittent mode, the wave starting and wave stopping are mainly realized by comparing a real-time voltage value with a target voltage value, the wave starting is stopped when the real-time voltage value is larger than the target voltage value, and the wave starting is stopped when the real-time voltage value is smaller than the target voltage value.
As a specific embodiment of the present invention, in the soft start process of the CLLC topology circuit, when the delay reaches the preset time after the duty ratio rises to 50%, the soft start is ended; the time from the start of the soft start to the end of the delay is the soft start time. The preset time of the embodiment can be 50-200 ms. Preferably 100 ms.
As another specific embodiment of the present invention, in the soft start process of the CLLC topology circuit, when the duty ratio is increased to 50% and the delay is less than the preset time, the real-time voltage value reaches the target voltage value, and at the instant when the real-time voltage value reaches the target voltage value, the soft start is finished, and the time from the start of the soft start to the time when the real-time voltage value reaches the target voltage value is the soft start time. The preset time of the embodiment can be 50-200 ms. Preferably 100 ms.
Fig. 8 is a schematic flow diagram of a frequency-pushed soft-start control method of a CLLC topology circuit according to one embodiment of the present invention. The specific whole starting process is as follows:
starting, and carrying out wave generation at three times of resonance frequency and the minimum duty ratio;
judging whether the duty ratio reaches 50%;
if yes, judging whether the time delay reaches 100 s;
in the time delay process, judging whether the bus voltage rises to a target voltage value;
if the time delay reaches 100s, the starting is finished;
and if the time delay does not reach 100s and the bus voltage rises to the target voltage value, the starting is finished.
Fig. 9 is a schematic block diagram of a frequency-pushed soft-start control system in accordance with one embodiment of the present invention. As a specific embodiment of the present invention, this embodiment further provides a frequency-pulling soft-start control system 100 for a CLLC topology circuit, where the control system 100 includes a memory 101 and a processor 102, the memory 101 stores a control program, and the control program is used for implementing the frequency-pulling soft-start control method for the CLLC topology circuit according to the above when executed by the processor 102. The processor 102 may be a Central Processing Unit (CPU), a digital processing unit, or the like. The processor 102 transmits and receives data through the communication interface. The memory 101 is used to store programs executed by the processor. The memory is any medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by the computer, or a combination of memories. The above-described computing program may be downloaded from a computer-readable storage medium to a corresponding computing/processing device or to a computer or external storage device via a network (e.g., the internet, a local area network, a wide area network, and/or a wireless network).
As a specific embodiment of the present invention, the present embodiment also provides a vehicle including the frequency-push soft-start control system 100 of the above CLLC topology circuit. The vehicle comprises a soft start control system of the CLLC topological circuit, so that the soft start circuit of the CLLC topological circuit in the vehicle has good compatibility, the situation that the impact current is in a controllable range to avoid large impact current caused by high voltage input by a bus is ensured, and meanwhile, the output voltage is quickly increased. The duty ratio is gradually pushed to 50% from the duty ratio of < 50%, transient change is reduced, sudden change of starting current is prevented, and stability is improved. In the process of soft start, because of adding hardware delay compensation, the output voltage can be adjusted more accurately, and the system error is reduced. And an intermittent protection function is added, so that hardware faults caused by sudden increase of output voltage in the quick soft start process can be prevented. Meanwhile, the whole soft start process can be ensured to be quicker.
Thus, it should be appreciated by those skilled in the art that while a number of exemplary embodiments of the invention have been illustrated and described in detail herein, many other variations or modifications consistent with the principles of the invention may be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the invention. Accordingly, the scope of the invention should be understood and interpreted to cover all such other variations or modifications.

Claims (10)

1. A frequency-push soft start control method of a CLLC topological circuit is characterized by comprising the following steps:
when the CLLC topological circuit is in soft start, controlling the wave-emitting frequency to be three times of the resonance frequency for wave-emitting, and controlling the duty ratio of the wave-emitting frequency to be a preset value, wherein the preset value is the lowest value in the starting process of the CLLC topological circuit;
in the soft start process of the CLLC topological circuit, the duty ratio of the control wave gradually increases along with the increase of the voltage, and the change rate of the duty ratio of the control wave gradually increases along with the increase of the voltage;
and when the soft start of the CLLC topological circuit is finished, controlling the voltage to reach a target voltage value, and controlling the duty ratio to reach 50%, wherein the target voltage value is a rated voltage value when the CLLC topological circuit works.
2. The frequency-push soft-start control method of the CLLC topology circuit of claim 1,
in the soft starting process of the CLLC topological circuit, the wave transmitting mode comprises a frequency modulation mode; the frequency modulation mode is as follows: and controlling periodic wave emission, wherein the period and the duty ratio of the wave emission are modulated according to the output voltage.
3. The frequency-push soft-start control method of the CLLC topology circuit of claim 2,
when the CLLC topological circuit is in soft start, wave emission is carried out in the frequency modulation mode;
in the process that the duty ratio and the voltage continuously rise, the real-time voltage value of the CLLC topological circuit is periodically collected;
and when the real-time voltage value is smaller than a first preset voltage value, the wave sending mode is kept to be carried out according to the frequency modulation mode, wherein the first preset voltage value is larger than the target voltage value.
4. The frequency-push soft-start control method of the CLLC topology circuit of claim 3,
in a certain wave-emitting period, obtaining the change rate of the duty ratio correspondingly according to the real-time voltage value acquired in the period; the change rate of the duty ratio is obtained by one-to-one correspondence of the change rate of the duty ratio and the voltage value according to a specified curve;
calculating the duty ratio of the next period according to the relationship between the change rate of the duty ratio and the duty ratio;
according to the process, wave sending is carried out periodically according to the duty ratio obtained through calculation;
wherein delay compensation is added when calculating the duty cycle.
5. The frequency-push soft-start control method of the CLLC topology circuit of claim 4,
in the soft start process of the CLLC topological circuit, the wave sending mode further comprises an intermittent mode, and the intermittent mode is used for protecting the CLLC topological circuit in the soft start process;
the wave-emitting mode is in the frequency modulation mode, and in the process that the duty cycle and the real-time voltage value continuously rise, when the real-time voltage value is greater than the first preset voltage value, the wave-emitting mode is switched from the frequency modulation mode to the intermittent mode;
wherein the intermittent mode is as follows: and when the real-time voltage value rises to be larger than the first preset voltage value, wave sealing is controlled so as to reduce the real-time voltage value until the real-time voltage value is smaller than the target voltage value and then wave is sent again.
6. The frequency-push soft-start control method of the CLLC topology circuit of claim 5,
when the wave-emitting mode is the intermittent mode, and the real-time voltage value is reduced to be smaller than a second preset voltage value in the reduction process of the real-time voltage value, controlling the wave-emitting mode to be switched from the intermittent mode to the frequency modulation mode; and the second preset voltage value is smaller than the target voltage value.
7. The frequency-push soft-start control method of the CLLC topology circuit of any one of claims 1-6,
in the soft start process of the CLLC topological circuit, when the time delay reaches the preset time after the duty ratio is increased to 50%, the soft start is finished; the time from the start of the soft start to the end of the delay is the soft start time.
8. The frequency-push soft-start control method of the CLLC topology circuit of any one of claims 3-6,
in the soft start process of the CLLC topological circuit, when the time delay is less than the preset time after the duty ratio is increased to 50%, the real-time voltage value reaches the target voltage value, the soft start is finished at the moment when the real-time voltage value reaches the target voltage value, and the time from the start of the soft start to the time when the real-time voltage value reaches the target voltage value is the soft start time.
9. A frequency-pushed soft-start control system of a CLLC topology circuit, comprising a memory and a processor, wherein the memory stores a control program, and the control program is used for implementing the frequency-pushed soft-start control method of the CLLC topology circuit according to any one of claims 1 to 8 when being executed by the processor.
10. A vehicle comprising the frequency-pushed soft-start control system of the CLLC topology of claim 9.
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CN114244126A (en) * 2021-12-03 2022-03-25 西安理工大学 Synchronous rectification method of bidirectional CLLC resonant converter
CN114244126B (en) * 2021-12-03 2024-01-16 西安理工大学 Synchronous rectification method of bidirectional CLLC resonant converter

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