CN112130388A - Array substrate, manufacturing method thereof, touch display panel and touch display device - Google Patents
Array substrate, manufacturing method thereof, touch display panel and touch display device Download PDFInfo
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- CN112130388A CN112130388A CN202011023803.0A CN202011023803A CN112130388A CN 112130388 A CN112130388 A CN 112130388A CN 202011023803 A CN202011023803 A CN 202011023803A CN 112130388 A CN112130388 A CN 112130388A
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- 239000000758 substrate Substances 0.000 title claims abstract description 101
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 16
- 239000004065 semiconductor Substances 0.000 claims description 54
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 239000011159 matrix material Substances 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 abstract description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 8
- 239000010408 film Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
Abstract
The invention provides an array substrate and a manufacturing method thereof, a touch display panel and a touch display device, wherein the array substrate comprises a first substrate, a plurality of touch electrodes, a first switch element, a second switch element, a common electrode and pixel electrodes, the second switch element is used for controlling liquid crystal molecules of a liquid crystal layer corresponding to a sub-pixel where the second switch element is located to deflect, the array substrate further comprises a plurality of touch signal lines, the touch electrodes are electrically connected to the same touch signal line, each touch electrode is at least connected to one first switch element, and whether the output electric signal of the touch electrode is transmitted to the corresponding touch signal line is controlled through the first switch element. In the invention, each touch electrode is connected through the first switch element, so that a plurality of touch electrodes can share one touch signal line, thereby greatly reducing the number of electric wires, avoiding the problem of excessive electric wires even if the size of the touch display panel is larger, and simultaneously avoiding the problem of excessive parasitic capacitance.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a manufacturing method of the array substrate, a touch display panel and a touch display device.
Background
The liquid crystal display panel has the advantages of good picture quality, small volume, light weight, low driving voltage, low power consumption, no radiation and relatively low manufacturing cost, and is dominant in the field of flat panel display. With the continuous progress of display technology, touch devices have gradually spread throughout the lives of people. Currently, Indium Tin Oxide (ITO) transparent conductive films are generally used as touch electrodes of touch devices. Due to the mature development of the liquid crystal display panel technology in recent years, the trend of combining the touch technology with the liquid crystal display panel is gradually becoming a trend.
Touch display panels generally include resistive touch screens, capacitive touch screens, infrared touch screens, acoustic wave touch screens, and electromagnetic induction touch screens. The capacitive touch screen comprises a self-capacitance type touch screen and a mutual capacitance type touch screen. The self-capacitance embedded touch device is mainly applied to a small-size panel at present, and on a large-size panel, the problems of excessive signal lines and excessive parasitic capacitance exist, and the number of chips (ICs) used is increased, so that the cost is increased. For example, for a 15.6 inch notebook computer, the size of the display area is 344.2mm 193.5mm, and since the electrodes are divided into 5mm, 2584 touch signal lines are required: 344.2/5-68,193.5/5-38, 68-2584; dividing the self-contained electrode by 7mm requires 1323 touch signal lines, 344.2/7-49,193.5/7-27, 49-1323.
Disclosure of Invention
The invention aims to provide an array substrate with a small number of touch signal lines, a manufacturing method of the array substrate, a touch display panel and a touch display device.
The invention provides an array substrate, which comprises a first substrate, a plurality of touch control electrodes, a first switch element, a second switch element, a common electrode and pixel electrodes, wherein the second switch element is used for controlling liquid crystal molecules of a liquid crystal layer corresponding to a sub-pixel where the second switch element is located to deflect, the array substrate further comprises a plurality of touch control signal lines, the touch control electrodes are electrically connected to the same touch control signal line, each touch control electrode is at least connected to one first switch element, whether the output electric signal of the touch control electrode is transmitted to the corresponding touch control signal line or not is controlled through the first switch element, and the common electrode and the pixel electrodes are arranged in an insulating mode at intervals.
Furthermore, the array substrate is limited by scanning lines and data lines to form a plurality of sub-pixels, each sub-pixel is internally provided with one pixel electrode and one second switch element, a plurality of adjacent sub-pixels form a pixel unit, and the area of each pixel unit is correspondingly provided with one first switch element.
Furthermore, the touch electrodes are arranged in a matrix, and each touch electrode covers the area of the pixel units; the touch control electrodes in the same row are electrically connected to the same touch control signal line, and the first switch elements in the same row are electrically connected to the same scanning line.
Further, the first switch element includes a first gate, a first semiconductor layer, a first source and a first drain, the first gate is electrically connected to the scan line, the first source and the first drain are respectively connected to the first semiconductor layer, the first source is electrically connected to one of the touch signal lines, and the first drain is electrically connected to one of the touch electrodes.
Furthermore, the touch electrode is arranged on the first substrate, a first insulating layer covers the touch electrode, the first grid electrode is arranged on the first insulating layer, a grid insulating layer covers the first insulating layer and the first grid electrode, the first semiconductor layer is arranged on the grid insulating layer, and the first source electrode and the first drain electrode are arranged on the first semiconductor layer.
Further, the second switching element includes a second gate, a second semiconductor layer, a second source and a second drain, the second gate is electrically connected to the scan line, the second source and the second drain are respectively connected to the second semiconductor layer, the second source is electrically connected to the data line, and the second drain is electrically connected to one of the pixel electrodes; the second grid electrode is arranged on the first insulating layer, the grid electrode insulating layer covers the first insulating layer and the second grid electrode, the second semiconductor layer is arranged on the grid electrode insulating layer, and the second source electrode and the second drain electrode are arranged on the second semiconductor layer.
Furthermore, the array substrate further comprises a first light shielding layer, wherein the first light shielding layer is arranged corresponding to the first grid electrode; or the array substrate further comprises a first metal layer, wherein the first metal layer is arranged on the common electrode and is electrically connected with the common electrode; or, the touch signal lines are electrically connected to the touch display chip.
The invention also provides a manufacturing method of the array substrate, which comprises the following steps:
providing a first substrate, and forming a first light shielding layer on the first substrate;
forming a touch electrode on the first shading layer and the first substrate;
forming a first insulating layer on the touch electrode;
forming a first gate electrode and a second gate electrode on the first insulating layer;
forming a gate insulating layer on the first gate and the second gate, and forming a first via hole penetrating through the gate insulating layer and the first insulating layer;
forming a first semiconductor layer and a second semiconductor layer on the gate insulating layer, wherein the first semiconductor layer corresponds to the first gate, and the second semiconductor layer corresponds to the second gate;
forming a first source electrode, a first drain electrode, a second source electrode and a second drain electrode, wherein the first source electrode and the first drain electrode are respectively located on the first semiconductor layer, the first source electrode and the first drain electrode are respectively connected with the first semiconductor layer, the second source electrode and the second drain electrode are respectively located on the second semiconductor layer, the second source electrode and the second drain electrode are respectively connected with the second semiconductor layer, and the first drain electrode penetrates through the first via hole and contacts with the touch electrode;
forming a second insulating layer on the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode;
forming a planarization layer on the second insulating layer;
forming a common electrode on the planarization layer;
forming a first metal layer on the common electrode to electrically connect the first metal layer with the common electrode;
forming a third insulating layer on the first metal layer, and simultaneously forming a second via hole penetrating through the third insulating layer, the first metal layer, the common electrode, the flat layer and the second insulating layer;
and forming a pixel electrode on the third insulating layer, wherein the pixel electrode is in contact with the second drain electrode through the second via hole.
The invention also provides a touch display panel, which comprises an array substrate, a color film substrate and a liquid crystal layer positioned between the array substrate and the color film substrate, wherein the array substrate is the array substrate.
The invention further provides a touch display device which comprises a backlight module and a touch display panel, wherein the touch display panel is the touch display panel, and the backlight module is positioned on one side of the color film substrate, which is far away from the array substrate.
In the array substrate, the touch display panel and the touch display device provided by the invention and the array substrate manufactured by the manufacturing method of the array substrate provided by the invention, each touch electrode is connected through the first switch element, so that a plurality of touch electrodes can share one touch signal line, the number of electric wires is greatly reduced, the problem of excessive electric wires is avoided even if the size of the touch display panel is larger, and the problem of excessive parasitic capacitance is also avoided.
Drawings
Fig. 1 is a schematic plan view of a touch display panel according to a first embodiment of the invention.
Fig. 2 is a pixel layout diagram of the touch display panel shown in fig. 1.
FIG. 3 is a schematic cross-sectional view taken at I-I of FIG. 2.
FIG. 4 is a schematic cross-sectional view at II-II in FIG. 2.
Fig. 5 is a schematic view of a manufacturing process of the touch display panel shown in fig. 1.
Fig. 6 is a schematic structural diagram of a touch display device according to an embodiment of the invention.
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
First embodiment
Fig. 1 is a schematic plan view illustrating a touch display panel according to a first embodiment of the invention, fig. 2 is a pixel layout diagram of the touch display panel shown in fig. 1, fig. 3 is a schematic sectional view taken at a position I-I in fig. 2, and fig. 4 is a schematic sectional view taken at a position II-II in fig. 2. Referring to fig. 1 to 4, the touch display panel of the first embodiment includes an array substrate 10, a color filter substrate 30, and a liquid crystal layer 50 located between the array substrate 10 and the color filter substrate 30.
In this embodiment, the array substrate 10 may be a thin film transistor array substrate. The array substrate 10 includes a first substrate 102, a plurality of touch electrodes 103, a first switching element 104 (see fig. 1 and 2), a second switching element 105 (see fig. 2), a common electrode 106, and a pixel electrode 108 (see fig. 2), wherein the common electrode 106 and the pixel electrode 108 are arranged in an insulating manner at intervals.
In this embodiment, the first substrate 102 may be a glass substrate or a transparent resin substrate.
In this embodiment, the common electrode 106 is a planar electrode, which covers the entire touch display panel. Specifically, the common electrode 106 is provided above the first switching element 104 and the second switching element 105.
In this embodiment, the pixel electrode 108 is a comb-shaped electrode, and each sub-pixel is correspondingly provided with one pixel electrode 108. Specifically, the pixel electrode 108 is disposed above the common electrode 106. It is understood that the positions of the pixel electrode 108 and the common electrode 106 may be interchanged.
In this embodiment, the first switch element 104 may specifically be a thin film transistor, and includes a first gate 116, a first semiconductor layer 117, a first source 118 and a first drain 119, the first gate 116 is electrically connected to the scan line 110, the first source 118 and the first drain 119 are respectively connected to the first semiconductor layer 117, the first source 118 is electrically connected to the touch signal line 114 (see fig. 1 and 2), and the first drain 119 is electrically connected to one touch electrode 103. Specifically, the first gate electrode 116 is provided on the first insulating layer 115, the first insulating layer 115 and the first gate electrode 116 are covered with the gate insulating layer 120, the first semiconductor layer 117 is provided on the gate insulating layer 120, and the first source electrode 118 and the first drain electrode 119 are provided on the first semiconductor layer 117. The first semiconductor layer 117 includes, for example, but not limited to, a thin amorphous silicon (a-Si) layer and two n + thin amorphous silicon layers on the thin amorphous silicon layer.
In this embodiment, the array substrate 10 further includes a first light-shielding layer 125, and the first light-shielding layer 125 is disposed corresponding to the first gate 116. Specifically, the first light-shielding layer 125 may be a Black Matrix (BM). The first light shielding layer 125 may be disposed between the touch electrode 103 and the first substrate 102. By providing the first light-shielding layer 125, the display effect of the touch display panel can be prevented from being affected by the reflection of the light from the first gate 116.
In this embodiment, the array substrate 10 further includes a second insulating layer 127 and a planarization layer 128, and the second insulating layer 127 covers the first source 118, the first drain 119, the second source 122 (see fig. 2), and the second drain 123 (see fig. 2). The planarization layer 128 covers the second insulating layer 127.
In this embodiment, the array substrate 10 further includes a first metal layer (not shown), which is disposed on the common electrode 106 and electrically connected to the common electrode 106. By providing the first metal layer, the impedance of the common electrode 106 can be reduced, and signal distortion and delay can be avoided.
In this embodiment, the array substrate 10 further includes a third insulating layer (not shown), and the third insulating layer covers the common electrode 106. The pixel electrode 108 is disposed on the third insulating layer.
In this embodiment, the color filter substrate 30 includes a second substrate 302, a color resist layer 304, a second light-shielding layer 306, and an upper electrode 308. The color resistance layer 304 is disposed on the second substrate 302, and the color resistance layer 304 includes a plurality of color resistances, which may include a red color resistance, a blue color resistance and a green color resistance, and each color resistance is disposed corresponding to one sub-pixel. The second light-shielding layer 306 is disposed between two adjacent color resists to avoid light mixing. The upper electrode 308 is disposed on a side of the color resist layer 304 away from the second substrate 302. The second light-shielding layer 306 may be a black matrix. The upper electrode 308 may be a viewing angle control electrode, and a vertical electric field is established between the upper electrode 308 and the common electrode 106 to control the liquid crystal molecules of the liquid crystal layer 50 to tilt up, so that narrow viewing angle display of the touch display panel is realized, and when the vertical electric field is not established between the upper electrode 308 and the common electrode 106, wide viewing angle display is realized, so that wide and narrow viewing angle switching of the touch display panel is realized. It is understood that the upper electrode 308 may also be omitted.
In this embodiment, the second substrate 302 may be a glass substrate or a transparent resin substrate.
In this embodiment, the color filter substrate 30 further includes a fourth insulating layer 310 disposed on a side of the upper electrode 308 away from the second substrate 302.
Referring to fig. 1 and fig. 2, in the present embodiment, the array substrate is defined by the scan lines 110 and the data lines 112 to form a plurality of sub-pixels, each sub-pixel is provided with a pixel electrode 108 and a second switching element 105, and a plurality of adjacent sub-pixels form a pixel unit P, specifically, in the present embodiment, three adjacent sub-pixels form a pixel unit P. The second switching element 105 is used to control whether the liquid crystal molecules of the liquid crystal layer 50 corresponding to the sub-pixel where the second switching element is located are deflected, so as to control the brightness of the sub-pixel area where the second switching element is located. The array substrate 10 further includes a plurality of touch signal lines 114, the plurality of touch electrodes 103 are electrically connected to the same touch signal line 114, each touch electrode 103 is at least connected to one first switch element 104, and whether to transmit the output electrical signal of the touch electrode 103 to the corresponding touch signal line 114 is controlled by the first switch element 104. Specifically, the touch electrode 103 may be a self-capacitance electrode.
In this embodiment, the touch electrodes 103 are arranged in a matrix. More specifically, one touch electrode 103 covers a plurality of pixel units P, and a first switch element 104 is disposed in each pixel unit P. In this embodiment, one touch electrode 103 covers the area of 9 pixel units P.
In this embodiment, the touch electrodes 103 in the same row are electrically connected to the same touch signal line 114. The first switch elements 104 in the same row are electrically connected to the same scan line 110. Specifically, the touch electrode 103 is disposed on the first substrate 102, and the first insulating layer 115 covers the touch electrode 103.
In this embodiment, the second switching element 105 may specifically be a thin film transistor, which includes a second gate (not shown), a second semiconductor layer (not shown), a second source 122 and a second drain 123, the second gate is electrically connected to the scan line 110, the second source 122 and the second drain 123 are respectively connected to the second semiconductor layer, the second source 122 is electrically connected to the data line 112, and the second drain 123 is electrically connected to one of the pixel electrodes 108. Specifically, the second gate electrode is disposed on the first insulating layer 115, the gate insulating layer 120 is covered on the first insulating layer 115 and the second gate electrode, the second semiconductor layer is disposed on the gate insulating layer 120, and the second source electrode 122 and the second drain electrode 123 are disposed on the second semiconductor layer. The second semiconductor layer includes, for example, but not limited to, a thin amorphous silicon (a-Si) layer and two thin n + amorphous silicon layers on the thin amorphous silicon layer.
In this embodiment, the touch display panel further includes a touch display chip 60, and the plurality of touch signal lines 114 are electrically connected to the touch display chip 60.
In the touch display panel of the embodiment, the scan lines 110 scan the touch electrodes 103 in each row, and the first switch elements 104 are turned on row by row, so that the electrical signals of the touch electrodes 103 in a certain row on each column are transmitted to the corresponding touch signal lines 114, and accordingly, whether the touch electrode 103 at the position is touched is determined, and a touch function is implemented. Since the first switch elements 104 are turned on row by row, it can be determined which row of the first switch elements 104 on each column is turned on at this time, and which touch electrode 103 transmits the electrical signal at this time.
In the touch display panel of the embodiment, each touch electrode 103 is connected 104 through the first switch element, so that the plurality of touch electrodes 103 can share one touch signal line 114, thereby greatly reducing the number of the touch signal lines 114, avoiding the problem of too many touch signal lines 114 even if the size of the touch display panel is large, and avoiding the problem of too large parasitic capacitance.
The present invention further provides an array substrate, which has the same structure as the array substrate 10, and is not described herein again.
Referring to fig. 5, the present invention further provides a method for manufacturing the array substrate 10 of the touch display panel, the method for manufacturing the array substrate includes the following steps:
s11, providing the first substrate 102, and forming the first light-shielding layer 125 on the first substrate 102. Specifically, a light-shielding layer is formed over the entire surface of the first substrate 102, and then the light-shielding layer is patterned to form the first light-shielding layer 125.
S12, a touch electrode 103 is formed on the first light-shielding layer 125 and the first substrate 102.
S13, a first insulating layer 115 is formed on the touch electrode 103.
S14, a first gate 116 and a second gate are formed on the first insulating layer 115. Specifically, a second metal layer may be formed on the first insulating layer 115, and the second metal layer may be patterned by etching or the like to form the first gate electrode 116 and the second gate electrode.
S15, a gate insulating layer 120 is formed on the first gate 116 and the second gate. While a first via may be formed through the gate insulating layer 120 and the first insulating layer 115.
S16, a first semiconductor layer 117 and a second semiconductor layer are formed on the gate insulating layer 120, wherein the first semiconductor layer 117 corresponds to the first gate electrode 116, and the second semiconductor layer corresponds to the second gate electrode. Specifically, the entire semiconductor layer may be formed on the gate insulating layer 120, and then the semiconductor layer may be patterned to form the first semiconductor layer 117 and the second semiconductor layer.
S17, forming a first source 118, a first drain 119, a second source 122, and a second drain 123, wherein the first source 118 and the first drain 119 are respectively located on the first semiconductor layer 117, the second source 122 and the second drain 123 are respectively located on the second semiconductor layer, and the first drain 119 passes through the first via hole to contact the touch electrode 103. Specifically, a third metal layer may be formed on the entire surface of the first semiconductor layer 117, the second semiconductor layer, and the gate insulating layer 120, and then the third metal layer may be patterned to form the first source electrode 118, the first drain electrode 119, the second source electrode 122, and the second drain electrode 123.
S18, a second insulating layer 127 is formed on the first source electrode 118, the first drain electrode 119, the second source electrode 122, and the second drain electrode 123.
S19, a planarization layer 128 is formed on the second insulating layer 127.
S20, the common electrode 106 is formed on the planarization layer 128.
S21, a first metal layer is formed on the common electrode 106, such that the first metal layer is electrically connected to the common electrode 106.
And S22, forming a third insulating layer on the first metal layer. While a second via may be opened through the third insulating layer, the first metal layer, the common electrode 106, the planarization layer 128, and the second insulating layer 127.
S23, forming the pixel electrode 108 on the third insulating layer, and contacting the pixel electrode 108 with the second drain electrode 123 through the second via hole. Specifically, a whole conductive layer may be formed on the third insulating layer, and then the conductive layer may be patterned to form the comb-shaped pixel electrode 108.
As can be seen, in the touch display panel of the embodiment, the first switch element 104 and the second switch element 105 are fabricated on the same layer of the array substrate and can be formed simultaneously in the manufacturing process, so that even if the first switch element 104 is added, the manufacturing process of the touch display panel is not too complicated, and the manufacturing cost is low.
It is to be understood that the first switching element 104 and the second switching element 105 may not be disposed on the same layer of the array substrate 10, but may be separately fabricated, which is not limited in the present invention.
The invention further provides a touch display device. Fig. 6 is a schematic structural diagram of a touch display device according to an embodiment of the invention. Referring to fig. 6, the touch display device of the present embodiment includes a backlight module 70 and a touch display panel, which may be the touch display panel of the first embodiment. The backlight module 70 is located on a side of the color film substrate 30 away from the array substrate 10, that is, the array substrate 10 is located on an outer side of the touch display panel.
In the touch display device of the embodiment, the backlight module 70 is located on one side of the color film substrate 30 away from the array substrate 10, that is, the array substrate 10 provided with the touch electrode 103 is located on the outer side of the touch display device, so that the signal-to-noise ratio of the touch display device can be improved, a high resistance film is not required to be arranged, and the electrostatic protection capability is improved.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. An array substrate is characterized by comprising a first substrate (102), a plurality of touch control electrodes (103), a first switch element (104), a second switch element (105), a common electrode (106) and a pixel electrode (108), the second switch element (105) controls the liquid crystal molecules of the liquid crystal layer (50) corresponding to the sub-pixel where the second switch element is located to deflect, the array substrate (10) further comprises a plurality of touch signal lines (114), the plurality of touch electrodes (103) are electrically connected to the same touch signal line (114), each touch electrode (103) is at least connected to one first switch element (104), controlling whether to transmit the output electric signal of the touch electrode (103) to the corresponding touch signal line (114) through the first switching element (104), the common electrode (106) and the pixel electrode (108) are arranged in an insulated mode at intervals.
2. The array substrate of claim 1, wherein the array substrate is defined by scan lines (110) and data lines (112) to form a plurality of sub-pixels, each sub-pixel is provided with one pixel electrode (108) and one second switching element (105), a plurality of adjacent sub-pixels form a pixel unit (P), and each pixel unit (P) is provided with one first switching element (104) in a corresponding region.
3. The array substrate according to claim 2, wherein a plurality of the touch electrodes (103) are arranged in a matrix, and each touch electrode (103) covers an area of a plurality of the pixel units (P); the touch electrodes (103) in the same row are electrically connected to the same touch signal line (114), and the first switch elements (104) in the same row are electrically connected to the same scan line (110).
4. The array substrate of claim 3, wherein the first switching element (104) comprises a first gate (116), a first semiconductor layer (117), a first source (118), and a first drain (119), the first gate (116) is electrically connected to the scan line (110), the first source (118) and the first drain (119) are respectively connected to the first semiconductor layer (117), the first source (118) is electrically connected to one of the touch signal lines (114), and the first drain (119) is electrically connected to one of the touch electrodes (103).
5. The array substrate according to claim 4, wherein the touch electrode (103) is disposed on the first substrate (102), a first insulating layer (115) covers the touch electrode (103), the first gate (116) is disposed on the first insulating layer (115), a gate insulating layer (120) covers the first insulating layer (115) and the first gate (116), the first semiconductor layer (117) is disposed on the gate insulating layer (120), and the first source electrode (118) and the first drain electrode (119) are disposed on the first semiconductor layer (117).
6. The array substrate of claim 5, wherein the second switching element (105) comprises a second gate, a second semiconductor layer, a second source (122) and a second drain (123), the second gate is electrically connected to the scan line (110), the second source (122) and the second drain (123) are respectively connected to the second semiconductor layer, the second source (122) is electrically connected to the data line (112), and the second drain (123) is electrically connected to one of the pixel electrodes (108); the second grid electrode is arranged on the first insulating layer (115), the grid electrode insulating layer (120) covers the first insulating layer (115) and the second grid electrode, the second semiconductor layer is arranged on the grid electrode insulating layer (120), and the second source electrode (122) and the second drain electrode (123) are arranged on the second semiconductor layer.
7. The array substrate of claim 6, wherein the array substrate (10) further comprises a first light shielding layer (125), the first light shielding layer (125) is disposed corresponding to the first gate (116); or, the array substrate (10) further includes a first metal layer (132), and the first metal layer (132) is disposed on the common electrode (106) and electrically connected to the common electrode (106); or, the touch signal lines (114) are all electrically connected to the touch display chip (60).
8. A method for manufacturing an array substrate includes:
providing a first substrate (102) and forming a first light-shielding layer (125) on the first substrate (102);
forming a touch electrode (103) on the first light shielding layer (125) and the first substrate (102);
forming a first insulating layer (115) on the touch electrode (103);
forming a first gate (116) and a second gate on the first insulating layer (115);
forming a gate insulating layer (120) on the first gate (116) and the second gate, and forming a first via hole through the gate insulating layer (120) and the first insulating layer (115);
forming a first semiconductor layer (117) and a second semiconductor layer on the gate insulating layer (120), the first semiconductor layer (117) corresponding to the first gate electrode (116) in position, the second semiconductor layer corresponding to the second gate electrode in position;
forming a first source electrode (118), a first drain electrode (119), a second source electrode (122) and a second drain electrode (123), wherein the first source electrode (118) and the first drain electrode (119) are respectively located on the first semiconductor layer (117), the first source electrode (118) and the first drain electrode (119) are respectively connected with the first semiconductor layer (117), the second source electrode (122) and the second drain electrode (123) are respectively located on the second semiconductor layer, the second source electrode (122) and the second drain electrode (123) are respectively connected with the second semiconductor layer, and the first drain electrode (119) passes through the first via hole to be in contact with the touch electrode (103);
forming a second insulating layer (127) on the first source (118), the first drain (119), the second source (122), and the second drain (123);
forming a planarization layer (128) on the second insulating layer (127);
forming a common electrode (106) on the planarization layer (128);
forming a first metal layer on the common electrode (106) so that the first metal layer is electrically connected with the common electrode (106);
forming a third insulating layer on the first metal layer, and simultaneously forming a second via hole penetrating through the third insulating layer, the first metal layer, the common electrode (106), the flat layer (128) and the second insulating layer (127);
and forming a pixel electrode (108) on the third insulating layer, and enabling the pixel electrode (108) to penetrate through the second through hole to be in contact with the second drain electrode (123).
9. A touch display panel, comprising an array substrate (10), a color filter substrate (30), and a liquid crystal layer (50) located between the array substrate (10) and the color filter substrate (30), wherein the array substrate (10) is the array substrate according to any one of claims 1 to 7.
10. A touch display device, comprising a backlight module (70) and a touch display panel, wherein the touch display panel is the touch display panel of claim 9, and the backlight module (70) is located on a side of the color filter substrate (30) away from the array substrate (10).
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