CN112117798A - Shutdown charging circuit of USB interface of notebook computer - Google Patents
Shutdown charging circuit of USB interface of notebook computer Download PDFInfo
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- CN112117798A CN112117798A CN202010949180.3A CN202010949180A CN112117798A CN 112117798 A CN112117798 A CN 112117798A CN 202010949180 A CN202010949180 A CN 202010949180A CN 112117798 A CN112117798 A CN 112117798A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
- H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00306—Overdischarge protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J2207/30—Charge provided using DC bus or data bus of a computer
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- General Engineering & Computer Science (AREA)
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The application relates to the technical field of circuits, in particular to a shutdown charging circuit of a USB interface of a notebook computer, which comprises: the USB charging device comprises a power supply voltage comparison circuit, a power supply switching circuit, a power supply voltage reduction circuit, a first USB charging interface circuit, a second USB charging interface circuit and a USB charging control circuit. The application comprises at least one of the following beneficial technical effects: the notebook computer plays a role of a charger, charges a mobile terminal such as a mobile phone connected with the notebook computer, and has the functions of convenient charging and no distance limitation; in the charging process, the notebook computer is not required to be started, so that the power consumption of the notebook computer is effectively reduced, and the long-term use is facilitated.
Description
Technical Field
The application relates to the technical field of circuits, in particular to a shutdown charging circuit of a USB interface of a notebook computer.
Background
Along with the continuous improvement of living standard of people, the use frequency and the time of people to mobile terminal equipment such as a mobile phone are gradually improved, the power consumption of the mobile phone is gradually increased, and the demand of charging the mobile phone anytime and anywhere is continuously increased.
The general mode is to charge the cell-phone through charging wire and plug cooperation, but because the length of charging wire is limited for application range when the cell-phone charges is restricted. The other mode is that moving charging is carried out through the treasured that charges, can disregard application range like this, charges when realizing removing. However, people are easy to forget to carry the mobile power bank and lose the mobile power bank, so that the mode is inconvenient and the loss cost is increased.
At present, people mostly use a notebook computer to carry out work or entertainment chatting, and an interface of the notebook computer can provide a charging connection function for a mobile phone. The portable notebook computer can be charged only when the portable notebook computer is in a standby state after being started, so that the power consumption of the notebook computer is large and the portable notebook computer is not beneficial to long-term use.
Disclosure of Invention
In order to enable the notebook computer to still charge the mobile terminal in a shutdown state, the shutdown charging circuit of the USB interface of the notebook computer is provided, and the mobile terminal can be charged after being connected with the shutdown notebook computer, so that the power consumption of the notebook computer is reduced.
The application provides a shutdown charging circuit of a notebook computer USB interface, discloses following scheme: a shutdown charging circuit of a USB interface of a notebook computer comprises: the power supply voltage comparison circuit is used for comparing the notebook computer power supply voltage with the battery reference voltage, and when the notebook computer power supply voltage is higher than the battery reference voltage, a power supply starting output signal is sent; when the voltage of the notebook computer power supply is lower than the reference voltage of the battery, sending a power supply output closing signal; the power supply switching circuit is used for receiving the output signal of the power supply voltage comparison circuit and keeping the power supply output state when receiving the output signal of the power supply; when receiving a power supply output closing signal, closing the charging function; the power supply voltage reduction circuit is used for reducing the output voltage of the notebook computer power supply when the power supply outputs; the first USB charging interface circuit is used for being connected with an external mobile terminal; the second USB charging interface circuit is used for being connected with an external mobile terminal; and the USB charging control circuit is used for detecting whether the mobile terminal is connected or not, and when the first USB charging interface circuit or the second USB charging interface circuit is detected to be connected with the mobile terminal, the mobile terminal is charged through the stepped-down notebook computer power supply.
By adopting the scheme, the notebook computer plays a role of a charger, the first USB charging interface circuit and the second USB charging interface circuit are used for being connected with the mobile terminals, so that the two mobile terminals can be charged at one time, and the charging efficiency is improved; the USB charging control circuit is used for detecting whether the first USB charging interface circuit and the second USB charging interface circuit are connected with the mobile terminal or not, and when the mobile terminal is detected to be connected, the charging can be realized; the power supply voltage comparison circuit is used for detecting the power supply of the notebook computer, when the power supply voltage of the notebook computer is detected to be low, the charging function is closed, and when the power supply voltage of the notebook computer is detected to be high, the charging function is opened; the function switching is realized through the power supply switching circuit; and the power supply voltage is reduced to the charging voltage of the mobile terminal through the power supply voltage reduction circuit.
Furthermore, the power supply voltage comparison circuit comprises an operational amplifier U1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a capacitor C1, wherein one end of the resistor R1 is connected with the + VBATA end of the power supply of the notebook computer, the other end of the resistor R1 is respectively connected with one end of a resistor R2, one end of the resistor R3 and the power supply reference voltage + VBATA _ REF end, the other end of the resistor R2 is grounded, and the other end of the resistor R3 is connected with the non-inverting input end of the operational amplifier U1; the inverting input end of the operational amplifier U1 is connected to one end of the resistor R4, one end of the resistor R5, and one end of the capacitor C1, respectively, the other end of the resistor R4 is connected to the + VCC3P3_ LDO _ OUT end, the other end of the resistor R5 is grounded, and the other end of the capacitor C1 is grounded.
By adopting the scheme, the power supply voltage comparison circuit is used for detecting the voltage of the battery and preventing the battery from over-discharging.
Further, the power switching circuit includes a transistor Q1, a transistor Q2, a transistor Q3 and a resistor R6, an output terminal of the operational amplifier U1 is connected to a G terminal of the transistor Q1 through a resistor R6, an S terminal of the transistor Q1 is grounded, a G terminal of the transistor Q2 is connected to + VBATA terminal of the notebook power battery and a D terminal of the transistor Q1, an S terminal of the transistor Q2 is connected to + VBATA terminal of the notebook power battery, a D terminal of the transistor Q2 is connected to + VUSB _ IN terminal, a D terminal of the transistor Q3 is connected to a D terminal of the transistor Q1, an S terminal of the transistor Q3 is grounded, and a G terminal of the transistor Q3 is connected to EC _ USB1_ EN.
By adopting the scheme, the switching between the shutdown charging function of the notebook computer and the shutdown charging function of the notebook computer is realized.
Further, the power supply voltage reduction circuit comprises a voltage reduction chip U2, a capacitor C2, a capacitor C3, a resistor R7, a resistor R8, a capacitor C4, a capacitor C5, a resistor R9, a diode D1, a resistor R10, a capacitor C6, an inductor L1, a capacitor C7, a capacitor C8, a resistor R11, a resistor R12 and a resistor R13; the model of the voltage reduction chip U2 is TSOT23-8L, a second pin of the voltage reduction chip U2 is grounded through a capacitor C2, a second pin of the voltage reduction chip U2 is grounded through a capacitor C3, and a second pin of the voltage reduction chip U2 is connected with a + VUSB _ IN end; a sixth pin of the voltage reduction chip U2 is respectively connected with one end of a resistor R7, one end of a resistor R8 and one end of a capacitor C4, the other end of the resistor R8 and the other end of the capacitor C4 are both grounded, and the other end of the resistor R7 is connected with a + VUSB _ IN end; the seventh pin of the buck chip U2 is connected with the + VCC _5V _ LDO end, and the seventh pin of the buck chip U2 is grounded through a capacitor C5; a first pin of the voltage reduction chip U2 is connected with the ends of the resistor R9 and the resistor + V3P 3A; a fifth pin of the buck chip U2 is connected to a cathode of the diode D1 and one end of the resistor R10, an anode of the diode D1 is connected to the + VCC _5V _ LDO terminal, and the other end of the resistor R10 is connected to one end of the inductor L1 through the capacitor C6; a third pin of the voltage reduction chip U2 is connected with one end of an inductor L1, the other end of the inductor L1 is grounded through a capacitor C7, the inductor L1 is connected with a + V5_ USB _ OUT end, and the other end of the inductor L1 is connected with one end of a capacitor C8 and one end of a resistor R11 respectively; an eighth pin of the voltage reduction chip U2 is connected with one end of a resistor R12, one end of a resistor R13 is respectively connected with the other end of the resistor R12, the other end of a capacitor C8 and the other end of a resistor R11, and the other end of the resistor R13 is grounded; the fourth pin of the buck chip U2 is connected to ground.
By adopting the scheme, the voltage of the notebook computer power supply is reduced to 5V.
Further, the USB charging control circuit includes a control chip U3, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a capacitor C9, and a capacitor C10; the model of the control chip U3 is FA3210, a first pin of the control chip U3 is connected to one end of a resistor R26, one end of a resistor R27, one end of a resistor R28, one end of a resistor R29, one end of a capacitor C9, one end of a capacitor C10, and a + V5_ USB end, the other end of a capacitor C9 and the other end of the capacitor C10 are both grounded, the other end of the resistor R26 and the other end of the resistor R27 are both connected to a + V5_ USB _ OUT end, and the other end of the resistor R28 and the other end of the resistor R29 are both connected to a + V5P0A end; the second pin of the control chip U3 is connected with the USB2_ P3_ DN end, and the third pin of the control chip U3 is connected with the USB2_ P3_ DP end; the fourth pin of the control chip U3 is connected with the + V5_ USB end through a resistor R14, and the fourth pin of the control chip U3 is grounded through a resistor R15; a fifth pin of the control chip U3 is connected with one end of a resistor R16, the other end of the resistor R16 is connected with a + V5_ USB end and one end of a resistor R17 respectively, and the other end of the resistor R17 is connected with an EC _ USB1_ CTL3 end; a sixth pin of the control chip U3 is connected with the end EC _ USB1_ CTL1 and one end of the resistor R18, and the other end of the resistor R18 is grounded; a seventh pin of the control chip U3 is connected with the end of EC _ USB1_ CTL2 and one end of a resistor R19, and the other end of the resistor R19 is grounded; the eighth pin of the control chip U3 is connected with the EC _ USB1_ CTL3 end; a ninth pin of the control chip U3 is connected to the STATUS _ N1 terminal, one end of the resistor R20, and one end of the resistor R21, the other end of the resistor R20 is connected to the + V5_ USB terminal, and the other end of the resistor R21 is grounded; the tenth pin of the control chip U3 is connected to the USB2_ P2_ DP _ IN 2; the eleventh pin of the control chip U3 is connected with the USB2_ P2_ DN _ IN 2; the twelfth pin of the control chip U3 is connected to the + VBUS _ USB2_3_0 terminal; a thirteenth pin of the control chip U3 is connected to one end of the resistor R22, one end of the resistor R25, and the FAULT _ STATUS1, the other end of the resistor R22 is connected to the + V5_ USB terminal, and the other end of the resistor R25 is grounded; the fourteenth pin of the control chip U3 is grounded; the fifteenth pin of the control chip U3 is grounded through a resistor R24; the sixteenth pin of the control chip U3 is grounded through a resistor R23; the seventeenth pin of the control chip U3 is connected to ground.
By adopting the scheme, whether the mobile terminal is connected or not is detected, and when the mobile terminal is detected to be connected with the first USB charging interface circuit or the second USB charging interface circuit, the mobile terminal is charged through the stepped-down notebook computer power supply
Furthermore, the first USB charging interface circuit is connected with a chip U3 and a USB interface J1, the model of the chip U3 is SLP2510P8, and the model of the USB interface J1 is CSTU-213913203.
Furthermore, the second USB charging interface circuit is connected with a chip U4 and a USB interface J2, the model of the chip U4 is SLP2510P8, and the model of the USB interface J2 is CSTU-213913203.
Further, operational amplifier U1 is model SOT-23-5.
In summary, the present application includes at least one of the following beneficial technical effects: the notebook computer plays a role of a charger, charges a mobile terminal such as a mobile phone connected with the notebook computer, and has the functions of convenient charging and no distance limitation; in the charging process, the notebook computer is not required to be started, so that the power consumption of the notebook computer is effectively reduced, and the long-term use is facilitated.
Drawings
Fig. 1 is a block diagram of modules of the present application.
Fig. 2 is a circuit diagram of a power supply voltage comparison circuit and a power supply switching circuit according to the present application.
Fig. 3 is a circuit diagram of the power supply voltage reduction circuit according to the present application.
Fig. 4 is a circuit diagram of a USB charging control circuit according to the present application.
Fig. 5 is a circuit diagram of a first USB charging interface circuit according to the present application.
Fig. 6 is a circuit diagram of a second USB charging interface circuit according to the present application.
Detailed Description
The present application is described in further detail below with reference to figures 1-6.
The embodiment of the present application discloses a shutdown charging circuit of a USB interface of a notebook computer, refer to fig. 1 to 6, including: the power supply voltage comparison circuit is used for comparing the notebook computer power supply voltage with the battery reference voltage, and when the notebook computer power supply voltage is higher than the battery reference voltage, a power supply starting output signal is sent; when the voltage of the notebook computer power supply is lower than the reference voltage of the battery, sending a power supply output closing signal; the power supply switching circuit is used for receiving the output signal of the power supply voltage comparison circuit and keeping the power supply output state when receiving the output signal of the power supply; when receiving a power supply output closing signal, closing the charging function; the power supply voltage reduction circuit is used for reducing the output voltage of the notebook computer power supply when the power supply outputs; the first USB charging interface circuit is used for being connected with an external mobile terminal; the second USB charging interface circuit is used for being connected with an external mobile terminal; and the USB charging control circuit is used for detecting whether the mobile terminal is connected or not, and when the first USB charging interface circuit or the second USB charging interface circuit is detected to be connected with the mobile terminal, the mobile terminal is charged through the stepped-down notebook computer power supply. Specifically, the notebook computer plays a role of a charger, the first USB charging interface circuit and the second USB charging interface circuit are used for being connected with the mobile terminals, so that the two mobile terminals can be charged at one time, and the charging efficiency is improved; the USB charging control circuit is used for detecting whether the first USB charging interface circuit and the second USB charging interface circuit are connected with the mobile terminal or not, and when the mobile terminal is detected to be connected, the charging can be realized; the power supply voltage comparison circuit is used for detecting the power supply of the notebook computer, when the power supply voltage of the notebook computer is detected to be low, the charging function is closed, and when the power supply voltage of the notebook computer is detected to be high, the charging function is opened; the function switching is realized through the power supply switching circuit; and the power supply voltage is reduced to the charging voltage of the mobile terminal through the power supply voltage reduction circuit. In the charging process, the notebook computer is not required to be started, so that the power consumption of the notebook computer is effectively reduced, and the long-term use is facilitated.
Referring to fig. 2, in the embodiment, the power voltage comparison circuit includes an operational amplifier U1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, and a capacitor C1, wherein one end of the resistor R1 is connected to a + VBATA terminal of the power supply of the notebook computer, the other end of the resistor R1 is connected to one end of a resistor R2, one end of the resistor R3, and a power reference voltage + VBATA _ REF terminal, the other end of the resistor R2 is grounded, and the other end of the resistor R3 is connected to a non-inverting input terminal of the operational amplifier U1; the inverting input end of the operational amplifier U1 is connected to one end of the resistor R4, one end of the resistor R5, and one end of the capacitor C1, respectively, the other end of the resistor R4 is connected to the + VCC3P3_ LDO _ OUT end, the other end of the resistor R5 is grounded, and the other end of the capacitor C1 is grounded. The power supply voltage comparison circuit is used for detecting the voltage of the battery and preventing the battery from over-discharging. Specifically, the voltage of the + VBATA end of the notebook computer power supply is compared with the + VBATA _ REF end of the power supply reference voltage, and when the voltage of the notebook computer power supply is lower than the power supply reference voltage, the external charging function is closed; and if the voltage of the power supply of the notebook computer is higher than the reference voltage of the power supply, starting an external charging function.
Referring to fig. 2, IN the embodiment, the power switching circuit includes a transistor Q1, a transistor Q2, a transistor Q3, and a resistor R6, an output terminal of the operational amplifier U1 is connected to a G terminal of the transistor Q1 through a resistor R6, an S terminal of the transistor Q1 is grounded, a G terminal of the transistor Q2 is connected to + VBATA terminal of the notebook power battery and a D terminal of the transistor Q1, an S terminal of the transistor Q2 is connected to + VBATA terminal of the notebook power battery, a D terminal of the transistor Q2 is connected to + VUSB _ IN terminal, a D terminal of the transistor Q3 is connected to a D terminal of the transistor Q1, an S terminal of the transistor Q3 is grounded, and a G terminal of the transistor Q3 is connected to EC _ USB1_ EN.
The power supply switching circuit is used for switching a shutdown charging function and a shutdown charging function of the notebook computer, and particularly, the power supply switching circuit is used for receiving an output signal of an output end of the operational amplifier U1 and keeping a power supply output state when receiving a power supply output signal; and when receiving the power supply output closing signal, closing the charging function.
Referring to fig. 3, in the embodiment, the power supply voltage reduction circuit includes a voltage reduction chip U2, a capacitor C2, a capacitor C3, a resistor R7, a resistor R8, a capacitor C4, a capacitor C5, a resistor R9, a diode D1, a resistor R10, a capacitor C6, an inductor L1, a capacitor C7, a capacitor C8, a resistor R11, a resistor R12, and a resistor R13; the model of the voltage reduction chip U2 is TSOT23-8L, a second pin of the voltage reduction chip U2 is grounded through a capacitor C2, a second pin of the voltage reduction chip U2 is grounded through a capacitor C3, and a second pin of the voltage reduction chip U2 is connected with a + VUSB _ IN end; a sixth pin of the voltage reduction chip U2 is respectively connected with one end of a resistor R7, one end of a resistor R8 and one end of a capacitor C4, the other end of the resistor R8 and the other end of the capacitor C4 are both grounded, and the other end of the resistor R7 is connected with a + VUSB _ IN end; the seventh pin of the buck chip U2 is connected with the + VCC _5V _ LDO end, and the seventh pin of the buck chip U2 is grounded through a capacitor C5; a first pin of the voltage reduction chip U2 is connected with the ends of the resistor R9 and the resistor + V3P 3A; a fifth pin of the buck chip U2 is connected to a cathode of the diode D1 and one end of the resistor R10, an anode of the diode D1 is connected to the + VCC _5V _ LDO terminal, and the other end of the resistor R10 is connected to one end of the inductor L1 through the capacitor C6; a third pin of the voltage reduction chip U2 is connected with one end of an inductor L1, the other end of the inductor L1 is grounded through a capacitor C7, the inductor L1 is connected with a + V5_ USB _ OUT end, and the other end of the inductor L1 is connected with one end of a capacitor C8 and one end of a resistor R11 respectively; an eighth pin of the voltage reduction chip U2 is connected with one end of a resistor R12, one end of a resistor R13 is respectively connected with the other end of the resistor R12, the other end of a capacitor C8 and the other end of a resistor R11, and the other end of the resistor R13 is grounded; the fourth pin of the buck chip U2 is connected to ground. The power supply voltage reduction circuit is used for reducing the voltage of the notebook computer power supply to 5V and supplying power to the outside through the first USB charging interface circuit or the second USB charging interface circuit.
Referring to fig. 4, in the embodiment, the USB charging control circuit includes a control chip U3, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a capacitor C9, and a capacitor C10; the model of the control chip U3 is FA3210, a first pin of the control chip U3 is connected to one end of a resistor R26, one end of a resistor R27, one end of a resistor R28, one end of a resistor R29, one end of a capacitor C9, one end of a capacitor C10, and a + V5_ USB end, the other end of a capacitor C9 and the other end of the capacitor C10 are both grounded, the other end of the resistor R26 and the other end of the resistor R27 are both connected to a + V5_ USB _ OUT end, and the other end of the resistor R28 and the other end of the resistor R29 are both connected to a + V5P0A end; the second pin of the control chip U3 is connected with the USB2_ P3_ DN end, and the third pin of the control chip U3 is connected with the USB2_ P3_ DP end; the fourth pin of the control chip U3 is connected with the + V5_ USB end through a resistor R14, and the fourth pin of the control chip U3 is grounded through a resistor R15; a fifth pin of the control chip U3 is connected with one end of a resistor R16, the other end of the resistor R16 is connected with a + V5_ USB end and one end of a resistor R17 respectively, and the other end of the resistor R17 is connected with an EC _ USB1_ CTL3 end; a sixth pin of the control chip U3 is connected with the end EC _ USB1_ CTL1 and one end of the resistor R18, and the other end of the resistor R18 is grounded; a seventh pin of the control chip U3 is connected with the end of EC _ USB1_ CTL2 and one end of a resistor R19, and the other end of the resistor R19 is grounded; the eighth pin of the control chip U3 is connected with the EC _ USB1_ CTL3 end; a ninth pin of the control chip U3 is connected to the STATUS _ N1 terminal, one end of the resistor R20, and one end of the resistor R21, the other end of the resistor R20 is connected to the + V5_ USB terminal, and the other end of the resistor R21 is grounded; the tenth pin of the control chip U3 is connected to the USB2_ P2_ DP _ IN 2; the eleventh pin of the control chip U3 is connected with the USB2_ P2_ DN _ IN 2; the twelfth pin of the control chip U3 is connected to the + VBUS _ USB2_3_0 terminal; a thirteenth pin of the control chip U3 is connected to one end of the resistor R22, one end of the resistor R25, and the FAULT _ STATUS1, the other end of the resistor R22 is connected to the + V5_ USB terminal, and the other end of the resistor R25 is grounded; the fourteenth pin of the control chip U3 is grounded; the fifteenth pin of the control chip U3 is grounded through a resistor R24; the sixteenth pin of the control chip U3 is grounded through a resistor R23; the seventeenth pin of the control chip U3 is connected to ground. The USB charging control circuit is used for detecting whether the mobile terminal is connected or not, and when the first USB charging interface circuit or the second USB charging interface circuit is detected to be connected with the mobile terminal, the mobile terminal is charged through the stepped-down notebook computer power supply.
Referring to fig. 5, in the present embodiment, the first USB charging interface circuit is connected to a chip U3 and a USB interface J1, the model of the chip U3 is SLP2510P8, and the model of the USB interface J1 is CSTU-213913203.
Referring to fig. 6, in the present embodiment, the second USB charging interface circuit is connected to a chip U4 and a USB interface J2, the model of the chip U4 is SLP2510P8, and the model of the USB interface J2 is CSTU-213913203.
In addition, one USB charging interface circuit is connected with the control chip U3, and the external charging function is still realized when the notebook computer is shut down. The other USB charging interface circuit is directly connected with a CPU of the notebook computer and can only have an external charging function in a starting-up state, wherein the current is 500mA at most.
In this embodiment, the operational amplifier U1 is of type SOT-23-5.
The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.
Claims (8)
1. A shutdown charging circuit of a USB interface of a notebook computer is characterized in that: the method comprises the following steps:
the power supply voltage comparison circuit is used for comparing the notebook computer power supply voltage with the battery reference voltage, and when the notebook computer power supply voltage is higher than the battery reference voltage, a power supply starting output signal is sent; when the voltage of the notebook computer power supply is lower than the reference voltage of the battery, sending a power supply output closing signal;
the power supply switching circuit is used for receiving the output signal of the power supply voltage comparison circuit and keeping the power supply output state when receiving the output signal of the power supply; when receiving a power supply output closing signal, closing the charging function;
the power supply voltage reduction circuit is used for reducing the output voltage of the notebook computer power supply when the power supply outputs;
the first USB charging interface circuit is used for being connected with an external mobile terminal;
the second USB charging interface circuit is used for being connected with an external mobile terminal;
and the USB charging control circuit is used for detecting whether the mobile terminal is connected or not, and when the first USB charging interface circuit or the second USB charging interface circuit is detected to be connected with the mobile terminal, the mobile terminal is charged through the stepped-down notebook computer power supply.
2. The shutdown charging circuit of the USB interface of the notebook computer according to claim 1, wherein: the power supply voltage comparison circuit comprises an operational amplifier U1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a capacitor C1, wherein one end of the resistor R1 is connected with the + VBATA end of the power supply of the notebook computer, the other end of the resistor R1 is respectively connected with one end of a resistor R2, one end of the resistor R3 and the + VBATA _ REF end of the power supply reference voltage, the other end of the resistor R2 is grounded, and the other end of the resistor R3 is connected with the non-inverting input end of the operational amplifier U1; the inverting input end of the operational amplifier U1 is connected to one end of the resistor R4, one end of the resistor R5, and one end of the capacitor C1, respectively, the other end of the resistor R4 is connected to the + VCC3P3_ LDO _ OUT end, the other end of the resistor R5 is grounded, and the other end of the capacitor C1 is grounded.
3. The shutdown charging circuit of the USB interface of the notebook computer according to claim 1, wherein: the power supply switching circuit comprises a transistor Q1, a transistor Q2, a transistor Q3 and a resistor R6, wherein the output end of an operational amplifier U1 is connected with the G end of a transistor Q1 through a resistor R6, the S end of the transistor Q1 is grounded, the G end of the transistor Q2 is respectively connected with the + VBATA end of the notebook power supply battery and the D end of the transistor Q1, the S end of the transistor Q2 is connected with the + VBATA end of the notebook power supply battery, the D end of the transistor Q2 is connected with the + VUSB _ IN end, the D end of the transistor Q3 is connected with the D end of the transistor Q1, the S end of the transistor Q3 is grounded, and the G end of the transistor Q3 is connected with EC _ USB1_ EN.
4. The shutdown charging circuit of the USB interface of the notebook computer according to claim 1, wherein: the power supply voltage reduction circuit comprises a voltage reduction chip U2, a capacitor C2, a capacitor C3, a resistor R7, a resistor R8, a capacitor C4, a capacitor C5, a resistor R9, a diode D1, a resistor R10, a capacitor C6, an inductor L1, a capacitor C7, a capacitor C8, a resistor R11, a resistor R12 and a resistor R13; the model of the voltage reduction chip U2 is TSOT23-8L, a second pin of the voltage reduction chip U2 is grounded through a capacitor C2, a second pin of the voltage reduction chip U2 is grounded through a capacitor C3, and a second pin of the voltage reduction chip U2 is connected with a + VUSB _ IN end; a sixth pin of the voltage reduction chip U2 is respectively connected with one end of a resistor R7, one end of a resistor R8 and one end of a capacitor C4, the other end of the resistor R8 and the other end of the capacitor C4 are both grounded, and the other end of the resistor R7 is connected with a + VUSB _ IN end; the seventh pin of the buck chip U2 is connected with the + VCC _5V _ LDO end, and the seventh pin of the buck chip U2 is grounded through a capacitor C5; a first pin of the voltage reduction chip U2 is connected with the ends of the resistor R9 and the resistor + V3P 3A; a fifth pin of the buck chip U2 is connected to a cathode of the diode D1 and one end of the resistor R10, an anode of the diode D1 is connected to the + VCC _5V _ LDO terminal, and the other end of the resistor R10 is connected to one end of the inductor L1 through the capacitor C6; a third pin of the voltage reduction chip U2 is connected with one end of an inductor L1, the other end of the inductor L1 is grounded through a capacitor C7, the inductor L1 is connected with a + V5_ USB _ OUT end, and the other end of the inductor L1 is connected with one end of a capacitor C8 and one end of a resistor R11 respectively; an eighth pin of the voltage reduction chip U2 is connected with one end of a resistor R12, one end of a resistor R13 is respectively connected with the other end of the resistor R12, the other end of a capacitor C8 and the other end of a resistor R11, and the other end of the resistor R13 is grounded; the fourth pin of the buck chip U2 is connected to ground.
5. The shutdown charging circuit of the USB interface of the notebook computer according to claim 1, wherein: the USB charging control circuit comprises a control chip U3, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a capacitor C9 and a capacitor C10; the model of the control chip U3 is FA3210, a first pin of the control chip U3 is connected to one end of a resistor R26, one end of a resistor R27, one end of a resistor R28, one end of a resistor R29, one end of a capacitor C9, one end of a capacitor C10, and a + V5_ USB end, the other end of a capacitor C9 and the other end of the capacitor C10 are both grounded, the other end of the resistor R26 and the other end of the resistor R27 are both connected to a + V5_ USB _ OUT end, and the other end of the resistor R28 and the other end of the resistor R29 are both connected to a + V5P0A end; the second pin of the control chip U3 is connected with the USB2_ P3_ DN end, and the third pin of the control chip U3 is connected with the USB2_ P3_ DP end; the fourth pin of the control chip U3 is connected with the + V5_ USB end through a resistor R14, and the fourth pin of the control chip U3 is grounded through a resistor R15; a fifth pin of the control chip U3 is connected with one end of a resistor R16, the other end of the resistor R16 is connected with a + V5_ USB end and one end of a resistor R17 respectively, and the other end of the resistor R17 is connected with an EC _ USB1_ CTL3 end; a sixth pin of the control chip U3 is connected with the end EC _ USB1_ CTL1 and one end of the resistor R18, and the other end of the resistor R18 is grounded; a seventh pin of the control chip U3 is connected with the end of EC _ USB1_ CTL2 and one end of a resistor R19, and the other end of the resistor R19 is grounded; the eighth pin of the control chip U3 is connected with the EC _ USB1_ CTL3 end; a ninth pin of the control chip U3 is connected to the STATUS _ N1 terminal, one end of the resistor R20, and one end of the resistor R21, the other end of the resistor R20 is connected to the + V5_ USB terminal, and the other end of the resistor R21 is grounded; the tenth pin of the control chip U3 is connected to the USB2_ P2_ DP _ IN 2; the eleventh pin of the control chip U3 is connected with the USB2_ P2_ DN _ IN 2; the twelfth pin of the control chip U3 is connected to the + VBUS _ USB2_3_0 terminal; a thirteenth pin of the control chip U3 is connected to one end of the resistor R22, one end of the resistor R25, and the FAULT _ STATUS1, the other end of the resistor R22 is connected to the + V5_ USB terminal, and the other end of the resistor R25 is grounded; the fourteenth pin of the control chip U3 is grounded; the fifteenth pin of the control chip U3 is grounded through a resistor R24; the sixteenth pin of the control chip U3 is grounded through a resistor R23; the seventeenth pin of the control chip U3 is connected to ground.
6. The shutdown charging circuit of the USB interface of the notebook computer according to claim 1, wherein: the first USB charging interface circuit is connected with a chip U3 and a USB interface J1, the model of the chip U3 is SLP2510P8, and the model of the USB interface J1 is CSTU-213913203.
7. The shutdown charging circuit of the USB interface of the notebook computer according to claim 1, wherein: the second USB charging interface circuit is connected with a chip U4 and a USB interface J2, the model of the chip U4 is SLP2510P8, and the model of the USB interface J2 is CSTU-213913203.
8. The shutdown charging circuit of the USB interface of the notebook computer according to claim 2, wherein: operational amplifier U1 is model SOT-23-5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010949180.3A CN112117798A (en) | 2020-09-10 | 2020-09-10 | Shutdown charging circuit of USB interface of notebook computer |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010949180.3A CN112117798A (en) | 2020-09-10 | 2020-09-10 | Shutdown charging circuit of USB interface of notebook computer |
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| Publication Number | Publication Date |
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| CN112117798A true CN112117798A (en) | 2020-12-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010949180.3A Pending CN112117798A (en) | 2020-09-10 | 2020-09-10 | Shutdown charging circuit of USB interface of notebook computer |
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| CN115756133A (en) * | 2022-11-03 | 2023-03-07 | 南京微智新科技有限公司 | Output power supply circuit and electronic equipment that intelligence switches |
| WO2023045683A1 (en) * | 2021-09-26 | 2023-03-30 | 荣耀终端有限公司 | Charging control method, electronic device, and charging control system |
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| US20030164644A1 (en) * | 2002-02-21 | 2003-09-04 | Hiroshi Sasaki | Power circuit and method for controlling same |
| US20140145504A1 (en) * | 2012-11-28 | 2014-05-29 | Renesas Electronics Corporation | Semiconductor integrated circuit and operation method of the same |
| CN107534311A (en) * | 2016-02-05 | 2018-01-02 | 广东欧珀移动通信有限公司 | For the charging system of terminal, charging method and power supply adaptor |
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Application publication date: 20201222 |