CN112117314A

CN112117314A - Display substrate, preparation method thereof and display device

Info

Publication number: CN112117314A
Application number: CN202011009246.7A
Authority: CN
Inventors: 鲍里斯·克里斯塔尔
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2020-09-23
Filing date: 2020-09-23
Publication date: 2020-12-22

Abstract

A display substrate, comprising: a plurality of pixel units disposed on the substrate. At least one of the plurality of pixel units includes a plurality of vertically stacked light emitting units of different colors. A transparent insulating layer is disposed between adjacent ones of the plurality of light emitting cells, and each of the light emitting cells includes: an upper electrode, a light-emitting functional layer, and a lower electrode are stacked.

Description

Display substrate, preparation method thereof and display device

Technical Field

The present disclosure relates to but not limited to the field of display technologies, and in particular, to a display substrate, a method for manufacturing the same, and a display device.

Background

Organic Light Emitting Diode (OLED) display panels and Quantum Dot (Quantum Dot) electroluminescent display panels are self-luminous, and have the advantages of being ultra-thin, large in viewing angle, active in Light emission, high in brightness, continuously adjustable in Light emission color, low in cost, fast in response speed, low in power consumption, wide in working temperature range, flexible in display, and the like, and have gradually become a next generation display technology with great development prospects, and are receiving more and more attention.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The embodiment of the disclosure provides a display substrate, a preparation method thereof and a display device.

In one aspect, an embodiment of the present disclosure provides a display substrate, including: a plurality of pixel units disposed on the substrate. At least one of the plurality of pixel units includes a plurality of vertically stacked light emitting units of different colors. A transparent insulating layer is disposed between adjacent ones of the plurality of light emitting cells, and each light emitting cell includes: an upper electrode, a light-emitting functional layer, and a lower electrode are stacked.

In some exemplary embodiments, the display substrate further includes a plurality of contact pads, and the light emitting cells are electrically connected to the corresponding driving circuits through the contact pads.

In some exemplary embodiments, the contact pad to which the upper electrode of the light emitting cell closest to the substrate is connected, and the contact pad to which the light emitting cells other than the light emitting cell closest to the substrate are connected are of a same layer structure.

In some exemplary embodiments, the lower electrode of the light emitting cell has one extension portion, and the upper electrode of the light emitting cell has one extension portion; the projection of the extension part of the lower electrode of the light-emitting unit on the substrate does not overlap with the projection of the extension part of the upper electrode on the substrate; the projection of the extension part of the lower electrode of the light-emitting unit on the substrate is overlapped with the projection of one contact pad on the substrate, and the projection of the extension part of the upper electrode of the light-emitting unit on the substrate is connected with the projection of one contact pad on the substrate.

In some exemplary embodiments, the display substrate further includes a plurality of pixel electrodes and a plurality of cathode lines; the lower electrode of the light-emitting unit is connected with the corresponding pixel electrode through the contact pad, the pixel electrode is electrically connected with the corresponding driving circuit, and the upper electrode of the light-emitting unit is electrically connected with the corresponding cathode line through the contact pad.

In some exemplary embodiments, the pixel electrode and the cathode line connected to the same light emitting unit are of the same layer structure.

In some exemplary embodiments, the plurality of vertically stacked light emitting cells of different colors includes: a red light emitting unit, a blue light emitting unit, and a green light emitting unit.

In some exemplary embodiments, the red light emitting unit, the green light emitting unit, and the blue light emitting unit are sequentially stacked in a direction away from the substrate; alternatively, the blue light emitting unit, the green light emitting unit, and the red light emitting unit are sequentially stacked in a direction away from the substrate.

In some exemplary embodiments, the upper electrode and the lower electrode of the plurality of vertically stacked light emitting cells are both transparent electrodes.

In some exemplary embodiments, a lower electrode of a light emitting cell closest to the substrate among the plurality of vertically stacked light emitting cells is a reflective electrode, or an upper electrode of a light emitting cell farthest from the substrate among the plurality of vertically stacked light emitting cells is a reflective electrode.

In another aspect, an embodiment of the present disclosure provides a display device including the display substrate as described above.

In another aspect, an embodiment of the present disclosure provides a method for manufacturing a display substrate, including: a plurality of pixel units are formed on a substrate. At least one of the plurality of pixel units includes a plurality of vertically stacked light emitting units of different colors. A transparent insulating layer is disposed between adjacent ones of the plurality of light emitting cells, and each of the light emitting cells includes: an upper electrode, a light-emitting functional layer, and a lower electrode are stacked.

In some exemplary embodiments, the forming of the plurality of pixel units on the substrate includes: forming a driving structure layer on the substrate, wherein the driving structure layer comprises a plurality of driving circuits; forming a lower electrode of a light-emitting unit on one side of the driving structure layer, which is far away from the substrate, wherein the lower electrode of the light-emitting unit is electrically connected with a driving circuit; forming at least one pixel defining layer, a plurality of pixel electrodes, a plurality of cathode lines and a plurality of contact pads on a side of the lower electrode of the light emitting unit away from the substrate, wherein the pixel defining layer has a pixel opening, the plurality of contact pads are respectively connected with the plurality of pixel electrodes and the plurality of cathode lines, and the plurality of pixel electrodes are respectively connected with the plurality of driving circuits; and sequentially forming a light-emitting function layer of the light-emitting unit, an upper electrode of the light-emitting unit and the rest of light-emitting units vertically stacked on the light-emitting unit at the pixel opening, wherein the upper electrode of the light-emitting unit and the upper electrodes of the rest of light-emitting units are respectively connected with the plurality of cathode lines through contact pads, and the lower electrodes of the rest of light-emitting units are respectively connected with the plurality of pixel electrodes through contact pads.

Other aspects will become apparent upon reading the attached drawings and the detailed description.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the example serve to explain the principles of the disclosure and not to limit the disclosure. The shapes and sizes of one or more of the elements in the drawings are not to be considered as true scale, but rather are merely intended to illustrate the present disclosure.

Fig. 1 is a schematic view of a display substrate according to at least one embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of a pixel unit according to at least one embodiment of the present disclosure;

fig. 3 is an electrical connection diagram of a pixel unit according to at least one embodiment of the disclosure;

fig. 4 is a schematic cross-sectional structure view of a display substrate according to at least one embodiment of the disclosure;

fig. 5 is a schematic flow chart illustrating a process for manufacturing a pixel unit according to at least one embodiment of the present disclosure;

fig. 6 is a schematic layout diagram of a pixel unit according to at least one embodiment of the present disclosure;

FIG. 7 is a schematic layout diagram of a pixel unit;

fig. 8 is a schematic view of a display device according to at least one embodiment of the present disclosure.

Detailed Description

To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Embodiments may be embodied in many different forms. One of ordinary skill in the art can readily appreciate the fact that the manner and content may be altered into one or more forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited to the contents described in the following embodiments. The embodiments and features of the embodiments in the present disclosure may be arbitrarily combined with each other without conflict.

In the drawings, the size of one or more constituent elements, the thickness of layers, or regions may be exaggerated for clarity. Therefore, one aspect of the present disclosure is not necessarily limited to the dimensions, and the shapes and sizes of the respective components in the drawings do not reflect a true scale. Further, the drawings schematically show ideal examples, and one embodiment of the present disclosure is not limited to the shapes, numerical values, and the like shown in the drawings.

The ordinal numbers such as "first", "second", "third", and the like in the present disclosure are provided to avoid confusion of the constituent elements, and are not limited in number. The "plurality" in the present disclosure means two or more numbers.

In the present disclosure, for convenience, terms indicating orientation or positional relationship such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like are used to explain positional relationship of constituent elements with reference to the drawings, only for convenience of description and simplification of description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured in a specific orientation, and be operated, and thus, should not be construed as limiting the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which the constituent elements are described. Therefore, the words described in the specification are not limited to the words described in the specification, and may be replaced as appropriate.

In this disclosure, the terms "mounted," "connected," and "connected" are to be construed broadly unless otherwise specifically stated or limited. For example, it may be a fixed connection, or a removable connection, or an integral connection; can be a mechanical connection, or an electrical connection; either directly or indirectly through intervening components, or both may be interconnected. The meaning of the above terms in the present disclosure can be understood by those of ordinary skill in the art as appropriate.

In the present disclosure, a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. In the present disclosure, the channel region refers to a region through which current mainly flows.

In the present disclosure, the first pole of the transistor may be a drain electrode and the second pole may be a source electrode, or the first pole of the transistor may be a source electrode and the second pole may be a drain electrode. In the case of using transistors of opposite polarities, or in the case of changing the direction of current flow during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged. Therefore, in the present disclosure, "source electrode" and "drain electrode" may be interchanged with each other.

In the present disclosure, "electrically connected" includes a case where constituent elements are connected together by an element having some kind of electrical action. The "element having a certain electric function" is not particularly limited as long as it can transmit and receive an electric signal between connected components. Examples of the "element having some kind of electric function" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, another element having one or more functions, and the like.

In the present disclosure, "film" and "layer" may be interchanged with one another. For example, the "conductive layer" may be sometimes replaced with a "conductive film". Similarly, the "insulating film" may be replaced with an "insulating layer".

"about" in this disclosure means that the limits are not strictly defined, and that the numerical values are within the tolerances allowed for the process and measurement.

A display substrate based on organic light emitting diodes or quantum dot electroluminescent elements includes a plurality of pixel units to display an image. For example, each pixel unit includes at least one red sub-pixel, one green sub-pixel, and one blue sub-pixel arranged side by side. The light emitting unit of each sub-pixel may include an anode, a light emitting function layer, and a cathode. The anode and the cathode supply holes and electrons to the light emitting functional layer to form excitons, and when the excitons drop to a stable bottom state, light of a predetermined wavelength is formed. Depending on the material properties of the organic light emitting layer, different colored sub-pixels may form light having wavelengths corresponding to different colors. For example, the red sub-pixel may form light having a wavelength corresponding to red according to the material characteristics of the red light emitting layer, the green sub-pixel may form light having a wavelength corresponding to green according to the material characteristics of the green light emitting layer, and the blue sub-pixel may form light having a wavelength corresponding to blue according to the material characteristics of the blue light emitting layer. However, since each sub-pixel requires a separate driving circuit, the pixel aperture ratio (aperture ratio) of the above display substrate is limited, for example, typically in the range of 20% to 35%.

At least one embodiment of the present disclosure provides a display substrate, including: a plurality of pixel units disposed on the substrate. At least one of the plurality of pixel units includes a plurality of vertically stacked light emitting units of different colors. A transparent insulating layer is disposed between adjacent ones of the plurality of light emitting cells, and each of the light emitting cells includes an upper electrode, a light emitting function layer, and a lower electrode which are stacked. In some examples, the upper electrode is located on a side of the light emitting function layer away from the substrate, and the lower electrode is located on a side of the light emitting function layer close to the substrate.

According to the display substrate provided by the embodiment, the plurality of light emitting units with different colors are vertically stacked in the pixel unit, so that the pixel aperture ratio of the pixel unit can be improved, and the service life of the display substrate can be prolonged.

In some examples, the upper electrode of each of the plurality of stacked light emitting units of the pixel unit may be an anode, and the lower electrode may be a cathode; alternatively, the upper electrode of each light emitting cell may be a cathode, and the lower electrode may be an anode. However, this embodiment is not limited to this. For example, the upper electrode of at least one of the plurality of stacked light emitting units of the pixel unit may be an anode, and the lower electrode may be a cathode, and the upper electrodes of the remaining light emitting units may be cathodes, and the lower electrodes may be anodes.

In some example embodiments, the display substrate may further include a plurality of contact pads. The light emitting units are electrically connected with the corresponding driving circuits through the contact pads. The upper electrode of the light-emitting unit is electrically connected with one contact pad, and the lower electrode of the light-emitting unit is electrically connected with the other contact pad. In this example, each light emitting cell may be electrically connected to a corresponding driving circuit through a contact pad, thereby achieving independent driving of each light emitting cell.

In some exemplary embodiments, the contact pad to which the upper electrode of the light emitting cell closest to the substrate is connected, and the contact pad to which the light emitting cell other than the light emitting cell closest to the substrate is connected are of a same layer structure. However, this embodiment is not limited to this. For example, the contact pads connected to the plurality of light emitting cells of the pixel unit are all of the same layer structure.

In some exemplary embodiments, the lower electrode of the light emitting cell has one extension portion, and the upper electrode of the light emitting cell has one extension portion. The projection of the extension part of the lower electrode of the light emitting unit on the substrate does not overlap with the projection of the upper electrode on the substrate. The projection of the extension part of the lower electrode of the light-emitting unit on the substrate is overlapped with the projection of one contact pad on the substrate, and the projection of the extension part of the upper electrode of the light-emitting unit on the substrate is overlapped with the projection of one contact pad on the substrate. The extension part of the lower electrode of the light emitting unit is connected with one contact pad, and the extension part of the upper electrode of the light emitting unit is connected with one contact pad.

In some exemplary embodiments, the display substrate further includes: a plurality of pixel electrodes and a plurality of cathode lines. The lower electrodes of the light-emitting units are connected with the corresponding pixel electrodes through contact pads, and the pixel electrodes are electrically connected with the corresponding driving circuits. The upper electrode of the light emitting cell is electrically connected to the corresponding cathode line through a contact pad. For example, the lower electrode of the light emitting unit may be an anode, and the upper electrode may be a cathode. Wherein, the cathode line can be connected with a low potential power line. The pixel electrode may be connected to a driving transistor of a driving circuit. However, this embodiment is not limited to this.

In some exemplary embodiments, the pixel electrode and the cathode line connected to the same light emitting unit are of the same layer structure. However, this embodiment is not limited to this. For example, the pixel electrode and the cathode line to which the plurality of vertically stacked light emitting cells included in one pixel unit are connected may each have a same layer structure.

In some exemplary embodiments, the plurality of vertically stacked light emitting units of different colors includes: a red light emitting unit, a blue light emitting unit, and a green light emitting unit. However, this embodiment is not limited to this.

In some exemplary embodiments, the red light emitting unit, the green light emitting unit, and the blue light emitting unit are sequentially stacked in a direction away from the substrate. Alternatively, the blue light emitting unit, the green light emitting unit, and the red light emitting unit are sequentially stacked in a direction along a direction away from the substrate. For example, the display substrate has a top emission structure, or may have a bottom emission structure.

In some exemplary embodiments, the upper electrode and the lower electrode of the plurality of stacked light emitting cells in the pixel unit are both transparent electrodes. In the present exemplary embodiment, the display substrate may be a transparent display structure having a bottom emission structure or a top emission structure.

In some exemplary embodiments, the lower electrode of the light emitting cell closest to the substrate among the plurality of vertically stacked light emitting cells is a reflective electrode, or the upper electrode of the light emitting cell farthest from the substrate among the plurality of vertically stacked light emitting cells is a reflective electrode. In this example, the display substrate may be an opaque display structure having a top emission structure, or may be an opaque display structure having a bottom emission structure.

Fig. 1 is a schematic view of a display substrate according to at least one embodiment of the present disclosure. As shown in fig. 1, the display substrate of the present exemplary embodiment may include a display area AA. A plurality of pixel units P are disposed in the display area AA. The plurality of pixel units P may be regularly arranged in an array. For example, M × N pixel units may be arranged in the display area AA, where M and N are positive integers. However, the present embodiment is not limited to the arrangement of the pixel units in the display region.

In some exemplary embodiments, the pixel unit includes, in a plane perpendicular to the display substrate: the light emitting device comprises a driving structure layer arranged on a substrate and a light emitting structure layer arranged on one side of the driving structure layer far away from the substrate. The driving structure layer may include a plurality of driving circuits, and the light emitting structure layer may include a plurality of vertically stacked light emitting units, and the plurality of light emitting units are connected to the plurality of driving circuits in a one-to-one correspondence. Each drive circuit may include a plurality of transistors and at least one storage capacitor, and may be, for example, a 2T1C, 3T1C, 5T1C, or 7T1C design. In some examples, each pixel cell may include three light emitting cells emitting different color light, which are vertically stacked. However, this embodiment is not limited to this.

Fig. 2 is a schematic structural diagram of a pixel unit according to at least one embodiment of the disclosure. Fig. 3 is an electrical connection diagram of a pixel unit according to at least one embodiment of the disclosure.

In some exemplary embodiments, as shown in fig. 2, the pixel unit may include: the first light emitting unit 20, the second light emitting unit 30, and the third light emitting unit 40 are vertically stacked. The first, second, and third

light emitting units

20, 30, and 40 are sequentially stacked in a direction away from the substrate. In some examples, the first light emitting unit 20 may be a red (R) light emitting unit, the second light emitting unit 30 may be a green (G) light emitting unit, and the third light emitting unit 40 may be a blue (B) light emitting unit. For example, multiple pixel cells can emit red, green, or blue light simultaneously, or any combination of these. However, this embodiment is not limited to this. In some examples, the first light emitting unit may be a blue light emitting unit, the second light emitting unit may be a green light emitting unit, and the third light emitting unit may be a red light emitting unit.

In some exemplary embodiments, as shown in fig. 2, the pixel unit includes a pixel opening 100. The projections of the first light emitting unit 20, the second light emitting unit 30, and the third light emitting unit 40 on the substrate cover the pixel opening 100. The portions of the first, second, and third

light emitting units

20, 30, and 40 located at the pixel opening 100 are used to emit light. In this example, the projection of the pixel opening 100 on the substrate may be a rounded rectangle. However, this embodiment is not limited to this. For example, the projection of the pixel opening onto the substrate may be a right-angled rectangle or other shape.

In some exemplary embodiments, as shown in fig. 2 and 3, the first light emitting unit 20 includes a first electrode 21, a first light emitting function layer 22, and a second electrode 23, which are sequentially stacked. The first electrode 21 is located on the side of the first luminescent functional layer 22 close to the substrate, and the second electrode 23 is located on the side of the first luminescent functional layer away from the substrate. The first electrode 21 is a lower electrode of the first light emitting cell 20, and the second electrode 23 is an upper electrode of the first light emitting cell 20. The second light emitting unit 30 includes a third electrode 31, a second light emitting function layer 32, and a fourth electrode 33, which are sequentially stacked. The third electrode 31 is located on the side of the second light-emitting function layer 32 close to the substrate, and the fourth electrode 33 is located on the side of the second light-emitting function layer 32 away from the substrate. The third electrode 31 is a lower electrode of the second light emitting cell 30, and the fourth electrode 33 is an upper electrode of the second light emitting cell 30. The third light emitting unit 40 includes a fifth electrode 41, a third light emitting function layer 42, and a sixth electrode 43, which are sequentially stacked. The fifth electrode 41 is located on the side of the third light emission functional layer 42 close to the substrate, and the sixth electrode 43 is located on the side of the third light emission functional layer 42 away from the substrate. The fifth electrode 41 is a lower electrode of the third light emitting unit 40, and the sixth electrode 43 is an upper electrode of the third light emitting unit 40. Any of the light Emitting function layers may include a light Emitting Layer (EML) and a multi-Layer structure including one or more of a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), a Hole Blocking Layer (HBL), an Electron Blocking Layer (EBL), an Electron blocking Layer (EIL), an Electron Injection Layer (EIL), and an Electron Transport Layer (ETL). A first transparent insulating layer 51 is disposed between the first light emitting unit 20 and the second light emitting unit 30. A second transparent insulating layer 52 is disposed between the second light emitting unit 30 and the third light emitting unit 40. As shown in fig. 3, the first transparent insulating layer 51 is positioned between the second electrode 23 and the third electrode 31. The second transparent insulating layer 52 is positioned between the fourth electrode 33 and the fifth electrode 41. In the present exemplary embodiment, by providing the transparent insulating layer between the adjacent light emitting cells, it is advantageous to implement independent driving of the light emitting cells, and mutual influence between the adjacent light emitting cells is avoided.

In some exemplary embodiments, the display substrate may be a transparent display substrate having a top emission structure. Wherein the first light-emitting unit 20 is a red light-emitting unit, the second light-emitting unit 30 is a green light-emitting unit, and the third light-emitting unit 40 is a blue light-emitting unit; the first electrode 21, the second electrode 23, the third electrode 31, the fourth electrode 33, the fifth electrode 41, and the sixth electrode 43 are all transparent electrodes. However, this embodiment is not limited to this. For example, the display substrate may be an opaque display substrate having a top emission structure. The first light-emitting unit is a red light-emitting unit, the second light-emitting unit is a green light-emitting unit, and the third light-emitting unit is a blue light-emitting unit; the first electrode may be a reflective electrode, and the second, third, fourth, fifth, and sixth electrodes may be transparent electrodes. As another example, the display substrate may be a transparent display substrate having a bottom emission structure. The first light-emitting unit is a blue light-emitting unit, the second light-emitting unit is a green light-emitting unit, and the third light-emitting unit is a red light-emitting unit; the first electrode, the second electrode, the third electrode, the fourth electrode, the fifth electrode and the sixth electrode may be transparent electrodes. As another example, the display substrate may be an opaque display substrate having a bottom emission structure. The first light-emitting unit is a blue light-emitting unit, the second light-emitting unit is a green light-emitting unit, and the third light-emitting unit is a red light-emitting unit; the first electrode, the second electrode, the third electrode, the fourth electrode, and the fifth electrode may be transparent electrodes, and the sixth electrode may be a reflective electrode.

In some exemplary embodiments, the upper electrode of the light emitting unit may be an anode, and the lower electrode may be a cathode. The upper electrode of the light-emitting unit is electrically connected with the corresponding driving circuit, and the lower electrode of the light-emitting unit is electrically connected with the corresponding cathode wire. For example, the first electrode 21, the third electrode 31, and the fifth electrode 41 may be anodes, and the second electrode 23, the fourth electrode 33, and the sixth electrode 43 may be cathodes. However, this embodiment is not limited to this. In some examples, the first, third, and fifth electrodes may be cathodes, and the second, fourth, and sixth electrodes may be anodes. For another example, at least one of the first electrode, the third electrode, and the fifth electrode is an anode, and the rest are cathodes; at least one of the second electrode, the fourth electrode and the sixth electrode is a cathode, and the rest are anodes.

In some exemplary embodiments, as shown in fig. 2 and 3, the first electrode 21 of the first light emitting unit 20 has a first extension 201, and the second electrode 23 has a second extension 203. The third electrode 31 of the second light emitting unit 30 has a third extension 301, and the fourth electrode 33 has a fourth extension 303. The fifth electrode 41 of the third light emitting unit 40 has a fifth extension portion 401, and the sixth electrode 43 has a sixth extension portion 403. The projections of the first extension 201, the second extension 203, the third extension 301, the fourth extension 303, the fifth extension 401, and the sixth extension 403 on the substrate do not overlap with the projection of the pixel opening 100 on the substrate. As shown in fig. 2, projections of the first extension 201, the third extension 301, and the fifth extension 401 on the substrate are located on a first side of the pixel opening 100, projections of the second extension 203, the fourth extension 303, and the sixth extension 403 on the substrate are located on a second side of the pixel opening 100, and the first side is opposite to the second side. As shown in fig. 2, taking the pixel opening 100 as a rectangle as an example, the projection of the first extension 201 on the substrate and the projection of the sixth extension 403 on the substrate are symmetrical to each other along the center line of the short side of the pixel opening 100; the projection of the third extending portion 301 on the substrate and the projection of the fourth extending portion 302 on the substrate are symmetrical to each other along the center line of the short side of the pixel opening 100; the projection of the second extension portion 203 on the substrate and the projection of the fourth extension portion 401 on the substrate are symmetrical to each other along the center line of the short side of the pixel opening 100. However, this embodiment is not limited to this. For example, the projection of the first extension portion on the substrate and the projection of the second extension portion on the substrate may be symmetrical to each other along the center line of the short side of the pixel opening; the projection of the third extension part on the substrate and the projection of the fourth extension part on the substrate can be symmetrical with each other along the center line of the short side of the pixel opening; the projection of the fifth extension part on the substrate and the projection of the sixth extension part on the substrate may be symmetrical to each other along the center line of the short side of the pixel opening. In some examples, the projections of the first extension 201, the second extension 203, the third extension 301, the fourth extension 303, the fifth extension 401, and the sixth extension 403 on the substrate may all be rectangular. However, this embodiment is not limited to this.

In some exemplary embodiments, as shown in fig. 2 and 3, the pixel cell further includes a first contact pad 201a, a second contact pad 203a, a third contact pad 301a, a fourth contact pad 303a, a fifth contact pad 401a, and a sixth contact pad 403 a. The projections of the six contact pads on the substrate surround the periphery of the projection of the pixel opening 100 on the substrate. A projection of the first extension 201 of the first electrode 21 of the first light emitting unit 20 on the substrate may cover a projection of the first contact pad 201a on the substrate, and a projection of the second extension 203 of the second electrode 23 on the substrate may cover a projection of the second contact pad 203a on the substrate. The first electrode 21 may be electrically connected to the first contact pad 201a through the first extension 201, and the second electrode 23 may be electrically connected to the second contact pad 203a through the second extension 203. A projection of the third extension 301 of the third electrode 31 of the second light emitting unit 30 on the substrate may cover a projection of the third contact pad 301a on the substrate, and a projection of the fourth extension 303 of the fourth electrode 33 on the substrate may cover a projection of the fourth contact pad 303a on the substrate. The third electrode 31 may be electrically connected to the third contact pad 301a through the third extension part 301, and the fourth electrode 33 may be electrically connected to the fourth contact pad 303a through the fourth extension part 303. A projection of the fifth extension portion 401 of the fifth electrode 41 of the third light emitting unit 40 on the substrate may cover a projection of the fifth contact pad 401a on the substrate, and a projection of the sixth extension portion 403 of the sixth electrode 43 on the substrate may cover a projection of the sixth contact pad 403a on the substrate. The fifth electrode 41 may be electrically connected to the fifth contact pad 401a through the fifth extension portion 401, and the sixth electrode 43 may be electrically connected to the sixth contact pad 403a through the sixth extension portion 403. The projection of the plurality of contact pads onto the substrate may be rectangular or square. However, this embodiment is not limited to this.

The structure of the display substrate is explained below by way of an example of a manufacturing process of the display substrate. The "patterning process" referred to in this disclosure includes depositing a film layer, coating a photoresist, mask exposing, developing, etching, and stripping a photoresist. The deposition may employ any one or more of sputtering, evaporation and chemical vapor deposition, the coating may employ any one or more of spray coating and spin coating, and the etching may employ any one or more of dry etching and wet etching. "thin film" refers to a layer of a material deposited or coated onto a substrate. The "thin film" may also be referred to as a "layer" if it does not require a patterning process throughout the fabrication process. If the "thin film" requires a patterning process during the entire fabrication process, it is referred to as a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process includes at least one "pattern".

The term "a and B are disposed in the same layer" in the present disclosure means that a and B are formed simultaneously by the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of the present disclosure, "the projection of a includes the projection of B," means that the boundary of the projection of B falls within the boundary range of the projection of a, or the boundary of the projection of a overlaps with the boundary of the projection of B.

In some exemplary embodiments, the manufacturing process of the display substrate of the present embodiment may include the following steps (1) to (4). In the present exemplary embodiment, a display substrate of a top emission structure is exemplified. Fig. 4 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure. Fig. 5 is a schematic flow chart illustrating a process for manufacturing a pixel unit according to at least one embodiment of the present disclosure.

(1) And preparing a driving structure layer on the substrate.

In some exemplary embodiments, the substrate 60 may be a rigid substrate (e.g., a glass substrate) or a flexible substrate (e.g., made of Polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer film).

In some exemplary embodiments, the driving structure layer includes driving circuits corresponding to the plurality of light emitting cells one to one. Each driver circuit may comprise a plurality of transistors and at least one storage capacitor, for example in a 2T1C, 3T1C, 5T1C or 7T1C design. As shown in fig. 4, a driving circuit of three light emitting units included in one pixel unit is exemplified, wherein each driving circuit is exemplified by only one transistor.

In some exemplary embodiments, the manufacturing process of the driving structure layer may refer to the following description.

A first insulating film and an active layer film are sequentially deposited on the substrate 60, and the active layer film is patterned through a patterning process to form a first insulating layer 61 covering the entire substrate 60 and an active layer pattern disposed on the first insulating layer 61. The active layer pattern includes at least a first active layer 62A, a second active layer 62B, and a third active layer 62C. Each active layer includes a source region, a channel region, and a drain region, the channel region being located between the source region and the drain region.

Subsequently, a second insulating film and a first metal film are sequentially deposited, and the first metal film is patterned through a patterning process to form a second insulating layer 63 covering the active layer pattern and a gate metal layer pattern disposed on the second insulating layer 63. The gate metal layer pattern includes at least a first gate electrode 64A, a second gate electrode 64B, and a third gate electrode 64C. The first gate electrode 64A, the second gate electrode 64B, and the third gate electrode 64C may be connected to a gate line (not shown) for applying a switching signal to the thin film transistor.

Subsequently, a third insulating film is deposited and patterned through a patterning process to form a third insulating layer 65 pattern covering the gate metal layer. The third insulating layer 65 is provided with a plurality of first via holes, and the third insulating layer 65 and the second insulating layer 63 in the plurality of first via holes are etched away to expose the surfaces of the source region and the drain region of the first active layer 62A, the surfaces of the source region and the drain region of the second active layer 62B, and the surfaces of the source region and the drain region of the third active layer 62C, respectively.

Subsequently, a second metal film is deposited, and the second metal film is patterned through a patterning process to form a source-drain metal layer pattern on the third insulating layer 65. The source-drain metal layer pattern includes at least a first source electrode 66A, a first drain electrode 67A, a second source electrode 66B, a second drain electrode 67B, a third source electrode 66C, and a third drain electrode 67C. The first source electrode 66A and the first drain electrode 67A may be connected to the source region and the drain region of the first active layer 62A through first vias, respectively; the second source electrode 66B and the second drain electrode 67B may be connected to the source region and the drain region of the second active layer 62B through first vias, respectively; the third source electrode 66C and the third drain electrode 67C may be connected to the source region and the drain region of the third active layer 62C through first vias, respectively.

As shown in fig. 4, in the driving circuit of the pixel unit, the first active layer 62A, the first gate electrode 64A, the first source electrode 66A, and the first drain electrode 67A may constitute a first transistor; the second active layer 62B, the second gate electrode 64B, the second source electrode 66B, and the second drain electrode 67B may constitute a second transistor; the third active layer 62C, the third gate electrode 64C, the third source electrode 66C, and the third drain electrode 67C may constitute a third transistor. The first transistor may be a driving transistor in a driving circuit corresponding to the first light emitting unit, the second transistor may be a driving transistor in a driving circuit corresponding to the second light emitting unit, and the third transistor may be a driving transistor in a driving circuit corresponding to the third light emitting unit. However, this embodiment is not limited to this.

In some exemplary embodiments, the first, second, and third insulating

layers

61, 63, and 65 may employ any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multi-layer, or a composite layer. The first insulating layer 61 is called a Buffer layer for improving the water and oxygen resistance of the substrate; the second insulating layer 63 is referred to as a Gate Insulator (GI) layer; the third insulating layer 65 is referred to as an Interlayer Dielectric (ILD) layer. The first metal thin film and the second metal thin film may employ a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, or the like. The active layer thin film is made of one or more materials such as an amorphous indium gallium zinc Oxide material (a-IGZO), zinc oxynitride (ZnON), Indium Zinc Tin Oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene and polythiophene, and the embodiment of the disclosure is applicable to transistors manufactured based on an Oxide (Oxide) technology, a silicon technology and an organic matter technology.

(2) And forming a fourth insulating layer and a fifth insulating layer on the substrate with the patterns.

In some exemplary embodiments, a fourth insulating film is deposited on the substrate 60 on which the aforementioned pattern is formed, a fourth insulating layer 68 covering the source-drain metal layer is formed through a patterning process, then, a flat film of an organic material is coated on the fourth insulating layer 68, a fifth insulating layer 69 covering the entire substrate 60 is formed, and a plurality of second vias are formed on the fifth insulating layer 69 through a masking, exposing, and developing process. As shown in fig. 4, the fifth insulating layer 69 and the fourth insulating layer 68 in the second via hole are removed to expose the surface of the first drain electrode 67A.

In some exemplary embodiments, the fourth insulating layer 68 may employ any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multi-layer, or a composite layer. The fourth insulating layer is referred to as a Passivation (PVX) layer. The fifth insulating layer may employ an organic material such as acryl (acryl), polyimide, or benzocyclobutene (BCB). The fifth insulating layer is referred to as a Planarization (PLN) layer.

(3) And forming a light emitting structure layer on the substrate with the pattern.

In some exemplary embodiments, the light emitting structure layer of the pixel unit includes a plurality of vertically stacked light emitting units. As shown in fig. 4 and 5, three vertically stacked light emitting units of one pixel unit are exemplified for explanation. The process of fabricating the light emitting structure layer of the pixel unit can be described with reference to the following description.

A first conductive film is deposited on the substrate 60 on which the aforementioned pattern is formed, and the first conductive film is patterned through a patterning process to form a pattern of the first pixel electrode 121, the first electrode 21, and the first cathode line 123. The first pixel electrode 121 has a first Contact Pad (Contact Pad)201a, and the first pixel electrode 121 is electrically connected to the first drain electrode 67A of the first transistor through a second via hole on the fifth insulating layer 69. As shown in fig. 4 and 5 (i), the first electrode 21 and the first pixel electrode 121 may be of an integral structure. However, this embodiment is not limited to this.

Subsequently, a first Pixel Defining film is applied, and a first Pixel Defining Layer (PDL) 71 is patterned through a mask, exposure, and development process. A plurality of third via holes are formed on the first pixel defining layer 71. As shown in fig. 4, the first pixel defining layer 71, the fifth insulating layer 69, and the fourth insulating layer 68 in the third via hole are removed to expose the surface of the second drain electrode 67B of the second transistor.

Subsequently, a third metal film is deposited and patterned through a patterning process to form a second pixel electrode 131 and a second cathode line 133 on the first pixel defining layer 71. The second pixel electrode 131 is connected to the second drain electrode 67B of the second transistor through the third via hole.

Subsequently, a second pixel defining film is applied, and the second pixel defining layer 72 is patterned through a mask, exposure, and development process. A plurality of fourth via holes are formed on the second pixel defining layer 72. As shown in fig. 4, the second pixel defining layer 72, the first pixel defining layer 71, the fifth insulating layer 69, and the fourth insulating layer 68 in the fourth via hole are removed to expose the surface of the third drain electrode 67C of the third transistor.

Subsequently, a fourth metal film is deposited and patterned through a patterning process to form a third pixel electrode 141 and a third cathode line 143 on the second pixel defining layer 72. The third pixel electrode 141 is connected to the third drain electrode 67C of the third transistor through a fourth via hole.

Subsequently, a third pixel defining film is coated, and a third pixel defining layer 73 is patterned through a mask, exposure, and development process. A plurality of pixel openings, a plurality of fifth vias, a plurality of sixth vias, and a plurality of seventh vias are formed on the third pixel defining layer 73. As shown in fig. 4, the third pixel defining layer 73 in the fifth via holes is removed to expose the surfaces of the third pixel electrode 141 and the third cathode line 143, respectively. The third pixel defining layer 73 and the second pixel defining layer 72 in the sixth via holes are removed to expose surfaces of the second pixel electrode 131 and the second cathode line 132, respectively. The third pixel defining layer 73, the second pixel defining layer 72 and the first pixel defining layer 71 in the seventh via hole are removed to expose the surface of the first cathode line 123. The third pixel defining layer 73, the second pixel defining layer 72 and the first pixel defining layer 71 in the pixel opening are removed to expose the surface of the first electrode 21.

Subsequently, a fifth metal thin film is deposited and patterned by a patterning process to form the second contact pad 203a, the third contact pad 301a, the fourth contact pad 303a, the fifth contact pad 401a, and the sixth contact pad 403 a. The second contact pad 203a fills the seventh via hole and is connected to the first cathode line 123; the third contact pad 301a fills the sixth via hole and is connected to the second pixel electrode 131; the fourth contact pad 303a fills the sixth via hole and is connected to the second cathode line 133; the fifth contact pad 401a fills the fifth via hole and is connected to the third pixel electrode 141; the sixth contact pad 403a fills the fifth via hole and is connected to the third cathode line 143. To this end, as shown in fig. 5 (ii), a second contact pad 203a, a third contact pad 301a, a fourth contact pad 303a, a fifth contact pad 401a and a sixth contact pad 403a are formed on the third pixel definition layer 73, and the second contact pad 203a, the third contact pad 301a, the fourth contact pad 303a, the fifth contact pad 401a and the sixth contact pad 403a are in the same layer structure.

Subsequently, a first light emitting function layer 22 is deposited on the first electrode 21 exposed at the pixel opening using a vacuum process, a solution process, or a combination thereof, as shown in fig. 5 (iii). In some examples, the first light emitting function layer 22 may include a first hole injection layer, a first hole transport layer, a first light emitting layer, and a first electron transport layer, which are sequentially stacked in a direction away from the substrate. For example, a first hole injection layer and a first hole transport layer are sequentially formed by evaporation using an Open Mask, and then a first light emitting layer (for example, a red light emitting layer) is formed by evaporation using a Fine Metal Mask (FMM), and then a first electron transport layer is formed by evaporation using an Open Mask.

Subsequently, a second conductive film is deposited and patterned through a patterning process to form a second electrode 23 on the first light emitting function layer 22, as shown in fig. 5 (iv). The second electrode 23 has a second extension portion 203, and a projection of the second extension portion 203 on the substrate may cover a projection of the second contact pad 203a on the substrate. The second extension portion 203 may directly contact the second contact pad 203 a. The second electrode 23 is electrically connected to the second contact pad 203a through the second extension portion 203. The second electrode 23 is electrically connected to the first cathode line 123 through the second contact pad 203 a. Thus, a first light emitting unit is formed on the substrate. The first light emitting unit may be a red light emitting unit.

Subsequently, a first transparent insulating film is deposited and patterned through a patterning process to form a first transparent insulating layer 51 covering the second electrode 23. As shown in fig. 4 and 5 (v), the projection of the first transparent insulating layer 51 on the substrate may not overlap with the projections of the third contact pad 301a, the fourth contact pad 303a, the fifth contact pad 401a, and the sixth contact pad 403a on the substrate. The first transparent insulating layer 51 serves to electrically insulate the first light emitting unit from the second light emitting unit, thereby preventing mutual influence therebetween. Only the first transparent insulating layer 51 within the pixel opening is illustrated in fig. 5 (v).

Subsequently, a third conductive film is deposited and patterned through a patterning process to form the third electrode 31 on the first transparent insulating layer 51, as shown in fig. 5 (vi). The third electrode 31 has a third extension portion 301, and a projection of the third extension portion 301 on the substrate may cover a projection of the third contact pad 301a on the substrate. The third extension part 301 may directly contact the third contact pad 301 a. The third electrode 31 is electrically connected to the third contact pad 301a through the third extension part 301. The third electrode 31 is electrically connected to the second pixel electrode 131 through the third contact pad 301 a.

Subsequently, a second light emitting function layer 32 is deposited on the third electrode 31 using a vacuum process, a solution process, or a combination thereof, as shown in fig. 5 (vii). In some examples, the second light emitting function layer 32 may include a second hole injection layer, a second hole transport layer, a second light emitting layer (e.g., a green light emitting layer), and a second electron transport layer, which are sequentially stacked in a direction away from the substrate. As for the preparation process of the second light emitting function layer 32, the preparation process of the first light emitting function layer can be referred to, and thus, the details are not repeated herein.

Subsequently, a fourth conductive film is deposited and patterned by a patterning process to form a fourth electrode 33 on the second light emitting function layer, as shown in fig. 5 (viii). The fourth electrode 33 has a fourth extension portion 303, and a projection of the fourth extension portion 303 on the substrate may cover a projection of the fourth contact pad 303a on the substrate. The fourth extension portion 303 may directly contact the fourth contact pad 303 a. The fourth electrode 33 is electrically connected to the fourth contact pad 303a through the fourth extension portion 303. The fourth electrode 33 is electrically connected to the second cathode line 133 through a fourth contact pad 303 a. Thus, a second light emitting unit stacked on the first light emitting unit is formed on the substrate. The second light emitting unit may be a green light emitting unit.

Subsequently, a second transparent insulating film is deposited and patterned through a patterning process to form a second transparent insulating layer 52 covering the fourth electrode 33. As shown in fig. 4 and 5 (ix), the projection of the second transparent insulating layer 52 on the substrate and the projections of the fifth contact pad 401a and the sixth contact pad 403a on the substrate may not overlap. The second transparent insulating layer 52 is used to electrically insulate the second light emitting unit from the third light emitting unit, thereby preventing the second light emitting unit and the third light emitting unit from being affected by each other. Only the second transparent insulating layer 52 within the pixel opening is illustrated in fig. 5 (ix).

Subsequently, a fifth conductive film is deposited and patterned through a patterning process to form a fifth electrode 41 on the second transparent insulating layer 52, as shown in fig. 5 (x). The fifth electrode 41 has a fifth extension portion 401, and a projection of the fifth extension portion 401 on the substrate may cover a projection of the fifth contact pad 401a on the substrate. The fifth extension part 401 may directly contact the fifth contact pad 401 a. The fifth electrode 41 is electrically connected to the fifth contact pad 401a through the fifth extension part 401. The fifth electrode 41 is electrically connected to the third pixel electrode 141 through the fifth contact pad 401 a.

Subsequently, a third light emitting function layer 42 is deposited on the fifth electrode 41 using a vacuum process, a solution process, or a combination thereof, as shown in fig. 5 (xi). In some examples, the third light emitting function layer 42 may include a third hole injection layer, a third hole transport layer, a third light emitting layer (e.g., a blue light emitting layer), and a third electron transport layer, which are sequentially stacked in a direction away from the substrate. As for the process of preparing the third light-emitting functional layer 42, the process of preparing the first light-emitting functional layer can be referred to, and therefore, the details thereof are not repeated.

Subsequently, a sixth conductive film is deposited and patterned by a patterning process to form a sixth electrode 43 on the third light emission function layer 42, as shown in fig. 5 (xii). The sixth electrode 43 has a sixth extension 403, and a projection of the sixth extension 403 on the substrate may cover a projection of the sixth contact pad 403a on the substrate. The sixth extension part 403 may directly contact the sixth contact pad 403 a. The sixth electrode 43 is electrically connected to the sixth contact pad 403a through the sixth extension 403. The sixth electrode 43 is electrically connected to the third cathode line 143 through a sixth contact pad 403 a. Thus, a third light emitting unit stacked on the second light emitting unit is formed on the substrate. The third light emitting unit may be a blue light emitting unit.

As shown in fig. 4, in the light emitting structure layer of the pixel unit, the first electrode 21, the first light emitting function layer 22 and the second electrode 23 constitute a first light emitting unit, the third electrode 31, the second light emitting function layer 32 and the fourth electrode 33 constitute a second light emitting unit, and the fifth electrode 41, the third light emitting function layer 42 and the sixth electrode 43 constitute a third light emitting unit. In this example, the second contact pad 203a, the third contact pad 301a, the fourth contact pad 303a, the fifth contact pad 401a, and the sixth contact pad 403a may be of the same layer structure. The first pixel electrode 121 and the first cathode line 123 have a same layer structure, the second pixel electrode 131 and the second cathode line 133 have a same layer structure, and the third pixel electrode 141 and the third cathode line 143 have a same layer structure. However, this embodiment is not limited to this. For example, the first pixel electrode, the first cathode line, the second pixel electrode, the second cathode line, the third pixel electrode, and the third cathode line may all be of the same layer structure; for another example, the first pixel electrode and the first cathode line may have a same layer structure, and the second pixel electrode, the second cathode line, the third pixel electrode, and the third cathode line may have a same layer structure.

In some exemplary embodiments, the third metal thin film, the fourth metal thin film, and the fifth metal thin film may employ a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, and the like. The first to sixth conductive films may employ a transparent conductive material, for example, Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), or a metal mesh structure formed using any one or more of magnesium (Mg), silver (Ag), and aluminum (Al). The first transparent insulating film and the second transparent insulating film may employ a transparent organic material.

(4) And forming a packaging layer on the substrate with the pattern.

In some exemplary embodiments, an encapsulation layer 80 is formed on the substrate 60 on which the aforementioned pattern is formed, as shown in fig. 4. The encapsulation layer may adopt an inorganic/organic/inorganic three-layer structure. However, this embodiment is not limited to this. In some examples, the encapsulation layer may employ an inorganic/organic/inorganic five-layer structure.

The structure of the display substrate and the process of manufacturing the same according to the embodiments of the present disclosure are merely exemplary illustrations. In some exemplary embodiments, the corresponding structure may be changed and the patterning process may be added or reduced according to actual needs. For example, the first electrode may be a reflective electrode, and may include the following double-layer structure: a metallic material layer (e.g., greater than 80 nanometers thick) of aluminum, silver, APC or other metal, and a transparent conductive oxide layer (e.g., less than 10 nanometers thick). For another example, the first light-emitting unit may be a blue light-emitting unit, the second light-emitting unit may be a green light-emitting unit, and the third light-emitting unit may be a red light-emitting unit; the first to sixth electrodes may be all transparent electrodes. For another example, the first light-emitting unit may be a blue light-emitting unit, the second light-emitting unit may be a green light-emitting unit, and the third light-emitting unit may be a red light-emitting unit; the first electrode to the fifth electrode may be transparent electrodes, the sixth electrode may be a reflective electrode, and a metal material (e.g., aluminum, silver, etc.) having a thickness greater than 100 nm may be used as the material of the sixth electrode. For another example, the first pixel electrode and the first electrode may not be configured as an integral structure, for example, the first pixel electrode and the first cathode line are formed on the fifth insulating layer, and then the first electrode is formed, and the first electrode may be electrically connected to the first pixel electrode through the first contact pad. However, the disclosed embodiments are not limited thereto.

The display substrate provided by the present exemplary embodiment is advantageous to improve the pixel aperture ratio of the display substrate by vertically stacking a plurality of light emitting units in a pixel unit, and can realize full color display capability. The plurality of light emitting cells of the present embodiment are driven by independent driving circuits, thereby achieving a higher refresh frequency and more accurate control.

Fig. 6 is a layout diagram of a pixel unit according to at least one embodiment of the disclosure. In some exemplary embodiments, as shown in fig. 6, one pixel unit may include three light emitting units (e.g., a red light emitting unit, a blue light emitting unit, and a green light emitting unit) vertically stacked. The pixel unit includes a pixel opening 100 (i.e., an emission region of the pixel unit) and a plurality of contact pads (e.g., a first contact pad 201a, a second contact pad 203a, a third contact pad 301a, a fourth contact pad 303a, a fifth contact pad 401a, and a sixth contact pad 403a) disposed at a periphery of the pixel opening 100. The pixel cell has a length L and a width W. The pixel aperture 100 has a first length L1 and a first width W1, and the pixel aperture ratio of the pixel unit is (L1 × W1)/(L × W).

Fig. 7 is a layout diagram of a pixel unit. As shown in fig. 7, one pixel unit 80 includes three light emitting units arranged in parallel (for example, arranged in order of a red sub-pixel 801, a green sub-pixel 802, and a blue sub-pixel 803). The pixel cell 80 has a length L and a width W. The light emitting region of the red sub-pixel 801 has a second length L2 and a second width W2, the light emitting region of the green sub-pixel 802 has a second length L2 and a third width W3, and the light emitting region of the blue sub-pixel 803 has a second length L2 and a fourth width W4, so that the pixel aperture ratio of the pixel unit 80 is (W2+ W3+ W4) × L2/(W × L).

In the display substrate based on the layouts shown in fig. 6 and 7, when the display substrates have the same resolution, the display substrate provided by this embodiment can increase the light emitting area of the pixel unit, and increase the pixel aperture ratio; when the sub-pixels of the display substrate have the same size, the display substrate provided by the embodiment can improve the resolution.

At least one embodiment of the present disclosure further provides a method for manufacturing a display substrate, including: a plurality of pixel units are formed on a substrate. At least one pixel unit of the plurality of pixel units includes a plurality of vertically stacked light emitting units of different colors with a transparent insulating layer disposed between adjacent light emitting units, each light emitting unit including: an upper electrode, a light-emitting functional layer, and a lower electrode are stacked.

In some exemplary embodiments, forming a plurality of pixel units on a substrate includes: forming a driving structure layer on a substrate, wherein the driving structure layer comprises a plurality of driving circuits; forming a lower electrode of a light-emitting unit on one side of the driving structure layer, which is far away from the substrate, wherein the lower electrode of the light-emitting unit is electrically connected with a driving circuit; forming at least one pixel defining layer, a plurality of pixel electrodes, a plurality of cathode lines and a plurality of contact pads on a side of the lower electrode of the light emitting unit away from the substrate; and sequentially forming a light emitting function layer of the light emitting unit, an upper electrode of the light emitting unit and the other vertically stacked light emitting units in the pixel opening. The pixel definition layer is provided with a pixel opening, the contact pads are respectively and correspondingly connected with the pixel electrodes and the cathode lines, and the pixel electrodes are respectively and correspondingly connected with the driving circuits. The upper electrodes of the light-emitting units and the upper electrodes of the rest of the light-emitting units are respectively connected with the plurality of cathode lines through contact pads, and the lower electrodes of the rest of the light-emitting units are respectively connected with the plurality of pixel electrodes through contact pads.

For the preparation method of the present embodiment, reference may be made to the description of the foregoing embodiments, and therefore, the description thereof is omitted.

Fig. 8 is a schematic view of a display device according to at least one embodiment of the present disclosure. As shown in fig. 8, the present embodiment provides a display device 91 including: a display substrate 910. The display substrate 910 is the display substrate provided in the foregoing embodiments. The display substrate 910 may be an OLED display substrate. The display device 91 may be: the OLED display device, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and other products or components with display functions. However, this embodiment is not limited to this.

The drawings in this disclosure relate only to the structures to which this disclosure relates and other structures may be referred to in the general design. Without conflict, embodiments of the present disclosure and features of the embodiments may be combined with each other to arrive at new embodiments.

It will be understood by those skilled in the art that various modifications and equivalent arrangements may be made in the present disclosure without departing from the spirit and scope of the present disclosure, and the scope of the appended claims should be accorded the full scope of the disclosure.

Claims

1. A display substrate, comprising:

a plurality of pixel units disposed on a substrate, at least one of the pixel units including a plurality of vertically stacked light emitting units of different colors, a transparent insulating layer disposed between adjacent ones of the light emitting units, and each of the light emitting units including: an upper electrode, a light-emitting functional layer, and a lower electrode are stacked.

2. The display substrate of claim 1, wherein the display substrate further comprises a plurality of contact pads, and the light emitting units are electrically connected to the corresponding driving circuits through the contact pads.

3. The display substrate according to claim 2, wherein the contact pad to which the upper electrode of the light emitting cell closest to the base is connected and the contact pad to which the light emitting cells other than the light emitting cell closest to the base are connected are of a same layer structure.

4. The display substrate according to claim 2, wherein the lower electrode of the light emitting unit has an extension portion, and the upper electrode of the light emitting unit has an extension portion; the projection of the extension part of the lower electrode of the light-emitting unit on the substrate is not overlapped with the projection of the extension part of the upper electrode on the substrate; the projection of the extension part of the lower electrode of the light-emitting unit on the substrate is overlapped with the projection of one contact pad on the substrate, and the projection of the extension part of the upper electrode of the light-emitting unit on the substrate is connected with the projection of one contact pad on the substrate.

5. The display substrate according to claim 2, wherein the display substrate further comprises a plurality of pixel electrodes and a plurality of cathode lines; the lower electrode of the light-emitting unit is connected with the corresponding pixel electrode through the contact pad, the pixel electrode is electrically connected with the corresponding driving circuit, and the upper electrode of the light-emitting unit is electrically connected with the corresponding cathode line through the contact pad.

6. The display substrate of claim 5, wherein the pixel electrode and the cathode line connected to the same light emitting unit are in the same layer structure.

7. The display substrate of claim 1, wherein the plurality of vertically stacked different color light emitting cells comprises: a red light emitting unit, a blue light emitting unit, and a green light emitting unit.

8. The display substrate according to claim 7, wherein the red light-emitting unit, the green light-emitting unit, and the blue light-emitting unit are stacked in this order in a direction away from the base; alternatively, the blue light emitting unit, the green light emitting unit, and the red light emitting unit are sequentially stacked in a direction away from the substrate.

9. The display substrate according to any one of claims 1 to 8, wherein the upper electrode and the lower electrode of the plurality of vertically stacked light emitting cells are both transparent electrodes.

10. The substrate according to any one of claims 1 to 8, wherein the lower electrode of the light emitting unit closest to the substrate among the plurality of vertically stacked light emitting units is a reflective electrode, or the upper electrode of the light emitting unit farthest from the substrate among the plurality of vertically stacked light emitting units is a reflective electrode.

11. A display device comprising the display substrate according to any one of claims 1 to 10.

12. A method for preparing a display substrate is characterized by comprising the following steps: forming a plurality of pixel units on a substrate; at least one of the plurality of pixel units includes a plurality of vertically stacked light emitting units of different colors, a transparent insulating layer is disposed between adjacent ones of the plurality of light emitting units, and each of the light emitting units includes: an upper electrode, a light-emitting functional layer, and a lower electrode are stacked.

13. A method of manufacturing a substrate according to claim 12, wherein the forming a plurality of pixel cells on the substrate comprises: forming a driving structure layer on the substrate, wherein the driving structure layer comprises a plurality of driving circuits; forming a lower electrode of a light-emitting unit on one side of the driving structure layer, which is far away from the substrate, wherein the lower electrode of the light-emitting unit is electrically connected with a driving circuit;

forming at least one pixel defining layer, a plurality of pixel electrodes, a plurality of cathode lines and a plurality of contact pads on a side of the lower electrode of the light emitting unit away from the substrate, wherein the pixel defining layer has a pixel opening, the plurality of contact pads are respectively connected with the plurality of pixel electrodes and the plurality of cathode lines, and the plurality of pixel electrodes are respectively connected with the plurality of driving circuits;

and sequentially forming a light-emitting function layer of the light-emitting unit, an upper electrode of the light-emitting unit and the rest of light-emitting units vertically stacked on the light-emitting unit at the pixel opening, wherein the upper electrode of the light-emitting unit and the upper electrodes of the rest of light-emitting units are respectively connected with the plurality of cathode lines through contact pads, and the lower electrodes of the rest of light-emitting units are respectively connected with the plurality of pixel electrodes through contact pads.