CN112104282B - Beat frequency suppression method for driving system of permanent magnet synchronous motor without electrolytic capacitor - Google Patents

Beat frequency suppression method for driving system of permanent magnet synchronous motor without electrolytic capacitor Download PDF

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CN112104282B
CN112104282B CN202010989017.XA CN202010989017A CN112104282B CN 112104282 B CN112104282 B CN 112104282B CN 202010989017 A CN202010989017 A CN 202010989017A CN 112104282 B CN112104282 B CN 112104282B
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bus voltage
sampling value
value
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driving system
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CN112104282A (en
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王高林
丁大尉
赵楠楠
张国强
徐殿国
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Harbin Institute of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/05—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation specially adapted for damping motor oscillations, e.g. for reducing hunting
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/13—Observer control, e.g. using Luenberger observers or Kalman filters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/14—Estimation or adaptation of machine parameters, e.g. flux, current or voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/14—Estimation or adaptation of machine parameters, e.g. flux, current or voltage
    • H02P21/18—Estimation of position or speed
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/22—Current control, e.g. using a current control loop
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/24—Vector control not involving the use of rotor position or rotor speed sensors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • H02P27/12—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation pulsing by guiding the flux vector, current vector or voltage vector on a circle or a closed curve, e.g. for direct torque control

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  • Power Engineering (AREA)
  • Control Of Ac Motors In General (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)

Abstract

A beat frequency suppression method for a driving system of a permanent magnet synchronous motor without electrolytic capacitor belongs to the technical field of motor control. The invention aims at the problem that in the existing driving system of the electrolytic capacitor-free permanent magnet synchronous motor, because the thin-film capacitor with a small capacitance value does not have a voltage stabilizing effect, the system generates beat frequency. The method comprises the following steps: collecting bus voltage corresponding to a thin film capacitor in a driving system, enabling the bus voltage to output a bus voltage sampling value after passing through a sample holder ZOH, and obtaining a bus voltage first harmonic sampling value through a band-pass filter BPF; calculating to obtain the lead value of the first harmonic sampling value of the bus voltage; calculating the previous value of the bus voltage first harmonic sampling value, the bus voltage sampling value and the bus voltage first harmonic sampling value to obtain an adjusted bus voltage instruction; and the SVPWM in the vector control of the position-free sensor is controlled by adopting a bus voltage instruction, so that beat frequency suppression is realized. The invention can effectively inhibit the beat frequency phenomenon of the system.

Description

Beat frequency suppression method for driving system of permanent magnet synchronous motor without electrolytic capacitor
Technical Field
The invention relates to a beat frequency suppression method for a driving system of a permanent magnet synchronous motor without electrolytic capacitor, belonging to the technical field of motor control.
Background
With the continuous development of modern motor driving technology, reliability and service life become important concerns of ac motor driving systems. At present, the aluminum electrolytic capacitor is widely applied to a direct current link of a voltage type converter for stabilizing voltage and storing energy due to the characteristics of high capacity and high cost performance, but the aluminum electrolytic capacitor becomes a weak link influencing the reliability of a motor driving system due to the limitation of the working life (the ambient temperature is increased by 10 ℃, and the service life is reduced to half of the original service life). According to statistics, about 60% of motor driving circuit faults are caused by electrolytic capacitors of direct current buses.
The thin film capacitor is a preferential solution for replacing an electrolytic capacitor because of the advantages of long service life, no acid pollution, long-time storage and the like. In recent years, the technology without electrolytic capacitor has been originally disclosed, and is continuously extending from military industry and aerospace products to civil products, and particularly has a wide application prospect in the field of motor driving, and meets the development requirements of high-reliability electromechanical products. In recent years, several international well-known companies have successively introduced products of electrolytic capacitor-free motor driving systems, such as SED2Drive of three-phase uncontrolled rectification electrolytic capacitor-free inverter of siemens, KFR household variable frequency air conditioner of japan capital corporation, electrolytic capacitor-free vacuum cleaner and air cleaner of korea samsung corporation, and four-quadrant inverter dedicated to electrolytic capacitor-free elevator of korea LG corporation, and some domestic enterprises are also working on the development of the electrolytic capacitor-free motor driving products. The motor driving system without the electrolytic capacitor can reduce the system cost, improve the operation reliability and improve the input electric energy quality of a network side, and the technology without the electrolytic capacitor can be expected to become one of important development directions in the field of motor driving.
The driving system of the permanent magnet synchronous motor without the electrolytic capacitor mainly comprises a diode uncontrolled rectifier bridge, a small-capacitance value film capacitor, a three-phase voltage inverter and the permanent magnet synchronous motor. Because the thin-film capacitor with small capacitance value does not have the voltage stabilizing function, when the input of the network side is three-phase power, the voltage of the direct current side mainly comprises two parts: one part is a direct current component, and the other part is a fluctuation component of the network side voltage six times. Due to the influence of the sampling update delay of the bus voltage, harmonic waves at the fluctuation frequency of the bus voltage exist in the motor current, and the harmonic waves and the current at the running frequency of the motor interact to generate low-frequency pulsating current, so that the beat frequency problem is formed. The beat frequency problem can influence the machine side operation performance and improve the machine side noise.
Disclosure of Invention
Aiming at the problem that the beat frequency of the existing driving system of the permanent magnet synchronous motor without the electrolytic capacitor is generated because the thin-film capacitor with the small capacitance value does not have the voltage stabilizing effect, the invention provides the beat frequency suppression method of the driving system of the permanent magnet synchronous motor without the electrolytic capacitor.
The invention relates to a beat frequency suppression method of a permanent magnet synchronous motor driving system without electrolytic capacitor, which is realized on the basis of the position sensor-free vector control of the motor driving system and comprises the following steps of,
collecting bus voltage corresponding to a thin film capacitor in a driving system, enabling the bus voltage to output a bus voltage sampling value after passing through a sample holder ZOH, and obtaining a bus voltage first harmonic sampling value through a band-pass filter BPF; calculating according to the bus voltage first harmonic sampling value by combining the inverter switching period number in the driving system to obtain the lead value of the bus voltage first harmonic sampling value;
calculating the previous value of the bus voltage first harmonic sampling value, the bus voltage sampling value and the bus voltage first harmonic sampling value to obtain an adjusted bus voltage instruction; and the SVPWM in the vector control of the position-free sensor is controlled by adopting a bus voltage instruction, so that beat frequency suppression is realized.
According to the beat frequency suppression method of the electrolytic capacitor-free permanent magnet synchronous motor driving system, the method for obtaining the first harmonic sampling value of the bus voltage through the band-pass filter BPF comprises the following steps:
udc1_s(z)＝B(z)udc_s(z)
in the formula udc1_s(z) is the first harmonic sampling value of the bus voltage, B (z) is the band-pass filter BPF, udc_sAnd (z) is a bus voltage sampling value.
According to the beat frequency suppression method of the electrolytic capacitor-free permanent magnet synchronous motor driving system, the calculation method of the switching period number of the inverter comprises the following steps:
Figure BDA0002690211620000021
in the formula, n is the number of switching cycles of the inverter, k is the coefficient of the switching cycles, and the value is a positive integer; f. ofsFor driving the inverter switching frequency, f, in the systemgIs the grid frequency.
According to the beat frequency suppression method of the electrolytic capacitor-free permanent magnet synchronous motor driving system, the method for obtaining the lead value of the first harmonic sampling value of the bus voltage comprises the following steps:
Figure BDA0002690211620000022
in the formula udc1_rFor leading values of first harmonic sampled values of the busbar voltage, z-n+1Representing a lag of n-1 inverter switching cycles, z-n+2Representing a lag of n-2 inverter switching cycles.
According to the beat frequency suppression method of the electrolytic capacitor-free permanent magnet synchronous motor driving system, the method for obtaining the adjusted bus voltage instruction comprises the following steps:
udc_c(z)＝udc_s(z)-udc1_s(z)+udc1_r(z)，
in the formula udc_cAnd (z) is the adjusted bus voltage command.
The invention has the beneficial effects that: after a direct-current side electrolytic capacitor of a grid side three-phase input non-electrolytic capacitor permanent magnet synchronous motor driving system is changed into a thin-film capacitor with a small capacitance value, the beat frequency phenomenon of the driving system is caused by the existence of bus voltage sampling updating delay.
Drawings
FIG. 1 is a general block diagram of a beat frequency suppression method for a driving system of an electrolytic capacitor-free permanent magnet synchronous motor according to the present invention;
FIG. 2 is a graph comparing the general waveforms before and after control using the method of the present invention for a motor frequency of 74Hz in the exemplary embodiment;
FIG. 3 is a partial enlarged view of FIG. 2 prior to control;
FIG. 4 is an enlarged view of a portion of the control of FIG. 2;
FIG. 5 is a result of a harmonic FFT analysis of phase a current corresponding to FIG. 3;
fig. 6 is a result of a harmonic FFT analysis of the a-phase current corresponding to fig. 4.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
First embodiment, referring to fig. 1, the present invention provides a beat frequency suppression method for a non-electrolytic capacitor permanent magnet synchronous motor driving system, where the beat frequency suppression method is implemented on the basis of a position sensor-free vector control of the motor driving system, and includes,
collecting bus voltage corresponding to a thin film capacitor in a driving system, enabling the bus voltage to output a bus voltage sampling value after passing through a sample holder ZOH, and obtaining a bus voltage first harmonic sampling value through a band-pass filter BPF; calculating according to the bus voltage first harmonic sampling value by combining the inverter switching period number in the driving system to obtain the lead value of the bus voltage first harmonic sampling value;
calculating the previous value of the bus voltage first harmonic sampling value, the bus voltage sampling value and the bus voltage first harmonic sampling value to obtain an adjusted bus voltage instruction; and the SVPWM in the vector control of the position-free sensor is controlled by adopting a bus voltage instruction, so that beat frequency suppression is realized.
In FIG. 1
Figure BDA0002690211620000041
In order to command the rotational speed,
Figure BDA0002690211620000042
to observe the rotational speed, iq *For q-axis current command, id *For d-axis current command, uq *For q-axis voltage command, ud *In order to be the d-axis voltage command,
Figure BDA0002690211620000043
for inverse Park transformation, uα *Is the alpha-axis command voltage, uβ *Is a command voltage of a beta axis,
Figure BDA0002690211620000044
to observe the angle, idIs a d-axis current feedback value, iqFor the q-axis current feedback value,
Figure BDA0002690211620000045
for Park transformation, iαIs a current value feedback value i of an alpha shaft of the permanent magnet synchronous motorβIs a current feedback value, i, of a beta axis of the permanent magnet synchronous motora，ib，icIs a three-phase current of a permanent magnet synchronous motor udcIs a dc side bus voltage.
Fig. 1 is mainly composed of two parts, a part outside a dashed line frame is a position sensorless vector control part, and a part inside the dashed line frame is a beat suppression part. The vector control part without the position sensor, the inner loop is a current loop, the outer loop is a speed loop, and the difference between the reference value and the feedback value of the rotating speed is adjusted by a speed controller; the difference between the reference value and the feedback value of the d-axis current is adjusted by a current controller, and the difference between the reference value and the feedback value of the q-axis current is adjusted by the current controller. The angle and position of the motor are obtained by a position, speed observer. And the three-phase current of the motor stator is converted by Clark and Park coordinates to obtain d-axis and q-axis currents under a two-phase rotating coordinate system. And (3) adopting SVPWM control and minimum amplitude error overmodulation strategies, and controlling the on-off of an IGBT (insulated Gate Bipolar transistor) in the IPM module inverter by the output six paths of pulse signals through a driving circuit to finally realize the control of the permanent magnet synchronous motor.
In the beat frequency suppression strategy part, bus voltage passes through a sampling retainer ZOH, a first harmonic sampling value of the bus voltage is obtained by using a band-pass filter BPF, values lagging n-1 and n-2 periods of the first harmonic sampling value of the bus voltage are obtained according to the period number n, and a first harmonic leading value u of the bus voltage is reconstructeddc1_r. Finally regenerating SVPWM bus voltage instruction udc_c。
Further, with reference to fig. 1, the method for obtaining the first harmonic sampling value of the bus voltage via the band-pass filter BPF includes:
udc1_s(z)＝B(z)udc_s(z)
in the formula udc1_s(z) is the first harmonic sampling value of the bus voltage, B (z) is the band-pass filter BPF, udc_sAnd (z) is a bus voltage sampling value.
In the embodiment, only the first harmonic sampling value of the bus voltage is extracted and reconstructed, because: in the bus voltage harmonic waves, the first harmonic wave accounts for the largest ratio, and the better beat frequency suppression effect can be obtained by eliminating the sampling update delay of the first harmonic wave.
Still further, referring to fig. 1, the method for calculating the number of switching cycles of the inverter includes:
Figure BDA0002690211620000046
in the formula, n is the number of switching cycles of the inverter, k is the coefficient of the switching cycles, and the value is a positive integer; f. ofsFor driving the inverter switching frequency, f, in the systemgIs the grid frequency. And the calculated value of the inverter switching cycle number n is the minimum positive integer.
Still further, with reference to fig. 1, the method for obtaining the lead value of the first harmonic sampling value of the bus voltage includes:
Figure BDA0002690211620000051
in the formula udc1_rFor leading values of first harmonic sampled values of the busbar voltage, z-n+1Representing a lag of n-1 inverter switching cycles, z-n+2Representing a lag of n-2 inverter switching cycles.
The leading value is a first harmonic sampling value u of the bus voltagedc1_s1.5 times the switching period T of (z)sThe purpose of the advance value is to eliminate delay in the SVPWM sample update process.
Still further, with reference to fig. 1, the method for obtaining the adjusted bus voltage command includes:
udc_c(z)＝udc_s(z)-udc1_s(z)+udc1_r(z)，
in the formula udc_cAnd (z) is the adjusted bus voltage command.
The effectiveness of the invention is verified by the following specific examples:
the specific embodiment is as follows:
the effectiveness of the beat frequency suppression method provided by the invention is verified on a driving system platform of the permanent magnet synchronous motor without electrolytic capacitor. The parameters of the experimental platform are set as follows: the power grid voltage is 380V, the power grid frequency is 50Hz, the direct current bus capacitor is a film capacitor, the capacitance value is 30 muF, the d-axis inductance is 7.5mH, the q-axis inductance is 17.2mH, the back electromotive force constant is 210V, the number of pole pairs of the rotor is 3, the rated power is 5.5kW, the rated frequency is 75Hz, and the stator resistance is 0.265 omega. All control algorithms in the experiment were done in TMS320F 28075. The update frequency of the switch and the current and voltage sampling values is set to be 8 kHz.
Fig. 2 to 6 show experimental results of the beat frequency suppression method. It can be seen that phase a current i is added before beat suppression strategy is addedaThe envelope exhibits a low-frequency ripple phenomenon, which is significantly suppressed when a beat suppression strategy is added, as shown in fig. 2. FIGS. 3 and 4 are zoom views before and after the addition of control, before control can be found, iaPoor sine degree and q-axis current iqHarmonics are present, as shown in FIG. 3;after addition of control, iaBetter sine degree and q-axis current iqHarmonics are significantly suppressed as shown in fig. 4. FIG. 5 and FIG. 6 are i in FIG. 3 and FIG. 4, respectivelyaAccording to the FFT analysis result, after a beat frequency suppression strategy is added, the sub-harmonic of the fluctuation frequency of the bus voltage in the motor current is remarkably suppressed, wherein the 226Hz harmonic is reduced to 0.24A from 0.72A, and the 374Hz harmonic is reduced to 0.13A from 0.45A.
Therefore, the method for inhibiting the beat frequency of the driving of the permanent magnet synchronous motor without the electrolytic capacitor can obviously inhibit the beat frequency phenomenon and improve the operation performance of the machine side.
The method for suppressing the beat frequency of the driving of the permanent magnet synchronous motor without the electrolytic capacitor provided by the invention is described in detail, a specific example is applied in the method for explaining the principle and the implementation mode of the invention, and the description of the embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (1)

1. A beat frequency suppression method of a permanent magnet synchronous motor driving system without electrolytic capacitor is realized on the basis of the vector control of a position sensor of the motor driving system and is characterized by comprising the following steps of,
collecting bus voltage corresponding to a thin film capacitor in a driving system, enabling the bus voltage to output a bus voltage sampling value after passing through a sample holder ZOH, and obtaining a bus voltage first harmonic sampling value through a band-pass filter BPF; calculating according to the bus voltage first harmonic sampling value by combining the inverter switching period number in the driving system to obtain the lead value of the bus voltage first harmonic sampling value;
calculating the previous value of the bus voltage first harmonic sampling value, the bus voltage sampling value and the bus voltage first harmonic sampling value to obtain an adjusted bus voltage instruction; the SVPWM in the vector control of the position-free sensor is controlled by adopting a bus voltage instruction, so that beat frequency suppression is realized;
the method for obtaining the bus voltage first harmonic sampling value through the band-pass filter BPF comprises the following steps:
udc1_s(z)＝B(z)udc_s(z)
in the formula udc1_s(z) is the first harmonic sampling value of the bus voltage, B (z) is the band-pass filter BPF, udc_s(z) is a bus voltage sampling value;
the method for calculating the number of the switching cycles of the inverter comprises the following steps:
Figure FDA0003028339730000011
in the formula, n is the number of switching cycles of the inverter, k is the coefficient of the switching cycles, and the value is a positive integer; f. ofsFor driving the inverter switching frequency, f, in the systemgIs the grid frequency;
the method for obtaining the lead value of the first harmonic sampling value of the bus voltage comprises the following steps:
Figure FDA0003028339730000012
in the formula udc1_rFor leading values of first harmonic sampled values of the busbar voltage, z-n+1Representing a lag of n-1 inverter switching cycles, z-n+2Representing a lag of n-2 inverter switching cycles;
the method for obtaining the adjusted bus voltage command comprises the following steps:
udc_c(z)＝udc_s(z)-udc1_s(z)+udc1_r(z)，
in the formula udc_cAnd (z) is the adjusted bus voltage command.
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