CN112099759A - Numerical value processing method, device, processing equipment and computer readable storage medium - Google Patents
Numerical value processing method, device, processing equipment and computer readable storage medium Download PDFInfo
- Publication number
- CN112099759A CN112099759A CN202010837521.8A CN202010837521A CN112099759A CN 112099759 A CN112099759 A CN 112099759A CN 202010837521 A CN202010837521 A CN 202010837521A CN 112099759 A CN112099759 A CN 112099759A
- Authority
- CN
- China
- Prior art keywords
- numerical value
- segmented
- value
- digit
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012545 processing Methods 0.000 title claims abstract description 169
- 238000003672 processing method Methods 0.000 title abstract description 29
- 238000000034 method Methods 0.000 claims description 52
- 238000013500 data storage Methods 0.000 claims description 40
- 230000008569 process Effects 0.000 claims description 23
- 238000004590 computer program Methods 0.000 claims description 13
- 238000004364 calculation method Methods 0.000 claims description 10
- 230000011218 segmentation Effects 0.000 claims description 10
- 230000001960 triggered effect Effects 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 238000003491 array Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
- G06F7/4991—Overflow or underflow
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
Abstract
The application provides a numerical value processing method, a numerical value processing device, a processing device and a computer readable storage medium, which are used for effectively breaking through the limitation of digit when two numerical values are subjected to addition processing and avoiding the condition of data overflow. The application provides a numerical processing method, which comprises the following steps: the processing equipment acquires a first numerical value and a second numerical value to be subjected to addition processing currently, and the addition processing is used for calculating the sum of the first numerical value and the second numerical value; the processing equipment carries out segmented storage on the first numerical value according to a preset numerical value segmented digit to obtain a first array, and carries out segmented storage on the second numerical value according to a preset numerical value segmented digit to obtain a second array; the processing device performs addition operation on the first array and the second array to obtain a third array, wherein the third array is used for indicating the sum of the first numerical value and the second numerical value.
Description
Technical Field
The present application relates to the field of computing, and in particular, to a method and an apparatus for processing numerical values, a processing device, and a computer-readable storage medium.
Background
For various applications, especially for applications with high-frequency updated variables, two values of items are often added to update the variables, such as game applications, the values of some items may be very large during design, for example, the designed values may be very large values composed of tens of or even hundreds of digits, and the larger values may bring greater distinctiveness to various variables of the applications, so that the existence of the large values has practical significance.
In the prior art, the inventor finds that, during the operation of some application programs, data overflow occurs occasionally when adding numeric values, or that, due to the limitation of the number of digits of numeric values, the addition processing exceeding the limitation of the number of digits cannot obtain correct calculation results.
Therefore, how to obtain the correct addition result of two values due to the limitation of the number of bits needs the calculation way of the optimizer.
Disclosure of Invention
The application provides a numerical value processing method, a numerical value processing device, a processing device and a computer readable storage medium, which are used for effectively breaking through the limitation of digit when two numerical values are subjected to addition processing and avoiding the condition of data overflow.
In a first aspect, the present application provides a method for processing a value, the method comprising:
the processing equipment acquires a first numerical value and a second numerical value to be subjected to addition processing currently, and the addition processing is used for calculating the sum of the first numerical value and the second numerical value;
the processing equipment carries out segmented storage on the first numerical value according to a preset numerical value segmented digit to obtain a first array, and carries out segmented storage on the second numerical value according to a preset numerical value segmented digit to obtain a second array;
the processing device performs addition operation on the first array and the second array to obtain a third array, wherein the third array is used for indicating the sum of the first numerical value and the second numerical value.
With reference to the first aspect of the present application, in a first possible implementation manner of the first aspect of the present application, the processing device performs segmented storage on the first numerical value according to a preset numerical value segmentation digit to obtain a first array, and performs segmented storage on the second numerical value according to a preset numerical value segmentation digit, before obtaining the second array, the method further includes:
the processing equipment judges whether the sum of the first numerical value and the second numerical value has data overflow risk or not;
if yes, the processing equipment triggers and carries out segmented storage on the first numerical value according to the preset numerical value segmented digit and carries out segmented storage on the second numerical value according to the preset numerical value segmented digit.
With reference to the first possible implementation manner of the first aspect of the present application, in a second possible implementation manner of the first aspect of the present application, the determining, by the processing device, whether a data overflow risk exists in a sum of the first numerical value and the second numerical value includes:
the processing equipment acquires the data storage structure types of the first numerical value and the second numerical value;
and when the data storage structure types of the first value and the second value are preset data storage structure types with data overflow risks, the processing equipment determines that the sum of the first value and the second value has the data overflow risks.
With reference to the second possible implementation manner of the first aspect of the present application, in a third possible implementation manner of the first aspect of the present application, the preset data structure type is a number data storage structure type.
With reference to the first aspect of the present application, in a fourth possible implementation manner of the first aspect of the present application, the processing device performs segmented storage on the first numerical value according to a preset numerical value segmentation digit number to obtain a first array, and performs segmented storage on the second numerical value according to a preset numerical value segmentation digit number, before obtaining the second array, the method further includes:
the processing equipment acquires a first digit of a first numerical value and a second digit of a second numerical value;
when the first digit or the second digit is larger than the digit of a preset order, the processing equipment triggers the segmented storage of the first numerical value according to the segmented digit of the preset numerical value and the segmented storage of the second numerical value according to the segmented digit of the preset numerical value;
or the processing device estimates or calculates a third number of bits of the sum of the first value and the second value;
and when the third digit is larger than the digit of the preset magnitude, the processing equipment triggers the segmented storage of the first numerical value according to the segmented digit of the preset numerical value and the segmented storage of the second numerical value according to the segmented digit of the preset numerical value.
With reference to the first aspect of the present application, in a fifth possible implementation manner of the first aspect of the present application, before the processing device obtains the first numerical value and the second numerical value to be currently subjected to the addition processing, the method further includes:
acquiring a fourth numerical value to be subjected to subtraction processing with the first numerical value;
and inverting the fourth value to obtain a second value.
With reference to the first aspect of the present application, in a sixth possible implementation manner of the first aspect of the present application, the acquiring, by the processing device, the first numerical value and the second numerical value to be currently subjected to addition processing includes:
the processing equipment triggers a numerical value updating task of the target application program;
the processing equipment triggers and obtains a first value and a second value from a source value storage position indicated by the value updating task;
after the first array and the second array are subjected to addition operation to obtain a third array, the method further comprises:
the processing device stores the third numerical value in the target numerical value storage position indicated by the numerical value updating task.
In a second aspect, the present application provides a numerical processing apparatus, comprising:
the device comprises an acquisition unit, a calculation unit and a processing unit, wherein the acquisition unit is used for acquiring a first numerical value and a second numerical value to be subjected to addition processing currently, and the addition processing is used for calculating the sum of the first numerical value and the second numerical value;
the storage unit is used for carrying out segmented storage on the first numerical value according to a preset numerical value segmented digit to obtain a first array and carrying out segmented storage on the second numerical value according to a preset numerical value segmented digit to obtain a second array;
an arithmetic unit for performing an addition operation on the first array and the second array to obtain a third array, wherein the third value is used for indicating the sum of the first value and the second value
With reference to the second aspect of the present application, in a first possible implementation manner of the second aspect of the present application, the apparatus further includes a triggering unit, configured to:
judging whether the sum of the first numerical value and the second numerical value has data overflow risk or not;
and if so, triggering to perform segmented storage on the first numerical value according to the preset numerical value segmented digit and perform segmented storage on the second numerical value according to the preset numerical value segmented digit.
With reference to the first possible implementation manner of the second aspect of the present application, in a second possible implementation manner of the second aspect of the present application, the triggering unit is specifically configured to:
acquiring data storage structure types of the first numerical value and the second numerical value;
and when the data storage structure types of the first value and the second value are preset data storage structure types with data overflow risks, determining that the sum of the first value and the second value has the data overflow risks.
With reference to the second possible implementation manner of the second aspect of the present application, in a third possible implementation manner of the second aspect of the present application, the preset data structure type is a number data storage structure type.
With reference to the second aspect of the present application, in a fourth possible implementation manner of the second aspect of the present application, the apparatus further includes a triggering unit, configured to:
acquiring a first digit of a first numerical value and a second digit of a second numerical value;
when the first digit or the second digit is larger than the digit of a preset order, triggering to perform segmented storage on the first numerical value according to a preset numerical value segmented digit and perform segmented storage on the second numerical value according to the preset numerical value segmented digit;
or estimating or calculating a third number of bits of the sum of the first value and the second value;
and when the third digit is larger than the digit of the preset magnitude, triggering to perform segmented storage on the first numerical value according to the preset numerical value segmented digit and perform segmented storage on the second numerical value according to the preset numerical value segmented digit.
With reference to the second aspect of the present application, in a fifth possible implementation manner of the second aspect of the present application, the apparatus further includes a negation unit, configured to:
acquiring a fourth numerical value to be subjected to subtraction processing with the first numerical value;
and inverting the fourth value to obtain a second value.
With reference to the second aspect of the present application, in a sixth possible implementation manner of the second aspect of the present application, the obtaining unit is specifically configured to:
the processing equipment triggers a numerical value updating task of the target application program;
the processing equipment triggers and obtains a first value and a second value from a source value storage position indicated by the value updating task;
a storage unit further to:
the processing device stores the third numerical value in the target numerical value storage position indicated by the numerical value updating task.
In a third aspect, the present application provides a processing device comprising a processor configured to implement the method according to the first aspect or any implementation manner of the first aspect when executing a computer program stored in a memory.
In a fourth aspect, the present application provides a readable storage medium, on which a computer program is stored, which computer program, when executed by a processor, implements the method as described in the first aspect above or any of the implementations of the first aspect.
According to the technical scheme, the method has the following advantages:
when the first numerical value and the second numerical value are subjected to addition processing, the first numerical value and the second numerical value are respectively subjected to segmented storage according to the preset numerical value segmented digits to obtain a first array and a second array, then the first array and the second array are subjected to addition operation to obtain a third array, and the sum of the first numerical value and the second numerical value is indicated through the third array.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic flow chart of a numerical processing method of the present application;
FIG. 2 is a schematic flow chart of an addition operation of the present application;
FIG. 3 is a schematic flow chart of a triggered segmented storage process according to the present application;
FIG. 4 is a schematic flow chart illustrating a method for determining data overflow risk according to the present application;
FIG. 5 is a schematic flow chart of another exemplary triggered segment store process of the present application;
FIG. 6 is a schematic diagram of a structure of the numerical processing method of the present application;
FIG. 7 is a schematic diagram of a processing apparatus according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description that follows, specific embodiments of the present application will be described with reference to steps and symbols executed by one or more computers, unless otherwise indicated. Accordingly, these steps and operations will be referred to, several times, as being performed by a computer, the computer performing operations involving a processing unit of the computer in electronic signals representing data in a structured form. This operation transforms the data or maintains it at locations in the computer's memory system, which may be reconfigured or otherwise altered in a manner well known to those skilled in the art. The data maintains a data structure that is a physical location of the memory that has particular characteristics defined by the data format. However, while the principles of the application have been described in language specific to above, it is not intended to be limited to the specific form set forth herein, and it will be recognized by those of ordinary skill in the art that various of the steps and operations described below may be implemented in hardware.
The principles of the present application may be employed in numerous other general-purpose or special-purpose computing, communication environments or configurations. Examples of well known computing systems, environments, and configurations that may be suitable for use with the application include, but are not limited to, hand-held telephones, personal computers, servers, multiprocessor systems, microcomputer-based systems, mainframe-based computers, and distributed computing environments that include any of the above systems or devices.
The terms "first", "second", and "third", etc. in this application are used to distinguish between different objects and not to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions.
First, before the present application is introduced, the relevant contents of the present application with respect to the application background will be described.
The numerical value processing method, the numerical value processing device and the computer readable storage medium can be applied to processing equipment and are used for effectively breaking through the limitation of digit when two numerical values are subjected to addition processing, and the condition of data overflow is avoided.
The processing device may specifically be a server, a physical host, a UE, and other devices with data processing capability, and in practical application, the processing device may exist in a device cluster manner. The UE may specifically be different types of terminal devices, such as a smart phone, a tablet computer, a notebook computer, a Personal Digital Assistant (PDA), a desktop computer, and a Personal computer.
Existing phasesIn the related art, when the addition processing of the numerical value is performed, a case of data overflow occasionally occurs. For example, java is taken as an example, the storage space occupied by the long type is 8 bytes, and the maximum integer capable of being stored is 264-1(64 bits), store greater than 2 using a variable of type long64An integer of-1, which would cause an overflow of data due to exceeding of variable storage space; in JavaScript, the number type stores data of a digital type, and the maximum integer capable of being stored is 253When number type variable stores more than 253The integer of (2) may cause data overflow due to exceeding of variable storage space.
Based on the above-mentioned defects existing in the prior art, the present application provides a numerical processing scheme, which is used to overcome the defects to a certain extent and avoid the situation of data overflow during the addition processing.
The numerical processing method provided by the present application is described below.
First, referring to fig. 1, fig. 1 shows a schematic flow chart of a numerical processing method of the present application, in which the numerical processing method may specifically include the following steps:
step S101, acquiring a first numerical value and a second numerical value to be subjected to addition processing by processing equipment, wherein the addition processing is used for calculating the sum of the first numerical value and the second numerical value;
in this application, the first numerical value and the second numerical value to be added currently are, in practical applications, generally numerical values of the same data storage structure type, such as the long type and the number type mentioned above.
Taking a game application program operated by a server as an example, in a game, a large amount of damage calculation is involved, the fluctuation of damage numerical values is large, the requirement of addition operation with a super-large numerical value magnitude can frequently occur, and under the condition, the addition processing in the prior art is easy to cause the condition of data overflow, so the condition of data overflow can be avoided by the numerical processing method provided by the application.
Step S102, the processing equipment carries out segmented storage on a first numerical value according to a preset numerical value segmented digit to obtain a first array, and carries out segmented storage on a second numerical value according to the preset numerical value segmented digit to obtain a second array;
after the first numerical value and the second numerical value to be added are obtained, the segmented storage processing proposed by the present application may be performed.
Taking the first value as an example, if the current first value is "234327467326473267463276472367426374672364762374", the first array [2364762374,6742637467,4632764723,7326473267,23432746] can be obtained after the segmented storage is performed according to the preset number of segmented bits of 10 bits.
Further, a positive/negative flag may be configured for the first array to indicate whether the original first value is positive or negative, for example, [1,2364762374,6742637467,4632764723,7326473267,23432746], a "1" may be used at the beginning of the first array to indicate that the original first value is positive, and a "-1" may be used to indicate when the first value is negative.
In step S103, the processing device performs an addition operation on the first array and the second array to obtain a third array, where the third value is used to indicate a sum of the first value and the second value.
After the segmented storage processing is performed, the first array and the second array in the data storage structure form of the compressed numerical digit are obtained, and then the first array and the second array can be added to obtain the sum of the first array and the second array.
In addition, taking the schematic flow chart of the addition operation of the present application shown in fig. 2 as an example, it may be determined whether the first array a and the second array b have the same positive or negative before addition operation, and if both the positive and negative flags of the above arrangement are "1" or "-1", the positive and negative statuses of both the arrays are the same, and if there is one "1" or one "-1", the positive and negative statuses of both the arrays are opposite.
If the two carry values are the same, the addition result signs of the first array a and the second array b are the same, the addition is carried out in sequence according to the serial numbers of the arrays, if carry exists, the value of the carry needs to be recorded, the values of the carry are added together in the next calculation, and finally the final result is obtained;
if the difference is different, the absolute values of the first array a and the second array b can be compared, the calculation result is the same as the number with the larger absolute value, then subtraction is needed, subtraction needs to be sequentially performed according to the serial numbers of the arrays, if a borrow value exists in the subtraction process, the value needs to be recorded, the borrow value needs to be subtracted in the next calculation, and finally the final result is obtained.
As can be seen from the embodiment shown in fig. 1, when the first numerical value and the second numerical value are subjected to addition processing, the present application respectively performs segmented storage on the first numerical value and the second numerical value according to a preset numerical value segmentation bit number to obtain a first array and a second array, and then performs addition operation on the first array and the second array to obtain a third array, and the sum of the first numerical value and the second numerical value is indicated by the third array.
In addition, the numerical values of all the digits of the original numerical value are reserved, namely the low-order digits and the single-order digits are reserved, so that the precision of addition operation can be guaranteed, precision loss caused by the fact that the low-order digits are ignored in the prior art to carry out addition operation is avoided, and the requirement for high-precision operation is further met.
The following proceeds to a detailed description of a possible implementation of the steps in the embodiment shown in fig. 1 in a practical application.
In an exemplary implementation manner, when performing addition processing of two values, in addition to default to directly pass through the segment storage processing proposed in the present application, it may also be determined whether the addition processing of the two values may cause data overflow first when performing trigger addition processing, and if the data overflow is not caused, it is not necessary to change the original data storage structures of the two values, so as to reduce the data workload required for changing the data storage structures. Two types of determination methods that can be used in the present application are described below.
First, risk of data overflow
In an exemplary implementation manner, referring to a flowchart of triggering a segment storage process of the present application shown in fig. 3, before performing the segment storage process, the numerical processing method provided by the present application may further include the following steps:
step S301, the processing equipment judges whether the sum of the first numerical value and the second numerical value has data overflow risk, if yes, step S302 is triggered;
it can be understood that, in the present application, consideration factors of a data overflow risk may be introduced, it is easy to understand that not only two values that would cause a data overflow situation when being subjected to addition processing may be converted into a data storage structure, but also in practical applications, it may be evaluated whether a data overflow situation is easy and likely to exist subsequently or not after being subjected to addition processing.
For example, if the number of bits of the first value has reached or approached the limit of the number of bits of its current data storage structure, it is obvious that the addition process involved in the first value has a higher risk of data overflow, and therefore, the conversion process of the data storage structure in the present application can be performed on the first value.
The data overflow risk detection value can be used for evaluating the current data overflow risk of the numerical value, if the data overflow risk detection value is smaller than a preset data overflow risk threshold value, the conversion of the data storage structure in the application is not needed, and if the data overflow risk detection value is larger than the preset data overflow risk threshold value, the conversion of the data storage structure in the application can be triggered.
Alternatively, other mechanisms for evaluating the risk of data overflow may be provided, for example, corresponding trigger conditions may be configured, for example, the first value or the second value is a high-frequency updated value, a data overflow record in which the first value or the second value has a preset number of times in a historical process, a high-risk data overflow flag added by a worker for the first value or the second value, and the like.
Step S302, the processing equipment triggers the segmented storage of the first numerical value according to the preset numerical value segmented digit and the segmented storage of the second numerical value according to the preset numerical value segmented digit.
When the first numerical value or the second numerical value is determined to have the risk of data overflow, the first numerical value and the second numerical value can be stored in a segmented mode firstly in the process of carrying out addition operation processing on the first numerical value and the second numerical value, the data storage structure of the first numerical value and the second numerical value is converted, so that the numerical value digit can be effectively compressed, the limitation of the digit is broken through, the situation of data overflow is avoided, the numerical values of low digit and single digit can be reserved, and the high-precision operation requirement is guaranteed.
Furthermore, in order to be suitable for practical application, the application also provides a data overflow risk judgment mode which is convenient to process.
In another exemplary implementation, referring to a flowchart illustrating the process of determining a risk of data overflow in the present application shown in fig. 4, in the present application, the determining process of a risk of data overflow may specifically include:
step S401, the processing equipment acquires the data storage structure types of the first numerical value and the second numerical value;
it can be understood that, the present application can directly specify some numerical values of the original data storage structure type with a smaller numerical value number or easily occurring data overflow condition in practical application, and perform the segmented storage processing and the conversion of the data storage structure proposed in the present application.
For example, for most application programs, if there is data overflow in the number data storage structure type at any time in the actual application process, it is obvious that the corresponding segment storage processing can be directly performed on the numerical value of the number data storage structure type by default before the addition processing is performed, and the data storage structure of the numerical value can be converted.
Thus, when the data overflow risk is judged, the data storage structure types of the first data and the second data can be obtained firstly.
In step S402, when the data storage structure types of the two are preset data storage structure types with data overflow risks, the processing device determines that the sum of the first numerical value and the second numerical value has the data overflow risks.
Then, when the data type of the first data and the second data is detected to be a preset data storage structure type with a data overflow risk, the sum of the addition operation processing or the contraction processing can be determined, the data overflow risk exists, the segmented storage processing of the application can be triggered, and the data storage structure of the application can be converted.
Second, number of digits
In another exemplary implementation manner, referring to another flowchart of the application triggering segment storage processing shown in fig. 5, before performing segment storage processing, the numerical processing method provided by the application may further include the following steps:
step S501, the processing equipment acquires a first digit of a first numerical value and a second digit of a second numerical value;
it is understood that the present application can also directly determine whether to perform the segmentation process in the present application from the numerical digit itself.
In order to prevent the risk or situation of data overflow, the present application may configure a digit guard value with data overflow risk for the numerical value involved in the addition processing, where the digit guard value may be understood as a digit of a preset order of magnitude, and when the digit of the numerical value reaches the digit guard value, the present application may trigger the segment storage processing.
For example, the storage space occupied by the long type is 8 bytes, and the maximum integer capable of being stored is 2641(64 bits), if the number of bits of the first numerical value is 65 bits and exceeds the number of bits guard value by 64 bits, the first numerical value and the second numerical value to be added at this time can be subjected to the segment storage processing in the application, and the data storage structure thereof is converted.
Step S502, when the first digit or the second digit is larger than the digit of a preset order, the processing equipment triggers to carry out segmented storage on the first numerical value according to the segmented digit of the preset numerical value and carries out segmented storage on the second numerical value according to the segmented digit of the preset numerical value;
when the digit of the first numerical value or the second numerical value reaches the digit warning value, the first numerical value and the second numerical value can be stored in a segmented mode in the process of carrying out addition operation processing on the first numerical value and the second numerical value, the data storage structure of the first numerical value and the second numerical value is converted, the digit of the numerical value can be effectively compressed, the limitation of the digit is broken through, the situation of data overflow is avoided, the numerical values of low digits and single digits of the numerical value can be reserved, and the high-precision operation requirement is guaranteed.
In addition, in practical applications, when determining whether to trigger the segment storing process based on the number of digits of the numerical values, the determination may be made based on the evaluation result or the operation result of the addition of the first numerical value and the second numerical value to be subjected to the addition process.
Correspondingly, before the segmented storage processing, the numerical value processing method provided by the application may further include the following step of triggering the segmented storage processing:
the processing device estimates or calculates a third number of bits of the sum of the first value and the second value;
and when the third digit is larger than the digit of the preset magnitude, the processing equipment triggers the segmented storage of the first numerical value according to the segmented digit of the preset numerical value and the segmented storage of the second numerical value according to the segmented digit of the preset numerical value.
It will be appreciated that in practical applications, the processing device may further perform an estimation or actual calculation process on the sum of the first value and the second value, and if the digit of the calculation result reaches the digit guard value, the segmented storage process in the present application may be triggered.
In another exemplary implementation manner, the numerical processing method provided by the present application may also be applied to subtraction processing, that is, the numerical processing method provided by the present application may be used for addition and subtraction of numerical values.
Taking the subtraction of the first value a and the second value B as an example, a-B is a + (-B), and it can be seen that the subtraction of the first value a and the second value B can be calculated in an additive process by inverting the second value B.
Correspondingly, before the processing device obtains the first numerical value and the second numerical value to be subjected to the addition processing currently, the numerical value processing method provided by the application may further include the following steps:
acquiring a fourth numerical value to be subjected to subtraction processing with the first numerical value;
and inverting the fourth value to obtain a second value.
Next, the numerical processing method proposed in the present application is introduced in combination with the actual application scenario.
It is understood that the numerical processing method provided by the present application may be configured in some specific processing processes on the processing device, for example, some numerical update tasks related to a target application running on the processing device may be performed, and the numerical processing method provided by the present application may be specifically configured for these tasks, so as to avoid a situation where data overflow occurs in these tasks. In these tasks, the first numerical value and the second numerical value involved in the addition processing may be indicated, and further, the source numerical value storage location specified by both and the target numerical value storage location of the sum of both may be indicated.
Correspondingly, the acquiring, by the processing device, the first numerical value and the second numerical value to be currently subjected to the addition processing may include:
the processing equipment triggers a numerical value updating task of the target application program;
the processing equipment triggers and obtains a first value and a second value from a source value storage position indicated by the value updating task;
after the adding operation is performed on the first array and the second array to obtain a third array, the method may include:
the processing device stores the third numerical value in the target numerical value storage position indicated by the numerical value updating task.
In order to better implement the numerical processing method provided by the application, the application also provides a numerical processing device.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a numerical processing apparatus according to the present application, in which the numerical processing apparatus 600 may specifically include the following structure:
an obtaining unit 601, configured to obtain a first numerical value and a second numerical value to be currently subjected to addition processing, where the addition processing is used to calculate a sum of the first numerical value and the second numerical value;
the storage unit 602 is configured to perform segmented storage on the first numerical value according to a preset numerical value segmentation digit to obtain a first array, and perform segmented storage on the second numerical value according to a preset numerical value segmentation digit to obtain a second array;
an operation unit 603, configured to perform an addition operation on the first array and the second array to obtain a third array, where the third value is used to indicate a sum of the first value and the second value.
In an exemplary implementation, the apparatus may further include a triggering unit 604 configured to:
judging whether the sum of the first numerical value and the second numerical value has data overflow risk or not;
and if so, triggering to perform segmented storage on the first numerical value according to the preset numerical value segmented digit and perform segmented storage on the second numerical value according to the preset numerical value segmented digit.
In another exemplary implementation manner, the triggering unit 604 may be specifically configured to:
acquiring data storage structure types of the first numerical value and the second numerical value;
and when the data storage structure types of the first value and the second value are preset data storage structure types with data overflow risks, determining that the sum of the first value and the second value has the data overflow risks.
In yet another exemplary implementation, the preset data structure type may be a number data storage structure type.
In yet another exemplary implementation, the apparatus may further include a triggering unit 604 configured to:
acquiring a first digit of a first numerical value and a second digit of a second numerical value;
when the first digit or the second digit is larger than the digit of a preset order, triggering to perform segmented storage on the first numerical value according to a preset numerical value segmented digit and perform segmented storage on the second numerical value according to the preset numerical value segmented digit;
or estimating or calculating a third number of bits of the sum of the first value and the second value;
and when the third digit is larger than the digit of the preset magnitude, triggering to perform segmented storage on the first numerical value according to the preset numerical value segmented digit and perform segmented storage on the second numerical value according to the preset numerical value segmented digit.
In yet another exemplary implementation, the apparatus may further include a negation unit 605 configured to:
acquiring a fourth numerical value to be subjected to subtraction processing with the first numerical value;
and inverting the fourth value to obtain a second value.
In another exemplary implementation manner, the obtaining unit 601 may be specifically configured to:
the processing equipment triggers a numerical value updating task of the target application program;
the processing equipment triggers and obtains a first value and a second value from a source value storage position indicated by the value updating task;
the storage unit 602 may further be configured to:
the processing device stores the third numerical value in the target numerical value storage position indicated by the numerical value updating task.
Referring to fig. 7, fig. 7 shows a schematic structural diagram of a processing device in the present application, specifically, the processing device in the present application includes a processor 701, a memory 702, and an input/output device 703, where the processor 701 is configured to implement each step of the numerical processing method in any embodiment corresponding to fig. 1 to 5 when executing a computer program stored in the memory 702; alternatively, the processor 701 is configured to implement the functions of the units in the corresponding embodiment of fig. 6 when executing the computer program stored in the memory 702.
Illustratively, a computer program may be partitioned into one or more modules/units, which are stored in the memory 702 and executed by the processor 701 to accomplish the present application. One or more modules/units may be a series of computer program instruction segments capable of performing certain functions, the instruction segments being used to describe the execution of a computer program in a computer device.
The processing devices may include, but are not limited to, a processor 701, a memory 702, and input-output devices 703. Those skilled in the art will appreciate that the illustration is merely an example of a processing device and does not constitute a limitation of the processing device and may include more or less components than those illustrated, or combine certain components, or different components, for example, the processing device may also include a network access device, bus, etc., and the processor 701, the memory 702, the input output device 703, and the network access device, etc., are connected via the bus.
The Processor 701 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, the processor being the control center for the processing device and the various interfaces and lines connecting the various parts of the overall device.
The memory 702 may be used to store computer programs and/or modules, and the processor 701 may implement various functions of the computer apparatus by running or executing the computer programs and/or modules stored in the memory 702 and invoking data stored in the memory 702. The memory 702 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function, and the like; the storage data area may store data created according to the use of the processing apparatus, and the like. In addition, the memory may include high speed random access memory, and may also include non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), at least one magnetic disk storage device, a Flash memory device, or other volatile solid state storage device.
The processor 701, when executing the computer program stored in the memory 702, may specifically implement the following functions:
the processing equipment acquires a first numerical value and a second numerical value to be subjected to addition processing currently, and the addition processing is used for calculating the sum of the first numerical value and the second numerical value;
the processing equipment carries out segmented storage on the first numerical value according to a preset numerical value segmented digit to obtain a first array, and carries out segmented storage on the second numerical value according to a preset numerical value segmented digit to obtain a second array;
the processing device performs addition operation on the first array and the second array to obtain a third array, wherein the third array is used for indicating the sum of the first numerical value and the second numerical value.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the numerical processing apparatus, the processing device and the corresponding units thereof described above may refer to the descriptions of the numerical processing method in any embodiment corresponding to fig. 1 to 5, and are not described herein again in detail.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by associated hardware controlled by the instructions, which may be stored in a computer readable storage medium and loaded and executed by a processor.
Therefore, the present application provides a computer-readable storage medium, in which a plurality of instructions are stored, and the instructions can be loaded by a processor to execute steps in the numerical processing method in any embodiment corresponding to fig. 1 to 5 in the present application, and specific operations may refer to descriptions of the numerical processing method in any embodiment corresponding to fig. 1 to 5, which are not described herein again.
Wherein the computer-readable storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
Since the instructions stored in the computer-readable storage medium can execute the steps in the numerical processing method in any embodiment corresponding to fig. 1 to 5 in the present application, the beneficial effects that can be achieved by the numerical processing method in any embodiment corresponding to fig. 1 to 5 in the present application can be achieved, for details, see the foregoing description, and are not repeated herein.
The numerical processing method, the numerical processing device, the processing apparatus, and the computer-readable storage medium provided in the present application are described in detail above, and specific examples are applied herein to illustrate the principles and embodiments of the present application, and the descriptions of the above embodiments are only used to help understand the method and the core ideas of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A method of numerical processing, the method comprising:
the processing equipment acquires a first numerical value and a second numerical value which are currently subjected to addition processing, wherein the addition processing is used for calculating the sum of the first numerical value and the second numerical value;
the processing equipment carries out segmented storage on the first numerical value according to a preset numerical value segmented digit to obtain a first array, and carries out segmented storage on the second numerical value according to the preset numerical value segmented digit to obtain a second array;
and the processing equipment performs addition operation on the first array and the second array to obtain a third array, wherein the third numerical value is used for indicating the sum of the first numerical value and the second numerical value.
2. The method of claim 1, wherein the processing device performs a segmented storage of the first value according to a preset number of segmented bits of the value to obtain a first array, and performs a segmented storage of the second value according to the preset number of segmented bits of the value, before obtaining a second array, the method further comprising:
the processing equipment judges whether the sum of the first numerical value and the second numerical value has data overflow risk or not;
and if so, the processing equipment triggers the first numerical value to be stored in a segmented mode according to the preset numerical value segmentation digit and the second numerical value to be stored in a segmented mode according to the preset numerical value segmentation digit.
3. The method of claim 2, wherein the processing device determining whether the sum of the first value and the second value is at risk of data overflow comprises:
the processing device obtains data storage structure types of the first numerical value and the second numerical value;
and when the data storage structure types of the two are preset data storage structure types with data overflow risks, the processing equipment determines that the sum of the first numerical value and the second numerical value has the data overflow risks.
4. The method according to claim 3, wherein the preset data structure type is a number data storage structure type.
5. The method of claim 1, wherein the processing device performs a segmented storage of the first value according to a preset number of segmented bits of the value to obtain a first array, and performs a segmented storage of the second value according to the preset number of segmented bits of the value, before obtaining a second array, the method further comprising:
the processing equipment acquires a first digit of the first numerical value and a second digit of the second numerical value;
when the first digit or the second digit is larger than the digit of a preset order, the processing equipment triggers the segmented storage of the first numerical value according to the segmented digit of the preset numerical value and the segmented storage of the second numerical value according to the segmented digit of the preset numerical value;
or, the processing device estimates or calculates a third number of bits of a sum of the first value and the second value;
and when the third digit is larger than the digit of the preset magnitude, the processing equipment triggers the segmented storage of the first numerical value according to the segmented digit of the preset numerical value and the segmented storage of the second numerical value according to the segmented digit of the preset numerical value.
6. The method of claim 1, wherein before the processing device obtains the first value and the second value to be added currently, the method further comprises:
acquiring a fourth numerical value to be subjected to subtraction processing with the first numerical value;
and inverting the fourth value to obtain the second value.
7. The method of claim 1, wherein the processing device obtaining the first numerical value and the second numerical value currently to be subjected to the addition process comprises:
the processing equipment triggers a numerical value updating task of a target application program;
the processing equipment triggers to acquire the first numerical value and the second numerical value from a source numerical value storage position indicated by the numerical value updating task;
after the adding operation is performed on the first array and the second array to obtain a third array, the method further includes:
and the processing equipment stores the third numerical value in a target numerical value storage position indicated by the numerical value updating task.
8. A numerical processing apparatus, characterized in that the apparatus comprises:
the device comprises an acquisition unit, a calculation unit and a processing unit, wherein the acquisition unit is used for acquiring a first numerical value and a second numerical value which are currently subjected to addition processing, and the addition processing is used for calculating the sum of the first numerical value and the second numerical value;
the storage unit is used for carrying out segmented storage on the first numerical value according to a preset numerical value segmented digit to obtain a first array, and carrying out segmented storage on the second numerical value according to the preset numerical value segmented digit to obtain a second array;
and the arithmetic unit is used for carrying out addition operation on the first array and the second array to obtain a third array, and the third numerical value is used for indicating the sum of the first numerical value and the second numerical value.
9. A processing device comprising a processor and a memory, a computer program being stored in the memory, the processor performing the method according to any of claims 1 to 7 when calling the computer program in the memory.
10. A computer-readable storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the method of any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010837521.8A CN112099759A (en) | 2020-08-19 | 2020-08-19 | Numerical value processing method, device, processing equipment and computer readable storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010837521.8A CN112099759A (en) | 2020-08-19 | 2020-08-19 | Numerical value processing method, device, processing equipment and computer readable storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112099759A true CN112099759A (en) | 2020-12-18 |
Family
ID=73753154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010837521.8A Pending CN112099759A (en) | 2020-08-19 | 2020-08-19 | Numerical value processing method, device, processing equipment and computer readable storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112099759A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022001438A1 (en) * | 2020-06-29 | 2022-01-06 | 中科寒武纪科技股份有限公司 | Computing apparatus, integrated circuit chip, board card, device and computing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060155796A1 (en) * | 2005-01-07 | 2006-07-13 | Sas Institute Inc. | System and methods for large-radix computer processing |
| CN105224283A (en) * | 2015-09-29 | 2016-01-06 | 北京奇艺世纪科技有限公司 | A kind of floating number disposal route and device |
| CN106371808A (en) * | 2015-07-22 | 2017-02-01 | 华为技术有限公司 | Parallel computing method and terminal |
-
2020
- 2020-08-19 CN CN202010837521.8A patent/CN112099759A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060155796A1 (en) * | 2005-01-07 | 2006-07-13 | Sas Institute Inc. | System and methods for large-radix computer processing |
| CN106371808A (en) * | 2015-07-22 | 2017-02-01 | 华为技术有限公司 | Parallel computing method and terminal |
| CN105224283A (en) * | 2015-09-29 | 2016-01-06 | 北京奇艺世纪科技有限公司 | A kind of floating number disposal route and device |
Non-Patent Citations (1)
| Title |
|---|
| HYY044101331: "大数求和", 《HTTPS://WWW.IT610.COM/ARTICLE/503939.HTM》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022001438A1 (en) * | 2020-06-29 | 2022-01-06 | 中科寒武纪科技股份有限公司 | Computing apparatus, integrated circuit chip, board card, device and computing method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109814524B (en) | Vehicle diagnosis method, device and system | |
| CN107291950B (en) | Form data updating method and device and computer equipment | |
| CN112395322B (en) | List data display method and device based on hierarchical cache and terminal equipment | |
| CN113253878B (en) | Touch screen report point determining method and device, electronic equipment and storage medium | |
| CN111091572A (en) | Image processing method and device, electronic equipment and storage medium | |
| CN112347154A (en) | Slag crust shedding index calculation method, terminal equipment and storage medium | |
| CN115686961A (en) | Processor testing method and device and electronic equipment | |
| CN113010116A (en) | Data processing method and device, terminal equipment and readable storage medium | |
| CN112099759A (en) | Numerical value processing method, device, processing equipment and computer readable storage medium | |
| CN113342671B (en) | Method, device, electronic equipment and medium for verifying operation module | |
| CN117236236A (en) | Chip design data management method and device, electronic equipment and storage medium | |
| US8930939B2 (en) | Comparing system engram with product engram to determine compatibility of product with system | |
| CN110674050B (en) | Memory out-of-range detection method and device, electronic equipment and computer storage medium | |
| CN109669875B (en) | Application crash test method and device, electronic equipment and storage medium | |
| CN111162792A (en) | Compression method and device for power load data | |
| CN113449062B (en) | Track processing method, track processing device, electronic equipment and storage medium | |
| CN111159009A (en) | Pressure testing method and device for log service system | |
| CN112560267B (en) | Method, device, equipment and storage medium for dividing ramp units | |
| CN112816959B (en) | Clustering method, device, equipment and storage medium for vehicles | |
| CN114201729A (en) | Method, device and equipment for selecting matrix operation mode and storage medium | |
| CN113760237A (en) | Compiling address updating method and device, terminal equipment and readable storage medium | |
| CN112712610A (en) | Vehicle diagnosis log processing method and device, terminal device and readable storage medium | |
| CN111859252B (en) | Method, device, equipment and storage medium for determining loading and unloading duration | |
| CN112306371A (en) | Method, apparatus and computer program product for storage management | |
| CN111376248B (en) | Robot, robot decision method and terminal equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20201218 |
|
| RJ01 | Rejection of invention patent application after publication |