CN112084198B - Direct column writing method and device for node admittance matrix in compressed storage form - Google Patents

Direct column writing method and device for node admittance matrix in compressed storage form Download PDF

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CN112084198B
CN112084198B CN202010973515.5A CN202010973515A CN112084198B CN 112084198 B CN112084198 B CN 112084198B CN 202010973515 A CN202010973515 A CN 202010973515A CN 112084198 B CN112084198 B CN 112084198B
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司大军
孙勇
朱欣春
李玲芳
张广斌
周俊东
游广增
陈义宣
陈姝敏
何烨
肖友强
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Abstract

The embodiment of the application discloses a method and a device for directly writing a column of a node admittance matrix in a compressed storage form. The method and the device reduce unnecessary calculation amount increased by calculation and storage of a large number of zero elements, and solve the problems that the time for forming the node admittance matrix is long and the load flow calculation efficiency is seriously influenced. The generation time of the node admittance matrix is saved, and the occupation of the required memory and hard disk storage space is greatly reduced.

Description

Direct column writing method and device for node admittance matrix in compressed storage form
Technical Field
The present application relates to the field of power systems, and in particular, to a method and an apparatus for direct column writing of a compressed storage type node admittance matrix.
Background
The power system load flow calculation is the basis for researching the planning, analyzing and safe operation of the power system. The node admittance matrix is a necessary process of load flow calculation, is usually used for reflecting parameters and line connection conditions of a power network, is a highly sparse matrix, and has the number of elements with zero values far more than the number of non-zero elements, and the distribution of the non-zero elements is irregular. With the increase of power demand, the scale and the topological structure of a power grid are more and more complex, and the proportion of multi-circuit lines is larger and larger, so that the scale of a node admittance matrix is increased, the data volume calculated by a power system is increased, and higher requirements are provided for quick large-scale calculation of the power system. The operation speed of the sparse matrix is a key factor influencing the rapid large-scale calculation of the power system.
At present, in order to save storage space, for column writing of a node admittance matrix, a node admittance matrix in a conventional form is generally generated according to node and branch data, and then the generated node admittance matrix in the conventional form is further converted into a compressed storage format. In the method, all elements of the node admittance matrix need to be calculated in the stage of generating the node admittance matrix, and the high sparsity of the node admittance matrix is ignored, so that a large number of zero elements are calculated and stored. The calculation and storage of a large number of zero elements increase unnecessary calculation amount, the time required by the formed node admittance matrix is long, and the efficiency of load flow calculation is seriously influenced.
Disclosure of Invention
In order to solve the problems that unnecessary calculation amount is increased due to calculation and storage of a large number of zero elements in a node admittance matrix, the formed node admittance matrix needs long time, and the efficiency of load flow calculation is seriously affected, the application discloses a direct column writing method and a direct column writing device of the node admittance matrix in a compression storage form through the following embodiments.
The application discloses in a first aspect a method for direct column writing of a node admittance matrix in a compressed storage form, wherein the method comprises the following steps:
acquiring node information of network nodes and branch information of network branches, wherein the node information comprises names and types of all network nodes in a power network, and the branch information comprises: starting point names, end point names and branch reactance of all network branches in the power network;
acquiring a node number of each network node;
defining column vectors of a node admittance matrix in a compressed storage form, wherein the column vectors comprise three columns which are respectively a numerical value column vector, a column index column vector and a row offset column vector;
defining and constructing a node number column vector of a target network node and an admittance column vector of a target network branch, wherein the target network node is any network node in the power network, and the target network branch is all network branches connected with the target network node;
and based on the column vector of the node admittance matrix, performing splicing column writing on the node number column vector and the admittance column vector to obtain a direct column writing result of the node admittance matrix.
Optionally, the node number of any network node is smaller than the number of the balancing machine in the power network.
Optionally, the method includes:
the numerical column vector is used for storing numerical values of non-zero elements in the node admittance matrix in a row-first mode;
the column index column vector is used for storing the column index of each non-zero element in the node admittance matrix;
the row offset column vector is used for storing an index of a target element in the numerical value column vector and the number of all non-zero elements in the node admittance matrix, and the target element is the first non-zero element of a row corresponding to each network node in the node admittance matrix.
Optionally, the defining and constructing a node number column vector of the target network node and an admittance column vector of the target network branch includes:
acquiring node information and a node number of the target network node;
judging whether the target network node is a balancing machine network node or not;
if the target network node is not the balancing machine network node, performing the steps of:
obtaining branch information of the target network branch;
acquiring a node number of an opposite side network node, wherein the opposite side network node is a network node connected with the target network node;
extracting unbalanced machine network nodes in the opposite side network nodes;
filling the node numbers of the network nodes of the unbalanced machine into the node number column vector one by one, and filling the node number of the target network node into the tail end of the node number column vector; filling the admittance values of corresponding branches into the admittance column vectors, and filling the self-admittance values of the unbalanced machine network branches into the tail ends of the admittance column vectors, wherein the corresponding branches are network branches connected with the unbalanced machine network nodes in the target network branches, the self-admittance values of the unbalanced machine network branches are the sum of the transadmittances of all the unbalanced machine network branches, and the unbalanced machine network branches are branches obtained by connecting the target network nodes with the unbalanced machine network nodes;
calculating the mutual admittance values of the branch circuits of the balancing machines aiming at the network nodes of the balancing machines in the opposite side network nodes, taking the absolute value of the mutual admittance values of the branch circuits of the balancing machines, adding the absolute value of the mutual admittance values of the branch circuits of the balancing machines with the self admittance values of the branch circuits of the non-balancing machines, and updating the self admittance values of the branch circuits of the non-balancing machines in the tail ends of the admittance column vectors according to the addition result, wherein the branch circuits of the balancing machines are the branch circuits connecting the target network nodes with the network nodes of the balancing machines;
and sequencing the node number column vectors from small to large, and correspondingly adjusting the arrangement sequence of the admittance column vectors according to the mapping relation of the node number column vectors.
Optionally, after the defining and constructing the node number column vector of the target network node and the admittance column vector of the target network branch, the method further includes:
adding the node number of the target network node and the node number of the opposite side network node to obtain the row number of the node number column vector;
judging whether a repeated element exists in the node number column vector through the following formula:
node(m)-node(m-1)=0;
wherein node is the node number column vector, m is the row index of the node number column vector and the admittance column vector, and node (m) is the mth value of the node number column vector;
if yes, aiming at the repeated elements, carrying out equivalent merging calculation of multiple lines one by one through the following formula:
Figure GDA0003674196500000031
wherein i represents a node number of the target network node, Y i Representing the admittance column vector;
and deleting zero elements in the node number column vector and the admittance column vector, and updating the row number of the node number column vector according to the deletion result.
Optionally, based on the column vector of the node admittance matrix, performing a spliced column write on the node number column vector and the admittance column vector to obtain a direct column write result of the node admittance matrix, including:
based on the column vector of the node admittance matrix, performing spliced column writing on the node number column vector and the admittance column vector through the following formula:
Figure GDA0003674196500000032
wherein i represents the node number of the target network node, nnz represents the number of non-zero elements from row 1 to row i-1 of the node admittance matrix, value represents the numeric column vector, collindex represents the column index vector, rowptr represents the row offset column vector, node represents the node number column vector, and Yi represents the admittance column vector.
The second aspect of the present application discloses a device for directly column-writing a node admittance matrix in a compressed storage form, where the device is applied to the method for directly column-writing the node admittance matrix in the compressed storage form disclosed in the first aspect, and the device includes:
an information obtaining module, configured to obtain node information of a network node and branch information of a network branch, where the apparatus is applied to the node admittance matrix direct column writing method in a compressed storage form in the first aspect, and the apparatus includes:
the number obtaining module is used for obtaining the node number of each network node;
a column vector defining module, configured to define a column vector of the node admittance matrix in a compressed storage form, where the column vector includes three columns, which are a numerical column vector, a column index column vector, and a row offset column vector;
the system comprises a column vector construction module, a column vector construction module and a data processing module, wherein the column vector construction module is used for defining and constructing a node number column vector of a target network node and an admittance column vector of a target network branch, the target network node is any network node in the power network, and the target network branch is all network branches connected with the target network node;
and the splicing column writing module is used for performing splicing column writing on the node number column vector and the admittance column vector based on the column vector of the node admittance matrix to obtain a direct column writing result of the node admittance matrix.
Optionally, the defining and constructing a node number column vector of the target network node and an admittance column vector of the target network branch includes:
acquiring node information and a node number of the target network node;
judging whether the target network node is a balancing machine network node or not;
if the target network node is not the balancing machine network node, performing the steps of:
obtaining branch information of the target network branch;
acquiring a node number of an opposite side network node, wherein the opposite side network node is a network node connected with the target network node;
extracting unbalanced machine network nodes in the opposite side network nodes;
filling the node numbers of the network nodes of the unbalanced machine into the node number column vector one by one, and filling the node number of the target network node into the tail end of the node number column vector; filling the admittance column vector with the mutual admittance values of corresponding branches, and filling the self-admittance values of the unbalanced machine network branches into the tail ends of the admittance column vector, wherein the corresponding branches are network branches connected with the unbalanced machine network nodes in the target network branches, the self-admittance values of the unbalanced machine network branches are the sum of mutual admittance of all the unbalanced machine network branches, and the unbalanced machine network branches are branches obtained by connecting the target network nodes with the unbalanced machine network nodes;
calculating the mutual admittance values of the branch circuits of the balancing machines aiming at the network nodes of the balancing machines in the opposite side network nodes, taking the absolute value of the mutual admittance values of the branch circuits of the balancing machines, adding the absolute value of the mutual admittance values of the branch circuits of the balancing machines with the self admittance values of the branch circuits of the non-balancing machines, and updating the self admittance values of the branch circuits of the non-balancing machines in the tail ends of the admittance column vectors according to the addition result, wherein the branch circuits of the balancing machines are the branch circuits connecting the target network nodes with the network nodes of the balancing machines;
and sequencing the node number column vectors from small to large, and correspondingly adjusting the arrangement sequence of the admittance column vectors according to the mapping relation of the node number column vectors.
Optionally, after the defining and constructing the node number column vector of the target network node and the admittance column vector of the target network branch, the apparatus further includes:
adding the node number of the target network node and the node number of the opposite side network node to obtain the row number of the node number column vector;
judging whether a repeated element exists in the node number column vector through the following formula:
node(m)-node(m-1)=0;
wherein node is the node number column vector, m is the row index of the node number column vector and the admittance column vector, and node (m) is the mth value of the node number column vector;
if yes, aiming at the repeated elements, carrying out equivalent merging calculation of multiple lines one by one through the following formula:
Figure GDA0003674196500000041
wherein i represents a node number of the target network node, Y i Representing the admittance column vector;
and deleting zero elements in the node number column vector and the admittance column vector, and updating the row number of the node number column vector according to the deletion result.
Optionally, based on the column vector of the node admittance matrix, performing a spliced column write on the node number column vector and the admittance column vector to obtain a direct column write result of the node admittance matrix, including:
based on the column vector of the node admittance matrix, performing spliced column writing on the node number column vector and the admittance column vector through the following formula:
Figure GDA0003674196500000051
wherein i represents the node number of the target network node, nnz represents the number of non-zero elements from line 1 to line i-1 of the node admittance matrix, value represents the numerical column vector, collindex represents the column index vector, rowptr represents the row offset column vector, node represents the node number column vector, Y represents the node number column vector, and i representing the admittance column vector.
The embodiment of the application discloses a method and a device for directly writing a column of a node admittance matrix in a compression storage form. Compared with the existing method of firstly writing all columns and then converting into compressed storage, the method saves the generation time, greatly reduces the occupation of the required memory and hard disk storage space, and has more obvious advantages along with the expansion of the network scale.
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In order to more clearly explain the technical solution of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a general working flow of a compressed storage type node admittance matrix direct column writing method disclosed in an embodiment of the present application;
fig. 2 is a flowchart of defining and constructing a node number column vector of a target network node and an admittance column vector of a target network branch in a compressed storage form node admittance matrix direct column writing method disclosed in an embodiment of the present application;
fig. 3 is a flowchart of performing equivalence combining calculation of multiple loops of lines in a node admittance matrix direct column writing method in a compressed storage form disclosed in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a compressed storage type node admittance matrix direct column writing apparatus according to an embodiment of the present application.
Detailed Description
In order to solve the problems that unnecessary calculation amount is increased due to calculation and storage of a large number of zero elements in a node admittance matrix, the time required by the formed node admittance matrix is long, and the efficiency of load flow calculation is seriously influenced, the application discloses a method and a device for directly writing columns of the node admittance matrix in a compressed storage form through the following embodiments.
A first embodiment of the present application discloses a node admittance matrix direct column writing method in a compressed storage form, referring to a general work flow diagram shown in fig. 1, the method includes:
step S1, obtaining node information of the network node and branch information of the network branch, where the node information includes names and types of all network nodes in the power network, and the branch information includes: the starting point names, the end point names and the branch reactance of all network branches in the power network.
And step S2, acquiring the node number of each network node, and if any network node has a number and does not need to be adjusted, directly executing step S3.
Step S3, defining a column vector of the node admittance matrix in a compressed storage form (CSR), where the column vector includes three columns, which are a numeric column vector, a column index column vector and a row offset column vector, respectively, and defining the numeric column vector as value, the column index column vector as colidex and the row offset column vector as rowptr.
Step S4, defining and constructing a node number column vector of a target network node and an admittance column vector of a target network branch, where the target network node is any network node in the power network, and the target network branch is all network branches connected to the target network node.
And step S5, based on the column vector of the node admittance matrix, performing splicing column writing on the node number column vector and the admittance column vector to obtain a direct column writing result of the node admittance matrix.
The embodiment discloses a method and a device for direct column writing of a node admittance matrix in a compressed storage form. Compared with the existing method of firstly writing the whole column and then converting the whole column into the compressed storage, the method saves the generation time, greatly reduces the occupied memory and hard disk storage space, and has more obvious advantages along with the enlargement of the network scale.
Further, the node number of any network node is smaller than the number of the balancing machine in the power network, the balancing machine is given in advance and is indicated in the data file.
Further, the method comprises:
the numerical column vector is used for storing numerical values of non-zero elements in the node admittance matrix in a row-first mode.
The column index column vector is used for storing the column index of each non-zero element in the node admittance matrix.
The row offset column vector is used for storing an index of a target element in the numerical value column vector and the number of all non-zero elements in the node admittance matrix, and the target element is the first non-zero element of a row corresponding to each network node in the node admittance matrix.
Further, the defining and constructing a node number column vector of the target network node and an admittance column vector of the target network branch is described with reference to a flow chart of admittance column vectors shown in fig. 2, including:
and step S41, acquiring the node information and the node number of the target network node.
And step S42, judging whether the target network node is a balancing machine network node.
If the target network node is the balancing machine network node, the node admittance matrix calculation is finished, and if the target network node is not the balancing machine network node, the following steps are executed:
and step S43, obtaining the branch information of the target network branch.
And step S44, acquiring the node number of the opposite side network node, wherein the opposite side network node is the network node connected with the target network node.
And step S45, extracting unbalanced machine network nodes in the opposite side network nodes.
And step S46, filling the node numbers of the network nodes of the unbalanced machines into the node number column vector one by one, and filling the node number of the target network node into the tail end of the node number column vector. And filling the mutual admittance values of the corresponding branches into the admittance column vectors, and filling the self-admittance values of the unbalanced machine network branches into the tail ends of the admittance column vectors, wherein the corresponding branches are network branches connected with the unbalanced machine network nodes in the target network branches, the self-admittance values of the unbalanced machine network branches are the sum of the mutual admittance values of all the unbalanced machine network branches, and the unbalanced machine network branches are branches obtained by connecting the target network nodes with the unbalanced machine network nodes.
Obtaining the mutual admittance value of the corresponding branch by the following formula:
Figure GDA0003674196500000071
wherein i is the target network node number, j is the opposite side network node number, Y ij Mutual admittance values, X, for connecting said corresponding branches ij Is the reactance of the branch connecting the i and j network nodes.
Obtaining the self-admittance value of the unbalanced machine network branch by the following formula:
Figure GDA0003674196500000072
yii is the self-admittance value of the unbalanced machine network branch, i is the number of the target network node, and j is the number of the opposite side network node and the unbalanced machine network node.
Step S47, calculating a transadmittance value of a branch of the balancing machine with respect to a network node of the balancing machine in the opposite-side network node, adding the transadmittance value of the branch of the balancing machine after taking an absolute value to a self-admittance value of a branch of the network of the unbalanced machine, and updating the self-admittance value of the branch of the network of the unbalanced machine in the end of the admittance column vector according to an addition result, where the branch of the balancing machine is a branch connecting the target network node and the network node of the balancing machine.
And step S48, sequencing the node number column vectors from small to large, and correspondingly adjusting the arrangement sequence of the admittance column vectors according to the mapping relation of the node number column vectors.
The resulting node number column vector is as follows:
Figure GDA0003674196500000073
wherein k ≠ i, i is the number of the target network node, k represents k total of k contralateral network nodes connected with the target network node and the target network node, and num 1 、……、num k Numbering all opposite network nodes connected to said target network node, num i Numbering the target network nodes.
The resulting admittance column vector is as follows:
Figure GDA0003674196500000081
wherein k ≠ i, i is the number of the target network node, j is the number of all the opposite side network nodes, and k represents k-1 opposite side network nodes connected with the target network node and the target network node per se, and-1/X inum1 、……、-1/X inumk For all tributary transadmittances connecting the target network node and the opposite network node,
Figure GDA0003674196500000082
is the self-admittance value of the target network node.
Further, after defining and constructing the node number column vector of the target network node and the admittance column vector of the target network branch, referring to a flowchart of the equivalence combining calculation shown in fig. 3, the method further includes:
and step S61, adding the node number of the target network node and the node number of the opposite side network node to obtain the row number of the node number column vector.
Step S62, determining whether there is a duplicate element in the node number column vector according to the following formula:
node(m)-node(m-1)=0。
if the equality is true, there is a duplicate element, if the equality is not true, there is no duplicate element, where node is the node number column vector, m is the row index of the node number column vector and the admittance column vector, and node (m) is the mth value of the node number column vector.
Step S63, if yes, performing multiple circuit equivalence merging calculation one by one according to the following formula for the repeated elements:
Figure GDA0003674196500000083
wherein i represents a node number of the target network node, Y i Representing the admittance column vector.
And step S64, deleting zero elements in the node number column vector and the admittance column vector, and updating the row number of the node number column vector according to the deletion result.
If not, the process proceeds directly to step S5.
Further, based on the column vector of the node admittance matrix, performing a spliced column write on the node number column vector and the admittance column vector to obtain a direct column write result of the node admittance matrix, including:
based on the column vector of the node admittance matrix, performing spliced column writing on the node number column vector and the admittance column vector through the following formula:
Figure GDA0003674196500000091
wherein i represents the node number of the target network node, nnz represents the number of non-zero elements from line 1 to line i-1 of the node admittance matrix, value represents the numerical column vector, collindex represents the column index vector, rowptr represents the row offset column vector, node represents the node number column vector, Y represents the node number column vector, and i representing the admittance column vector.
Clearing the vector, the node number column vector and the admittance column vector, reading the information of the next target network node, and returning to the step S4.
The contents disclosed in the above embodiments are explained by simple examples, and the calculation examples in table 1 are calculated according to the existing method of converting full column writing into compressed storage and the method of directly writing the storage node admittance matrix in the present application, and the calculation time consumption of the two methods is compared with the process memory.
TABLE 1
Examples of the design Admittance array line number Number of admittance arrays Number of non-zero elements
IEEE300 299 299 1115
Actual power grid in certain area 11825 11825 39439
And (3) comparing and recording the computing time and the memory use condition of the two methods respectively by using the IEEE300 standard computing example data.
The method for directly writing the storage node admittance matrix in the column is adopted for calculation, and the process is as follows:
the node information of the network node and the branch information of the network branch in the IEEE300 embodiment are read.
And numbering the nodes according to the mode that the balancing machine is the maximum number of the whole network, and acquiring the node number of each network node.
Defining a column vector of a node admittance matrix in a compressed storage form (CSR), wherein the column vector comprises three columns, namely a numeric column vector, a column index column vector and a row offset column vector, and the numeric column vector is defined as value, the column index column vector is defined as colidex and the row offset column vector is defined as rowptr.
Defining and constructing node number column vector node and admittance column vector Y of target network node i (hereinafter referred to as a vector node and a vector Y) i ) To construct the vector node and the vector Y of the node i in the example i For example, the node i is any target network node. The construction process is as follows:
(1) the node number 1 (hereinafter referred to as node 1) of the target network node is read, and it is determined that the node 1 is an unbalanced machine node, and the following calculation is performed.
(2) Reading the node name of the node 1 as bus-1, searching all branches connected with the node 1 in the branch information according to the node name of the node 1 as bus-1, reading the branch information of the branches, and obtaining the result shown in table 2:
TABLE 2
Number of branch starting point Branch endpoint numbering Per unit value of branch reactance
1 197 0.006
1 173 0.052
1 222 0.0196
(3) According to the results in table 2, the opposite side nodes in all the branches connected with node 1 are all unbalanced machines, the opposite side nodes connected with node 1 are numbered and filled with vector node one by one according to the branches, the vector node is not filled with i, and the vector Y is filled with vector node I i Filling in the corresponding branch transadmittance value, vector Y i And finally filling the self-admittance value of the branch of the unbalanced machine.
Obtaining the mutual admittance value of the corresponding branch by the following formula:
Figure GDA0003674196500000101
wherein j is the number of the opposite side network node, Y ij Mutual admittance values, X, for connecting said corresponding branches ij Is the reactance of the branch connecting the i and j network nodes.
Obtaining the self-admittance value of the unbalanced machine network branch by the following formula:
Figure GDA0003674196500000102
wherein, Y ii And the self-admittance value of the network branch of the unbalanced machine.
(4) The branch with the balancing machine as the opposite side node connected with the node 1 does not exist, the self-admittance value of the node 1 is not corrected, the vector nodes are sorted from small to large, and the vector Y i The arrangement order of the node vectors is adjusted according to the mapping relation of the node vectors.
The generated vector nodes are as follows:
Figure GDA0003674196500000103
generated vector Y i As follows:
Figure GDA0003674196500000104
(5) traversing the vector node, and judging the vector Y by the following formula i Presence or absence of repeating elements:
node(m)-node(m-1)=0。
wherein m is a row index of the node number column vector and the admittance column vector.
Judging that the node 1 has no repeated elements, and carrying out equivalent combination calculation of multiple circuits, wherein the vector node and the vector Y of the node 1 i And completing construction, wherein the row number Len (node) of the obtained node vector is 4.
Calculating the vectors node and Y i The spliced columns are written into vectors of CSR form, value, colidex and rowptr respectively according to the following formula.
Figure GDA0003674196500000111
Nnz represents the number of non-zero elements in the 1 st row to the i-1 st row of the node admittance matrix, nnz of the node 1 is 0, rowptr (1) is the index of the first non-zero element in the 1 st row of the network node admittance matrix in a value vector, at this time, rowptr (1) is 1, and the vector value is written into the vector Y in sequence i Vector colidex writes vector node in turn, and vector rowptr writes the value of rowptr (1).
Emptying vector node, vector Y i When the writing of the node 1 column is completed, the information of the next node number is read, and the process returns to step S4.
Column write to the next target network node, which is bus-9002, which column writesThe node information is read, and the details of the vector node and the vector Y when the branch connected with the node contains the multi-circuit are described by taking the node as an example i The construction process comprises the following steps:
(1) the read node bus-9002 has a number of 260 (hereinafter referred to as node 260), and determines that the node bus-9002 is an unbalanced machine node, and performs the following calculation.
(2) According to the node name bus-9002 of the node 260, all the branches connected to the node 260 are searched in the branch information, and the branch information of the branches is read, with the results shown in table 3:
TABLE 3
Line starting point node numbering Line end point node numbering Per unit value of branch reactance
260 266 0.43286
260 266 0.43286
260 267 0.07026
260 270 3.2202
(3) According to the results in table 3, the nodes on opposite sides of all the branches connected to node 260 are unbalanced machines, the numbers of the nodes on opposite sides connected to node 260 are filled into vector nodes one by one according to the branches, the vector node is not filled into i, and the vector Y is filled into i i Filling in the corresponding branch transadmittance value, vector Y i And finally filling the self-admittance value of the unbalanced machine branch.
Obtaining the mutual admittance value of the corresponding branch by the following formula:
Figure GDA0003674196500000112
wherein j is the number of the opposite side network node, Y ij Mutual admittance value, X, for connecting said corresponding branches ij Is the reactance of the branch connecting the i and j network nodes.
Obtaining the self-admittance value of the unbalanced machine network branch by the following formula:
Figure GDA0003674196500000121
wherein, Y ii And the self-admittance value of the network branch of the unbalanced machine.
(4) There is no branch with the balancing machine as the opposite node connected to node 260, the self-admittance value of node 260 is not modified, the vector nodes are sorted from small to large, vector Y i The arrangement order of the node vectors is adjusted according to the mapping relation of the node vectors.
The generated vector nodes are as follows:
Figure GDA0003674196500000122
generated vector Y i As follows:
Figure GDA0003674196500000123
(5) traversing the vector node, and judging the vector Y by the following formula i Presence or absence of repeating elements:
node(m)-node(m-1)=0。
wherein m is a row index of the node number column vector and the admittance column vector.
And judging that the node 260 has repeated elements, and performing equivalent combination calculation of multiple circuits.
The equivalence combining is carried out according to the following formula:
Figure GDA0003674196500000124
the merged vector nodes are as follows:
Figure GDA0003674196500000125
merged vector Y i As follows:
Figure GDA0003674196500000131
and entering a loop of equivalent merging calculation of the multi-circuit lines until traversing the vector node.
Deleting vectors node, Y i Zero element of (1), correction vector node, vector Y i The number of rows len (node) to obtain a node vector is 4.
The modified vector node is as follows:
Figure GDA0003674196500000132
corrected vector Y i As follows:
Figure GDA0003674196500000133
calculating the vectors node and Y i The spliced columns are written into vectors of CSR form, value, colidex and rowptr respectively according to the following formula.
Figure GDA0003674196500000134
Nnz indicates that the number of non-zero elements in the 1 st row to the 259 th row of the node admittance matrix is 987, rowptr (260) is the index of the first non-zero element in the 260 th row of the network node admittance matrix in the value vector, rowptr (259) is the index of the first non-zero element in the 259 th row of the network node admittance matrix in the value vector, and the vector value is sequentially written into the vector Y i Vector colidex writes vector node in turn and vector rowptr writes the value of rowptr (260).
Emptying vector node, vector Y i When the writing of the node 260 column is completed, the information of the next node number is read, and the process returns to step S4.
And repeating the processes of the other nodes until the taken node is a balanced node, and directly writing the node admittance matrix in a column.
The existing method of firstly writing all columns and then converting into compressed storage is adopted for calculation, and the process is as follows:
matrix Y with the size of 299 x 299 is defined, a node admittance matrix of a column writing network is written according to a full column writing compression storage method, and the matrix is converted into a CSR compression storage format.
The method for writing all columns first and then converting the all columns into the compressed storage and the method form the node admittance matrix to occupy the process memory and the time used by the node admittance matrix are recorded.
The branch information and the node information of the power grid example in a certain actual area are read, the implementation process is similar to the IEEE300 standard example data, and the calculation time and the memory use condition of the two methods are respectively compared and recorded as shown in the table 4.
TABLE 4
Figure GDA0003674196500000141
Table 4 compares the computation time and memory consumption of the two methods for different examples. In the aspect of calculation time consumption, the calculation average time consumption of the method is obviously less than that of the conventional method for firstly writing the whole column and then converting the whole column into the compressed storage, the speed-up ratio is also increased in positive correlation with the network scale, namely the method has gradually obvious advantages in saving the time consumption of writing the node admittance matrix by the column along with the enlargement of the network scale; in the aspect of memory consumption, in two examples, compared with the existing method of firstly writing all columns and then converting into compressed storage, the method obviously takes advantage of the process memory occupied by the method, and the memory ratio is obviously increased along with the increase of the network scale, so that the method has obvious advantages.
The following are embodiments of the apparatus disclosed herein for performing the above-described method embodiments. For details not disclosed in the device embodiments, refer to the method embodiments.
A second embodiment of the present application discloses a device for directly column-writing a node admittance matrix in a compressed storage form, where the device is applied to the method for directly column-writing a node admittance matrix in a compressed storage form disclosed in the first embodiment, and with reference to a schematic structural diagram shown in fig. 4, the device includes:
an obtaining information module 10, configured to obtain node information of a network node and branch information of a network branch, where the apparatus is applied to the node admittance matrix direct column writing method in a compressed storage form in the first aspect, and the apparatus includes:
and a number obtaining module 20, configured to obtain a node number of each network node.
A column vector defining module 30 is configured to define, in a compressed storage form, a column vector of the node admittance matrix, where the column vector includes three columns, i.e., a numerical column vector, a column index column vector, and a row offset column vector.
A column vector construction module 40, configured to define and construct a node number column vector of a target network node and an admittance column vector of a target network branch, where the target network node is any network node in the power network, and the target network branch is all network branches connected to the target network node.
And a splicing column writing module 50, configured to perform splicing column writing on the node number column vector and the admittance column vector based on the column vector of the node admittance matrix, and obtain a direct column writing result of the node admittance matrix.
Further, the defining and constructing a node number column vector of the target network node and an admittance column vector of the target network branch includes:
and acquiring the node information and the node number of the target network node.
And judging whether the target network node is a balancing machine network node.
If the target network node is not the balancing machine network node, performing the steps of:
and obtaining the branch information of the target network branch.
And acquiring the node number of an opposite side network node, wherein the opposite side network node is a network node connected with the target network node.
And extracting unbalanced machine network nodes in the opposite side network nodes.
And filling the node numbers of the network nodes of the unbalanced machines into the node number column vector one by one, and filling the node number of the target network node into the tail end of the node number column vector. And filling the mutual admittance values of the corresponding branches into the admittance column vectors, and filling the self-admittance values of the unbalanced machine network branches into the tail ends of the admittance column vectors, wherein the corresponding branches are network branches connected with the unbalanced machine network nodes in the target network branches, the self-admittance values of the unbalanced machine network branches are the sum of the mutual admittance values of all the unbalanced machine network branches, and the unbalanced machine network branches are branches obtained by connecting the target network nodes with the unbalanced machine network nodes.
Obtaining the mutual admittance value of the corresponding branch by the following formula:
Figure GDA0003674196500000151
wherein i is the number of the target network node, j is the number of the opposite side network node, and Y ij Mutual admittance values, X, for connecting said corresponding branches ij Is the reactance of the branch connecting the i and j network nodes.
Obtaining the self-admittance value of the unbalanced machine network branch by the following formula:
Figure GDA0003674196500000152
wherein, Y ii And the self-admittance value of the unbalanced machine network branch is shown, i is the number of the target network node, and j is the opposite side network node.
And calculating the mutual admittance values of the branch circuits of the balancing machines aiming at the network nodes of the balancing machines in the opposite side network nodes, adding the absolute value of the mutual admittance values of the branch circuits of the balancing machines and the self admittance values of the branch circuits of the non-balancing machines, and updating the self admittance values of the branch circuits of the non-balancing machines in the tail ends of the admittance column vectors according to the addition result, wherein the branch circuits of the balancing machines are the branch circuits connecting the target network nodes and the network nodes of the balancing machines.
And sequencing the node number column vectors from small to large, and correspondingly adjusting the arrangement sequence of the admittance column vectors according to the mapping relation of the node number column vectors.
The resulting node number column vector is as follows:
Figure GDA0003674196500000161
wherein k is not equal to i, i is the number of the target network node, k represents the total k number of opposite side network nodes connected with the target network node including the target network node, and num 1 、……、num k Numbering all opposite network nodes connected to said target network node, num i Numbering the target network nodes.
The resulting admittance column vector is as follows:
Figure GDA0003674196500000162
wherein k ≠ i, i is the number of the target network node, j is the number of the opposite side network node, and k represents the total k opposite side network node numbers connected with the target network node including the target network node, and-1/X inum1 、……、-1/X inumk For all tributary transadmittances connecting the target network node and the opposite network node,
Figure GDA0003674196500000163
is the self-admittance value of the target network node.
Further, after the defining and constructing the node number column vector of the target network node and the admittance column vector of the target network branch, the apparatus further includes:
and adding the node number of the target network node and the node number of the opposite side network node to obtain the row number of the node number column vector.
Judging whether a repeated element exists in the node number column vector through the following formula:
node(m)-node(m-1)=0。
if the equation is true, then there is a repeating element, where node is the node numbered column vector, m is the row index of the node numbered column vector and the admittance column vector, and node (m) is the mth value of the node numbered column vector.
If yes, aiming at the repeated elements, carrying out equivalent merging calculation of multiple lines one by one through the following formula:
Figure GDA0003674196500000164
wherein i represents the node number of the target network node, Y i Represents the aboveAdmittance column vectors.
And deleting zero elements in the node number column vector and the admittance column vector, and updating the row number of the node number column vector according to the deletion result.
If not, directly entering a splicing column writing module.
Further, based on the column vector of the node admittance matrix, performing a spliced column write on the node number column vector and the admittance column vector to obtain a direct column write result of the node admittance matrix, including:
based on the column vector of the node admittance matrix, performing spliced column writing on the node number column vector and the admittance column vector through the following formula:
Figure GDA0003674196500000171
wherein i represents the node number of the target network node, nnz represents the number of non-zero elements from line 1 to line i-1 of the node admittance matrix, value represents the numerical column vector, collindex represents the column index vector, rowptr represents the row offset column vector, node represents the node number column vector, Y represents the node number column vector, and i representing the admittance column vector.
And clearing the node number column vector and the admittance column vector of the vector, reading the information of the next target network node, and returning to the column vector construction module 40.
The present application has been described in detail with reference to specific embodiments and illustrative examples, but the description is not intended to limit the application. Those skilled in the art will appreciate that various equivalent substitutions, modifications or improvements may be made to the presently disclosed embodiments and implementations thereof without departing from the spirit and scope of the present disclosure, and these fall within the scope of the present disclosure. The protection scope of this application is subject to the appended claims.

Claims (6)

1. A method for direct column writing of a compressed storage form of a node admittance matrix, the method comprising:
acquiring node information of network nodes and branch information of network branches, wherein the node information comprises names and types of all network nodes in a power network, and the branch information comprises: starting point names, end point names and branch reactance of all network branches in the power network;
acquiring a node number of each network node;
defining a column vector of a node admittance matrix in a compressed storage form, wherein the column vector comprises three columns which are a numerical column vector, a column index column vector and a row offset column vector respectively;
defining and constructing a node number column vector of a target network node and an admittance column vector of a target network branch, wherein the target network node is any network node in the power network, and the target network branch is all network branches connected with the target network node;
based on the column vector of the node admittance matrix, performing splicing column writing on the node number column vector and the admittance column vector to obtain a direct column writing result of the node admittance matrix;
the defining and constructing a node number column vector of the target network node and an admittance column vector of the target network branch includes:
acquiring node information and a node number of the target network node;
judging whether the target network node is a balancing machine network node or not;
if the target network node is not the balancing machine network node, performing the steps of:
obtaining branch information of the target network branch;
acquiring a node number of an opposite side network node, wherein the opposite side network node is a network node connected with the target network node;
extracting unbalanced machine network nodes in the opposite side network nodes;
filling the node numbers of the network nodes of the unbalanced machine into the node number column vector one by one, and filling the node number of the target network node into the tail end of the node number column vector; filling the admittance column vector with the mutual admittance values of corresponding branches, and filling the self-admittance values of the unbalanced machine network branches into the tail ends of the admittance column vector, wherein the corresponding branches are network branches connected with the unbalanced machine network nodes in the target network branches, the self-admittance values of the unbalanced machine network branches are the sum of mutual admittance of all the unbalanced machine network branches, and the unbalanced machine network branches are branches obtained by connecting the target network nodes with the unbalanced machine network nodes;
calculating the mutual admittance values of the branch circuits of the balancing machines aiming at the network nodes of the balancing machines in the opposite side network nodes, taking the absolute value of the mutual admittance values of the branch circuits of the balancing machines, adding the absolute value of the mutual admittance values of the branch circuits of the balancing machines with the self admittance values of the branch circuits of the non-balancing machines, and updating the self admittance values of the branch circuits of the non-balancing machines in the tail ends of the admittance column vectors according to the addition result, wherein the branch circuits of the balancing machines are the branch circuits connecting the target network nodes with the network nodes of the balancing machines;
sequencing the node number column vectors from small to large, and correspondingly adjusting the arrangement sequence of the admittance column vectors according to the mapping relation of the node number column vectors;
after said defining and constructing a node number column vector of the target network node and an admittance column vector of the target network leg, the method further comprises:
adding the node number of the target network node and the node number of the opposite side network node to obtain the row number of the node number column vector;
judging whether a repeated element exists in the node number column vector through the following formula:
node(m)-node(m-1)=0;
wherein node is the node number column vector, m is the row index of the node number column vector and the admittance column vector, and node (m) is the mth value of the node number column vector;
if yes, aiming at the repeated elements, carrying out equivalent merging calculation of multiple lines one by one through the following formula:
Figure FDA0003674196490000021
wherein i represents a node number of the target network node, and Yi represents the admittance column vector;
and deleting zero elements in the node number column vector and the admittance column vector, and updating the row number of the node number column vector according to the deletion result.
2. The method of claim 1, wherein the node number of any network node is less than the number of balancing machines in the power network.
3. The method of claim 1, wherein the method comprises:
the numerical column vector is used for storing numerical values of non-zero elements in the node admittance matrix in a row-first mode;
the column index column vector is used for storing the column index of each non-zero element in the node admittance matrix;
the row offset column vector is used for storing an index of a target element in the numerical value column vector and the number of all non-zero elements in the node admittance matrix, and the target element is the first non-zero element of a row corresponding to each network node in the node admittance matrix.
4. The method according to claim 1 or 3, wherein the obtaining a node admittance matrix direct column write result by performing a concatenated column write on the node number column vector and the admittance column vector based on the column vector of the node admittance matrix comprises:
based on the column vector of the node admittance matrix, performing spliced column writing on the node number column vector and the admittance column vector through the following formula:
Figure FDA0003674196490000022
wherein i represents the node number of the target network node, nnz represents the number of non-zero elements from row 1 to row i-1 of the node admittance matrix, value represents the numeric column vector, collindex represents the column index vector, rowptr represents the row offset column vector, node represents the node number column vector, and Yi represents the admittance column vector.
5. A compressed storage form node admittance matrix direct column writing device, wherein the device is applied to the compressed storage form node admittance matrix direct column writing method of any one of claims 1-4, the device comprises:
the information acquisition module is used for acquiring node information of network nodes and branch information of network branches, wherein the node information comprises names and types of all network nodes in the power network, and the branch information comprises: starting point names, end point names and branch reactance of all network branches in the power network;
the number obtaining module is used for obtaining the node number of each network node;
a column vector defining module, configured to define a column vector of the node admittance matrix in a compressed storage form, where the column vector includes three columns, which are a numerical column vector, a column index column vector, and a row offset column vector;
the system comprises a column vector construction module, a column vector construction module and a data processing module, wherein the column vector construction module is used for defining and constructing a node number column vector of a target network node and an admittance column vector of a target network branch, the target network node is any network node in the power network, and the target network branch is all network branches connected with the target network node;
the splicing column writing module is used for performing splicing column writing on the node number column vector and the admittance column vector based on the column vector of the node admittance matrix to obtain a direct column writing result of the node admittance matrix;
the defining and constructing a node number column vector of the target network node and an admittance column vector of the target network branch includes:
acquiring node information and a node number of the target network node;
judging whether the target network node is a balancing machine network node or not;
if the target network node is not the balancing machine network node, performing the steps of:
obtaining branch information of the target network branch;
acquiring a node number of an opposite side network node, wherein the opposite side network node is a network node connected with the target network node;
extracting unbalanced machine network nodes in the opposite side network nodes;
filling the node numbers of the network nodes of the unbalanced machine into the node number column vector one by one, and filling the node number of the target network node into the tail end of the node number column vector; filling the admittance column vector with the mutual admittance values of corresponding branches, and filling the self-admittance values of the unbalanced machine network branches into the tail ends of the admittance column vector, wherein the corresponding branches are network branches connected with the unbalanced machine network nodes in the target network branches, the self-admittance values of the unbalanced machine network branches are the sum of mutual admittance of all the unbalanced machine network branches, and the unbalanced machine network branches are branches obtained by connecting the target network nodes with the unbalanced machine network nodes;
calculating the mutual admittance values of the branch circuits of the balancing machines aiming at the network nodes of the balancing machines in the opposite side network nodes, taking the absolute value of the mutual admittance values of the branch circuits of the balancing machines, adding the absolute value of the mutual admittance values of the branch circuits of the balancing machines with the self admittance values of the branch circuits of the non-balancing machines, and updating the self admittance values of the branch circuits of the non-balancing machines in the tail ends of the admittance column vectors according to the addition result, wherein the branch circuits of the balancing machines are the branch circuits connecting the target network nodes with the network nodes of the balancing machines;
the node number column vectors are sorted from small to large, and the arrangement sequence of the admittance column vectors is correspondingly adjusted according to the mapping relation of the node number column vectors
After said defining and constructing the node number column vector of the target network node and the admittance column vector of the target network leg, the apparatus further comprises:
adding the node number of the target network node and the node number of the opposite side network node to obtain the row number of the node number column vector;
judging whether a repeated element exists in the node number column vector through the following formula:
node(m)-node(m-1)=0;
wherein node is the node number column vector, m is the row index of the node number column vector and the admittance column vector, and node (m) is the mth value of the node number column vector;
if yes, aiming at the repeated elements, carrying out equivalent merging calculation of multiple lines one by one through the following formula:
Figure FDA0003674196490000031
wherein i represents a node number of the target network node, Y i Representing the admittance column vector;
and deleting zero elements in the node number column vector and the admittance column vector, and updating the row number of the node number column vector according to the deletion result.
6. The apparatus according to claim 5, wherein the apparatus for directly column-writing the node admittance matrix in a compressed storage form performs a concatenated column-writing on the node number column vector and the admittance column vector based on the column vector of the node admittance matrix to obtain a node admittance matrix direct column-writing result, including:
based on the column vector of the node admittance matrix, performing spliced column writing on the node number column vector and the admittance column vector through the following formula:
Figure FDA0003674196490000041
wherein i represents the node number of the target network node, nnz represents the number of non-zero elements from row 1 to row i-1 of the node admittance matrix, value represents the numeric column vector, collindex represents the column index vector, rowptr represents the row offset column vector, node represents the node number column vector, and Yi represents the admittance column vector.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103617150A (en) * 2013-11-19 2014-03-05 国家电网公司 GPU (graphic processing unit) based parallel power flow calculation system and method for large-scale power system
CN104142810A (en) * 2014-07-14 2014-11-12 中国南方电网有限责任公司电网技术研究中心 Parallel method for forming node admittance matrix
CN104158182A (en) * 2014-08-18 2014-11-19 国家电网公司 Large-scale power grid flow correction equation parallel solving method
CN104317553A (en) * 2014-10-13 2015-01-28 南昌大学 Method for fast forming, reading and writing power system node admittance matrix data based on sparse matrix technology
CN105119273A (en) * 2015-08-13 2015-12-02 国电南瑞科技股份有限公司 Grid equivalent simplification method considering system grid strength and generator effective transmission capacity
CN111062610A (en) * 2019-12-16 2020-04-24 国电南瑞科技股份有限公司 Power system state estimation method and system based on information matrix sparse solution

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2950761B1 (en) * 2009-09-28 2012-02-10 Excem PSEUDO-DIFFERENTIAL TRANSMISSION METHOD USING NON-UNIFORM INTERCONNECTION
US8810253B2 (en) * 2010-09-20 2014-08-19 Thomas L. Marzetta Characterization of electrical power distribution systems using characterization matrices
CN107563674B (en) * 2017-10-09 2020-07-10 清华大学 Electric-thermal coupling system state estimation method considering pipeline dynamic characteristics

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103617150A (en) * 2013-11-19 2014-03-05 国家电网公司 GPU (graphic processing unit) based parallel power flow calculation system and method for large-scale power system
CN104142810A (en) * 2014-07-14 2014-11-12 中国南方电网有限责任公司电网技术研究中心 Parallel method for forming node admittance matrix
CN104158182A (en) * 2014-08-18 2014-11-19 国家电网公司 Large-scale power grid flow correction equation parallel solving method
CN104317553A (en) * 2014-10-13 2015-01-28 南昌大学 Method for fast forming, reading and writing power system node admittance matrix data based on sparse matrix technology
CN105119273A (en) * 2015-08-13 2015-12-02 国电南瑞科技股份有限公司 Grid equivalent simplification method considering system grid strength and generator effective transmission capacity
CN111062610A (en) * 2019-12-16 2020-04-24 国电南瑞科技股份有限公司 Power system state estimation method and system based on information matrix sparse solution

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
110kV变压器二端口宽频网络参数的测量与计算;张旭东;《中国优秀硕士学位论文全文数据库 工程科技Ⅱ辑》;20150315(第03(2015)期);C042-273 *
A lucid design criterion for wireless power transfer systems to enhance their maximum available efficiency;Takashi Ohira;《2014 Asia-Pacific Microwave Conference》;20150326;1157-1158 *
A novel formulation of the nodal admittance matrix for linear active circuits with nullors via the component stamps method;Marian Pierzchala 等;《2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)》;20130805;1-4 *
基于CSR直接列写节点导纳矩阵的大电网直流潮流快速计算方法;司大军 等;《昆明理工大学学报(自然科学版)》;20201215;第45卷(第6期);82-91 *
广域测量系统中PMU优化配置的研究;夏海文;《中国优秀硕士学位论文全文数据库 工程科技Ⅱ辑》;20120715(第07(2012)期);C042-1033 *

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