CN112069554A - Power-on structure of external power supply, method thereof, security chip and electronic card - Google Patents
Power-on structure of external power supply, method thereof, security chip and electronic card Download PDFInfo
- Publication number
- CN112069554A CN112069554A CN202010984304.1A CN202010984304A CN112069554A CN 112069554 A CN112069554 A CN 112069554A CN 202010984304 A CN202010984304 A CN 202010984304A CN 112069554 A CN112069554 A CN 112069554A
- Authority
- CN
- China
- Prior art keywords
- voltage
- checking
- self
- low
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 27
- 238000001514 detection method Methods 0.000 claims abstract description 85
- 238000012360 testing method Methods 0.000 claims abstract description 31
- 230000000903 blocking effect Effects 0.000 claims abstract description 5
- 230000002159 abnormal effect Effects 0.000 claims description 9
- 230000009471 action Effects 0.000 claims description 6
- 230000005669 field effect Effects 0.000 claims description 6
- 230000008569 process Effects 0.000 description 9
- 230000006870 function Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000001914 filtration Methods 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000000306 component Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
Abstract
The invention discloses a power-on structure of an external power supply, which comprises a voltage division circuit, a power supply module and a power supply module, wherein the voltage division circuit comprises a plurality of voltage division resistors connected with the input end of the external power supply; the switch circuit comprises a high-voltage branch group or a low-voltage branch group, and comprises a self-checking switch pair for connecting or blocking self-checking voltage signals with different values according to a control signal generated by the control unit; the comparison circuit comprises comparators respectively corresponding to the high-voltage branch group or the low-voltage branch group, and is used for receiving a reference voltage signal of a preset value and a self-detection voltage signal of the switch circuit, comparing the reference voltage signal with the self-detection voltage signal and outputting a comparison result; the high-voltage output end or the low-voltage output end is included in the output circuit and used for outputting a detection result according to the comparison result; the judging unit is used for receiving the detection result and matching the detection result with the prediction result to judge whether the attack is received or not. The invention tests the working state of the detection circuit by simulating external attack, and can ensure the information security of the security chip.
Description
Technical Field
The invention relates to a power-on structure of an external power supply, a method thereof, a security chip and an electronic card, and belongs to the technical field of security chips.
Background
With the continuous progress of informatization and the development of economy, the information industry has made great progress, and information security becomes an important topic related to national security and people's life. The security chip is used as a core component of information security, so that the information security is greatly enhanced, and the application of the security chip is increasingly and widely integrated into aspects of national security and common people life, especially the application related to finance.
Meanwhile, the number of attacks to be performed on the security chip is infinite, and the number of attack means is increasing. For the safety chip, besides the high-quality manufacturing, the safety chip also has the safety characteristics of preventing malicious attacks from cracking the chip, preventing hardware from being tampered with, and the like.
How to realize and discover the detection of the attacked security chip and provide high-stability and high-reliability security protection becomes one of the technical problems to be solved urgently by the security chip.
Disclosure of Invention
The invention provides a power-on structure of an external power supply.
Another technical problem to be solved by the present invention is to provide a method for powering on an external power supply.
Another technical problem to be solved by the present invention is to provide a security chip including a power-on structure of an external power supply.
Another object of the present invention is to provide an electronic card including a power-on structure for an external power supply.
In order to achieve the purpose, the invention adopts the following technical scheme:
according to a first aspect of the embodiments of the present invention, there is provided an external power supply power-on structure, including an input terminal, a high voltage output terminal, and a low voltage output terminal for connecting an external power supply, and further including a control unit, a detection unit, and a determination unit, where the detection unit includes a voltage division circuit, a switch circuit, a comparison circuit, and an output circuit, where:
the voltage division circuit comprises a plurality of voltage division resistors connected with the input end and is used for providing a plurality of self-checking voltage signals with different values for the switch circuit;
the switching circuit comprises a high-voltage branch group or a low-voltage branch group, at least one of the high-voltage branch group and the low-voltage branch group further comprises a self-checking switch pair, and the self-checking switch pair is used for switching on or blocking self-checking voltage signals with different values according to a control signal generated by the control unit;
the comparison circuit comprises comparators respectively corresponding to the high-voltage branch group or the low-voltage branch group, and is used for receiving a reference voltage signal of a preset value and the self-checking voltage signal of the switch circuit, comparing the reference voltage signal with the self-checking voltage signal and outputting a comparison result;
the high-voltage output end or the low-voltage output end is included in the output circuit and used for outputting a detection result according to the comparison result;
the judging unit is used for receiving the detection result and matching the detection result with the prediction result to judge whether the high-pressure passage and/or the low-pressure passage are attacked or not.
Preferably, the control signal includes an upper limit self-checking enable signal and a lower limit self-checking enable signal;
the self-checking switch pair comprises an upper limit self-checking switch and a lower limit self-checking switch, and the upper limit self-checking switch and the lower limit self-checking switch are field effect transistors;
the upper limit self-checking switch and the lower limit self-checking switch are respectively connected or disconnected with upper limit self-checking voltage signals and lower limit self-checking voltage signals with different values under the control of the upper limit self-checking enabling signal and the lower limit self-checking enabling signal, and the upper limit self-checking voltage signals and the lower limit self-checking voltage signals are processed by the comparison circuit to obtain the comparison result.
Preferably, the detection result is 2bits, and the 2bits are mutually exclusive, the output circuit includes a first end for directly outputting the comparison result and a second end for outputting the comparison result after negating the comparison result, the first end and the second end each output a 1-bit value, and the first end and the second end output values together form the 2-bit detection result.
Preferably, the judgment unit presets a prediction result corresponding to the upper limit self-checking enable signal and the lower limit self-checking enable signal, and is configured to match the detection result with the prediction result to judge whether the high-voltage output path and/or the low-voltage output path is/are attacked.
Preferably, the voltage dividing circuit is further configured to provide a plurality of operating voltage signals with different values to the switching circuit;
the control signals comprise high-voltage enable signals and low-voltage enable signals;
the high-voltage branch group further comprises a high-voltage switch, the low-voltage branch group further comprises a low-voltage switch, and the high-voltage switch and the low-voltage switch are respectively of a combined structure of a plurality of groups of field effect transistors;
the high-voltage signal passes through the high-voltage switch controlled by the high-voltage enabling signal and then passes through the output circuit to output a high-voltage working voltage signal, and the low-voltage signal passes through the low-voltage switch controlled by the low-voltage enabling signal and then passes through the output circuit to output a low-voltage working voltage signal.
Preferably, the high-voltage enable signal and the low-voltage enable signal generated by the control unit are both 8bits respectively;
the upper limit self-checking enabling signal and the lower limit self-checking enabling signal generated by the control unit are respectively 1 bit.
According to a second aspect of the embodiments of the present invention, there is provided a method for powering on an external power supply, including a step of providing an input of the external power supply, a step of outputting a high-voltage operating voltage and a low-voltage operating voltage, and further including a step of presetting a control signal, a step of detecting, and a step of determining, wherein: starting the detecting step when the external power supply is powered on, wherein the detecting step comprises the following steps:
a partial pressure step: the self-checking circuit is configured to output a plurality of self-checking voltage signals with different values to the switching circuit through a plurality of voltage dividing resistors connected with an input end of an external power supply;
a switching step: configured to turn on or off the self-test voltage signal of different values through a pair of self-test switches;
a comparison step: the voltage detection circuit is configured to receive a reference voltage signal of a preset value and a self-checking voltage signal of a switch circuit through at least one comparator corresponding to a high-voltage branch group and/or a low-voltage branch group, compare the reference voltage signal with the self-checking voltage signal and output a comparison result;
an output step: configured to output a detection result through the high voltage output terminal and/or the low voltage output terminal;
in the judging step, the detection result is received, and whether the high-pressure passage and/or the low-pressure passage is attacked or not is judged according to the detection result.
Preferably, before the judging step, the preset control signal is an upper limit self-checking enabling signal and a lower limit self-checking enabling signal for the switching circuit;
in the comparison step: the upper limit self-checking switch and the lower limit self-checking switch are respectively connected or disconnected with upper limit self-checking voltage signals and lower limit self-checking voltage signals with different values under the control of the upper limit self-checking enabling signal and the lower limit self-checking enabling signal, and the upper limit self-checking voltage signals and the lower limit self-checking voltage signals are obtained through a comparison circuit to obtain comparison results.
Preferably, the comparison result is set to 1bit, and the comparison result with the value of 1bit are inverted to jointly form the detection result of 2 bits.
Preferably, the prediction results corresponding to the upper limit self-test enable signal and the lower limit self-test enable signal are preset before the judging step;
in the judging step: and matching the detection result with the prediction result, and judging whether the high-voltage output passage and/or the low-voltage output passage are attacked or not.
Preferably, the self-checking performs the following actions according to the preset control signal:
keeping the high-voltage switch and/or the low-voltage switch closed;
closing a lower limit self-checking switch of a high-voltage branch group and/or an upper limit self-checking switch of a low-voltage branch group, and opening and only opening the upper limit self-checking switch of the high-voltage branch group and/or the lower limit self-checking switch of the low-voltage branch group to respectively obtain first detection results of the high-voltage branch group and the low-voltage branch group;
or closing an upper limit self-checking switch of the high-voltage branch group and/or a lower limit self-checking switch of the low-voltage branch group, and opening and only opening the lower limit self-checking switch of the high-voltage branch group and/or the upper limit self-checking switch of the low-voltage branch group to respectively obtain second detection results of the high-voltage branch group and the low-voltage branch group;
and according to the corresponding prediction result, when any one of the first detection result and the second detection result is inconsistent with the prediction result, judging that any one of the corresponding high-pressure passage and/or low-pressure passage is abnormal.
Preferably, the control signal further comprises a high-voltage enable signal and a low-voltage enable signal, and the high-voltage enable signal and the low-voltage enable signal are respectively 8 bits;
the upper limit self-checking enabling signal and the lower limit self-checking enabling signal are respectively 1 bit.
According to a third aspect of the embodiments of the present invention, there is provided a security chip, which includes the foregoing external power supply power-on structure.
According to a fourth aspect of the embodiments of the present invention, there is provided a card including the foregoing security chip.
The invention has the following technical effects: when the chip is electrified after being connected to an external power supply, external attack is actively simulated to test the detection circuit of the chip, and the working state of the detection circuit can be found in time, so that the safety problem of a safety chip or an electronic card caused by the fact that the detection circuit fails and cannot detect when real external attack occurs is avoided.
Drawings
FIG. 1 is a schematic block diagram of a power-on structure of an external power supply according to an embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of a power-on structure of an external power supply according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for powering on an external power supply according to an embodiment of the present invention.
Detailed Description
The technical contents of the invention are described in detail below with reference to the accompanying drawings and specific embodiments.
The technical idea of the invention is as follows: in order to ensure that the safety chip can deal with physical attacks such as heating, laser, abnormal voltage and the like, various logic devices can be arranged in the safety chip, and the functions of specifically testing voltage, frequency, temperature and photosensitive detection are realized. For example, in a specific embodiment of the present invention, voltage monitoring is set in the security chip, starting from an external power supply that supplies power to the security chip, some phenomena that may be generated due to an attack are artificially simulated from a source, and voltage detection is performed by matching a result corresponding to the phenomena, when it is detected that the voltage of the external power supply is lower than an allowable lower voltage limit or exceeds an allowable upper voltage limit, an alarm signal is generated, and whether the security chip is attacked or not is detected by whether a path of the external power supply is abnormal or not. On the basis, if the security chip is detected to be attacked, the clock or the power supply is further closed, important information or sensitive information of the memory is cleared, or some other responses are made, so that the information security in the security chip is ensured.
Example 1:
the embodiment provides an external power supply power-on structure and method applied to a security chip. Furthermore, the safety chip can close the clock or the power supply, clear important information of the memory or make some responses, and ensure the information safety in the safety chip.
In this embodiment, on the basis of maintaining normal high-voltage output and low-voltage output, a self-checking switch pair is added, the voltage of the external power supply input to the security chip is detected, and when the input voltage is higher than or lower than a certain threshold, an alarm signal is generated. Therefore, the self-checking function is endowed to the power-on structure of the external power supply, so that the attack implemented by an attacker under the condition of power failure of the security chip is resisted.
A functional block diagram of a power-on structure of an external power supply is shown in fig. 1. This external power supply power-on structure, including external power supply 4's input, high voltage output and low voltage output, still include the control unit 1, detecting element 2 and judge unit 3, detecting element 2 includes bleeder circuit 21, switch circuit 22, comparison circuit 23 and output circuit 24, wherein: the voltage dividing circuit 21 comprises a plurality of voltage dividing resistors connected with the input end of the external power supply 4 and is used for providing a plurality of self-checking voltage signals with different values for the switch circuit 22; the switch circuit 22 includes a high-voltage branch group and a low-voltage branch group, at least one of the high-voltage branch group and the low-voltage branch group further includes a self-checking switch pair, and the self-checking switch pair switches on or off self-checking voltage signals of different values according to a control signal generated by the control unit 1; the comparison circuit 23 includes at least one comparator respectively corresponding to the high-voltage branch group and/or the low-voltage branch group, and is configured to receive a reference voltage signal of a preset value and a self-detection voltage signal of the switch circuit 22, compare the reference voltage signal and the self-detection voltage signal, and output a comparison result; the high voltage output terminal and the low voltage output terminal are included in the output circuit 24, and are used for outputting a detection result according to the comparison result; the judging unit 3 is used for receiving the detection result and matching the detection result with the prediction result to judge whether the high-pressure passage and/or the low-pressure passage is attacked or not.
Fig. 2 is a schematic circuit diagram of a power-on structure of an external power supply, and details of the circuit of each part will be described below with reference to fig. 2.
As can be seen from fig. 2, the voltage dividing circuit 21 includes a plurality of voltage dividing resistors connected in series and connected to the external power supply 4, for outputting a plurality of voltage signals of different values to the switching circuit 22. The switch circuit 22 includes a high-voltage branch group and a low-voltage branch group, each group includes three switches for switching on or blocking voltage signals of different values, one of the two groups is a normal high-voltage output path and a normal low-voltage output path, and the other two groups form a self-checking switch pair. The comparison circuit 23 includes at least two comparators respectively corresponding to the two sets of switch circuits 22, and is configured to receive a reference voltage signal of a preset value and a voltage signal of the switch circuits 22 that are turned on, compare the reference voltage signal and the turned-on voltage signal, and output a comparison result. In the present embodiment, the output circuit 24 is used for outputting the comparison result and the comparison result after inverting, in addition to the normal high-voltage output and low-voltage output.
Specifically, in the voltage divider circuit 21, VDD is the working voltage provided by the external power supply 4 for the security chip, and the VDD value is set differently due to the different processes for manufacturing the security chip. Taking the 90nm process as an example, the external power supply VDD is 3.3V (while the internal power supply VDD is 1.2V). Five resistors of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are connected in series between the cathode and the anode of VDD, and the cathode of VDD is also grounded at the same time. The first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are respectively arranged in equal proportion, and the resistance values of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 may be different according to different processes for preparing the safety chip. Of course, in order to keep the resistances of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 in a better equal ratio, each resistor may be a plurality of resistors connected in parallel, and an equivalent resistor of the plurality of resistors connected in parallel is the same as any single resistor of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5, so as to reduce errors caused by processes, which is a category of basic circuit principles and will not be described in detail herein.
A lower limit self-checking output end is led out between the first resistor R1 and the second resistor R2 and used For outputting a lower limit self-checking voltage VL _ For _ test; a low-voltage output end is led out between the second resistor R2 and the third resistor R3 and is used for outputting a low-voltage VLD; a high-voltage output end is led out between the third resistor R3 and the fourth resistor R4 and is used for outputting a high-voltage VHD; an upper limit self-checking output end is led out between the fourth resistor R4 and the fifth resistor R5 and is used For outputting an upper limit self-checking voltage VH _ For _ test. The voltage values of the lower limit self-checking voltage VL _ For _ test, the low voltage VLD, the high voltage VHD and the upper limit self-checking voltage VH _ For _ test are sequentially increased.
In the switch circuit 22, the high-voltage branch group and/or the low-voltage branch group are included, that is, in the external power supply power-on structure, according to the detection requirement, only any one of the high-voltage branch group and the low-voltage branch group may be set, or the high-voltage branch group and the low-voltage branch group may be set at the same time (as shown in fig. 2), and the three requirements may be flexibly set according to the application scenario, which is not limited herein.
The control signals comprise an upper limit self-checking enabling signal and a lower limit self-checking enabling signal; the self-checking switch pair comprises an upper limit self-checking switch and a lower limit self-checking switch, and the upper limit self-checking switch and the lower limit self-checking switch are field effect transistors; the upper limit self-checking switch and the lower limit self-checking switch are respectively switched on or switched off the upper limit self-checking voltage signal and the lower limit self-checking voltage signal with different values under the control of the upper limit self-checking enable signal and the lower limit self-checking enable signal, and the upper limit self-checking voltage signal and the lower limit self-checking voltage signal obtain comparison results through the comparison circuit 23. The switching circuit 22 will be described in detail below with reference to a schematic circuit diagram shown in fig. 2, which includes both the high-voltage and low-voltage branch groups.
The high-voltage branch group and the low-voltage branch group respectively comprise three switches, only one switch in the high-voltage branch group is conducted at any moment, only one switch in the low-voltage branch group is conducted, namely at any moment: the high-voltage branch group and the low-voltage branch group are either in a state of outputting normal voltage or in a state of testing an upper limit voltage limit or a lower limit voltage limit. The states of the three switches of the high-voltage branch group and the low-voltage branch group at any moment form a high-voltage state value or a low-voltage state value. Specifically, the three switches of the high-voltage branch group are respectively connected to the lower limit self-checking output terminal, the high-voltage output terminal, and the upper limit self-checking output terminal, and are used For respectively switching on or blocking the lower limit self-checking voltage VL _ For _ test, the high-voltage VHD, and the upper limit self-checking voltage VH _ For _ test, and under the action of the corresponding high-voltage lower limit self-checking enable signal S1, the high-voltage enable signal S0, and the high-voltage upper limit self-checking enable signal S2, the three switches pass through the switch circuit 22 to the comparison circuit 23. Similarly, the three switches of the low-voltage branch group are respectively connected to the lower limit self-checking output terminal, the low-voltage output terminal and the upper limit self-checking output terminal, and are used For respectively switching on or switching off the lower limit self-checking voltage VL _ For _ test, the low-voltage VLD and the upper limit self-checking voltage VH _ For _ test, and under the action of the corresponding low-voltage lower limit self-checking enable signal S5, the low-voltage enable signal S3 and the low-voltage upper limit self-checking enable signal S4, the three switches pass through the switch circuit 22 to the comparison circuit 23. As described above, the on-off state of each switch is controlled by the enable signal of the control unit 1 (CPU disposed in the chip), and the specific control rule can be flexibly determined according to the requirement, which is not limited herein.
The high-voltage enabling signal and the low-voltage enabling signal generated by the control unit 1 are respectively 8 bits; the upper limit self-checking enable signal and the lower limit self-checking enable signal generated by the control unit 1 are respectively 1 bit. That is, S1, S2, S4, S5 are 1 bit; to increase the difficulty of attacking the security chip, the values of the high voltage enable signal S0 and the low voltage enable signal S3 are respectively n-th power bits of 2 (where n is a natural number greater than or equal to 3), and preferably n is 3, that is, the high voltage enable signal S0 and the low voltage enable signal S3 are multi-bit (bit) enable signals of 8 bits. The enable signal of the 8-bit numerical value combination has one and only one of the conditions to enable the switch to be closed, the other conditions to enable the switch to be opened, and the specific on-off setting condition can be preset through the control unit 1, and is not limited here.
The comparator circuit 23 includes a first operator a1 and a second operator a2, and the first operator a1 and the second operator a2 are connected to the high-voltage branch group and the low-voltage branch group in the switch circuit 22, respectively. A first input terminal of the first operator a1 is connected to an output terminal of the high-voltage branch group in the switch circuit 22, that is, connected to a switched-on voltage signal of the high-voltage branch group of the switch circuit 22, a second input terminal is connected to the high-voltage reference voltage VREFH, and an output terminal outputs a comparison result. A first input end of the second operator a2 is connected to the low-voltage reference voltage VREFL, a second input end is connected to an output end of the low-voltage branch group in the switch circuit 22, that is, connected to a voltage signal for turning on the low-voltage branch group in the switch circuit 22, and an output end outputs a comparison result. At this time, the signal output by the output terminal of the high-voltage branch group in the switch circuit 22 is a voltage signal at which the high-voltage branch group switch circuit 22 is turned on, and the signal output by the output terminal of the low-voltage branch group in the switch circuit 22 is a voltage signal at which the low-voltage branch group switch circuit 22 is turned on. The reference voltage signal of the preset value includes a reference high voltage VREFH and a reference low voltage VREFL, and the voltage value of the reference high voltage VREFH and the voltage value of the reference low voltage VREFL are fixed values under certain process conditions. As described above, the voltage values of the lower limit self-test voltage VL _ For _ test, the low voltage VLD, the high voltage VHD, and the upper limit self-test voltage VH _ For _ test are sequentially increased, and the comparison circuit 23 outputs a comparison result according to the magnitude of the reference voltage signal and the turned-on voltage signal.
The output circuit 24 includes a first end for directly outputting the comparison result and a second end for outputting the comparison result after inverting the comparison result, the first end and the second end respectively output 1bit values, and the output values of the first end and the second end together form a 2bits detection result. In the output circuit 24, a first inverter and a second inverter are provided for the high-voltage branch group and the low-voltage branch group, respectively, and the result of the first operator a1 and the result of the second operator a2 are inverted in addition to directly outputting the result of the first operator a1 and the result of the second operator a2, respectively. In this embodiment, the output result of the self-checking process is an alarm signal, which has two bits, a high-voltage branch group corresponds to the high-voltage alarm signal, and a low-voltage branch group corresponds to the low-voltage alarm signal. For the high-voltage alarm signal, the output result of the first arithmetic unit A1 is used as the high-level vdeh _ out [1] of the high-voltage alarm signal, and the result obtained by inverting through the first inverter is used as the low-level vdeh _ out [0] of the high-voltage alarm signal; for the low voltage alarm signal, the output result of the second operator a2 is used as the high level vdel _ out [1] of the low voltage alarm signal, and the result obtained by inverting through the second inverter is used as the low level vdel _ out [0] of the low voltage alarm signal.
The judgment unit 3 (disposed in a CPU on a chip) presets prediction results corresponding to the upper limit self-check enable signal and the lower limit self-check enable signal, and is configured to match the detection results with the prediction results and judge whether the high-voltage output path and/or the low-voltage output path is/are attacked. For example, S1, S4 choose to pass lower voltages, for high voltage branch groups, the input voltage is much lower than VREFH, indicating no attack; similarly, for the low voltage branch group, the input voltage is much lower than VREFL, which indicates the attack. In this way, the judging unit 3 judges whether the whole detection path is damaged or not according to whether the returned result is consistent with the predicted result or not; analogy, other conditions can be deduced. That is, the output result is transmitted back to the determining unit 3 to determine whether the output result matches the preset branch of the detection result, so as to obtain the detection result.
In a normal operating state of the power-on structure of the external power supply, the voltage dividing circuit 21 is further configured to provide a plurality of operating voltage signals with different values to the switching circuit 22; the control signals comprise high-voltage enable signals and low-voltage enable signals; the high-voltage branch group also comprises a high-voltage switch, the low-voltage branch group also comprises a low-voltage switch, and the high-voltage switch and the low-voltage switch are respectively of a combined structure of a plurality of groups of field effect transistors; the high-voltage signal passes through the high-voltage switch controlled by the high-voltage enable signal and then outputs a high-voltage working voltage signal through the output circuit 24, and the low-voltage signal passes through the low-voltage switch controlled by the low-voltage enable signal and then outputs a low-voltage working voltage signal through the output circuit 24.
Preferably, the external power supply power-on structure of the present embodiment further includes a digital part on the basis of the analog part, where the digital part provides a filtering function, and is capable of counting and accumulating the times of generating similar attack alarm signals through the external power supply power-on structure due to a high-voltage signal or a low-voltage signal, and when the counter reaches a specified value, the counter considers that the attack is effective and takes a corresponding security information processing strategy to avoid false alarm caused by signal fluctuation, thereby ensuring reliability and robustness of the alarm to a certain extent. In other words, digital filtering only works at normal output voltages, but does not work for the self-test process.
The structure for electrifying the external power supply can realize self-checking, and a voltage sensor with simple structure and high reliability is formed. It is to be understood that the circuit structure of the voltage sensor for performing power-on self-test on the external power supply 4 is not limited to the above example, and is not limited herein as long as the circuit form can achieve the same function.
Accordingly, the present embodiment further provides an external power supply powering method corresponding to the external power supply powering structure, which can effectively detect whether a circuit on the entire power supply path is damaged. As shown in fig. 3, the external power supply power-on method includes a step of providing an input of the external power supply, a step of outputting a high-voltage working voltage and a low-voltage working voltage, and further includes a step of presetting a control signal, a step of detecting, and a step of judging, wherein: the detection step comprises:
s1) partial pressure step: the self-checking circuit is configured to output a plurality of self-checking voltage signals with different values to the switching circuit through a plurality of voltage dividing resistors connected with an input end of an external power supply;
s2) switching step: a self-test voltage signal configured to switch on or off different values through a pair of self-test switches;
s3) comparison step: the voltage detection circuit is configured to receive a reference voltage signal of a preset value and a self-checking voltage signal of a switch circuit through at least one comparator corresponding to the high-voltage branch group and/or the low-voltage branch group, compare the reference voltage signal with the self-checking voltage signal and output a comparison result;
s4) output step: configured to output a detection result through the high voltage output terminal and/or the low voltage output terminal;
s5), in the judging step, receiving the detection result, and judging whether the high-pressure passage and/or the low-pressure passage is/are attacked according to the detection result.
Specifically, before the judging step, presetting control signals as an upper limit self-checking enabling signal and a lower limit self-checking enabling signal for the switching circuit;
in the comparison step: the upper limit self-checking switch and the lower limit self-checking switch are respectively switched on or switched off the upper limit self-checking voltage signal and the lower limit self-checking voltage signal with different values under the control of the upper limit self-checking enable signal and the lower limit self-checking enable signal, and the upper limit self-checking voltage signal and the lower limit self-checking voltage signal obtain comparison results through the comparison circuit 23.
The comparison result is set to be 1bit, the comparison result of the 1bit value and the comparison result of the 1bit value are negated, and a detection result of 2bits is formed together.
Meanwhile, before the judging step, presetting prediction results corresponding to an upper limit self-checking enabling signal and a lower limit self-checking enabling signal;
in the judging step: and matching the detection result with the prediction result, and judging whether the high-voltage output passage and/or the low-voltage output passage are attacked or not.
For a circuit with high-voltage output and low-voltage output functions, the self-checking executes the following actions according to a preset control signal:
keeping the high-voltage switch and the low-voltage switch closed;
closing a lower limit self-checking switch of the high-voltage branch group and an upper limit self-checking switch of the low-voltage branch group, and opening and only opening an upper limit self-checking switch of the high-voltage branch group and a lower limit self-checking switch of the low-voltage branch group to respectively obtain first detection results of the high-voltage branch group and the low-voltage branch group;
or closing an upper limit self-checking switch of the high-voltage branch group and a lower limit self-checking switch of the low-voltage branch group, and opening and only opening the lower limit self-checking switch of the high-voltage branch group and the upper limit self-checking switch of the low-voltage branch group to respectively obtain second detection results of the high-voltage branch group and the low-voltage branch group;
according to the corresponding prediction result, when: if either one of the first and second detection results does not match the prediction result, it is determined that either one of the corresponding high-pressure path and low-pressure path is abnormal.
For a circuit which has any function of high-voltage output and low-voltage output, the self-checking executes the following actions according to a preset control signal:
keeping the high-voltage switch or the low-voltage switch closed;
closing a lower limit self-checking switch of the high-voltage branch group or an upper limit self-checking switch of the low-voltage branch group, and opening and only opening an upper limit self-checking switch of the high-voltage branch group or a lower limit self-checking switch of the low-voltage branch group to respectively obtain first detection results of the high-voltage branch group and the low-voltage branch group;
or the upper limit self-checking switch of the high-voltage branch group or the lower limit self-checking switch of the low-voltage branch group is closed, and the lower limit self-checking switch of the high-voltage branch group or the upper limit self-checking switch of the low-voltage branch group is opened and only opened to obtain second detection results of the high-voltage branch group and the low-voltage branch group respectively;
according to the corresponding prediction result, when: if either one of the first and second detection results does not match the prediction result, it is determined that either the corresponding high-pressure path or low-pressure path is abnormal.
The high-voltage enabling signal and the low-voltage enabling signal are respectively 8bits, so that the external attack difficulty is increased; the upper limit self-checking enabling signal and the lower limit self-checking enabling signal are both 1 bit. And the output result is a 2-bit binary value, and if and only if the numerical values of two effective bits in the 2-bit binary value are preset exclusive values, the external power supply is judged to be normally powered on. Here, mutually exclusive means: when one of the two significant digits of the binary number is 0, the other is 1, and both of them cannot be the same value at the same time.
For the high voltage branch group, the high order significant bit of the output result vdeh _ out is vdeh _ out [1], the low order significant bit is vdeh _ out [0], and the low order significant bit is vdeh _ out [0] obtained by inverting the high order significant bit vdeh _ out [1 ]. The signals represented by the two values of the high-voltage branch group detection output result vdeh _ out are always opposite, 2' b10 (namely, the high-order effective bit and the low-order effective bit are respectively 10) can be preset in the control unit 1 as normal detection results, and other values (10, 11 and 00) are abnormal detection results. That is, when the detection result is normal, it means that no attack is generated, and when the detection result is abnormal, it means that an attack is generated. When the high-order significant bit vdeh _ out [1] of the output result vdeh _ out is 1, it represents no attack, and when 1 is inverted, vdeh _ out [0] is 0.
It should be understood here that the output result vdeh _ out of 00, 11 is normally not present, because the 2bits should be reset to the same value almost at the same time even if attacked, because the 2bits are relatively close when subjected to interference, laser attack, external electromagnetic attack or impulse attack. In general, an external attack is simpler to attack a 1-bit value, and a case that is easier to occur for an attack of a 2-bit value is a case that the external attack sets the 2-bit value to the same value at the same time, that is, 00 and 11 occur, and it is not easy that two effective values in the attacked 2-bit value are still kept as mutually exclusive values (01 and 10). Therefore, the output result is set to be 2bist, so that the detection can be more reliably realized, and the existence of the channel abnormity generated by the attack can be more stably detected. Of course, this means that, in the determination process, when the two-bit significant digit value of vdeh _ out is 01, it is set to be normal in advance, and 01, 10, and 00 may be set to be abnormal according to the application, which is not limited herein.
In this embodiment, the power-on structure of the external power supply is, when supplying power normally: in a power-on default condition, S0 and S3 (namely 8bits enable) are turned on, S0 is used as a high-voltage enabling signal, the high-voltage enabling signal can be 8bits, only one condition is not enabling (disable), and the other conditions are enabling (enable); s3 is used as a low voltage enable signal (enable), which may be 8bit, which is disabled in only one case and enabled in all other cases.
And after the power-on reset is released, a self-checking process is executed. S1, S2, S4 and S5 are controlled by software of an on-chip CPU, and when the self-test is desired in the actual application, the switch to be turned on is determined according to the requirement.
In this embodiment, the working principle of the power-on structure of the external power supply is as follows: and the external power supply 4 is switched on, and the external power supply 4 is divided by different resistors connected in series to obtain different voltage values. And configuring voltage output by setting three switches for different voltage values obtained by voltage division so as to form high-voltage branch group detection and low-voltage branch group detection. For example: close S0 and S3; opening S2 and S5, if vdeh _ out is not equal to (2 'b 10) or vdel _ out is not equal to (2' b10), then the anomaly is considered; s2 and S5 are closed, S1 and S4 are opened, and if vdeh _ out is not equal to (2 'b 10) or vdel _ out is not equal to (2' b10), then an anomaly is considered.
For the detection of exceeding the allowable voltage, S1 is used as the enable signal for the low voltage limit self-test, and S2 is used as the enable signal for the high voltage limit self-test. vdeh _ out [1] and vdeh _ out [0] are alarm signals (alarm signals) with opposite polarities. Wherein [10] (2' b10) represents no alarm signal generation, and the others ([00], [01], [11]) represent alarm signal generation.
For the detection of the lower than the allowable voltage, S4 is used as the low voltage upper limit self-test enable signal, and S5 is used as the low voltage lower limit self-test enable signal. vdel _ out [1] and vdel _ out [0] are alarm signals with opposite polarities. Wherein, (2' b10) represents no alarm signal is generated, and the others represent alarm signals are generated.
According to the external power supply power-on structure and the corresponding external power supply power-on method, the 8bits enable signal is adopted when normal high voltage is output, so that the anti-attack capability can be effectively improved; and moreover, a self-checking circuit is added, a 2bits detection result is set for the self-checking circuit, the self-checking of whether a power failure phenomenon exists when an external power supply is powered on is realized, the safety of a power circuit on the external power supply voltage is further ensured, and high-stability and high-reliability safety protection can be provided for a safety chip.
Example 2
The present embodiment provides a security chip including the above-mentioned external power supply power-on structure and applying the above-mentioned external power supply power-on method. The security chip can be applied to information-protected cards with higher information security level, such as financial cards.
Example 3
The embodiment provides an electronic card, such as a financial card, including the above-mentioned security chip. The financial card can be a bank card, a bus card or a subway card and the like which relate to financial transactions. The card may be contact or contactless.
It should be understood that the electronic card may also be a fingerprint card, an access card, or other form of electronic card, electronic component, containing a security chip.
It is to be understood that the technical features of the above embodiments can be combined, and are described as being divided into a plurality of embodiments only for convenience of description.
The external power supply power-on structure and the method provided by the invention can automatically initiate attack to detect whether a chip or an anti-attack circuit of an electronic card containing the external power supply power-on structure works normally or not and can correctly detect the active attack. The detection mode of actively simulating the external attack can find the working state of the detection circuit in time, thereby avoiding the safety problem of a chip or an electronic card caused by the failure of the detection circuit and the incapability of detection when the real external attack occurs.
The present invention has been described in detail. It is to be understood that the technical features of the above embodiments can be combined, and are described as being divided into a plurality of embodiments only for convenience of description. It will be apparent to those skilled in the art that any obvious modifications thereof can be made without departing from the spirit of the invention, which infringes the patent right of the invention and bears the corresponding legal responsibility.
Claims (14)
1. The utility model provides an external power supply power-on structure, includes input, high voltage output and the low pressure output that is used for connecting external power supply, its characterized in that still includes the control unit, detecting element and judges the unit, and detecting element includes bleeder circuit, switch circuit, comparison circuit and output circuit, wherein:
the voltage division circuit comprises a plurality of voltage division resistors connected with the input end and is used for providing a plurality of self-checking voltage signals with different values for the switch circuit;
the switching circuit comprises a high-voltage branch group or a low-voltage branch group, at least one of the high-voltage branch group and the low-voltage branch group further comprises a self-checking switch pair, and the self-checking switch pair is used for switching on or blocking self-checking voltage signals with different values according to a control signal generated by the control unit;
the comparison circuit comprises comparators respectively corresponding to the high-voltage branch group or the low-voltage branch group, and is used for receiving a reference voltage signal of a preset value and the self-checking voltage signal of the switch circuit, comparing the reference voltage signal with the self-checking voltage signal and outputting a comparison result;
the high-voltage output end or the low-voltage output end is included in the output circuit and used for outputting a detection result according to the comparison result;
the judging unit is used for receiving the detection result and matching the detection result with the prediction result to judge whether the high-pressure passage and/or the low-pressure passage are attacked or not.
2. An external power supply power-on structure as defined in claim 1, wherein: the control signals comprise an upper limit self-checking enabling signal and a lower limit self-checking enabling signal;
the self-checking switch pair comprises an upper limit self-checking switch and a lower limit self-checking switch, and the upper limit self-checking switch and the lower limit self-checking switch are field effect transistors;
the upper limit self-checking switch and the lower limit self-checking switch are respectively connected or disconnected with upper limit self-checking voltage signals and lower limit self-checking voltage signals with different values under the control of the upper limit self-checking enabling signal and the lower limit self-checking enabling signal, and the upper limit self-checking voltage signals and the lower limit self-checking voltage signals are processed by the comparison circuit to obtain the comparison result.
3. An external power supply power-on structure as claimed in claim 2, wherein: the detection result is 2bits, the values in the 2bits are mutually exclusive, the output circuit comprises a first end and a second end, the first end is used for directly outputting the comparison result, the second end is used for outputting the comparison result after negating the comparison result, the first end and the second end respectively output 1-bit values, and the output values of the first end and the second end jointly form the detection result of 2 bits.
4. An external power supply power-on structure as defined in claim 3, wherein: the judgment unit presets a prediction result corresponding to the upper limit self-checking enabling signal and the lower limit self-checking enabling signal, and is used for matching the detection result with the prediction result and judging whether the high-voltage output passage and/or the low-voltage output passage is attacked or not.
5. An external power supply power-on structure as claimed in any one of claims 1 to 4, wherein: the voltage division circuit is also used for providing a plurality of working voltage signals with different values for the switch circuit;
the control signals comprise high-voltage enable signals and low-voltage enable signals;
the high-voltage branch group further comprises a high-voltage switch, the low-voltage branch group further comprises a low-voltage switch, and the high-voltage switch and the low-voltage switch are respectively of a combined structure of a plurality of groups of field effect transistors;
the high-voltage signal passes through the high-voltage switch controlled by the high-voltage enabling signal and then passes through the output circuit to output a high-voltage working voltage signal, and the low-voltage signal passes through the low-voltage switch controlled by the low-voltage enabling signal and then passes through the output circuit to output a low-voltage working voltage signal.
6. An external power supply power-on structure as defined in claim 5, wherein: the high-voltage enabling signal and the low-voltage enabling signal generated by the control unit are respectively 8 bits;
the upper limit self-checking enabling signal and the lower limit self-checking enabling signal generated by the control unit are respectively 1 bit.
7. The method for electrifying the external power supply comprises the steps of providing input of the external power supply and outputting high-voltage working voltage and low-voltage working voltage, and is characterized by further comprising the steps of presetting a control signal, detecting and judging, wherein: starting the detecting step when the external power supply is powered on, wherein the detecting step comprises the following steps:
a partial pressure step: the self-checking circuit is configured to output a plurality of self-checking voltage signals with different values to the switching circuit through a plurality of voltage dividing resistors connected with an input end of an external power supply;
a switching step: configured to turn on or off the self-test voltage signal of different values through a pair of self-test switches;
a comparison step: the voltage detection circuit is configured to receive a reference voltage signal of a preset value and a self-checking voltage signal of a switch circuit through at least one comparator corresponding to a high-voltage branch group and/or a low-voltage branch group, compare the reference voltage signal with the self-checking voltage signal and output a comparison result;
an output step: configured to output a detection result through the high voltage output terminal and/or the low voltage output terminal;
in the judging step, the detection result is received, and whether the high-pressure passage and/or the low-pressure passage is attacked or not is judged according to the detection result.
8. The method for powering on an external power supply of claim 7, wherein: before the judging step, presetting control signals as an upper limit self-checking enabling signal and a lower limit self-checking enabling signal for the switching circuit;
in the comparison step: the upper limit self-checking switch and the lower limit self-checking switch are respectively connected or disconnected with upper limit self-checking voltage signals and lower limit self-checking voltage signals with different values under the control of the upper limit self-checking enabling signal and the lower limit self-checking enabling signal, and the upper limit self-checking voltage signals and the lower limit self-checking voltage signals are obtained through a comparison circuit to obtain comparison results.
9. The method for powering on an external power supply of claim 8, wherein: and setting the comparison result to be 1bit, negating the comparison result with the value of 1bit and the comparison result with the value of 1bit, and forming the detection result of 2bits together.
10. The method for powering on an external power supply of claim 9, wherein: presetting prediction results corresponding to the upper limit self-checking enabling signal and the lower limit self-checking enabling signal before the judging step;
in the judging step: and matching the detection result with the prediction result, and judging whether the high-voltage output passage and/or the low-voltage output passage are attacked or not.
11. The method for powering on an external power supply of claim 7, wherein: according to the preset control signal, the self-checking executes the following actions:
keeping the high-voltage switch and/or the low-voltage switch closed;
closing a lower limit self-checking switch of a high-voltage branch group and/or an upper limit self-checking switch of a low-voltage branch group, and opening and only opening the upper limit self-checking switch of the high-voltage branch group and/or the lower limit self-checking switch of the low-voltage branch group to respectively obtain first detection results of the high-voltage branch group and the low-voltage branch group;
or closing an upper limit self-checking switch of the high-voltage branch group and/or a lower limit self-checking switch of the low-voltage branch group, and opening and only opening the lower limit self-checking switch of the high-voltage branch group and/or the upper limit self-checking switch of the low-voltage branch group to respectively obtain second detection results of the high-voltage branch group and the low-voltage branch group;
and according to the corresponding prediction result, when any one of the first detection result and the second detection result is inconsistent with the prediction result, judging that any one of the corresponding high-pressure passage and/or low-pressure passage is abnormal.
12. An external power supply power-on method according to any one of claims 8 to 11, characterized in that: the control signals further comprise a high-voltage enabling signal and a low-voltage enabling signal, and the high-voltage enabling signal and the low-voltage enabling signal are respectively 8 bits;
the upper limit self-checking enabling signal and the lower limit self-checking enabling signal are respectively 1 bit.
13. A security chip, characterized by comprising the power-on structure of the external power supply according to any one of claims 1 to 6.
14. An electronic card characterized by comprising the security chip of claim 13.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010984304.1A CN112069554A (en) | 2020-09-18 | 2020-09-18 | Power-on structure of external power supply, method thereof, security chip and electronic card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010984304.1A CN112069554A (en) | 2020-09-18 | 2020-09-18 | Power-on structure of external power supply, method thereof, security chip and electronic card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112069554A true CN112069554A (en) | 2020-12-11 |
Family
ID=73681579
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010984304.1A Pending CN112069554A (en) | 2020-09-18 | 2020-09-18 | Power-on structure of external power supply, method thereof, security chip and electronic card |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112069554A (en) |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101191823A (en) * | 2006-11-24 | 2008-06-04 | 北京中电华大电子设计有限责任公司 | Low power consumption electric source monitoring circuit |
| CN102692591A (en) * | 2012-06-19 | 2012-09-26 | 科博达技术有限公司 | Device and method for detecting insulation failures of high and low voltage ends |
| US20120275077A1 (en) * | 2011-04-29 | 2012-11-01 | Altera Corporation | Systems and methods for securing a programmable device against an over-voltage attack |
| CN103176025A (en) * | 2011-12-22 | 2013-06-26 | 上海华虹Nec电子有限公司 | Power source voltage detection circuit and control method thereof |
| CN105510688A (en) * | 2016-01-25 | 2016-04-20 | 大唐微电子技术有限公司 | Voltage detector for CP testing |
| CN107273756A (en) * | 2017-04-24 | 2017-10-20 | 兆讯恒达微电子技术(北京)有限公司 | Security information protector in F2F decoding chips |
| CN107425506A (en) * | 2017-09-07 | 2017-12-01 | 浙江亿众机器人有限公司 | Multiple power supplies protection circuit |
| US20180246556A1 (en) * | 2017-02-28 | 2018-08-30 | Stmicroelectronics S.R.L. | Circuit for controlling a power supply and method of operation thereof |
| CN110427091A (en) * | 2019-07-19 | 2019-11-08 | 昆山龙腾光电有限公司 | Power supply circuit and display device |
| CN111149141A (en) * | 2017-09-04 | 2020-05-12 | Nng软件开发和商业有限责任公司 | Method and apparatus for collecting and using sensor data from a vehicle |
| CN111670366A (en) * | 2020-03-09 | 2020-09-15 | 深圳市汇顶科技股份有限公司 | Voltage attack detection circuit and chip |
| CN113758606A (en) * | 2021-10-14 | 2021-12-07 | 成都微光集电科技有限公司 | Temperature sensor and temperature measuring equipment |
-
2020
- 2020-09-18 CN CN202010984304.1A patent/CN112069554A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101191823A (en) * | 2006-11-24 | 2008-06-04 | 北京中电华大电子设计有限责任公司 | Low power consumption electric source monitoring circuit |
| US20120275077A1 (en) * | 2011-04-29 | 2012-11-01 | Altera Corporation | Systems and methods for securing a programmable device against an over-voltage attack |
| CN103176025A (en) * | 2011-12-22 | 2013-06-26 | 上海华虹Nec电子有限公司 | Power source voltage detection circuit and control method thereof |
| CN102692591A (en) * | 2012-06-19 | 2012-09-26 | 科博达技术有限公司 | Device and method for detecting insulation failures of high and low voltage ends |
| CN105510688A (en) * | 2016-01-25 | 2016-04-20 | 大唐微电子技术有限公司 | Voltage detector for CP testing |
| US20180246556A1 (en) * | 2017-02-28 | 2018-08-30 | Stmicroelectronics S.R.L. | Circuit for controlling a power supply and method of operation thereof |
| CN107273756A (en) * | 2017-04-24 | 2017-10-20 | 兆讯恒达微电子技术(北京)有限公司 | Security information protector in F2F decoding chips |
| CN111149141A (en) * | 2017-09-04 | 2020-05-12 | Nng软件开发和商业有限责任公司 | Method and apparatus for collecting and using sensor data from a vehicle |
| CN107425506A (en) * | 2017-09-07 | 2017-12-01 | 浙江亿众机器人有限公司 | Multiple power supplies protection circuit |
| CN110427091A (en) * | 2019-07-19 | 2019-11-08 | 昆山龙腾光电有限公司 | Power supply circuit and display device |
| CN111670366A (en) * | 2020-03-09 | 2020-09-15 | 深圳市汇顶科技股份有限公司 | Voltage attack detection circuit and chip |
| CN113758606A (en) * | 2021-10-14 | 2021-12-07 | 成都微光集电科技有限公司 | Temperature sensor and temperature measuring equipment |
Non-Patent Citations (1)
| Title |
|---|
| 刘良壁;屈斌;: "变频压缩机用无刷直流电动机新型转子位置检测方法研究", 微电机, no. 07, pages 76 - 78 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9419614B2 (en) | Low-power open-circuit detection system | |
| KR101110994B1 (en) | Method and apparatus for protecting an integrated circuit from erroneous operation | |
| CN103198347B (en) | Safety equipment tamperproof circuit | |
| US20130312122A1 (en) | Tamper detector for secure module | |
| US20150369865A1 (en) | Detection of fault injection attacks using high-fanout networks | |
| US8564324B2 (en) | Monitoring of the activity of an electronic circuit | |
| CN103712642A (en) | Method and apparatus for realizing self-detection of safety detector | |
| CN112098817A (en) | Temperature self-checking structure and method, safety chip and electronic card | |
| CN109428721B (en) | Method or device for determining the health of a physically unclonable function | |
| CN112052484B (en) | Self-checking circuit and self-checking method, security chip and electronic card | |
| TW202209108A (en) | Undefined lifecycle state identifier for managing security of an integrated circuit device | |
| CN112069554A (en) | Power-on structure of external power supply, method thereof, security chip and electronic card | |
| CN103679010B (en) | Detection device | |
| US11043102B1 (en) | Detection of frequency modulation of a secure time base | |
| CN112130062B (en) | Burr signal detection structure and detection method, security chip and electronic card | |
| CN112115520A (en) | Internal power supply structure and method, safety chip and electronic card | |
| CN111985008A (en) | Apparatus and method relating to circuitry for detecting hardware trojans | |
| TWI582702B (en) | Electronic component and protection method of the same,smart card,computer program and recording medium | |
| US20050041803A1 (en) | On-device random number generator | |
| EP3291127B1 (en) | Active tamper detection circuit with bypass detection and method therefor | |
| JP2013222232A (en) | Semiconductor memory and data reading method | |
| US20210390180A1 (en) | Devices and methods to secure a system on a chip | |
| Sun et al. | Towards hardware trojan resilient design of convolutional neural networks | |
| CN111800272B (en) | Reliability self-checking circuit and method for RO PUF output response | |
| CN108256356B (en) | Method for resisting fault injection of chip register |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |