CN112039534B - LDPC decoding method, device, equipment and storage medium - Google Patents
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Abstract
The invention discloses an LDPC decoding method, a device, equipment and a storage medium, wherein the method comprises the following steps: classifying and acquiring check nodes and common check nodes which do not meet the check relation in the main trapping set; setting super check nodes, wherein the super check nodes are formed by combining check nodes which do not meet a check relation in the main trapping set; acquiring a log likelihood ratio in a channel; performing hard decision based on the calculation results of the log likelihood ratio, the BP algorithm, the BCJR algorithm and the BCJR-TS algorithm in the channel; obtaining the result of the hard decision; setting a check equation; and judging whether the decoding result is correct or not based on the result of the hard decision and the check equation, and ending decoding when the decoding result is correct. Compared with the existing low-error flat layer decoding method, the method has lower complexity, is implemented at the receiving end, has no constraint on the codebook and the coding, and has more universality and practicability.
Description
Technical Field
The present disclosure relates to the field of decoding, and in particular, to an LDPC decoding method, apparatus, device, and storage medium.
Background
The Low-density Parity-check code, namely the LDPC code, is a progressive code which can approach the shannon capacity limit, and the Low-density check code has the advantages of Low decoding complexity, strong error correction capability and the like, so that in recent years, the good application prospect in reliable information transmission has attracted high importance in academia and IT industry, and is one of the most attractive research hotspots in the field of channel coding at present. Error floor (error floor) is an important problem in the research of LDPC code theory and iterative decoding algorithm thereof, and is characterized in that the slope of error performance curve is suddenly reduced from a middle signal-to-noise ratio waterfall area to a high signal-to-noise ratio error floor area, specifically, the error curve of LDPC code is increased along with the signal-to-noise ratio (SNR), and the error floor phenomenon occurs in the middle and high areas of SNR, namely: in the medium-high SNR region, the error rate curve decreases in slope as the SNR increases. This is because the presence of rings in the check matrix results in gradual loss of independence of Log Likelihood Ratio (LLR) values passed in the belief propagation iterative decoding algorithm, which is insufficient to correct errors occurring in the decoding, so that the decoding will be trapped in a "trap" state, which is caused by a set of Variable Nodes (VN) called "trap".
In some application scenarios, such as high reliability low latency (URLLC) transmission of 5G, and very high requirements for reliability of flash memory (NAND flash Rom), the error floor of LDPC codes becomes a big obstacle for its application, so that it is very important to innovate the error floor reduction technique of LDPC codes. Most of the prior art improves on codeword construction techniques to construct LDPC codes with lower error floor by avoiding loops with greater impact on error floor or smaller loop length. Although the codebook with low error floor can be obtained by the above means, the application range is limited, and the existing codebook and decoding can be updated for use, so that more importantly, the reasonable decoder design is carried out on the codebook in the existing standard, and the decoding error floor of the existing codebook is reduced, so that the technical means has wider universality and wider application range. The prior art mainly has the problem of excessively high complexity.
Compared with the existing low-error flat layer decoding method, the method has lower complexity, is implemented at the receiving end, has no constraint on the codebook and the coding, and has more universality and practicability.
Disclosure of Invention
An object of the embodiments of the present disclosure is to provide an LDPC decoding method, apparatus, device, and storage medium, which have lower complexity, and the present disclosure is implemented at a receiving end, and has no constraint on a codebook and encoding, and more universality and practicability.
To achieve the above object, in one aspect, an embodiment of the present disclosure provides an LDPC decoding method, including:
classifying and acquiring check nodes and common check nodes which do not meet the check relation in the main trapping set;
setting super check nodes, wherein the super check nodes are formed by combining check nodes which do not meet the check relation in the main trapping set;
acquiring a log likelihood ratio in a channel;
calculating a first information value LLR transmitted from a variable node to a common check node based on a log likelihood ratio value and a BP algorithm in a channel VN2CN ；
Calculating a second information value LLR (LLR) from a common check node received by a variable node based on BP (back propagation) algorithm CN2VN ；
Setting an iteration number threshold, and calculating a third information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm when the iteration number does not exceed the iteration number threshold BCJR When the iteration number exceeds the iteration number threshold, calculating a fifth information value LLR transmitted from the super check node to the variable node based on a BCJR-TS algorithm BCJR-TS ；
Superimposing the second information value LLR CN2VN And third information value LLR BCJR Or fifth information value LLR BCJR-TS And hard judging;
obtaining a hard decision result;
setting a check equation;
and judging whether the decoding result is correct or not based on the hard decision result and the check equation, and ending decoding when the decoding result is correct.
On the other hand, the embodiment of the present specification further provides an LDPC decoding apparatus, including: the check node acquisition module is used for acquiring check nodes which do not meet the check relation in the main trapping set and common check nodes in a classified mode; the super check node setting module is used for setting super check nodes, and the super check nodes are formed by combining check nodes which do not meet a check relation in the main trapping set; the log likelihood ratio acquisition module is used for acquiring the log likelihood ratio in the channel; a first information value calculation module for calculating a first information value LLR transmitted by a variable node to the common check node based on the log likelihood ratio value and BP algorithm in the channel VN2CN ；
A second information value calculation module for calculating a second information value LLR from the common check node received by the variable node based on the BP algorithm CN2VN The method comprises the steps of carrying out a first treatment on the surface of the The third information value calculation module and the fifth information value calculation module are used for calculating the super based on a BCJR algorithm or a BCJR-TS algorithm after judging the relation between the iteration times and the set iteration times threshold valueThird information value LLR transmitted by check node to variable node BCJR Or fifth information value LLR BCJR-TS The method comprises the steps of carrying out a first treatment on the surface of the A hard decision module for superposing the second information value LLR CN2VN And the third information value LLR BCJR Or fifth information value LLR BCJR-TS Hard judgment is carried out, and a result of the hard judgment is obtained; and the result judging module is used for judging whether the decoding result is correct or not based on the hard decision result and the set check equation.
In another aspect, an embodiment of the present disclosure further provides an electronic device, including: and the memory is used for storing a computer software program and the processor is used for realizing the steps of the LDPC decoding method in the embodiment of the invention when the computer software program is run.
On the other hand, the embodiment of the present disclosure further provides a computer readable storage medium, on which a computer software program is stored, where the computer software program can implement the steps of the LDPC decoding method in the embodiment of the present disclosure when the computer software program is executed.
The technical scheme provided by the embodiment of the specification above can be seen that the embodiment of the specification enables the error floor to be reduced to have lower complexity, and the embodiment of the specification is implemented at the receiving end, has no constraint on the codebook and the coding, and has universality and practicability.
Drawings
Fig. 1 and 2 are flowcharts of an LDPC decoding method according to some embodiments of the present disclosure.
FIG. 3 is a schematic diagram of raster path pruning according to some embodiments of the present description.
Detailed Description
In order to make the technical solutions in the present specification better understood by those skilled in the art, the technical solutions in the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is obvious that the described embodiments are only some embodiments of the present specification, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are intended to be within the scope of the present disclosure.
As shown in fig. 1, some embodiments of the present disclosure provide an LDPC decoding method, which includes the following steps:
s102, classifying and acquiring check nodes and common check nodes which do not meet the check relation in the main trapping set; setting super check nodes, wherein the super check nodes are formed by combining check nodes which do not meet the check relation in the main trapping set;
s104, acquiring a log likelihood ratio value in a channel; calculating a first information value LLR transmitted from a variable node to a common check node based on a log likelihood ratio value and a BP algorithm in a channel VN2CN ；
S106, calculating a second information value received by a variable node from a common check node based on a BP algorithm, setting an iteration number threshold, calculating a third information value transmitted by a super check node to the variable node based on a BCJR algorithm when the iteration number does not exceed the iteration number threshold, and calculating a fifth information value LLR transmitted by the super check node to the variable node when the iteration number exceeds the iteration number threshold BCJR-TS The fifth information value LLR BCJR-TS Calculating based on a BCJR-TS algorithm;
s108, superposing the second information value LLR CN2VN And third information value LLR BCJR Or fifth information value LLR BCJR-TS And hard judging; obtaining a hard decision result; setting a check equation; and judging whether the decoding result is correct or not based on the hard decision result and the check equation, and ending decoding when the decoding result is correct.
In some embodiments of the present description, the fourth information value LLR transmitted by the variable node to the super check node is calculated v2c ；
When the iteration number does not exceed the iteration number threshold, calculating a third information value LLR transmitted from the super check node to the variable node based on the BCJR algorithm BCJR Then, the third information value LLR BCJR Update to third information value LLR BCJR LLR with fourth information value v2c Is a difference in (c).
In some embodiments of the present disclosure, when the number of iterations exceeds the iterationWhen the generation times threshold value is set, reliable bits are selected based on the trapping set, and paths corresponding to the reliable bits in a raster pattern of a BCJR algorithm are corrected, specifically, when an N+1th node is judged to be reliable, the N+1th node is deleted, and the N node is connected with the N+2th node; calculating a fifth information value LLR transmitted from the super check node to the variable node based on the BCJR algorithm after correcting the raster pattern path BCJR-TS Obtaining a fifth information value LLR BCJR-TS Then, the fifth information value LLR BCJR-TS Update to fifth information value LLR BCJR-TS LLR with fourth information value v2c Is a difference in (c).
In some embodiments of the present description, log likelihood ratio values in a channel are obtained; decoding based on the log likelihood ratio value in the channel and BP algorithm; when the decoding result is wrong, reclassifying to obtain check nodes and common check nodes which do not meet the check relation in the main trapping set; calculating a first information value LLR transmitted from a variable node to a common check node based on a log likelihood ratio value and a BP algorithm in a channel VN2CN The method comprises the steps of carrying out a first treatment on the surface of the Calculating a second information value LLR (LLR) from a common check node received by a variable node based on BP (back propagation) algorithm CN2VN The method comprises the steps of carrying out a first treatment on the surface of the Setting an iteration number threshold, and calculating a third information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm when the iteration number does not exceed the iteration number threshold BCJR When the iteration number exceeds the iteration number threshold, calculating a fifth information value LLR transmitted from the super check node to the variable node based on a BCJR-TS algorithm BCJR-TS The method comprises the steps of carrying out a first treatment on the surface of the Superimposing and hard-deciding the second information value LLR CN2VN And third information value LLR BCJR Or fifth information value LLR BCJR-TS The method comprises the steps of carrying out a first treatment on the surface of the Obtaining a hard decision result; setting a check equation; and judging whether the decoding result is correct or not based on the hard decision result and the check equation, and ending decoding when the decoding result is correct. That is, in this embodiment, before classifying and acquiring the check node, the variable node is first made to calculate the information transmitted by the variable node to the check node by adopting the calculation mode in the conventional belief propagation iterative decoding algorithm. And all information received by the variable nodes are overlapped to carry out hard judgment, and the judgment result is matched with a check equationAnd multiplying to judge whether the decoding is correct, and if the decoding is incorrect, adopting the decoding method for classifying the check nodes.
The LLR value of each bit in the iteration is observed according to the advanced detection criterion in the existing scheme, and is considered to be reliable when the LLR value reaches a certain threshold. Therefore, the decoder in the invention only adopts BCJR decoding to the SCN combined by the trap set, and can consider that the variable nodes contained in the trap set are unreliable in each BCJR decoding process, so that bits with larger LLR modulus values are selected from the variable nodes in the non-trap set after only needing to iterate for a few times (usually 2-3 times), namely the bits are considered to be reliable, and then the reliable bits are trimmed in a BCJR algorithm to reduce the calculation complexity of the BCJR algorithm.
As further described in connection with FIG. 2, in some embodiments of the present description, an importance extraction method is utilized to find a trapping set of a codebook, select a trapping set of a partial type, combine check nodes that do not satisfy a check relationship into a super check node, and set a threshold I for decoding using the BCJR_TS method BCJR-TS According to the received signal, calculating likelihood ratio received from the channel, and according to the variable node calculation method in the traditional belief propagation iterative decoding, calculating to obtain external information value LLR transmitted from the variable node to the check node VN2CN Judging whether the iteration times reach a threshold value decoded by using BCJR-TS, if so, calculating LLR (LLR) of common check nodes by adopting a sum-product algorithm C2V The method comprises the steps of carrying out a first treatment on the surface of the Judging the super check node by adopting an advanced detection criterion, selecting the most reliable bit based on the trapping set, pruning and deleting the corresponding path in the BCJR raster image, and calculating by adopting a BCJR algorithm to obtain LLR BCJR-TS LLR of final output SC2V ＝LLR BCJR-TS -LLR V2C If the threshold value is not reached, for ordinaryThe check node calculates LLR by BP algorithm C2V The method comprises the steps of carrying out a first treatment on the surface of the The super check node is calculated by adopting a BCJR algorithm to obtain LLR BCJR LLR of final output SC2V ＝LLR BCJR -LLR V2C Specifically, if the number of iterations does not reach I BCJR-TS Transferring the variable node to the check node to obtain information LLR v2c As prior information, the super check nodes in the check nodes are calculated by adopting the traditional BCJR algorithm to calculate the external information LLR output by the check nodes BCJR . Finally, the super check node transmits information LLR to variable nodes SC2V Output LLR for BCJR algorithm BCJR LLR with a priori information V2C And (3) a difference. And finally, hard judgment and correctness judgment are carried out on the decoding result.
Referring to fig. 3, the following details regarding the case of exceeding the threshold, the decoding method designed by the present invention calculates the output LLR for the SCN formed by combining the check nodes that do not satisfy the check relation in the main trapping set by using the BCJR algorithm BCJR According to the trapping-based advanced detection criterion, in the raster pattern of the BCJR algorithm, partial paths can be omitted through raster pattern path pruning so as to reduce the computational complexity. Assuming that the information sequence u is of length K,
u＝(u 1 ,u 2 ,…u i ,…,u K ),u i ∈{0,1}
where i=1, 2, …, K. The corresponding coded sequence c has a length N,
c＝(c 1 ,c 2 ,…c j ,…,c N ),c j ∈{0,1}
where j=1, 2, …, N, and the code rate r=k/N. After BPSK (binary phase-shift keying) modulation, the length of the modulation sequence x is N,
x＝(x 1 ,x 2 ,…,x j ,…,x N ),x j ∈{±1}
for 1< j < N, there is
σ j ＝f s (c j ,σ j-1 )
State function f s Representing the current state sigma j Is the former state sigma j-1 And input c j Is a function of (2). State pair (sigma) j-1 ,σ j )∈S 0 Or S 1 Respectively representing input bit c j 0 or 1. In an additive noise channel, the received sequence y is of length N,
y＝x+n
where n is noise subject to a random distribution with a probability density function p. Based on the maximum posterior probability criterion, it is possible to obtain
Fixing device
Thus, the received sequence can be decomposed into
Thereby making it
For convenience of description, define
γ j (σ j-1 ,σ j )＝p(σ j ,y j |σ j-1 )
The LLR value of each bit output can be obtained as
If the jth bit related to SCN is determined to be reliable through early detection, the original raster pattern is trimmed, and gamma is trimmed j-1 (σ j-1 ,σ j+1 ) The re-calculation is performed such that,
γ j-1 (σ j-1 ,σ j+1 )＝γ i-1 (σ j-1 ,σ j )γ i (σ j ,σ j+1 )
if the j-th bit is determined to be reliably 0, then (σ j ,σ j+1 )∈S 0 On the contrary, (sigma) j ,σ j+1 )∈S 1 。
For example, in a certain LDPC decoding process, for the combined SCN, it is determined whether the iteration number is greater than I BCJR-TS If so, BCJR-TS decoding is applied. Assuming that the 5 th variable node is reliably judged to be 1 through advanced detection, deleting the 5 th variable node, connecting the 4 th variable node with the 6 th variable node, and simultaneously aiming at gamma 4 (σ 4 ,σ 6 ) The re-calculation is performed such that,
γ 4 (σ 4 ,σ 6 )＝γ i-1 (σ 4 ,σ 5 )γ i (σ 5 ,σ 6 )
after the completion of the computation of the BCJR algorithm, bits without raster path pruning output LLR BCJR The a priori LLR of the BCJR input is subtracted V2C I.e. the information that the SCN transmits to each connected variable node. Whereas the bits clipped in the BCJR-TS algorithm, because they are considered reliable, the information that the check node passes to these variable nodes is an enhancement of the initial information, can be set to:
LLR SCN2VN (u i ∈reliable bits)＝sign(LLR V2C (u i ))×LLR reff
wherein sign (·) is a sign operation. LLR (LLR) reff The reference value, which is a fixed LLR value, is typically set to a value greater than 20, since this bit is considered reliable in advance detection and therefore can be considered to have a large LLR value itself, and in subsequent iterations, only the emphasis needs to be continuedThe LLR value of this bit is sufficient.
Some embodiments of the present disclosure further provide an LDPC decoding apparatus, including:
the check node acquisition module is used for acquiring check nodes which do not meet the check relation in the main trapping set and common check nodes in a classified mode;
the super check node setting module is used for setting super check nodes, and the super check nodes are formed by combining check nodes which do not meet a check relation in the main trapping set;
the log likelihood ratio acquisition module is used for acquiring the log likelihood ratio in the channel;
a first information value calculation module for calculating a first information value LLR transmitted by the variable node to all check nodes based on the log likelihood ratio value and BP algorithm in the channel VN2CN ；
A second information value calculation module for calculating a second information value LLR from the common check node received by the variable node based on the BP algorithm CN2VN ；
The third information value calculation module and the fifth information value calculation module are used for calculating a third information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm or a BCJR-TS algorithm after judging the magnitude relation between the iteration times and the set iteration times threshold value BCJR Or fifth information value LLR BCJR-TS ；
A hard decision module for superposing the second information value LLR CN2VN And the third information value LLR BCJR Or fifth information value LLR BCJR-TS Hard judgment is carried out, and a result of the hard judgment is obtained;
and the result judging module is used for judging whether the decoding result is correct or not based on the hard decision result and the set check equation.
In some embodiments of the present disclosure, the LDPC decoding apparatus further includes a fourth information value calculation module configured to calculate a fourth information value LLR transmitted from the variable node to the super check node v2c The method comprises the steps of carrying out a first treatment on the surface of the A third information value updating module for when the iteration number is not equal toWhen the iteration number threshold is exceeded, calculating a third information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm BCJR Then, the third information value LLR BCJR Update to third information value LLR BCJR LLR with fourth information value v2c Is a difference in (c).
In some embodiments of the present disclosure, the LDPC decoding apparatus further includes a trellis-diagram path correction module configured to, when the number of iterations exceeds the threshold number of iterations, select a reliable bit based on the trapping set, correct a path corresponding to the reliable bit in a trellis diagram of the BCJR algorithm, specifically, delete the n+1th node and connect the n+2th node when the n+1th node is determined to be reliable; the fifth information value calculation module is specifically configured to calculate a fifth information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm after correcting the raster path BCJR-TS Obtaining a fifth information value LLR BCJR-TS Then, the fifth information value LLR BCJR-TS Update to fifth information value LLR BCJR-TS LLR with fourth information value v2c Is a difference in (c).
In some embodiments of the present specification, there is also provided an electronic device including: a memory for storing a computer software program; and a processor, configured to implement the steps of the LDPC decoding method in the embodiments of the present specification when executing a computer software program.
In some embodiments of the present specification, there is also provided a computer readable storage medium having stored thereon a computer software program which, when executed, performs the steps of the LDPC decoding method in the embodiments of the present specification.
While the process flows described above include a plurality of operations occurring in a particular order, it should be apparent that the processes may include more or fewer operations, which may be performed sequentially or in parallel (e.g., using a parallel processor or a multi-threaded environment). The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks. In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory. The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media. Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method or apparatus comprising such elements.
It will be appreciated by those skilled in the art that embodiments of the present description may be provided as a method, system, or computer program product. Accordingly, the present specification may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present description can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein. The description may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices. In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for the method embodiments, since they are substantially similar to the apparatus embodiments, the description is relatively simple, with reference to the description of the apparatus embodiments in part. The foregoing is merely an example of the present specification and is not intended to limit the present specification. Various modifications and alterations to this specification will become apparent to those skilled in the art. Any modifications, equivalent substitutions, improvements, or the like, which are within the spirit and principles of the present description, are intended to be included within the scope of the claims of the present description.
Claims (5)
1. A LDPC decoding method, wherein the method comprises,
classifying and acquiring check nodes and common check nodes which do not meet the check relation in the main trapping set;
setting super check nodes, wherein the super check nodes are formed by combining check nodes which do not meet a check relation in the main trapping set;
acquiring a log likelihood ratio in a channel;
calculating a first information value LLR transmitted by a variable node to all check nodes based on the log likelihood ratio value and BP algorithm in the channel VN2CN ；
Calculating a second information value LLR (LLR) from the common check node received by the variable node based on the BP algorithm CN2VN ；
Setting an iteration number threshold, and calculating a third information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm when the iteration number does not exceed the iteration number threshold BCJR Calculating a fourth information value LLR transmitted by the variable node to the super check node v2c The method comprises the steps of carrying out a first treatment on the surface of the Calculating the third information value LLR transmitted by the super check node to the variable node based on the BCJR algorithm when the iteration number does not exceed the iteration number threshold BCJR After that, the first stepThree information value LLR BCJR Updating to the third information value LLR BCJR LLR with the fourth information value v2c Is a difference in (2); when the iteration number exceeds the iteration number threshold, calculating a fifth information value LLR transmitted by the super check node to the variable node based on a BCJR-TS algorithm BCJR-TS The method comprises the steps of carrying out a first treatment on the surface of the Selecting reliable bits based on the trapping set, and correcting paths corresponding to the reliable bits in a grid diagram of the BCJR algorithm, wherein when an N+1th node is judged to be reliable, deleting the N+1th node, and connecting the N node with the N+2th node; calculating a fifth information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm after correcting the raster pattern path BCJR-TS Obtaining the fifth information value LLR BCJR-TS After that, the fifth information value LLR is set BCJR-TS Update to the fifth information value LLR BCJR-TS LLR with the fourth information value v2c Is a difference in (2);
superimposing the second information value LLR CN2VN And the third information value LLR BCJR Or fifth information value LLR BCJR-TS And hard judging;
obtaining the result of the hard decision;
setting a check equation;
and judging whether the decoding result is correct or not based on the result of the hard decision and the check equation, and ending decoding when the decoding result is correct.
2. The LDPC decoding method according to claim 1, wherein the method further comprises,
acquiring a log likelihood ratio in a channel;
decoding based on the log likelihood ratio value in the channel and the BP algorithm;
when the decoding result is wrong, reclassifying to obtain the check nodes and the common check nodes which do not meet the check relation in the main trapping set; calculating a first information value LLR transmitted by a variable node to the common check node based on the log likelihood ratio value and BP algorithm in the channel VN2CN The method comprises the steps of carrying out a first treatment on the surface of the Based on the BP algorithmCalculating a second information value LLR received by the variable node from the common check node CN2VN The method comprises the steps of carrying out a first treatment on the surface of the Setting an iteration number threshold, and calculating a third information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm when the iteration number does not exceed the iteration number threshold BCJR When the iteration number exceeds the iteration number threshold, calculating a fifth information value LLR transmitted from the super check node to the variable node based on a BCJR-TS algorithm BCJR-TS The method comprises the steps of carrying out a first treatment on the surface of the Superimposing and hard-judging the second information value LLR CN2VN And the third information value LLR BCJR Or fifth information value LLR BCJR-TS The method comprises the steps of carrying out a first treatment on the surface of the Obtaining the result of the hard decision; setting a check equation; and judging whether the decoding result is correct or not based on the result of the hard decision and the check equation, and ending decoding when the decoding result is correct.
3. An LDPC decoding apparatus, wherein the apparatus comprises,
the check node acquisition module is used for acquiring check nodes which do not meet the check relation in the main trapping set and common check nodes in a classified mode;
the super check node setting module is used for setting super check nodes, and the super check nodes are formed by combining check nodes which do not meet a check relation in the main trapping set;
the log likelihood ratio acquisition module is used for acquiring the log likelihood ratio in the channel;
a first information value calculation module for calculating a first information value LLR transmitted by the variable node to all check nodes based on the log likelihood ratio value and BP algorithm in the channel VN2CN ；
A second information value calculation module for calculating a second information value LLR from the common check node received by the variable node based on the BP algorithm CN2VN ；
The third information value calculation module and the fifth information value calculation module are used for calculating the super based on a BCJR algorithm or a BCJR-TS algorithm after judging the magnitude relation between the iteration times and the set iteration times threshold valueThird information value LLR transmitted by check node to variable node BCJR Or fifth information value LLR BCJR-TS ；
A hard decision module for superposing the second information value LLR CN2VN And the third information value LLR BCJR Or fifth information value LLR BCJR-TS Hard judgment is carried out, and a result of the hard judgment is obtained;
the result judging module is used for judging whether the decoding result is correct or not based on the hard decision result and the set check equation;
a fourth information value calculation module for calculating a fourth information value LLR transmitted from the variable node to the super check node v2c ；
A third information value updating module, configured to calculate, based on the BCJR algorithm, the third information value LLR transmitted by the super check node to the variable node when the iteration number does not exceed the iteration number threshold BCJR After that, the third information value LLR is calculated BCJR Updating to the third information value LLR BCJR LLR with the fourth information value v2c Is a difference in (2);
the raster image path correction module is used for selecting reliable bits based on the trapping set when the iteration number exceeds the iteration number threshold, correcting paths corresponding to the reliable bits in raster images of the BCJR algorithm, specifically deleting the (n+1) th node and connecting the (n+2) th node when the (n+1) th node is judged to be reliable;
the fifth information value calculation module is specifically configured to calculate a fifth information value LLR transmitted from the super check node to the variable node based on a BCJR algorithm after correcting the raster pattern path BCJR-TS Obtaining the fifth information value LLR BCJR-TS After that, the fifth information value LLR is set BCJR-TS Update to the fifth information value LLR BCJR-TS LLR with the fourth information value v2c Is a difference in (c).
4. An electronic device, comprising
A memory for storing a computer software program;
processor for implementing the steps of the LDPC decoding method according to any one of claims 1 to 2 when said computer software program is run.
5. A computer readable storage medium, characterized in that it has stored thereon a computer software program which, when executed, implements the steps of the LDPC decoding method according to any of claims 1 to 2.
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