CN112035006A - Display panel - Google Patents
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- CN112035006A CN112035006A CN202010784951.8A CN202010784951A CN112035006A CN 112035006 A CN112035006 A CN 112035006A CN 202010784951 A CN202010784951 A CN 202010784951A CN 112035006 A CN112035006 A CN 112035006A
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- metal line
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- 239000002184 metal Substances 0.000 claims abstract description 166
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000002161 passivation Methods 0.000 claims description 9
- 239000010410 layer Substances 0.000 description 125
- 239000011229 interlayer Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 230000008020 evaporation Effects 0.000 description 4
- 238000001704 evaporation Methods 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 238000002360 preparation method Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The display panel provided by the embodiment of the invention comprises an array substrate and a touch panel embedded in the array substrate, wherein the touch panel comprises sensing electrode blocks arranged in an array and touch signal lines connected with the sensing electrode blocks, the touch signal lines at least comprise two layers of metal wires arranged on different surfaces, and the two layers of metal wires are electrically connected; the impedance of the touch signal lines is reduced by electrically connecting at least two layers of touch signal lines in parallel.
Description
Technical Field
The invention relates to the technical field of touch display, in particular to a display panel.
Background
The conventional display panel generally needs a higher refresh frequency, when the refresh frequency of the display panel is changed from 60 hz to 120 hz, the turn-on time of the touch signal is half of the original turn-on time, and the conventional touch signal line is arranged in a single layer, so that the impedance is higher, and the touch signal cannot be turned on in a shorter time, and therefore, the conventional display panel has the technical problem of high impedance of the touch wiring.
Disclosure of Invention
The embodiment of the invention provides a display panel, which can solve the technical problem that the existing display panel has high impedance of touch wiring.
The embodiment of the invention provides a display panel, which comprises an array substrate and a touch panel embedded in the array substrate, wherein the touch panel comprises sensing electrode blocks arranged in an array manner and touch signal lines connected with the sensing electrode blocks, the touch signal lines at least comprise two layers of metal wires arranged in different surfaces, and the two layers of metal wires are electrically connected.
In the display panel provided in the embodiment of the present invention, the touch signal line includes a first metal line and a second metal line, where the first metal line is disposed on the same layer as the TFT gate of the array substrate, and the second metal line is disposed on the same layer as the TFT source/drain layer of the array substrate.
In the display panel provided in the embodiment of the present invention, the direction of the first metal line intersects with the routing direction of the TFT gate, and the first metal line is insulated at a position intersecting with the TFT gate.
In the display panel provided in the embodiment of the present invention, the first metal line is disconnected at a position close to the TFT gate to form connection terminals located at two sides of the TFT gate, and the connection terminals at two sides of the TFT gate are overlapped and electrically connected through the second metal line.
In the display panel provided in the embodiment of the present invention, a dielectric layer is disposed between the first metal line and the second metal line, a first through hole is disposed at a position of the dielectric layer corresponding to the connection end, and the connection ends on two sides of the TFT gate are connected to the second metal line through the first through hole.
In the display panel provided in the embodiment of the present invention, the touch signal line further includes a third metal line, the third metal line is disposed above the second metal line, and the third metal line is electrically connected to the second metal line in parallel through a second via.
In the display panel provided in the embodiment of the present invention, the third metal line and the first electrode layer in the pixel unit of the display panel are prepared at the same layer, and the third metal line and the first electrode are arranged in an insulating manner.
In the display panel provided in the embodiment of the present invention, the third metal line is not disposed on the same layer as any metal layer, and the third metal line is disposed on the passivation layer.
In the display panel provided in the embodiment of the present invention, the third metal line is further electrically connected in parallel to the first metal line through a via.
In the display panel provided in the embodiment of the present invention, the routing width of the third metal line is greater than the routing width of the second metal line, and the routing width of the third metal line is greater than the routing width of the first metal line.
Has the advantages that: the display panel provided by the embodiment of the invention comprises an array substrate and a touch panel embedded in the array substrate, wherein the touch panel comprises sensing electrode blocks arranged in an array and touch signal lines connected with the sensing electrode blocks, the touch signal lines at least comprise two layers of metal wires arranged on different surfaces, and the two layers of metal wires are electrically connected; at least two layers of touch signal wires are electrically connected in parallel, so that the impedance of the touch signal wires is reduced, and the technical problem of high impedance of touch wiring of the existing display panel is solved.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
Fig. 1 is a schematic top view of a touch panel in a display panel according to an embodiment of the present invention;
fig. 2 is a first schematic top view of a display panel according to an embodiment of the invention;
FIG. 3 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention;
FIG. 4 is a second schematic top view of a display panel according to an embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of a display panel according to an embodiment of the invention;
fig. 6 is a schematic flow chart of a display panel manufacturing method according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
As shown in fig. 1, fig. 2, and fig. 3, a display panel according to an embodiment of the present invention includes an array substrate and a touch panel embedded in the array substrate, where the touch panel includes sensing electrode blocks 2 arranged in an array and touch signal lines 1 connected to the sensing electrode blocks 2, where the touch signal lines 1 at least include two layers of metal traces arranged on different surfaces, and the two layers of metal traces are electrically connected.
In this embodiment, the display panel includes an array substrate and a touch panel embedded in the array substrate, the touch panel includes sensing electrode blocks 2 arranged in an array and a touch signal line 1 connected to the sensing electrode blocks 2, wherein the touch signal line 1 at least includes two layers of metal wires arranged in different planes, and the two layers of metal wires are electrically connected; at least two layers of touch signal wires are electrically connected in parallel, so that the impedance of the touch signal wires is reduced, and the technical problem of high impedance of touch wiring of the existing display panel is solved.
The array substrate comprises a substrate 10, and a light-shielding layer 201, a buffer layer 202, an active layer 203, a gate insulating layer 204, a TFT gate layer 205, an interlayer insulating layer 206, a TFT source/drain layer 207, a passivation layer 208 and a flat layer 209 which are arranged on the substrate.
One end of the touch signal line 1 is connected to the sensing electrode block 2, and the other end is connected to the touch chip 3.
Wherein, a plurality of said induction electrode block 2 are distributed and insulated each other.
The array substrate is provided with a flat layer, a pixel definition layer, a light-emitting function layer and a packaging layer.
The light emitting function layer includes a first electrode layer 401, a light emitting layer 402, and a second electrode layer 403.
In one embodiment, the touch panel includes at least a first metal line 601 and a second metal line 602, wherein the first metal line 601 is insulated from the TFT gate and disposed on the same layer, and the second metal line 602 is disposed on the same layer as the TFT source/drain layer 207.
In one embodiment, the touch signal line includes a first metal line 601 and a second metal line 602, wherein the first metal line 601 is disposed in the same layer as the TFT gate of the array substrate, and the second metal line 602 is disposed in the same layer as the TFT source/drain layer 207 of the array substrate.
In one embodiment, the orientation of the first metal line 601 intersects with the routing orientation of the TFT gate, and the first metal line 601 is disposed in an insulated manner at the position intersecting with the TFT gate.
In one embodiment, the first metal line is disconnected at a position close to the TFT gate, so as to form connection terminals at two sides of the TFT gate, and the connection terminals at two sides of the TFT gate are connected and electrically connected through the second metal line 602.
In one embodiment, a dielectric layer is disposed between the first metal line 601 and the second metal line 602, a first through hole H1 is disposed at a position of the dielectric layer corresponding to the connection end, and the connection end on both sides of the TFT gate is connected to the second metal line 602 through the first through hole H1.
In one embodiment, the touch signal line further includes a third metal line 603, the third metal line 603 is disposed above the second metal line 602, and the third metal line 603 is electrically connected to the second metal line 602 in parallel through a second via H2.
In one embodiment, the third metal line 603 is prepared in the same layer as the first electrode layer 401 in the pixel unit of the display panel, and the third metal line 603 is insulated from the first electrode.
In one embodiment, the third metal line 603 is not disposed in the same layer as any metal layer, and the third metal line 603 is disposed on the passivation layer 208.
In one embodiment, the third metal line 603 is further electrically connected in parallel with the first metal line 601 through a via.
In an embodiment, the trace width of the third metal line 603 is greater than the trace width of the second metal line 602, and the trace width of the third metal line 603 is greater than the trace width of the first metal line 601.
In one embodiment, the first via H1 penetrates through the interlayer insulating layer 206, the second metal line 602 is partially disposed in the first via H1, and the second metal line 602 reaches the first metal line 601 through the first via H1 and contacts.
In one embodiment, the TFT source/drain layer 207 includes a source 2071 and a drain 2072, and the second metal line 602 is insulated from the source 2071 and the drain 2072.
The second metal line 602 may be insulated from the source 2071, and the second touch trace may be in contact with the drain 2072.
The second metal line 602 may also be insulated from the drain 2072, and the second touch trace may also be in contact with the source 2071.
The second metal line 602 may be insulated from both the source 2071 and the drain 2072.
In one embodiment, as shown in fig. 4 and 5, the touch signal line further includes a third metal line 603, the third metal line 603 is disposed above the second metal line 602, and the third metal line 603 is electrically connected to the second metal line 602 in parallel through a second via H2.
The second via H2 penetrates through the insulating film above the second metal line 602.
Wherein the third metal line 603 is partially disposed in the second via H2.
The material of the third metal line 603 may be the same as that of the first metal line 601, or may be the same as that of the second metal line 602.
In one embodiment, the third metal line 603 may be electrically connected in parallel with the first metal line 601 through a second via H2.
The third metal line 603 may be electrically connected in parallel with only the first metal line 601.
The third metal line 603 may also be electrically connected to the first metal line 601 and the second metal line 602 in parallel, which may also reduce the impedance of the entire touch signal line.
In one embodiment, a first electrode layer, a light emitting layer, and a second electrode layer are disposed above the planarization layer 209, and the third metal line 603 is disposed on the same layer as the first electrode layer.
In one embodiment, the first electrode layer includes a first electrode, and the third metal line 603 is insulated from the first electrode.
In one embodiment, the first electrode layer includes a first electrode, and the third metal line 603 is disposed in contact with the first electrode.
In one embodiment, a first electrode layer, a light emitting layer, and a second electrode layer are disposed above the planarization layer 209, and the third metal line 603 and the second electrode layer are disposed at the same layer.
In one embodiment, the second electrode layer includes a second electrode, and the third metal line 603 is insulated from the second electrode.
In one embodiment, the first electrode layer includes a first electrode, and the third metal line 603 is disposed in contact with the second electrode.
In one embodiment, the third metal line 603 is not disposed on the same layer as any metal layer, and the third metal line 603 is disposed on an insulating layer.
In one embodiment, the third metal line 603 is disposed on the interlayer insulating layer 206, and the passivation layer 208 is disposed on the third metal line 603.
In one embodiment, the third metal line 603 is disposed on the passivation layer 208, and the planarization layer 209 is disposed on the third metal line 603.
Wherein the third metal line 603 is insulated from the first electrode layer by a planarization layer 209, and the third metal line 603 is insulated from the TFT gate by the passivation layer 208.
In one embodiment, the third metal line 603 is disposed on the planarization layer 209, the third metal line 603 is disposed on a different layer from the first electrode layer, and the third metal line 603 is disposed in an insulated manner from the first electrode.
In one embodiment, the third metal line 603 may be disposed between any two adjacent film layers in the light emitting function layer.
The third metal line 603 may be disposed between the first electrode layer and the light emitting layer, and the third metal line 603 may be disposed to be insulated from the first electrode layer and the light emitting layer.
An insulating layer may be further disposed between the third metal line 603 and the first electrode layer and the light emitting layer.
As shown in fig. 6, an embodiment of the present invention provides a method for manufacturing a display panel, including:
s1, providing a substrate 10;
s2, preparing a light shielding layer 201, a buffer layer 202, an active layer 203 and a gate insulating layer 204 on the substrate 10;
s3, performing evaporation preparation on the gate insulating layer 204 to obtain a first metal film layer;
s4, patterning the first metal film layer to form a TFT grid and a first touch wire;
s5, depositing a whole layer of insulating material on the first touch trace to serve as an interlayer insulating layer 206, defining a source/drain 2072 area, and simultaneously forming a source/drain 2072 through hole and a first through hole H1;
s6, performing evaporation preparation on the interlayer insulating layer 206 to obtain a second metal film layer;
s7, patterning the second metal film layer to form a source 2071, a drain 2072 and a second touch trace, where the second touch trace is connected in parallel with the first touch trace through a first via H1.
S8: a planarization layer 209, a pixel defining layer, a light emitting function layer, and an encapsulation layer are formed on the TFT source/drain electrode layer 207.
In one embodiment, in the step of forming the light emitting function layer, the method further includes:
and performing evaporation preparation on the flat layer 209 to obtain a third metal film layer, and performing patterning treatment on the third metal film layer to form a first electrode and a third metal wire 603.
Wherein the first electrode and the third metal line 603 are insulated.
In one embodiment, before the step of forming the third metal line 603, the method further includes:
a second via H2 is formed through the planarization layer 209 and the passivation layer 208, and the third metal line 603 is in contact with the second touch signal line through the second via H2.
In one embodiment, before the step of forming the third metal line 603, the method further includes:
a second via H2 is formed through the planarization layer 209, the passivation layer 208, and the interlayer insulating layer 206, and the third metal line 603 is in contact with the first touch signal line through the second via H2.
The third metal wire 603 is electrically connected to the first metal wire 601 and the second touch signal in parallel, and the first metal wire 601 and the second metal wire 602 are electrically connected in parallel, so that the impedance of the whole touch signal wire is smaller than the impedance of the first metal wire 601 and the second metal wire 602 in parallel.
In one embodiment, in the step of forming the light emitting function layer, the method further includes:
a light emitting layer is arranged on the first electrode layer, a fourth metal film layer is prepared on the light emitting layer by evaporation, and the fourth metal film layer is subjected to patterning treatment to form a second electrode and a third metal wire 603.
Wherein the second electrode and the third metal wire 603 are insulated.
The display panel provided by the embodiment of the invention comprises an array substrate and a touch panel embedded in the array substrate, wherein the touch panel comprises sensing electrode blocks arranged in an array and touch signal lines connected with the sensing electrode blocks, the touch signal lines at least comprise two layers of metal wires arranged on different surfaces, and the two layers of metal wires are electrically connected; at least two layers of touch signal wires are electrically connected in parallel, so that the impedance of the touch signal wires is reduced, and the technical problem of high impedance of touch wiring of the existing display panel is solved.
The foregoing detailed description is provided for one of the embodiments of the present invention, and the principle and the implementation of the present invention are explained herein by applying specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. The display panel is characterized by comprising an array substrate and a touch panel embedded in the array substrate, wherein the touch panel comprises sensing electrode blocks arranged in an array mode and touch signal lines connected with the sensing electrode blocks, the touch signal lines at least comprise two layers of metal wires arranged in different planes, and the two layers of metal wires are electrically connected.
2. The display panel of claim 1, wherein the touch signal line comprises a first metal line and a second metal line, wherein the first metal line is disposed in the same layer as a TFT gate of the array substrate, and the second metal line is disposed in the same layer as a TFT source/drain layer of the array substrate.
3. The display panel according to claim 2, wherein the first metal line has an orientation intersecting with a routing orientation of the TFT gate, and the first metal line is disposed in an insulated manner at a position intersecting with the TFT gate.
4. The display panel according to claim 3, wherein the first metal line is disconnected at a position close to the TFT gate to form connection terminals at both sides of the TFT gate, and the connection terminals at both sides of the TFT gate are overlapped and electrically connected through the second metal line.
5. The display panel according to claim 4, wherein a dielectric layer is disposed between the first metal line and the second metal line, a first through hole is disposed at a position of the dielectric layer corresponding to the connection end, and the connection end on both sides of the TFT gate is connected to the second metal line through the first through hole.
6. The display panel of claim 1, wherein the touch signal line further comprises a third metal line disposed over the second metal line, the third metal line being electrically connected in parallel with the second metal line through a second via.
7. The display panel of claim 6, wherein the third metal line is formed on the same layer as the first electrode layer in the pixel unit of the display panel, and the third metal line is insulated from the first electrode layer.
8. The display panel of claim 6, wherein the third metal line is not disposed on the same layer as any of the metal layers, the third metal line being disposed on a passivation layer.
9. The display panel of claim 6, wherein the third metal line is further electrically connected in parallel with the first metal line by a via.
10. The display panel according to claim 6, wherein the third metal lines have a greater trace width than the second metal lines, and the third metal lines have a greater trace width than the first metal lines.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010784951.8A CN112035006A (en) | 2020-08-06 | 2020-08-06 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010784951.8A CN112035006A (en) | 2020-08-06 | 2020-08-06 | Display panel |
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|---|---|
| CN112035006A true CN112035006A (en) | 2020-12-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010784951.8A Pending CN112035006A (en) | 2020-08-06 | 2020-08-06 | Display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114371795A (en) * | 2021-12-31 | 2022-04-19 | 厦门天马微电子有限公司 | Touch display panel and touch display device |
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| CN114371795A (en) * | 2021-12-31 | 2022-04-19 | 厦门天马微电子有限公司 | Touch display panel and touch display device |
| CN114371795B (en) * | 2021-12-31 | 2023-07-28 | 厦门天马微电子有限公司 | Touch display panel and touch display device |
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