CN112019071A - Power converter - Google Patents

Power converter Download PDF

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Publication number
CN112019071A
CN112019071A CN202010668647.7A CN202010668647A CN112019071A CN 112019071 A CN112019071 A CN 112019071A CN 202010668647 A CN202010668647 A CN 202010668647A CN 112019071 A CN112019071 A CN 112019071A
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voltage
input
converter
output
power converter
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CN202010668647.7A
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石磊
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Astec International Ltd
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Astec International Ltd
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Priority to CN202010668647.7A priority Critical patent/CN112019071A/en
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Abstract

The invention provides a power converter, which comprises a first input rectifier and a second input rectifier; a first voltage converter and a second voltage converter alternately coupled in parallel between an input terminal and a dc output terminal of the power converter for converting the rectified input voltage into a dc output voltage; a first energy storage element and a second energy storage element; the output control unit is coupled between the output end of the first voltage converter and the output end of the second voltage converter and used for disconnecting the output end of the first voltage converter and the output end of the second voltage converter during the abnormal period of the input voltage; and the bypass unit is coupled between the second energy storage element and the input end of the first voltage converter and used for enabling the energy stored in the second energy storage element to be transmitted to the first energy storage element through the bypass unit during the abnormal period of the input voltage.

Description

Power converter
The present application is a divisional application of the chinese patent application filed on 29/7/2015, having application number 201510456621.5 and entitled "power converter".
Technical Field
The present invention relates to the field of electrical technology, and more particularly to a power converter with improved power density while having a desired hold-up time.
Background
Currently, some electronic devices such as computers and the like have an increasing demand for stability of power supplies, because it is required to maintain an output voltage within a certain range for a certain time after an abnormality occurs in an input voltage (e.g., at the time of power failure), which is called a hold time, after the abnormality occurs in the input voltage, for sequentially terminating an operation of a data processing apparatus or switching to an Uninterruptible Power Supply (UPS) operation after a line fault.
An ac-dc power converter will be described as an example. Generally, an ac-dc power converter includes: full-wave rectifiers, voltage converters, and direct current-to-direct current (DC-DC) conversion circuits. The voltage converter is coupled between the full-wave rectifier and the DC-DC conversion circuit and is used for enabling the power supply signal output by the full-wave rectifier to be subjected to voltage boosting or voltage reduction and then outputting a direct-current power supply signal to the DC-DC conversion circuit. An output energy storage element, such as a capacitor C, is arranged after the voltage converter for balancing the input and output instantaneous power, filtering out second harmonic ripple, and providing the power converter with sufficient holding time.
In a common design, during an abnormal period of the input voltage, the output voltage can be maintained for a period of time by means of the energy maintenance stored in the energy storage capacitor C until the voltage of the energy storage capacitor C is lower than the lowest operating voltage of the DC-DC conversion circuit at the rear end. Since this lowest operating power supply is much higher than the voltage at which the energy storage capacitor C is fully discharged (zero voltage), only a portion of the energy stored in the energy storage capacitor C can be used to maintain the output voltage. For example, for a high efficiency AC-DC power converter, when the voltage of the energy storage capacitor C is 390V and the lowest operating voltage of the DC-DC conversion circuit at the rear end is 280V, only about 48% of the energy stored in the energy storage capacitor C can be utilized during an input voltage abnormality.
To make greater use of the stored energy, a larger energy storage capacitor needs to be applied. However, the electrolytic capacitor as an energy storage capacitor is generally bulky and the corresponding heat sink also occupies a large place, which becomes a major factor affecting further improvement of the power density of the power supply.
Disclosure of Invention
It is an object of the present invention to provide a power converter, which is expected to solve the above problems in the prior art.
According to an aspect of the present invention, there is provided a power converter including: a first input rectifier and a second input rectifier for generating a rectified input voltage from an input voltage; a first voltage converter and a second voltage converter alternately coupled in parallel between an input terminal and a dc output terminal of the power converter for converting the rectified input voltage into a dc output voltage, wherein the input terminal of the first voltage converter is coupled to the first input rectifier and the input terminal of the second voltage converter is coupled to the second input rectifier; the first energy storage element is coupled between the output end of the first voltage converter and the grounding end of the power converter; the second energy storage element is coupled between the output end of the second voltage converter and the grounding end of the power converter; the output control unit is coupled between the output end of the first voltage converter and the output end of the second voltage converter and used for disconnecting the output ends of the first voltage converter and the second voltage converter during the abnormal period of the input voltage; and the bypass unit is coupled between the second energy storage element and the input end of the first voltage converter and used for enabling the energy stored in the second energy storage element to be transmitted to the first energy storage element through the bypass unit during the abnormal period of the input voltage.
According to the power converter provided by the embodiment of the invention, the energy stored in the second energy storage element is transferred to the first energy storage element, so that the capacity of the energy storage element required for obtaining the same holding time is smaller, the power density of the power converter is improved, and the heat dissipation of a circuit is improved.
Drawings
The disclosure may be better understood by reference to the following description taken in conjunction with the accompanying drawings, in which like or similar reference numerals identify like or similar parts throughout the figures. The accompanying drawings, which are incorporated in and form a part of this specification, illustrate preferred embodiments of the present disclosure and, together with the detailed description, serve to explain the principles and advantages of the disclosure. In the drawings:
fig. 1 is a schematic block diagram of a power converter according to an embodiment of the present invention;
FIG. 2 is a detailed circuit diagram of a power converter according to one embodiment of the invention;
fig. 3 is a driving circuit diagram employing an Insulated Gate Bipolar Transistor (IGBT) as the switching element Q1;
FIG. 4A schematically illustrates an output voltage curve of a power converter without a bypass unit during an input voltage anomaly;
fig. 4B schematically shows an output voltage curve of a power converter with a bypass unit during an input voltage abnormality.
FIG. 5 schematically shows a timing after an input voltage abnormality (not recovered);
fig. 6 schematically shows the timing when the input voltage recovers after the occurrence of an abnormality.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
It will be understood by those skilled in the art that the terms "first", "second", etc. in the present invention are only used for distinguishing different units, modules or steps, etc., and do not represent any specific technical meaning or necessary logical sequence between them, nor represent the importance of the different units, modules or steps defined by them.
It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Other terms used to describe the relationship between elements should be interpreted in a similar manner (e.g., "between …" versus "directly between …", "adjacent" versus "directly adjacent", etc.).
Fig. 1 is a schematic block diagram of a power converter according to an embodiment of the present invention. The power converter disclosed in the present embodiment includes: the first input rectifier 110, the second input rectifier 120, the first voltage converter 112, the second voltage converter 122, the first energy storage element C1, the second energy storage element C2, the output control unit 130, and the bypass unit 140.
First input rectifier 110 and second input rectifier 120 and input voltage viA coupling for generating a rectified input voltage from the input voltage.
The first voltage converter 112 and the second voltage converter 122 may be a boost converter or a buck converter, as the case may be, for converting the rectified input voltage into a dc output voltage voutFor use by the backend.
An input terminal of the first voltage converter 112 is coupled to an output terminal of the first input rectifier 110, and an output terminal of the first power converter 112 is coupled to a dc output terminal v of the power converteroutAnd (4) coupling. The input terminal of the second voltage converter 122 and the output terminal v of the first input rectifier 120outCoupled between the output of the second power converter 122 and the DC output v of the power converteroutAnd (4) coupling. The first voltage converter 112 and the second voltage converter 122 are connected in parallel with each other and alternately operate with a phase shift of 180 ° to constitute an interleaved parallel structure.
The first energy storage element C1 is coupled between the output terminal of the first voltage converter 112 and the ground terminal of the power converter. The second energy storage element C2 is coupled between the output terminal of the second voltage converter 122 and the ground terminal of the power converter. The first and second energy storage elements C1, C2 are used to provide energy to the rear end.
The output control unit 130 is coupled between the output terminal of the first voltage converter 112 and the output terminal of the second voltage converter 122, and during the normal operation of the power converter, the output control unit 130 makes the output terminal of the first voltage converter 112 and the output terminal of the second voltage converter 122 in a conducting state, and the first voltage converter 112 and the second voltage converter 122 are connected in parallel, and the two are alternately operated. And the output control unit 130 is configured to disconnect the output terminal of the first voltage converter 112 and the output terminal of the second voltage converter 122 during the input voltage abnormality (in this example, the input voltage is suddenly disconnected or greatly dropped, etc.).
The bypass unit 140 is coupled between the second energy storage element C2 and the input terminal of the first voltage converter 112. During normal operation of the power converter, the bypass unit 140 is not operated, and the first and second energy storage elements C1, C2 jointly supply energy to the rear end. During the abnormal period of the input voltage, the bypass unit 140 is in an operating state, so that the energy stored in the second energy storage element C2 is transmitted to the first energy storage element C1 via the bypass unit 140, so as to maintain the voltage of the first energy storage element C1 stable, and provide the output voltage to the rear end.
In the power converter disclosed in the embodiment, during the abnormal period of the input voltage, the two voltage converters which are originally connected in parallel are changed into the form of series connection through the bypass unit, and the energy stored in the second energy storage element C2 is transmitted to the first energy storage element C1, so that the capacity of the energy storage element required for obtaining the same holding time is smaller, the heat dissipation of the circuit is improved, and the power density of the circuit is improved.
Although the above description is presented in terms of an ac-dc power converter, those skilled in the art will recognize that embodiments of the present invention are not limited in application to ac-dc power converters, but may also be implemented as part of a dc-dc power converter.
The circuit structure of an embodiment of the present invention can be understood from the above description, and a specific circuit diagram for practical use is described below with reference to fig. 2. Fig. 2 is a specific circuit diagram of a power converter according to an embodiment of the invention.
The first INPUT rectifier 110 and the second INPUT rectifier 120 may be full bridge rectifiers D7, D8 for generating a rectified INPUT voltage from an INPUT alternating voltage (AC-INPUT).
The first voltage converter 112 and the second voltage converter 122 may be Power Factor Correction (PFC) circuits. As shown in fig. 2, the first PFC unit PFC1 is coupled between the first input rectifier D7 and a dc output terminal (V-BULK) of the power converter, and includes at least an inductor L1, a diode D4, and a switching element Q2. The second PFC unit PFC2 is coupled between the second input rectifier D8 and the dc output terminal (V-BULK) of the power converter and includes at least an inductor L2, a diode D6, and a switching element Q3.
Optionally, a diode D3 may be connected in parallel across the inductor L2 and the diode D6 of the second PFC unit PFC 2. In this case, at the moment of the ac voltage input (recovery), the input voltage may charge the second energy storage element C2 via the diode D3 to prevent the inductor L2, the diode D6 and the switching element Q3 from being impacted by the surge current.
The first and second energy storage elements C1 and C2 may be first and second capacitors C1 and C2. The output control unit 130 may include a rectifying diode D5, and the rectifying diode D5 is coupled between the anodes of the first and second capacitors C1 and C2.
The capacitance value of the first capacitor C1 may be the same as or different from the capacitance value of the second capacitor C2. In one possible example, the capacitance value of the first capacitor C1 may be greater than the capacitance value of the second capacitor C2 in order to make greater use of the energy stored on C2. It is understood that the capacitance of the first capacitor C1 is smaller than that of the second capacitor C2, which still accomplishes the function and operation of the related circuit.
During the normal operation of the power converter, the rectifier diode D5 is in a conducting state, the first PFC unit PFC1 and the second PFC unit PFC2 form an interleaved parallel structure alternately operating with a phase shift of 180 °, and the first capacitor C1 and the second capacitor C2 together provide an output voltage to the rear end. Meanwhile, since the first capacitor C1 is connected in parallel with the second capacitor C2, the ripple current generated in the previous stage is borne more evenly.
The bypass unit 140 includes a switching element Q1 coupled between the second energy storage element C2 and the input terminal of the first voltage converter 112. During normal operation of the power converter, the switching element Q1 is in an off state, and when an input voltage is abnormal, the switching element Q1 is controlled to be turned on, at this time, the energy stored in the second capacitor C2 can be transferred to the first capacitor C1 through a discharge loop formed by the switching element Q1, the resistor R4, the first capacitor C1 and the diode D9, and at the same time, the rectifier diode D5 is in a reverse cut-off state because the voltage on the second capacitor C2 is smaller than the voltage on the first capacitor C1. Thus, during the holding time, the energy stored in the second capacitor C2 may be continuously transferred to the first capacitor C1 and provide an output voltage to the back end.
In one possible example, the switching element Q1 may be an Insulated Gate Bipolar Transistor (IGBT). Fig. 3 is a driving circuit diagram using an IGBT as the switching element Q1. The control unit MCU detects the input voltage through a circuit composed of D103, D104, R101, R102, R104, R109 and C402. The MCU carries out high-frequency sampling on the input voltage and carries out A/D conversion. The MCU may determine whether the INPUT voltage (AC _ INPUT) is normal by, for example, two algorithms: whether the input voltage effective value is within a normal working range or not; the input voltage is 0V for 5 ms. And if the effective value of the input voltage is smaller than the specification required value or the input voltage is 0V for 5ms continuously, judging that the input is invalid, and outputting a high level by the MCU through the I/O port. The flyback transformer windings 4S-4F, D1227, C1226 and R1224 form an independent auxiliary power supply, and the voltage across C1226 is stabilized at 12V for driving the switching element Q1. When the I/O of the MCU is in a low level, Q401 is turned off, no current flows through a diode in the optocoupler U1214, a transistor between pins 3 and 4 of the U1214 is turned off, the driving of the switching element Q1 is 0V, and the switching element Q1 is kept off. When the I/O of the MCU is in a high-low level, Q401 is conducted, a diode in the optocoupler U1214 has current to pass, a transistor between pins 3 and 4 of the U1214 is conducted, 12V voltage at two ends of C1226 acts on IGBT _ DRV, a switching element Q1 is driven to be 12V, a switching element Q1 is conducted, therefore, two voltage converters originally connected in parallel are changed into a series connection mode through a bypass unit, and energy stored on the second energy storage element C2 is transmitted to the first energy storage element C1.
Alternatively, a diode D1 may be connected in series between the switching element Q1 and the input terminal of the first PFC unit PFC 1. Specifically, the anode of the diode D1 is coupled to one end of the switching element Q1, the cathode of the diode D1 is coupled to the input end of the first PFC unit PFC1, and the other end of the switching element Q1 is coupled to the second capacitor C2. By configuring the diode D1, if the ac input voltage recovers during the hold period, the diode D1 can prevent the switching element Q1 from receiving a reverse surge voltage and a surge current, and protect the switching element Q1.
A current limiting element R2 is connected in series between the negative electrode of the first capacitor C1 and the ground terminal of the power converter, and a current limiting element R3 is connected in series between the negative electrode of the second capacitor C2 and the ground terminal of the power converter. The configuration of the current limiting elements R2, R3 can prevent inrush currents from inrush into the first and second capacitors C1, C2 during transient states such as power converter start-up or recovery.
In one possible example, the current limiting elements R2, R3 may be thermistors with negative temperature coefficients, thermistors with positive temperature coefficients, or equivalent resistors such as cement resistors that are resistant to surge currents.
Alternatively, a switching element may be connected in parallel across the current limiting elements R2, R3. The switching elements corresponding to the current limiting elements R2, R3 may be turned on during normal operation of the power converter, so that the current limiting elements R2, R3 are bypassed, thereby reducing power consumption.
In one possible example, the switching element connected in parallel with the current limiting elements R2, R3 may be a switching element such as a MOSFET. For example, as shown in fig. 2, a current limiting element R2 is coupled in parallel with a MOSFET switching element Q4.
In another possible example, the switching element connected in parallel with the current limiting elements R2, R3 may also be a relay switch RE 1. For example, as shown in fig. 2, current limiting element R3 is coupled in parallel with relay switch RE 1.
In the case of using the relay switch RE1, for example, a multi-contact relay switch RE1 may be used while being coupled in parallel with the current limiting element R3 and the rectifier diode D5 as the output control unit 130. In this case, during normal operation of the power converter, the relay switch RE1 is in a conducting state, and the current limiting element R3 and the rectifier diode D5 are bypassed. When an abnormality of the ac input voltage is detected (the voltage abnormality detection unit is not shown in the figure), the relay switch RE1 is turned off, and as described above, the connection between the first PFC unit PFC1 and the second PFC unit PFC2 is disconnected. The first PFC unit PFC1 operates independently, energy stored in the second capacitor C2 is transferred to the first capacitor C1 via the switching element Q1 and the diode D1, the voltage of the second capacitor C2 is lower than that of the first capacitor C1, and the rectifier diode D5 is turned off in the reverse direction. By connecting the switching element in parallel across the output control unit 130, the rectifier diode D5 can be bypassed during normal operation of the power converter to improve the efficiency of the PFC.
It should be understood that the type of components and the parameter values shown in the various embodiments of the present invention may be determined according to actual requirements and should not be limited to the choices listed above in connection with the specific circuit of fig. 2. The control of the bypass unit 140 and the output control unit 130 based on the abnormality of the input voltage may be realized by a control unit, for example. The control unit may for example take the form of a microcontroller MCU, or may be built up by separate circuit elements. Of course, it is readily understood that the functions of the control unit may also be implemented in the various component parts shown in fig. 2. The control unit can be easily implemented by those skilled in the art from the detailed description of the control process described above. The details of this control unit are not shown in the figure for the sake of simplicity.
Fig. 4A schematically shows an output voltage curve of a power converter without a bypass unit during an input voltage abnormality, and fig. 4B schematically shows an output voltage curve of a power converter with a bypass unit during an input voltage abnormality. L and L' in fig. 4A, 4B show the output voltage (voltage across the second capacitor C2) curves of the power converter during input voltage anomalies, respectively. It can be seen that under the same conditions, the output voltage of the power converter with the bypass unit drops slowly, and experiments show that the holding time of the power converter with the bypass unit is about 2.5 times that of the power converter without the bypass unit.
In the present embodiment, the two PFC units originally connected in parallel are changed to be connected in series by using the switching element in the case where the ac input voltage is abnormal, thereby simplifying the design and control of the circuit. Meanwhile, the semiconductor devices added in the embodiment are only in steady-state current carrying, a high-frequency switch state is not added, the power consumption is low, the heat dissipation is easy, and in addition, the space occupied by a power supply is small.
The following describes the timing of the power converter in fig. 2 after an abnormality occurs in the ac input voltage, with reference to fig. 5 and 6. Wherein fig. 5 schematically shows a timing after an abnormality (not recovered) occurs in the ac input voltage, and fig. 6 schematically shows a timing after the abnormality occurs in the ac input voltage and the ac input voltage is recovered.
As shown in fig. 5, in the initial stage, the ac input voltage is normal, the power converter operates normally, and the first PFC unit PFC1 and the second PFC unit PFC2 operate alternately with a phase shift of 180 ° under the control of the pulse width modulation signals PFC _ PWM1 and PFC _ PWM2, respectively. During this period, the control signal RLY _ DRV1 of the relay switch RE1 is at a high level, the relay switch RE1 is in a conductive state, and the rectifier diode D5 and the current limiting element R3 are bypassed; the control signal GATE1 of the switching element Q4 is high, the switching element Q4 is on, and the current limiting element R2 is bypassed. The back end is energized by a first capacitor C1 (i.e., BULK CAP) and a second capacitor C2 in parallel.
During the period T21 (about 500 μ s), an abnormality occurs in the ac input voltage.
During T22, bypass unit 140 waits for startup. At this time, if the ac input voltage is recovered, the bypass unit 140 will not operate, i.e., the switching element Q1 will not conduct. During this period, due to the detection of the occurrence of an abnormality in the ac input voltage, the first PFC unit PFC1 and the second PFC unit PFC2 stop operating, the control signal RLY _ DRV1 of the relay switch RE1 becomes a low level, the relay switch RE1 is in an off state, and the second capacitor C2 is connected in parallel to the first capacitor C1 via the rectifier diode D5 and supplies energy to the rear DC-DC converter. Due to the large capacity of the second capacitor C2, the operation of the back-end DC-DC converter (electrical load) can be maintained for a while after the ac input voltage is abnormal. The bypass unit 140 only starts to operate after T22 has elapsed (greater than 3ms) and the ac input voltage is still in an abnormal state. This prevents the bypass unit 140 from starting to operate due to a short-time abnormality of the ac input voltage, and prevents the power converter from switching frequently.
During a period T23 (about 500 μ s), the control signal IGBT _ DRV of the switching element Q1 becomes high level, and the switching element Q1 is controlled to turn on.
During T24, the control signal IGBT _ DRV of the switching element Q1 maintains a high level, the switching element Q1 maintains a conducting state, the second PFC unit PFC2 continues to maintain a stopped state, and the first PFC unit PFC1 starts to operate to adjust the voltage of the first capacitor C1. Meanwhile, since the voltage of the second capacitor C2 is lower than the voltage of the first output capacitor C1, the rectifier diode D5 is reversely turned off. During this time, the energy stored in the second output capacitor C2 is fed to the input terminal of the first PFC unit PFC1 via the switching element Q1 and the diode D1 until the energy stored in the second output capacitor C2 is substantially released, thereby increasing the holding time of the power converter.
If the ac input voltage is restored at the beginning of the period T32 and remains stable during the period T32, during the period T32 (greater than 50ms), the control signal IGBT _ DRV of the switching element Q1 remains high, the switching element Q1 remains in the on state, the second PFC unit PFC2 remains in the off state, and the first PFC unit PFC1 remains in the on state. At this time, on the one hand, the first PFC unit PFC1 keeps adjusting the voltage of the first capacitor C1 by means of the ac input voltage (via the input rectifier) or the voltage of the second capacitor C2, and on the other hand, the ac input voltage charges the second output capacitor C2 via the diode D3 and the current limiting resistor R3. When the second capacitor C2 is charged to the peak value of the ac input voltage via the diode D3, the switching element Q1 is controlled to be in the off state, and the bypass unit 140 is no longer in the operating state.
During the subsequent T31 (about 100ms), the control signal IGBT _ DRV of the switching element Q1 becomes low level, the switching element Q1 is in an off state, the bypass unit 140 does not operate, and the first PFC unit PFC1 and the second PFC unit PFC2 are in an on state. At this time, since the output voltage is coupled to the first capacitor C1, when the ac input voltage recovers, the voltage of the second capacitor C2 rises quickly due to the same duty ratio, when the voltage of the second capacitor C2 is higher than that of the first output capacitor C1, the rectifier diode D5 is turned on, and the first PFC unit PFC1 and the second PFC unit PFC2 form an interleaved parallel structure.
At the beginning of the period T33, the relay switch RE1 is closed, and after a closing delay time T33 (about 13ms) has elapsed, both contacts of the relay switch RE1 are closed at substantially zero voltage during the period T34 (about 500 μ s), thereby reducing conduction loss between the rectifier diode D5 and the current limiting resistors R2, R3.
After the period T34, the power converter resumes normal operation.
The foregoing describes the general principles of the present disclosure in conjunction with specific embodiments and/or examples, but it is to be understood that the present disclosure is not limited to these specific embodiments and/or examples. In addition, it will be appreciated by those skilled in the art that all or any of the components of the apparatus of the present disclosure can be understood and modified based on the specific application, and that such modifications, substitutions and alterations are intended to be included within the scope of the present disclosure.

Claims (7)

1. A power converter, comprising:
a first input rectifier (110) and a second input rectifier (120) for generating a rectified input voltage from an input voltage;
a first voltage converter (112) and a second voltage converter (122) coupled in interleaved parallel between an input and a dc output of the power converter for converting a rectified input voltage into a dc output voltage, wherein an input of the first voltage converter (112) is coupled with the first input rectifier (110) and an input of the second voltage converter (122) is coupled with the second input rectifier (120);
a first energy storage element (C1) coupled between an output of the first voltage converter (112) and a ground of the power converter;
a second energy storage element (C2) coupled between an output of the second voltage converter (122) and a ground of the power converter;
an output control unit (130) coupled between the output of the first voltage converter (112) and the output of the second voltage converter (122) for disconnecting the connection between the output of the first voltage converter (112) and the output of the second voltage converter (122) during an input voltage abnormality; and
a bypass unit (140) coupled between the second energy storage element (C2) and the input of the first voltage converter (112) for causing energy stored in the second energy storage element (C2) to be transferred to the first energy storage element (C1) via the bypass unit (140) during an input voltage anomaly.
2. The power converter of claim 1, the bypass unit (140) comprising at least a first switching element (Q1) coupled between the second energy storage element (C2) and an input of the first voltage converter (112), the first switching element (Q1) being in a conducting state during an input voltage anomaly such that energy stored in the second energy storage element (C2) is transferred via the bypass unit (140) to the first energy storage element (C1).
3. The power converter of claim 2, wherein the bypass unit (140) further comprises a first diode (D1), an anode of the first diode (D1) being coupled to one end of the first switching element (Q1), a cathode of the first diode (D1) being coupled to an input of the first voltage converter (112).
4. The power converter according to claims 1-3, the output control unit (130) comprising a rectifier diode (D5), the anode of the rectifier diode (D5) being coupled to the output of the second voltage converter (122), the cathode of the rectifier diode (D5) being coupled to the output of the first voltage converter (112);
the rectifier diode (D5) is in a reverse cut-off state during an input voltage abnormality, so that the connection between the output terminal of the first voltage converter (112) and the output terminal of the second voltage converter (122) is broken.
5. The power converter of claim 4, the output control unit (130) further comprising a relay switch (RE1) in parallel with the rectifier diode (D5), the relay switch (RE1) being configured to be in a conducting state during normal operation of the power converter so as to bypass the rectifier diode (D5).
6. The power converter of claim 5, further comprising a current limiting element (R3) coupled between the second energy storage element (C2) and a ground terminal of the power converter.
7. The power converter of claim 6, the relay switch (RE1) further configured to be in a conducting state during normal operation of the power converter so as to bypass the current limiting element (R3).
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