CN111988060A - RFID control circuit of vertical emergency exit - Google Patents
RFID control circuit of vertical emergency exit Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
- H04B5/40—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
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Abstract
The invention discloses an RFID control circuit of a vertical safety door, which belongs to the technical field of communication and comprises a transmitting antenna AIN1, a power amplifier, a band-pass filter, a variable gain amplifier, a modulator, an FPGA controller, an ARM controller, a radio frequency switch, a local oscillator unit, a secondary filter, a mixer, a primary filter, an amplifier and a receiving antenna AIN2, and solves the technical problem of local oscillator signal change of an RFID transmitting and receiving circuit.
Description
Technical Field
The invention belongs to the technical field of communication, and relates to an RFID control circuit of a vertical safety door.
Background
RFID, namely, radio frequency identification, commonly called electronic tag, the RFID is divided into Low Frequency (LF), High Frequency (HF), Ultra High Frequency (UHF), Microwave (MW) according to the difference of frequency, and the corresponding representative frequencies are respectively: low frequency below 135KHz, high frequency 13.56MHz, ultrahigh frequency 860M-960 MHz, microwave 2.4G, 5.8G.
At present, the RFID-based vertical safety door is widely applied, and the traditional RFID-based vertical safety door has the following defects:
1. in the transmitting channel, a frequency mixer is adopted to mix the base frequency signal and the local oscillation signal, so that the cost is high;
2. the local oscillator signal is only one, and the frequency cannot be changed.
Disclosure of Invention
The invention aims to provide an RFID control circuit of a vertical safety door, which solves the technical problem of local oscillation signal change of an RFID transmitting and receiving circuit.
In order to achieve the purpose, the invention adopts the following technical scheme:
an RFID control circuit of a vertical safety door comprises a transmitting antenna AIN1, a power amplifier, a band-pass filter, a variable gain amplifier, a modulator, an FPGA controller, an ARM controller, a radio frequency switch, a local oscillator unit, a secondary filter, a mixer, a primary filter, an amplifier and a receiving antenna AIN 2;
the transmitting antenna AIN1 is connected with a power amplifier, the power amplifier is connected with a band-pass filter, the band-pass filter is connected with a variable gain amplifier, the variable gain amplifier is connected with a modulator, the base frequency signal input end of the modulator is connected with two IO ports of an FPGA controller, and the local oscillation signal input end of the modulator is connected with the output end of a radio frequency switch;
the f1 local oscillation signal and the f2 local oscillation signal output by the local oscillation unit are respectively connected with two input ends of the radio frequency switch, and the f1 local oscillation signal and the f2 local oscillation signal output by the local oscillation unit are also respectively connected with two local oscillation signal input ends of the frequency mixer;
the receiving antenna AIN2 is connected with an amplifier, the amplifier is connected with a primary filter, the primary filter outputs an RFin signal and transmits the RFin signal to an RF signal input end of a frequency mixer, a local oscillation signal selection end of the frequency mixer is connected with an IO port of an FPGA controller, an output end of the frequency mixer is connected with a secondary filter, the secondary filter is connected with an AD interface of the FPGA controller, and the AD interface is used for collecting the RFID signal;
the FPGA controller is communicated with the ARM controller through a serial port;
the ARM controller is used for decoding the RFID signal.
Preferably, the model of the power amplifier is an RF2173 radio frequency chip, and the model of the variable gain amplifier and the model of the amplifier are both ADL 5240.
Preferably, the modulator includes a radio frequency switch IC1, a resistor R3, a capacitor C2, a capacitor C1, a capacitor C3, and a capacitor C4, where pins 1 and 2 of the radio frequency switch IC1 are respectively connected to two IO ports of the FPGA controller, and the two IO ports are used to output baseband signals;
the pin 4 of the radio frequency switch IC1 is connected with a positive power supply, and the capacitor C3 is a filter capacitor on the pin 4 of the radio frequency switch IC 1;
an 8 pin of the radio frequency switch IC1 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is a local oscillation signal input end of the modulator;
pins 7 and 6 of the radio frequency switch IC1 are both connected with a ground wire;
the pin 5 of the radio frequency switch IC1 is connected to ground through a capacitor C2 and a resistor R3 connected in series.
Preferably, the radio frequency switch includes an electronic switch IC3, a resistor R1 and a resistor R2, a pin 1 of the electronic switch IC3 is connected to the f1 local oscillator signal, a pin 2 is connected to a ground, a pin 3 is connected to the f2 local oscillator signal, a pin 4 is connected to an IO port of the FPGA controller, a pin 5 of the electronic switch IC3 is an output end of the radio frequency switch, and a pin 5 of the electronic switch IC3 is connected to a pin 8 of the radio frequency switch IC1 through the capacitor C1;
a pin 6 of the electronic switch IC3 is connected with one IO port of the FPGA controller;
the resistor R2 and the resistor R1 are pull-up resistors on the 4-pin and 6-pin of the electronic switch IC3, respectively.
Preferably, the local oscillation unit includes a first local oscillation generator and a second local oscillation generator, the first local oscillation generator is formed by the PLL400-836 and its peripheral circuit, the second local oscillation generator is formed by the PLL400-926 and its peripheral circuit, the first local oscillation generator generates the f1 local oscillation signal, and the second local oscillation generator generates the f2 local oscillation signal.
Preferably, the mixer includes a mixing chip IC3, a capacitor C12, a capacitor C11, a capacitor C13, a resistor R12, a resistor R13, a capacitor C16, a capacitor C15, a capacitor C14, a capacitor C7, a resistor R5, a resistor R4, an inductor L1, an inductor L2, a capacitor C5, a capacitor C8, and a transformer T1, wherein a pin 1 of the mixing chip IC3 is connected to the RFin signal through the capacitor C12, and a pin 1 of the mixing chip IC3 is an RF signal input terminal of the mixer;
the pin 2 of the mixing chip IC3 is connected with the ground wire through a capacitor C11 and a capacitor C13 which are connected in parallel;
a pin 3 of the mixing chip IC3 is connected with a ground wire, a pin 4 is connected with the ground wire through a resistor R12, a pin 5 is connected with the ground wire, a pin 6 is connected with a positive power supply, a pin 7 is connected with the ground wire, a pin 8 is connected with an IO port of the FPGA controller, and the resistor R13 is a pull-up resistor on the pin 8 of the mixing chip IC 3;
a pin 9 of the mixing chip IC3 is connected with a ground wire, a pin 10 is connected with a positive power supply, and the capacitor C16 is a filter capacitor of the pin 10 of the mixing chip IC 3;
the 11 pin of the mixing chip IC3 is connected with the f2 local oscillation signal through a capacitor C15, and the 15 pin is connected with the f1 local oscillation signal;
pin 18 of the mixing chip IC3 is connected to one end of the primary of the transformer T1 through the capacitor C7, and pin 19 is connected to the other end of the primary of the transformer T1;
one end of the inductor L2 is connected with the pin 18 of the mixing chip IC3, the other end of the inductor L2 is connected with the pin 19 of the mixing chip IC3 through the inductor L1, one end of the resistor R5 is connected with the pin 18 of the mixing chip IC3, the other end of the resistor R5 is connected with the pin 19 of the mixing chip IC3 through the resistor R4, a connection node of the resistor R4 and the resistor R5 is further connected with a positive power supply, a connection node of the inductor L1 and the inductor L2 is further connected with the positive power supply, and a connection node of the inductor L1 and the inductor L2 is further connected with;
the center tap of the primary of the transformer T1 is connected with the ground wire through a capacitor C8;
the secondary filter comprises an amplifier IC4, an amplifier IC5, a resistor R6, a resistor R8, a capacitor C9, a resistor R7, a resistor R9, a resistor R10, a resistor R11 and a capacitor C10, one end of the secondary side of the transformer T1 is connected with a ground wire, the other end of the secondary side of the transformer T1 is connected with the negative input end of the amplifier IC4 through a resistor R6, the positive input end of the amplifier IC4 is connected with the output end of the amplifier IC5 through a resistor R7, the negative input end and the output end of the amplifier IC5 are connected with the capacitor C5, the resistor R5 is connected with the capacitor C5 in parallel, the output end of the amplifier IC5 is connected with the negative input end and the positive input end of the amplifier IC5 through a resistor R5 and a resistor R5, the capacitor C5 is connected between the negative input end and the output;
the output end of the amplifier IC4 is connected with an AD interface of the FPGA controller;
preferably, the modulator is in a model of HMC174MS8, and the radio frequency switch is in a model of Ckff 2179mm 26.
The RFID control circuit of the vertical safety door solves the technical problem of local oscillation signal change of the RFID transmitting and receiving circuit, is provided with two local oscillation sources with different frequencies, can be controlled by the FPGA to change the frequency, is simple to operate, has a simple circuit structure and low cost, can change the Q value according to requirements by adopting a secondary filter circuit, and can be well matched with the acquisition of RFID signals.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
FIG. 2 is a circuit diagram of a modulator and radio frequency switch of the present invention;
fig. 3 is a circuit diagram of the inventive mixer.
Detailed Description
The RFID control circuit of a vertical security gate as shown in fig. 1-3 includes a transmitting antenna AIN1, a power amplifier, a band pass filter, a variable gain amplifier, a modulator, an FPGA controller, an ARM controller, a radio frequency switch, a local oscillator unit, a secondary filter, a mixer, a primary filter, an amplifier, and a receiving antenna AIN 2;
the transmitting antenna AIN1 is connected with a power amplifier, the power amplifier is connected with a band-pass filter, the band-pass filter is connected with a variable gain amplifier, the variable gain amplifier is connected with a modulator, the base frequency signal input end of the modulator is connected with two IO ports of an FPGA controller, and the local oscillation signal input end of the modulator is connected with the output end of a radio frequency switch;
the f1 local oscillation signal and the f2 local oscillation signal output by the local oscillation unit are respectively connected with two input ends of the radio frequency switch, and the f1 local oscillation signal and the f2 local oscillation signal output by the local oscillation unit are also respectively connected with two local oscillation signal input ends of the frequency mixer;
the receiving antenna AIN2 is connected with an amplifier, the amplifier is connected with a primary filter, the primary filter outputs an RFin signal and transmits the RFin signal to an RF signal input end of a frequency mixer, a local oscillation signal selection end of the frequency mixer is connected with an IO port of an FPGA controller, an output end of the frequency mixer is connected with a secondary filter, the secondary filter is connected with an AD interface of the FPGA controller, and the AD interface is used for collecting the RFID signal;
the FPGA controller is communicated with the ARM controller through a serial port;
the ARM controller is used for decoding the RFID signal.
The FPGA controller outputs base frequency signals through a pair of IO ports, namely the port A and the port B in figure 1, the port A and the port B are both IO ports, the base frequency signals are loaded on a modulator, the modulator is also loaded with local oscillation signals generated by a local oscillation unit, the FPGA controller selects f1 local oscillation signals or f2 local oscillation signals generated by the local oscillation unit by controlling a radio frequency switch, the f1 local oscillation signals or f2 local oscillation signals are alternatively loaded on the modulator, the modulator mixes the local oscillation signals and the base frequency signals and then outputs the mixed signals to a variable gain amplifier for amplification, then the amplified signals are filtered through a band-pass filter, finally the amplified signals are transmitted from a transmitting antenna AIN1 after being amplified through a power amplifier, when an RFID tag receives the signals transmitted by the transmitting antenna AIN1, the RFID tag returns an RFID signal, the signal is received by a receiving antenna AIN2 and is amplified through an amplifier and a first-stage filter, and the signals output by the primary filter, such as the RFin signals in the figure 1, are mixed by the mixer with f1 local oscillator signals or f2 local oscillator signals generated by a local oscillator unit, then the mixed signals are filtered by a secondary filter circuit, and then the filtered signals are sent to an AD interface of the FPGA for collection, and the signals are sent to an ARM controller for decoding after being analyzed by the FPGA.
Preferably, the model of the power amplifier is an RF2173 radio frequency chip, and the model of the variable gain amplifier and the model of the amplifier are both ADL 5240.
The invention adopts ADL5240, and the FPGA controller can control the gain thereof through the SPI interface and change the amplification output thereof.
Preferably, the modulator includes a radio frequency switch IC1, a resistor R3, a capacitor C2, a capacitor C1, a capacitor C3, and a capacitor C4, where pins 1 and 2 of the radio frequency switch IC1 are respectively connected to two IO ports of the FPGA controller, and the two IO ports are used to output baseband signals;
the pin 4 of the radio frequency switch IC1 is connected with a positive power supply, and the capacitor C3 is a filter capacitor on the pin 4 of the radio frequency switch IC 1;
an 8 pin of the radio frequency switch IC1 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is a local oscillation signal input end of the modulator;
pins 7 and 6 of the radio frequency switch IC1 are both connected with a ground wire;
the pin 5 of the radio frequency switch IC1 is connected to ground through a capacitor C2 and a resistor R3 connected in series.
Preferably, the radio frequency switch includes an electronic switch IC3, a resistor R1 and a resistor R2, a pin 1 of the electronic switch IC3 is connected to the f1 local oscillator signal, a pin 2 is connected to a ground, a pin 3 is connected to the f2 local oscillator signal, a pin 4 is connected to an IO port of the FPGA controller, a pin 5 of the electronic switch IC3 is an output end of the radio frequency switch, and a pin 5 of the electronic switch IC3 is connected to a pin 8 of the radio frequency switch IC1 through the capacitor C1;
a pin 6 of the electronic switch IC3 is connected with one IO port of the FPGA controller;
the resistor R2 and the resistor R1 are pull-up resistors on the 4-pin and 6-pin of the electronic switch IC3, respectively.
Preferably, the local oscillation unit includes a first local oscillation generator and a second local oscillation generator, the first local oscillation generator is formed by the PLL400-836 and its peripheral circuit, the second local oscillation generator is formed by the PLL400-926 and its peripheral circuit, the first local oscillation generator generates the f1 local oscillation signal, and the second local oscillation generator generates the f2 local oscillation signal.
According to the invention, the local oscillator unit is composed of two local oscillator signal generators, a PLL400-836 generates an f1 local oscillator signal of 864MHz, a PLL400-926 generates an f2 local oscillator signal of 926MHz, one of the two is selected through an electronic switch IC3, the electronic switch IC3 is a Ckrf2179mm26 single-pole double-throw radio frequency switch, pins 1 and 3 of the electronic switch IC are input ends, pins 5 are output ends, and pins 6 and 4 of the electronic switch IC are respectively used for selecting 1 pin to 5 pin conduction or 3 pin to 5 pin conduction.
After the FPGA selects one local oscillation signal by controlling a pin 6 and a pin 4 of an electronic switch IC3, the local oscillation signal is mixed by a radio frequency switch IC1, the radio frequency switch IC1 is an HMC174MS8 radio frequency switch which consists of two channels, such as RF1 to RFC and RF2 to RFC, as shown in figure 2, in the embodiment, RF2 is selected as a signal transmission channel, and the RF1 channel is connected to the ground wire;
the on-off control of the radio frequency switch IC1 is realized through an A port and a B port of the FPGA, because the FPGA controller controls the output levels of the A port and the B port by using the coded baseband signals, the on-off of the radio frequency switch IC1 corresponds to the changes of 1 and 0 of the baseband signals, thereby realizing frequency mixing.
The invention adopts the radio frequency switch IC1 to replace the traditional mixer, thereby reducing the cost.
Preferably, the mixer includes a mixing chip IC3, a capacitor C12, a capacitor C11, a capacitor C13, a resistor R12, a resistor R13, a capacitor C16, a capacitor C15, a capacitor C14, a capacitor C7, a resistor R5, a resistor R4, an inductor L1, an inductor L2, a capacitor C5, a capacitor C8, and a transformer T1, wherein a pin 1 of the mixing chip IC3 is connected to the RFin signal through the capacitor C12, and a pin 1 of the mixing chip IC3 is an RF signal input terminal of the mixer;
the pin 2 of the mixing chip IC3 is connected with the ground wire through a capacitor C11 and a capacitor C13 which are connected in parallel;
a pin 3 of the mixing chip IC3 is connected with a ground wire, a pin 4 is connected with the ground wire through a resistor R12, a pin 5 is connected with the ground wire, a pin 6 is connected with a positive power supply, a pin 7 is connected with the ground wire, a pin 8 is connected with an IO port of the FPGA controller, and the resistor R13 is a pull-up resistor on the pin 8 of the mixing chip IC 3;
a pin 9 of the mixing chip IC3 is connected with a ground wire, a pin 10 is connected with a positive power supply, and the capacitor C16 is a filter capacitor of the pin 10 of the mixing chip IC 3;
the 11 pin of the mixing chip IC3 is connected with the f2 local oscillation signal through a capacitor C15, and the 15 pin is connected with the f1 local oscillation signal;
pins 12, 13, 14, 16 and 17 of the mixing chip IC3 are all connected with the ground wire;
pin 18 of the mixing chip IC3 is connected to one end of the primary of the transformer T1 through the capacitor C7, and pin 19 is connected to the other end of the primary of the transformer T1;
one end of the inductor L2 is connected with the pin 18 of the mixing chip IC3, the other end of the inductor L2 is connected with the pin 19 of the mixing chip IC3 through the inductor L1, one end of the resistor R5 is connected with the pin 18 of the mixing chip IC3, the other end of the resistor R5 is connected with the pin 19 of the mixing chip IC3 through the resistor R4, a connection node of the resistor R4 and the resistor R5 is further connected with a positive power supply, a connection node of the inductor L1 and the inductor L2 is further connected with the positive power supply, and a connection node of the inductor L1 and the inductor L2 is further connected with;
the center tap of the primary of the transformer T1 is connected with the ground wire through a capacitor C8;
the secondary filter comprises an amplifier IC4, an amplifier IC5, a resistor R6, a resistor R8, a capacitor C9, a resistor R7, a resistor R9, a resistor R10, a resistor R11 and a capacitor C10, one end of the secondary side of the transformer T1 is connected with a ground wire, the other end of the secondary side of the transformer T1 is connected with the negative input end of the amplifier IC4 through a resistor R6, the positive input end of the amplifier IC4 is connected with the output end of the amplifier IC5 through a resistor R7, the negative input end and the output end of the amplifier IC5 are connected with the capacitor C5, the resistor R5 is connected with the capacitor C5 in parallel, the output end of the amplifier IC5 is connected with the negative input end and the positive input end of the amplifier IC5 through a resistor R5 and a resistor R5, the capacitor C5 is connected between the negative input end and the output;
the output end of the amplifier IC4 is connected with an AD interface of the FPGA controller;
in this embodiment, the FPGA controls the 8 pins of the mixing chip IC3 through one IO port, the 8 pins of the mixing chip IC3 are local oscillation source signal selection control terminals, and the f1 local oscillation signal input to the 15 pins or the f2 local oscillation signal input to the 11 pins is selected by controlling the 8 pins of the mixing chip IC3, so that the local oscillation signal is replaced.
The invention adopts the amplifier IC4 and the amplifier IC5 to form a filter with variable Q value, and the Q value can be increased or decreased by adjusting the resistor R11 or the resistor R8, so that the filter can better filter the signal output by the frequency mixing chip IC 3.
In this embodiment, the amplifier IC4 and the amplifier IC5 are both MC3401 in type.
Preferably, the modulator is in a model of HMC174MS8, and the radio frequency switch is in a model of Ckff 2179mm 26.
The RFID control circuit of the vertical safety door solves the technical problem of local oscillation signal change of the RFID transmitting and receiving circuit, is provided with two local oscillation sources with different frequencies, can be controlled by the FPGA to change the frequency, is simple to operate, has a simple circuit structure and low cost, can change the Q value according to requirements by adopting a secondary filter circuit, and can be well matched with the acquisition of RFID signals.
Claims (7)
1. The utility model provides a RFID control circuit of vertical emergency exit which characterized in that: the device comprises a transmitting antenna AIN1, a power amplifier, a band-pass filter, a variable gain amplifier, a modulator, an FPGA controller, an ARM controller, a radio frequency switch, a local oscillator unit, a secondary filter, a frequency mixer, a primary filter, an amplifier and a receiving antenna AIN 2;
the transmitting antenna AIN1 is connected with a power amplifier, the power amplifier is connected with a band-pass filter, the band-pass filter is connected with a variable gain amplifier, the variable gain amplifier is connected with a modulator, the base frequency signal input end of the modulator is connected with two IO ports of an FPGA controller, and the local oscillation signal input end of the modulator is connected with the output end of a radio frequency switch;
the f1 local oscillation signal and the f2 local oscillation signal output by the local oscillation unit are respectively connected with two input ends of the radio frequency switch, and the f1 local oscillation signal and the f2 local oscillation signal output by the local oscillation unit are also respectively connected with two local oscillation signal input ends of the frequency mixer;
the receiving antenna AIN2 is connected with an amplifier, the amplifier is connected with a primary filter, the primary filter outputs an RFin signal and transmits the RFin signal to an RF signal input end of a frequency mixer, a local oscillation signal selection end of the frequency mixer is connected with an IO port of an FPGA controller, an output end of the frequency mixer is connected with a secondary filter, the secondary filter is connected with an AD interface of the FPGA controller, and the AD interface is used for collecting the RFID signal;
the FPGA controller is communicated with the ARM controller through a serial port;
the ARM controller is used for decoding the RFID signal.
2. The RFID control circuit of a vertical security door according to claim 1, wherein: the model of the power amplifier is an RF2173 radio frequency chip, and the model of the variable gain amplifier and the model of the amplifier are ADL 5240.
3. The RFID control circuit of a vertical security door according to claim 1, wherein: the modulator comprises a radio frequency switch IC1, a resistor R3, a capacitor C2, a capacitor C1, a capacitor C3 and a capacitor C4, wherein a pin 1 and a pin 2 of the radio frequency switch IC1 are respectively connected with two IO ports of the FPGA controller, and the two IO ports are used for outputting fundamental frequency signals;
pin 3 of the radio frequency switch IC1 outputs an RF signal through capacitor C4, which is fed to the input of the variable gain amplifier;
the pin 4 of the radio frequency switch IC1 is connected with a positive power supply, and the capacitor C3 is a filter capacitor on the pin 4 of the radio frequency switch IC 1;
an 8 pin of the radio frequency switch IC1 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is a local oscillation signal input end of the modulator;
pins 7 and 6 of the radio frequency switch IC1 are both connected with a ground wire;
the pin 5 of the radio frequency switch IC1 is connected to ground through a capacitor C2 and a resistor R3 connected in series.
4. The RFID control circuit of a vertical security door according to claim 3, wherein: the radio frequency switch comprises an electronic switch IC3, a resistor R1 and a resistor R2, wherein a pin 1 of the electronic switch IC3 is connected with the f1 local oscillation signal, a pin 2 is connected with a ground wire, a pin 3 is connected with the f2 local oscillation signal, a pin 4 is connected with an IO port of the FPGA controller, a pin 5 of the electronic switch IC3 is an output end of the radio frequency switch, and a pin 5 of the electronic switch IC3 is connected with a pin 8 of the radio frequency switch IC1 through a capacitor C1;
a pin 6 of the electronic switch IC3 is connected with one IO port of the FPGA controller;
the resistor R2 and the resistor R1 are pull-up resistors on the 4-pin and 6-pin of the electronic switch IC3, respectively.
5. The RFID control circuit of a vertical security door according to claim 4, wherein: the local oscillation unit comprises a first local oscillation signal generator and a second local oscillation signal generator, wherein the first local oscillation signal generator is composed of PLL400-836 and peripheral circuits thereof, the second local oscillation signal generator is composed of PLL400-926 and peripheral circuits thereof, the first local oscillation signal generator generates the f1 local oscillation signal, and the second local oscillation signal generator generates the f2 local oscillation signal.
6. The RFID control circuit of a vertical security door according to claim 5, wherein: the mixer comprises a mixing chip IC3, a capacitor C12, a capacitor C11, a capacitor C13, a resistor R12, a resistor R13, a capacitor C16, a capacitor C15, a capacitor C14, a capacitor C7, a resistor R5, a resistor R4, an inductor L1, an inductor L2, a capacitor C5, a capacitor C8 and a transformer T1, wherein a pin 1 of the mixing chip IC3 is connected with the RFin signal through a capacitor C12, and a pin 1 of the mixing chip IC3 is an RF signal input end of the mixer;
the pin 2 of the mixing chip IC3 is connected with the ground wire through a capacitor C11 and a capacitor C13 which are connected in parallel;
a pin 3 of the mixing chip IC3 is connected with a ground wire, a pin 4 is connected with the ground wire through a resistor R12, a pin 5 is connected with the ground wire, a pin 6 is connected with a positive power supply, a pin 7 is connected with the ground wire, a pin 8 is connected with an IO port of the FPGA controller, and the resistor R13 is a pull-up resistor on the pin 8 of the mixing chip IC 3;
a pin 9 of the mixing chip IC3 is connected with a ground wire, a pin 10 is connected with a positive power supply, and the capacitor C16 is a filter capacitor of the pin 10 of the mixing chip IC 3;
the 11 pin of the mixing chip IC3 is connected with the f2 local oscillation signal through a capacitor C15, and the 15 pin is connected with the f1 local oscillation signal;
pins 12, 13, 14, 16 and 17 of the mixing chip IC3 are all connected with the ground wire;
pin 18 of the mixing chip IC3 is connected to one end of the primary of the transformer T1 through the capacitor C7, and pin 19 is connected to the other end of the primary of the transformer T1;
one end of the inductor L2 is connected with the pin 18 of the mixing chip IC3, the other end of the inductor L2 is connected with the pin 19 of the mixing chip IC3 through the inductor L1, one end of the resistor R5 is connected with the pin 18 of the mixing chip IC3, the other end of the resistor R5 is connected with the pin 19 of the mixing chip IC3 through the resistor R4, a connection node of the resistor R4 and the resistor R5 is further connected with a positive power supply, a connection node of the inductor L1 and the inductor L2 is further connected with the positive power supply, and a connection node of the inductor L1 and the inductor L2 is further connected with;
the center tap of the primary of the transformer T1 is connected with the ground wire through a capacitor C8;
the secondary filter comprises an amplifier IC4, an amplifier IC5, a resistor R6, a resistor R8, a capacitor C9, a resistor R7, a resistor R9, a resistor R10, a resistor R11 and a capacitor C10, one end of the secondary side of the transformer T1 is connected with a ground wire, the other end of the secondary side of the transformer T1 is connected with the negative input end of the amplifier IC4 through a resistor R6, the positive input end of the amplifier IC4 is connected with the output end of the amplifier IC5 through a resistor R7, the negative input end and the output end of the amplifier IC5 are connected with the capacitor C5, the resistor R5 is connected with the capacitor C5 in parallel, the output end of the amplifier IC5 is connected with the negative input end and the positive input end of the amplifier IC5 through a resistor R5 and a resistor R5, the capacitor C5 is connected between the negative input end and the output;
the output of the amplifier IC4 is connected to an AD interface of the FPGA controller.
7. The RFID control circuit of a vertical security door according to claim 6, wherein: the modulator is in a model of HMC174MS8, and the radio frequency switch is in a model of Ckff 2179mm 26.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010832407.6A CN111988060B (en) | 2020-08-18 | 2020-08-18 | RFID control circuit of vertical emergency exit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010832407.6A CN111988060B (en) | 2020-08-18 | 2020-08-18 | RFID control circuit of vertical emergency exit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111988060A true CN111988060A (en) | 2020-11-24 |
| CN111988060B CN111988060B (en) | 2022-03-18 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102013028A (en) * | 2010-12-16 | 2011-04-13 | 上海龙晶微电子有限公司 | Ultrahigh frequency radio frequency identification reader-writer |
| CN107437969A (en) * | 2016-05-25 | 2017-12-05 | 南京威翔科技有限公司 | A kind of LNA frequency detection means |
| CN207473629U (en) * | 2017-10-13 | 2018-06-08 | 深圳市华士精成科技有限公司 | A kind of ultrahigh frequency radio frequency identification (RFID) reader radiating circuit |
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2020
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102013028A (en) * | 2010-12-16 | 2011-04-13 | 上海龙晶微电子有限公司 | Ultrahigh frequency radio frequency identification reader-writer |
| CN107437969A (en) * | 2016-05-25 | 2017-12-05 | 南京威翔科技有限公司 | A kind of LNA frequency detection means |
| CN207473629U (en) * | 2017-10-13 | 2018-06-08 | 深圳市华士精成科技有限公司 | A kind of ultrahigh frequency radio frequency identification (RFID) reader radiating circuit |
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