CN111986989B - Semiconductor structure and forming method thereof - Google Patents

Semiconductor structure and forming method thereof Download PDF

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Publication number
CN111986989B
CN111986989B CN201910435461.4A CN201910435461A CN111986989B CN 111986989 B CN111986989 B CN 111986989B CN 201910435461 A CN201910435461 A CN 201910435461A CN 111986989 B CN111986989 B CN 111986989B
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layer
sacrificial
opening
forming
mask layer
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CN111986989A (en
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刘继全
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Inorganic Chemistry (AREA)
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Abstract

A semiconductor structure and a method of forming the same, the method comprising: forming a first opening in the mask layer, wherein the first opening penetrates through the mask layer on the first region along a first direction, and the first opening exposes the surfaces of the first region of the plurality of layers to be etched; forming a sacrificial layer on the surface of the mask layer in the second region respectively, wherein a second opening is formed in the sacrificial layer, and the second opening penetrates through the sacrificial layer along the first direction; forming an initial sacrificial film in the first opening, the second opening, the side wall and the top surface of the sacrificial layer and the surface of the mask layer of the first region, wherein the first opening and the second opening are filled with the initial sacrificial film; and etching the initial sacrificial film until the top surface of the sacrificial layer and the surface of the mask layer are exposed, forming a first segmentation section in the first opening, forming a second initial segmentation section in the second opening, and forming a sacrificial side wall on the surface of the side wall of the sacrificial layer. The semiconductor structure formed by the method has better performance.

Description

Semiconductor structure and forming method thereof
Technical Field
The present disclosure relates to semiconductor manufacturing technology, and more particularly, to a semiconductor structure and a method for forming the same.
Background
In the process of semiconductor device fabrication, a lithographic process is typically used to transfer a pattern from a reticle to a substrate. The photolithography process includes: providing a substrate; forming a photoresist on a substrate; exposing and developing the photoresist to form patterned photoresist, so that the pattern on the mask plate is transferred into the photoresist; etching the substrate by taking the patterned photoresist as a mask, so that the pattern on the photoresist is transferred into the substrate; the photoresist is removed.
With the continued scaling of semiconductor device dimensions, lithographic critical dimensions are approaching and even exceeding the physical limits of lithography, thereby presenting more serious challenges to the lithography technology. The basic idea of self-aligned double patterning technology is to form the final target pattern by two patterning to overcome the lithographic limit that single patterning cannot break through.
However, the performance of existing semiconductor structures is poor.
Disclosure of Invention
The invention provides a semiconductor structure and a forming method thereof, which aims to improve the performance of the formed semiconductor structure.
In order to solve the above technical problems, the present invention provides a method for forming a semiconductor structure, including: providing a layer to be etched, wherein the layer to be etched comprises an interconnection zone, the interconnection zone comprises a plurality of first zones and a plurality of second zones, the first zones and the second zones are alternately arranged along a first direction, the adjacent first zones and second zones are adjacent, and a mask layer is arranged on the surface of the interconnection zone of the layer to be etched; forming a first opening in the mask layer, wherein the first opening penetrates through the mask layer on the first region along a first direction, and the first opening exposes the surfaces of the first region of the plurality of layers to be etched; forming a sacrificial layer on the surface of the mask layer on the second region respectively, wherein a second opening is formed in the sacrificial layer, and the second opening penetrates through the sacrificial layer along the first direction; forming an initial sacrificial film in the first opening, the second opening, the side wall and the top surface of the sacrificial layer and the surface of the mask layer of the first region, wherein the first opening and the second opening are filled with the initial sacrificial film; etching the initial sacrificial film until the top surface of the sacrificial layer and the surface of the mask layer are exposed, forming a first segmentation section in the first opening, forming a second initial segmentation section in the second opening, and forming a sacrificial side wall on the surface of the side wall of the sacrificial layer; after the first segmentation section, the second initial segmentation section and the sacrificial side wall are formed, removing the sacrificial layer; after the sacrificial layer is removed, the second initial segmentation section and the sacrificial side wall are used as masks to etch the mask layer, a first groove located in the first area is formed in the mask layer, the first groove exposes the first segmentation section and is respectively located at two sides of the first segmentation section along the second direction, a second groove and a second segmentation section located in the second area are formed in the mask layer, the second groove is respectively located at two sides of the second segmentation section along the second direction, the second segmentation section is formed by etching the mask layer through the second initial segmentation section, and the second direction is perpendicular to the first direction.
Optionally, after forming the first opening in the mask layer, a sacrificial layer and a second opening in the sacrificial layer are formed.
Optionally, the first openings also expose the surfaces of the second areas of the layers to be etched; the first opening forming method comprises the following steps: forming a first graphical layer on the surface of the mask layer, wherein the first graphical layer exposes part of the mask layer surfaces of the first region and the second region; and etching the mask layer by taking the first patterned layer as a mask, and forming the first opening in the mask layer.
Optionally, the sacrificial layer also fills the second region first opening; the forming method of the sacrificial layer and the second opening in the sacrificial layer comprises the following steps: forming a sacrificial material film in the first opening and on the surface of the mask layer, wherein the first opening is filled with the sacrificial material film; forming a second patterning layer on the surface of the sacrificial material film, wherein the second patterning layer exposes the surfaces of the sacrificial material films of the first areas and part of the surfaces of the sacrificial material films of the second areas; and etching the sacrificial material film by taking the second patterned layer as a mask until the surface of the mask layer and the bottom surface of the first opening in the first region are exposed, so as to form the sacrificial layer and a second opening in the sacrificial layer.
Optionally, before forming the first opening in the mask layer, a sacrificial layer and a second opening in the sacrificial layer are formed.
Optionally, the forming method of the sacrificial layer and the second opening in the sacrificial layer includes: forming a sacrificial material film on the surface of the mask layer; forming a third patterning layer on the surface of the sacrificial material film, wherein the third patterning layer exposes the surfaces of the sacrificial material films of the first areas and part of the surfaces of the sacrificial material films of the second areas; and etching the sacrificial material film by taking the third graphical layer as a mask until the surface of the mask layer is exposed, so as to form the sacrificial layer and a second opening in the sacrificial layer.
Optionally, the forming method of the first opening includes: forming a barrier layer in the second opening, on the surface of the mask layer and on the surface of the sacrificial layer; forming a fourth graphical layer on the surface of the barrier layer, wherein the fourth graphical layer exposes part of the surface of the barrier layer in the first area; and etching the barrier layer and the mask layer by taking the fourth patterned layer as a mask until the surface of the layer to be etched is exposed, and forming the first opening in the first area of the mask layer.
Optionally, in the process of etching the barrier layer and the mask layer, the barrier layer and the mask layer have a first etching rate, the sacrificial layer has a second etching rate, and the first etching rate is greater than the second etching rate.
Optionally, the material of the mask layer includes: silicon oxide, silicon nitride, silicon carbide nitride, silicon boride nitride, silicon oxycarbide oxide, or silicon oxynitride.
Optionally, the material of the sacrificial layer includes: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, siCO, or SiCOH.
Optionally, the surface of the layer to be etched is further provided with a bottom hard mask layer, and the bottom hard mask layer is located between the layer to be etched and the mask layer.
Optionally, the material of the initial sacrificial film includes: silicon oxide, silicon nitride, silicon oxynitride or titanium dioxide.
Optionally, the process of forming the initial sacrificial film includes: atomic layer deposition; the technological parameters of atomic layer deposition include: the temperature is 150-350 ℃.
Optionally, the initial sacrificial film on the surface of the mask layer has a first height along a direction perpendicular to the surface of the layer to be etched.
Optionally, the first opening has a second height along a direction perpendicular to the surface of the layer to be etched, and the second height is greater than the first height.
Optionally, in the second direction, the first opening has a first width, and the first height is greater than twice the first width; the second opening has a second width, and the first height is greater than twice the second width.
Optionally, the method further comprises: after the first groove and the second groove are formed, the first segmentation section and the mask layer are used as masks to etch the layer to be etched at the bottom of the first groove, a first target groove is formed in the layer to be etched at the bottom of the first groove, the second segmentation section and the mask layer are used as masks to etch the layer to be etched at the bottom of the second groove, and a second target groove is formed in the layer to be etched at the bottom of the second groove; after the first target groove and the second target groove are formed, removing the first segmentation section, the second segmentation section and the mask layer; after the first segmentation section, the second segmentation section and the mask layer are removed, a first interconnection layer is formed in the first target groove; and forming a second interconnection layer in the second target groove.
Optionally, the layer to be etched further includes a peripheral region, and the peripheral region surrounds the interconnection region; the mask layer is also positioned on the surface of the peripheral area.
Correspondingly, the invention also provides a semiconductor structure formed by adopting the method.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
in the method for forming a semiconductor structure provided by the technical scheme of the invention, the material of the first segmentation section in the first opening is the same as the material of the initial sacrificial film. And the initial sacrificial film can be formed through a process with higher temperature, so that the initial sacrificial film has higher density and higher strength, namely, the first segmented section has higher density and higher strength, so that the first segmented section has higher stability in the subsequent etching process, the stability of pattern transfer is facilitated, and the performance of the formed semiconductor structure is better. Similarly, the material of the second initial segmentation section positioned in the second region is the same as that of the initial sacrificial film, and the material of the sacrificial side wall positioned on the side wall surface of the sacrificial layer is the same as that of the initial sacrificial film, so that the stability in the subsequent etching process is higher, the stability of pattern transfer is facilitated, and the performance of the formed semiconductor structure is better.
Further, the initial sacrificial film on the surface of the mask layer has a first height along the direction vertical to the surface of the layer to be etched; the first opening has a second height along a direction perpendicular to the surface of the layer to be etched. The second height is larger than the first height, so that the initial sacrificial film is ensured to be etched later, and the initial sacrificial film material with a certain height is still arranged in the first opening in the process of exposing the top surface of the sacrificial layer and the surface of the mask, so that the initial sacrificial film remained in the first opening forms the first segmentation section, and further, the performance of the formed semiconductor structure is better.
Drawings
FIGS. 1 through 11 are schematic cross-sectional views of steps of a semiconductor structure formation process;
fig. 12-27 are schematic cross-sectional views of steps in a semiconductor structure formation process in accordance with an embodiment of the present invention;
fig. 28-42 are schematic cross-sectional views of steps of a semiconductor structure formation process in accordance with another embodiment of the present invention.
Detailed Description
As described in the background, the prior art methods have poor performance of the semiconductor structures formed.
Fig. 1-11 are schematic cross-sectional views of steps of a semiconductor structure formation process.
Referring to fig. 1, a layer to be etched (not shown) is provided, the layer to be etched includes an interconnection area A0 and a peripheral area B0 surrounding the interconnection area A0, the interconnection area A0 includes a plurality of first areas a01 and a plurality of second areas a02, the first areas a01 and the second areas a02 are alternately arranged along a first direction X, adjacent first areas a01 and second areas a02 are adjacent, and a mask layer 110 is provided on surfaces of the interconnection area A0 and the peripheral area B0 of the layer to be etched.
Referring to fig. 2, a sacrificial layer 120 is formed on the surface of the second region A0 mask layer 110, and a first opening 121 is formed in the sacrificial layer, wherein the first opening 121 extends along a first direction X.
Referring to fig. 3 and 4, fig. 3 is a schematic diagram based on fig. 2, fig. 4 is a schematic cross-sectional view of fig. 3 along a tangential line M-N, a mask material layer 130 is formed on the bottom and sidewall surfaces of the first opening 121, the sidewall and top surfaces of the sacrificial layer 120, and the surface of the mask layer 110, and the mask material layer 130 fills the first opening 121 along a second direction Y, which is perpendicular to the first direction X.
Referring to fig. 5 and 6, fig. 5 is a schematic view based on fig. 3, fig. 6 is a schematic view based on fig. 4, a filling layer 140 is formed on the surface of the mask material layer 130, and the filling layer 140 is higher than or flush with the top surface of the mask material layer 130 on the surface of the sacrificial layer 120.
Referring to fig. 7 and 8, fig. 7 is a schematic view based on fig. 5, fig. 8 is a schematic view based on fig. 6, a second opening 142 is formed in the filling layer 140 by patterning, and a portion of the surface of the mask material layer 130 in the first region a01 is exposed at the bottom of the second opening 142.
Referring to fig. 9 to 11, fig. 9 is a schematic view based on fig. 7, fig. 10 is a schematic view of fig. 9 along a tangential line M-N, and fig. 11 is a schematic view of fig. 9 along a tangential line X-Y, a dividing material film (not shown) is formed in the second opening 142, on the surface of the filling layer 140 and on the surface of the mask material film 130, and fills the second opening 142; the split material film is planarized until the top surface of the sacrificial layer 120 and the top surface of the filling layer 140 are exposed, a first initial split segment 151 is formed in the first opening 121, a second initial split segment 152 is formed in the second opening 142, and a sacrificial sidewall 153 is formed on the sidewall surface of the sacrificial layer 120.
In the above method, a mask material layer 130 is formed in the first opening 121 and on the side wall and the top surface of the sacrificial layer 120, where the mask material layer 130 fills the first opening 121 for forming a first segment in the first opening 121, and the first initial segment 151 is located in the second area a02. After the mask material layer 130 is formed, a filling layer 140 is formed, and the filling layer 140 fills a space between the adjacent second region a02 sacrificial layers 120, i.e., is located on the first region a 01. Forming a second opening 142 in the filling layer 140 of the first region A1 by patterning the filling layer 140; after the second opening 142 is formed, a second initial segment 152 is formed in the second opening 142, that is, the second initial segment 152 is formed in the first region a 01. Subsequently, a first segment and a first groove are formed in a first area a01 of the mask layer 110 by using the first initial segment 151, the second initial segment 152 and the sacrificial sidewall 153 as masks, and the first segment isolates the first groove; a second segment, a second groove and a mask sidewall located on the sidewall of the second groove are formed in the second area a02 of the mask layer 110, the second segment isolates the second groove, and the mask sidewall isolates the adjacent first groove and second groove, so as to meet the process requirements.
The material of the filling layer 140 is typically an organic material containing carbon and oxygen, because the organic material containing carbon and oxygen has fluidity, which is beneficial to filling and forms a flat surface. However, the high temperature resistance of the organic material containing carbon and oxygen is poor, so that the temperature of the process is required not to be too high when the dividing material film is filled in the second opening 142 later. The material density of the subsequently formed second initial segment 152 is then lower, resulting in a lower strength of the second initial segment. And then, the first initial segment 151, the second initial segment 152, and the sacrificial sidewall 153 are used as masks, and in the process of etching the mask layer 110, the second initial segment 152 is easily damaged by etching, so that the pattern transfer is easy to cause problems, and the performance of the formed semiconductor structure is poor.
In order to solve the above technical problems, an embodiment of the present invention provides a method for forming a semiconductor structure, including: forming a first opening in the mask layer, wherein the first opening penetrates through the mask layer on the first region along a first direction, and the first opening exposes the surfaces of the first region of the plurality of layers to be etched; forming a sacrificial layer on the surface of the mask layer in the second region respectively, wherein a second opening is formed in the sacrificial layer, and the second opening penetrates through the sacrificial layer along the first direction; forming an initial sacrificial film in the first opening, the second opening, the side wall and the top surface of the sacrificial layer and the surface of the mask layer of the first region, wherein the first opening and the second opening are filled with the initial sacrificial film; and etching the initial sacrificial film until the top surface of the sacrificial layer and the surface of the mask layer are exposed, forming a first segmentation section in the first opening, forming a second initial segmentation section in the second opening, and forming a sacrificial side wall on the surface of the side wall of the sacrificial layer. The semiconductor structure formed by the method has better performance.
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 12-27 are schematic cross-sectional views illustrating steps of a method for forming a semiconductor structure according to an embodiment of the present invention.
Referring to fig. 12, a layer to be etched (not shown) is provided, the layer to be etched includes an interconnection area a, the interconnection area a includes a plurality of first areas A1 and a plurality of second areas A2, the first areas A1 and the second areas A2 are alternately arranged along a first direction X, adjacent first areas A1 and second areas A2 are adjacent, and a mask layer 210 is provided on a surface of the interconnection area a of the layer to be etched.
The first areas A1 are arranged along the first direction X, and the second areas A2 are arranged along the first direction X.
The first and second areas A1 and A2 are alternately arranged along the first direction X to refer to: there is only one second region between adjacent first regions A1, and there is only one first region between adjacent second regions.
In the present embodiment, two first areas A1 and three second areas A2 are taken as examples. In other embodiments, the number of first and second regions may be selected to have other values.
In other embodiments, the number of first regions and the number of second regions are equal.
The material of the layer to be etched 200 includes metal, silicon oxide or a low-K dielectric layer (K is less than or equal to 3.9).
In this embodiment, the material of the layer to be etched 200 is a low K dielectric layer.
The mask layer 210 comprises the following materials: silicon oxide, silicon nitride, silicon carbide nitride, silicon boride nitride, silicon oxycarbide oxide, or silicon oxynitride. In this embodiment, the material of the mask layer 210 is silicon oxide.
In this embodiment, the layer to be etched 200 further includes a peripheral region B, the peripheral region surrounds the interconnection region, and the mask layer 210 covers the entire interconnection region a and the entire peripheral region B.
And forming a first opening in the mask layer, wherein the first opening extends along a first direction, and the first opening exposes the first area surfaces of the layers to be etched.
In this embodiment, the first opening penetrates through the mask layer on the first region along the first direction, and the first opening exposes the first region surfaces of the plurality of layers to be etched, and the process of forming the first opening specifically refers to fig. 13 and 14.
Referring to fig. 13 and 14, fig. 13 is a schematic view based on fig. 12, and fig. 14 is a schematic cross-sectional view of fig. 13 along a tangential direction of M1-N1, wherein a first patterned layer (not shown) is formed on a surface of the mask layer 210, and the first patterned layer exposes a portion of the mask layer surface of the first area A1 and the second area A2; and etching the mask layer 210 by taking the first patterned layer as a mask until the surface of the layer to be etched is exposed, and forming the first opening 221 in the mask layer 210.
In this embodiment, before forming the first opening 221, the method further includes: an underlying hard mask layer 201 is formed on the surface of the layer to be etched 200, and the underlying hard mask layer 201 is located between the layer to be etched 200 and the mask layer 210.
The underlying hard mask layer 201 functions include: the underlying hard mask layer 201 acts as an etch stop layer; the bottom hard mask layer 201 is located on the surface of the layer to be etched, so that etching damage to the surface of the layer to be etched 200 can be avoided when a pattern is formed in the mask layer 210; the material of the bottom layer mask layer 201 is a hard mask material, so that when the first target groove and the second target groove are formed by subsequent etching, the etching loss of the bottom layer hard mask layer 201 is smaller, and the stability of pattern transfer is higher in the process of transferring the pattern in the bottom layer hard mask layer 201 to the layer to be etched 200. (FIG. 12 does not have 201)
In this embodiment, the materials of the bottom hard mask layer 201 and the mask layer 210 are different, and the material of the bottom hard mask layer 201 is titanium nitride.
In this embodiment, the mask layer 210 is etched until the surface of the underlying hard mask layer 201 on the surface of the layer 200 to be etched is exposed, and a first opening 221 is formed in the first area A1 and the second area A2 of the mask layer 210.
In other embodiments, the first openings expose only the first area surfaces of the layers to be etched.
The first opening 221 in the first region A1 is used for the subsequent filling material to form a first segment.
The first opening 221 has a second height h2 along a direction perpendicular to the surface of the layer 200 to be etched.
Referring to fig. 15 and 16, after the first openings 221 are formed, a sacrificial layer 230 is formed on the surface of the mask layer 210 in the second area A2, and the sacrificial layer 230 has a second opening 232 therein, and the second opening 232 penetrates through the sacrificial layer 230 along the first direction X.
In this embodiment, the sacrificial layer 230 also fills the first opening 221 in the second area A2.
In this embodiment, the method for forming the sacrificial layer 230 and the second opening 232 in the sacrificial layer 230 includes: forming a sacrificial material film (not shown) in the first opening 221 on the surface of the mask layer 210, wherein the sacrificial material film fills the first opening 221; forming a second patterned layer (not shown) on the sacrificial material film surface, the second patterned layer exposing the sacrificial material film surfaces of the first areas A1 and portions of the sacrificial material film surfaces of the second areas A2; the sacrificial material film is etched with the second patterned layer as a mask until the surface of the mask layer 210 and the bottom surface of the first opening 221 in the first region A1 are exposed, thereby forming the sacrificial layer 230 and the second opening 232 in the sacrificial layer 230.
The material of the sacrificial material film includes: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, siCO, or SiCOH. Accordingly, the materials of the sacrificial layer 230 formed include: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, siCO, or SiCOH.
In this embodiment, the material of the sacrificial material film is amorphous silicon, and thus the material of the sacrificial layer 230 is amorphous silicon.
The second opening 232 is located in the second area A2, and is used for filling material in the second opening to form a second initial segment.
Referring to fig. 17 to 19, after the first opening 221 and the second opening 232 are formed, an initial sacrificial film 240 is formed in the first opening 221 of the first area A1, in the second opening 232 of the second area A2, on the sidewall and top surface of the sacrificial layer 230, and on the surface of the mask layer 210, and the initial sacrificial film 240 fills the first opening 221 and the second opening 232.
The material of the initial sacrificial film 240 is different from the material of the sacrificial layer 230, and the material of the initial sacrificial film 240 is different from the material of the mask layer 210; the materials of the initial sacrificial film 240 include: silicon oxide, silicon nitride, silicon oxynitride or titanium dioxide. Correspondingly, the materials of the sacrificial side wall and the first segmented section and the second initial segmented section which are formed later comprise: silicon oxide, silicon nitride, silicon oxynitride or titanium dioxide.
In this embodiment, the material of the initial sacrificial film 240 is titanium dioxide.
The process of forming the initial sacrificial film 240 includes: a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.
In this embodiment, the process of forming the initial sacrificial film 240 is an atomic layer deposition process. The technological parameters of atomic layer deposition include: the temperature is 150-350 ℃.
The advantage of using an atomic layer deposition process to form the initial sacrificial film 240 is that: on the one hand, the thickness uniformity of the formed initial sacrificial film 240 is better, so that the top surface of the sacrificial layer 230 and the surface of the mask layer 210 are exposed in the subsequent etching back process; on the other hand, the initial sacrificial film 240 may be deposited with a higher temperature parameter, so that the initial sacrificial film 240 is formed with a higher density, and thus with a higher strength, so as to facilitate the stability of the subsequent pattern transfer, and thus the performance of the formed semiconductor structure is better.
In this embodiment, the initial sacrificial film 240 on the surface of the mask layer 210 has a first height h1 along a direction perpendicular to the surface of the layer to be etched.
Since the first opening 221 has the second height h2, and the second height h2 is greater than the first height h1, the initial sacrificial film 240 is ensured to be etched back later, and the initial sacrificial film 240 material with a certain height is still provided in the first opening 221 in the process of exposing the top surface of the sacrificial layer 230 and the surface of the mask layer 210, so that the initial sacrificial film 221 remaining in the first opening 221 forms a first segment later, and the performance of the formed semiconductor structure is better.
Referring to fig. 19, in the second direction Y, the first opening 221 has a first width w1, and the first height h1 is greater than twice the first width w1; the second opening 232 has a second width w2, and the first height h1 is greater than twice the first width w2, and the second direction Y is perpendicular to the first direction X. Thereby ensuring that the initial sacrificial film 240 can fill the first opening 221 in the second direction Y, and the initial sacrificial film 240 can fill the second opening 232, thereby ensuring that the subsequently formed first segment can segment the first groove and the second segment can segment the second groove.
Referring to fig. 20 to 22, the initial sacrificial film 240 is etched back until the top surface of the sacrificial layer 230 and the surface of the mask layer 210 are exposed, a first segment 251 is formed in the first opening 221, a second initial segment 252 is formed in the second opening 232, and a sacrificial sidewall 253 is formed on the sidewall surface of the sacrificial layer 230.
The process of etching back the initial sacrificial film 240 includes: one or a combination of both of a dry etching process and a wet etching process.
The top surface of the sacrificial layer and the surface of the mask layer 210 are exposed by etching back the initial sacrificial film 240, at this time, the initial sacrificial film 240 remaining in the first opening 221 forms a first segment 251, the initial sacrificial film 240 remaining in the second opening 232 forms a second initial segment 252, and the initial sacrificial film 240 covering the sidewall surface of the sacrificial layer 230 forms the sacrificial sidewall 253.
Referring to fig. 23 to 24, after the first segment 251, the second initial segment 252 and the sacrificial sidewall 253 are formed, the sacrificial layer 230 is removed.
And removing the sacrificial layer 230 to expose the surface of the mask layer 210, and then etching the mask layer 210 with the second initial segment 252 and the sacrificial sidewall 253 to realize pattern transfer.
In the process of removing the sacrificial layer 230, the sacrificial layer 210 has a third etching rate, the mask layer 210 and the layer to be etched have a fourth etching rate, and the third etching rate is greater than the fourth etching rate.
In this embodiment, the sacrificial layer 230 is removed to expose not only the surface of the mask layer 210 but also the bottom surface of the first opening 221 in the second region A2 in the mask layer 210.
Referring to fig. 25 to 27, after the sacrificial layer 240 is removed, a first groove 261 is formed in the mask layer 210 by using the second initial segment 252 and the sacrificial sidewall 253 as masks, the first groove 261 exposes the first segment 251, the first groove 261 is respectively located at two sides of the first segment 251 along the second direction Y, a second groove 262 and a second segment 264 are formed in the mask layer 210 and located at two sides of the second segment 264 along the second direction Y, and the second segment 264 is formed by etching the mask layer 210 with the second initial segment 252.
Since the first segment 251 located in the first region A1 of the mask layer 210 is formed by forming the initial sacrificial film 240 in the first opening 221; the initial sacrificial film 240 is etched back until the surface of the mask layer 210 is exposed, i.e., the material of the first segment 251 is the same as the material of the initial sacrificial film 240. In addition, the initial sacrificial film 240 may be formed by a process with a higher temperature, so that the initial sacrificial film 240 has a higher density and a higher strength, so that the first segment 251 has a higher density and a higher strength, so that the first segment 241 has a higher stability in the subsequent etching process, which is favorable for the stability of pattern transfer, and the performance of the formed semiconductor structure is better. Similarly, the material of the second initial segment 252 in the second area A2 is the same as that of the initial sacrificial film 240, and the material of the sacrificial sidewall 253 on the sidewall surface of the sacrificial layer 230 is the same as that of the initial sacrificial side 240, so that the stability is higher in the subsequent etching process, the stability of pattern transfer is facilitated, and the performance of the formed semiconductor structure is better.
The mask layer 210 is etched using the second initial segment 252 as a mask, forming a second trench 262 and a second segment 264 in the second region A2. The stability of the pattern transfer is higher due to the higher stability of the second initial segment 252.
The first segment 251, the second initial segment 252 and the sacrificial sidewall 252 are used as masks, and in the process of etching the mask layer 210, the stability of the sacrificial sidewall 253 is higher, so that the stability of pattern transfer is higher.
In this embodiment, further comprising: after the first groove 261 and the second groove 262 are formed, the first segment 251 and the mask layer 210 are used as masks to etch the layer to be etched at the bottom of the first groove 261, a first target groove is formed in the layer to be etched at the bottom of the first groove 261, the second segment 264 and the mask layer 210 are used as masks to etch the layer to be etched at the bottom of the second groove 262, and a second target groove is formed in the layer to be etched at the bottom of the second groove 262.
In this embodiment, after the first and second target trenches are formed, the first and second segments 251 and 264 and the mask layer 210 are removed; after removing the first segment 251, the second segment 264 and the mask layer 210, forming a first interconnection layer in the first target trench; and forming a second interconnection layer in the second target groove.
Correspondingly, the embodiment of the invention also provides a semiconductor structure formed by adopting the method.
Fig. 28-42 are schematic cross-sectional views of steps of a semiconductor structure forming process according to another embodiment of the present invention. The present embodiment is different from the above embodiment in that the order of forming the first opening and the second opening is different, and after the sacrificial layer and the second opening in the sacrificial layer are formed, the first opening is formed in the mask layer, so the present embodiment continues the description of the process of forming the semiconductor structure on the basis of the above embodiment.
With continued reference to fig. 28 to 29 on the basis of fig. 12, fig. 28 is a schematic view on the basis of fig. 12, fig. 29 is a schematic view of fig. 28 along a tangential direction of M2-N2, a sacrificial layer 330 is formed on the surface of the mask layer 210 in the second region A2, and a second opening 332 is formed in the sacrificial layer 330, where the second opening 332 penetrates the sacrificial layer 330 along the first direction X.
The forming method of the sacrificial layer 330 and the second opening 332 in the sacrificial layer 330 includes: forming a sacrificial material film (not shown) on the surface of the mask layer 210; forming a third patterned layer (not shown) on the sacrificial material film surface, the third patterned layer exposing the sacrificial material film surfaces of the first areas A1 and portions of the sacrificial material film surfaces of the second areas A2; and etching the sacrificial material film by taking the third patterned layer as a mask until the surface of the mask layer 210 is exposed, so as to form the sacrificial layer 330 and a second opening 332 positioned in the sacrificial layer 330, wherein the second opening penetrates through the sacrificial layer 330 along the first direction X.
The second opening 332 is located in the second area A2, and is used for filling material in the second opening 332 to form a second initial segment.
The sacrificial layer 330 is the same as the sacrificial layer 230 in the above embodiment, and will not be described here again.
Referring to fig. 30 to 31, fig. 30 is a schematic diagram based on fig. 28, fig. 31 is a schematic cross-sectional view of fig. 30 along a tangential direction of M1-N1, after forming the sacrificial layer 330 and the second opening 332 in the sacrificial layer 330, forming a first opening 321 in the mask layer 210, wherein the first opening 321 penetrates through the mask layer on the first area A1, and the first opening 321 exposes a surface of the first area A1 of the layer to be etched.
In this embodiment, the first openings 321 expose only the surfaces of the first areas A1 of the layers to be etched.
The method for forming the first opening 321 includes: forming a barrier layer (not shown) within the second opening 332, on the surface of the mask layer 210, and on the surface of the sacrificial layer 330; forming a fourth patterned layer (not shown) on the barrier layer surface, the fourth patterned layer exposing a portion of the barrier layer surface in the first region A1; and etching the barrier layer and the mask layer 210 by taking the fourth patterned layer as a mask until the surface of the layer to be etched is exposed, and forming the first opening 321 in the first area A1 of the mask layer 210.
The first opening 321 is used for forming a first segment by the subsequent filling material.
Referring to fig. 32 to 34, fig. 32 is a schematic view based on fig. 30, fig. 33 is a schematic view of fig. 32 taken along a tangential line of M1-N1, fig. 34 is a schematic view of fig. 32 taken along a tangential line of M2-N2, and an initial sacrificial film 340 is formed in the first opening 321, in the second opening 332, on the side wall and top surface of the sacrificial layer 330, and on the surface of the mask layer 210 in the first region A1, wherein the initial sacrificial film 340 fills the first opening 321 and the second opening 332.
The forming process of the initial sacrificial film 340 is the same as that of the initial sacrificial film 240 in the above embodiment, and will not be described again.
Referring to fig. 35 to 37, fig. 35 is a schematic view based on fig. 32, fig. 36 is a schematic view of fig. 35 in a tangential direction along M1-N1, fig. 37 is a schematic view of fig. 35 in a tangential direction along M2-N2, the initial sacrificial film 340 is etched back until the top surface of the sacrificial layer 330 and the surface of the mask layer 210 are exposed, a first segment 351 is formed in the first opening 321, a second initial segment 352 is formed in the second opening 332, and a sacrificial sidewall 253 is formed on the surface of the sidewall of the sacrificial layer 330.
The first segment 351 is the same as the first segment 251 in the above embodiment, the second initial segment 352 is the same as the second initial segment 252 in the above embodiment, and the sacrificial sidewall 353 is the same as the sacrificial sidewall 253 in the above embodiment, which will not be described herein.
Referring to fig. 38 to 39, fig. 38 is a schematic view based on fig. 35, fig. 39 is a schematic view of a cross section of fig. 38 along a tangential direction of M2-N2, and after forming the first segment 351, the second initial segment 352 and the sacrificial sidewall 353, the sacrificial layer 330 is removed.
Unlike the above embodiment, since the first opening 321 is only located in the first region A1, the surfaces of the first region A1 and the second region A1 of the mask layer 210 are exposed after the sacrificial layer 330 is removed.
Referring to fig. 40 to 42, fig. 40 is a schematic diagram based on fig. 38, fig. 41 is a schematic cross-sectional diagram of fig. 40, fig. 42 is a schematic cross-sectional diagram along a tangential direction of M2-N2, after the sacrificial layer 340 is removed, the mask layer 210 is etched by using the second initial segment 352 and the sacrificial sidewall 353 as masks, a first trench 361 is formed in the mask layer 210 and located in a first region A1, the first trench 361 exposes the first segment 351, the first trench 361 is located on two sides of the first segment 351 along a second direction Y, a second trench 362 and a second segment 364 are formed in the mask layer 210 and located on two sides of the second segment 364 along the second direction Y, the second segment 364 is formed by etching the mask layer 210 with the second initial segment 352, and the second direction Y is perpendicular to the first direction X.
The first groove 361, the first dividing section 351, the second groove 362 and the second dividing section 364 are identical to the first groove 261, the first dividing section 251, the second groove 262 and the second dividing section 264 in the above embodiments, and will not be described herein.
In this embodiment, further comprising: after the first groove 361 and the second groove 362 are formed, the first segment 351 and the mask layer 210 are used as masks to etch the layer to be etched at the bottom of the first groove 361, a first target groove is formed in the layer to be etched at the bottom of the first groove 361, the second segment 364 and the mask layer 210 are used as masks to etch the layer to be etched at the bottom of the second groove 362, and a second target groove is formed in the layer to be etched at the bottom of the second groove 362.
In this embodiment, after the first target trench and the second target trench are formed, the first segment 351, the second segment 364, and the mask layer 210 are removed; after removing the first segment 351, the second segment 364 and the mask layer 210, forming a first interconnection layer in the first target trench; and forming a second interconnection layer in the second target groove.
Correspondingly, the embodiment of the invention also provides a semiconductor structure formed by adopting the method.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (19)

1. A method of forming a semiconductor structure, comprising:
providing a layer to be etched, wherein the layer to be etched comprises an interconnection zone, the interconnection zone comprises a plurality of first zones and a plurality of second zones, the first zones and the second zones are alternately arranged along a first direction, the adjacent first zones and second zones are adjacent, and a mask layer is arranged on the surface of the interconnection zone of the layer to be etched;
forming a first opening in the mask layer, wherein the first opening penetrates through the mask layer on the first region along a first direction, and the first opening exposes the surfaces of the first region of the plurality of layers to be etched;
forming a sacrificial layer on the surface of the mask layer on the second region respectively, wherein a second opening is formed in the sacrificial layer, and the second opening penetrates through the sacrificial layer along the first direction;
forming an initial sacrificial film in the first opening, the second opening, the side wall and the top surface of the sacrificial layer and the surface of the mask layer of the first region, wherein the first opening and the second opening are filled with the initial sacrificial film;
etching the initial sacrificial film until the top surface of the sacrificial layer and the surface of the mask layer are exposed, forming a first segmentation section in the first opening, forming a second initial segmentation section in the second opening, and forming a sacrificial side wall on the surface of the side wall of the sacrificial layer;
after the first segmentation section, the second initial segmentation section and the sacrificial side wall are formed, removing the sacrificial layer;
after the sacrificial layer is removed, the second initial segmentation section and the sacrificial side wall are used as masks to etch the mask layer, a first groove located in the first area is formed in the mask layer, the first groove exposes the first segmentation section and is respectively located at two sides of the first segmentation section along the second direction, a second groove and a second segmentation section located in the second area are formed in the mask layer, the second groove is respectively located at two sides of the second segmentation section along the second direction, the second segmentation section is formed by etching the mask layer through the second initial segmentation section, and the second direction is perpendicular to the first direction.
2. The method of forming a semiconductor structure of claim 1, wherein after forming a first opening in the mask layer, forming a sacrificial layer and a second opening in the sacrificial layer.
3. The method of forming a semiconductor structure of claim 2, wherein said first openings further expose second area surfaces of said layers to be etched; the first opening forming method comprises the following steps: forming a first graphical layer on the surface of the mask layer, wherein the first graphical layer exposes part of the mask layer surfaces of the first region and the second region; and etching the mask layer by taking the first patterned layer as a mask, and forming the first opening in the mask layer.
4. The method of forming a semiconductor structure of claim 2, wherein the sacrificial layer further fills the second region first opening; the forming method of the sacrificial layer and the second opening in the sacrificial layer comprises the following steps: forming a sacrificial material film in the first opening and on the surface of the mask layer, wherein the first opening is filled with the sacrificial material film; forming a second patterning layer on the surface of the sacrificial material film, wherein the second patterning layer exposes the surfaces of the sacrificial material films of the first areas and part of the surfaces of the sacrificial material films of the second areas; and etching the sacrificial material film by taking the second patterned layer as a mask until the surface of the mask layer and the bottom surface of the first opening in the first region are exposed, so as to form the sacrificial layer and a second opening in the sacrificial layer.
5. The method of forming a semiconductor structure of claim 1, wherein a sacrificial layer and a second opening in the sacrificial layer are formed prior to forming the first opening in the mask layer.
6. The method of forming a semiconductor structure of claim 5, wherein the method of forming the sacrificial layer and the second opening in the sacrificial layer comprises: forming a sacrificial material film on the surface of the mask layer; forming a third patterning layer on the surface of the sacrificial material film, wherein the third patterning layer exposes the surfaces of the sacrificial material films of the first areas and part of the surfaces of the sacrificial material films of the second areas; and etching the sacrificial material film by taking the third graphical layer as a mask until the surface of the mask layer is exposed, so as to form the sacrificial layer and a second opening in the sacrificial layer.
7. The method of forming a semiconductor structure of claim 5, wherein the method of forming the first opening comprises: forming a barrier layer in the second opening, on the surface of the mask layer and on the surface of the sacrificial layer; forming a fourth graphical layer on the surface of the barrier layer, wherein the fourth graphical layer exposes part of the surface of the barrier layer in the first area; and etching the barrier layer and the mask layer by taking the fourth patterned layer as a mask until the surface of the layer to be etched is exposed, and forming the first opening in the first area of the mask layer.
8. The method of claim 7, wherein in etching the barrier layer and the mask layer, there is a first etch rate for the barrier layer and the mask layer, a second etch rate for the sacrificial layer, and the first etch rate is greater than the second etch rate.
9. The method of forming a semiconductor structure of claim 1, wherein the material of the mask layer comprises: silicon oxide, silicon nitride, silicon carbide nitride, silicon boride nitride, silicon oxycarbide oxide, or silicon oxynitride.
10. The method of forming a semiconductor structure of claim 1, wherein the material of the sacrificial layer comprises: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, siCO, or SiCOH.
11. The method of claim 1, wherein the surface of the layer to be etched further comprises an underlying hard mask layer, the underlying hard mask layer being located between the layer to be etched and the mask layer.
12. The method of forming a semiconductor structure of claim 1, wherein the material of the initial sacrificial film comprises: silicon oxide, silicon nitride, silicon oxynitride or titanium dioxide.
13. The method of forming a semiconductor structure of claim 1, wherein the process of forming the initial sacrificial film comprises: atomic layer deposition; the technological parameters of atomic layer deposition include: the temperature is 150-350 ℃.
14. The method of claim 1, wherein the initial sacrificial film on the surface of the mask layer has a first height in a direction perpendicular to the surface of the layer to be etched.
15. The method of forming a semiconductor structure of claim 14, wherein the first opening has a second height in a direction perpendicular to a surface of the layer to be etched, and the second height is greater than the first height.
16. The method of forming a semiconductor structure of claim 14, wherein in a second direction, the first opening has a first width, and the first height is greater than twice the first width; the second opening has a second width, and the first height is greater than twice the second width.
17. The method of forming a semiconductor structure of claim 1, further comprising: after the first groove and the second groove are formed, the first segmentation section and the mask layer are used as masks to etch the layer to be etched at the bottom of the first groove, a first target groove is formed in the layer to be etched at the bottom of the first groove, the second segmentation section and the mask layer are used as masks to etch the layer to be etched at the bottom of the second groove, and a second target groove is formed in the layer to be etched at the bottom of the second groove; after the first target groove and the second target groove are formed, removing the first segmentation section, the second segmentation section and the mask layer; after the first segmentation section, the second segmentation section and the mask layer are removed, a first interconnection layer is formed in the first target groove; and forming a second interconnection layer in the second target groove.
18. The method of forming a semiconductor structure of claim 1, wherein the layer to be etched further comprises a peripheral region surrounding an interconnect region; the mask layer is also positioned on the surface of the peripheral area.
19. A semiconductor structure formed by the method of any one of claims 1 to 18.
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