CN111983887A - Method for acquiring sub-resolution auxiliary graph - Google Patents

Method for acquiring sub-resolution auxiliary graph Download PDF

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CN111983887A
CN111983887A CN202011069768.6A CN202011069768A CN111983887A CN 111983887 A CN111983887 A CN 111983887A CN 202011069768 A CN202011069768 A CN 202011069768A CN 111983887 A CN111983887 A CN 111983887A
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sub
graph
distance
resolution auxiliary
pattern
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CN111983887B (en
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赵广
罗招龙
朱安康
刘秀梅
王康
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Nexchip Semiconductor Corp
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Nanjing Crystal Drive Integrated Circuit Co ltd
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Abstract

The invention discloses a method for acquiring a sub-resolution auxiliary graph, which at least comprises the following steps: providing an integrated circuit layout, wherein the integrated circuit layout comprises a plurality of first graphs and first sub-resolution auxiliary graphs; carrying out optical proximity correction on the first graph to obtain a plurality of second graphs; dividing the first sub-resolution auxiliary graph into a plurality of sub-graphs along the direction vertical to the second graph to obtain a second sub-resolution auxiliary graph, wherein a first distance is reserved between every two adjacent sub-graphs; moving the sub-graph to the second graph by a second distance to obtain the minimum edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph; and obtaining an optimal second sub-resolution auxiliary graph through the minimum edge position placement error. The invention solves the problem that the sub-resolution auxiliary pattern is easy to expose and develop on the substrate, thereby reducing the yield of products.

Description

Method for acquiring sub-resolution auxiliary graph
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a method for acquiring a sub-resolution auxiliary graph.
Background
With the development of the semiconductor industry, requirements for performance and energy consumption of chips are more and more demanding, and in order to obtain chips with smaller area, higher performance and lower energy consumption, the size of each pattern on the chip and the distance between the patterns need to be further reduced, and the reduction of the distance can cause the design distance between some patterns on the layout to be smaller than the optical wavelength. Therefore, the layout needs to be corrected before the layout is imprinted on the reticle, so as to prevent an Optical Proximity Effect (OPE) from being generated in the photolithography process, and avoid the distortion of the pattern caused by the inconsistency between the pattern imprinted on the chip and the design. A technique for correcting the layout in order to avoid the Optical proximity effect is an Optical Proximity Correction (OPC) technique. Sub-resolution assist Feature (SRAF) is a widely used optical proximity correction method. The layout is corrected by the sub-resolution auxiliary graph technology, so that the graph resolution of the photoetching process can be effectively improved, the process window is enlarged, and the product yield is improved.
The sub-resolution auxiliary graph added on the main graph based on the adding rule is subjected to optical proximity correction, and the distance between the sub-resolution auxiliary graph and the corrected main graph is too small, so that the sub-resolution auxiliary graph is easily exposed and developed on a substrate, and the product yield is reduced.
Disclosure of Invention
The invention aims to provide a method for acquiring a sub-resolution auxiliary pattern, which solves the problem that after optical proximity correction, the distance between the sub-resolution auxiliary pattern and a main pattern after correction is too small, so that the sub-resolution auxiliary pattern is easily exposed and developed on a substrate, and the product yield is reduced.
In order to solve the technical problems, the invention is realized by the following technical scheme:
the invention provides a method for acquiring a sub-resolution auxiliary graph, which at least comprises the following steps:
providing an integrated circuit layout, wherein the integrated circuit layout comprises a plurality of first graphs and first sub-resolution auxiliary graphs; the plurality of first sub-resolution auxiliary patterns are arranged on the periphery of the plurality of first patterns, and a minimum distance is reserved between the first sub-resolution auxiliary patterns and the first patterns;
carrying out optical proximity correction on the first graph to obtain a plurality of second graphs;
dividing the first sub-resolution auxiliary graph into a plurality of sub-graphs along the direction vertical to the second graph to obtain a second sub-resolution auxiliary graph, wherein a first distance is reserved between every two adjacent sub-graphs;
moving the sub-graph to the second graph by a second distance to obtain the edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph;
adjusting the first distance and the second distance to obtain the minimum edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph;
and obtaining an optimal second sub-resolution auxiliary graph through the minimum edge position placement error.
In one embodiment of the invention, the simulated contour of the second graphical optical model has a first error in the horizontal direction with respect to the first graph and a second error in the vertical direction with respect to the first graph.
In one embodiment of the present invention, the second sub-resolution auxiliary pattern includes two sub-patterns.
In an embodiment of the present invention, the first sub-resolution auxiliary pattern is rectangular, and the sub-pattern is divided along a long side of the first sub-resolution auxiliary pattern.
In an embodiment of the invention, the adjustment range of the first distance is 0 to the length of the long side of the first sub-resolution auxiliary pattern.
In an embodiment of the present invention, the adjustment interval of the first distance is 0 to a length of a long side of the first sub-resolution auxiliary pattern.
In an embodiment of the invention, the adjustment range of the second distance is 0 to the distance from the first sub-resolution auxiliary pattern to the second pattern.
In an embodiment of the invention, the adjustment interval of the second distance is 0 to the distance of the first sub-resolution auxiliary pattern from the second pattern.
In one embodiment of the present invention, the first error and the second error are obtained according to the first distance and the second distance.
In one embodiment of the invention, the minimum edge position placement error is obtained in dependence on the root mean square of the first error and the second error.
The invention divides the whole first sub-resolution auxiliary graph adjacent to the graph to be corrected, namely the first graph into a plurality of sections with gaps in the middle, and solves the problem that the sub-resolution auxiliary graph is easy to expose and develop on a substrate due to the small distance between the sub-resolution auxiliary graph and the corrected main graph after optical adjacent correction, thereby reducing the product yield.
Of course, it is not necessary for any product in which the invention is practiced to achieve all of the above-described advantages at the same time.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flow chart of a method for obtaining sub-resolution auxiliary graphics according to the present invention;
FIG. 2 is a schematic structural diagram corresponding to step S1 in FIG. 1;
FIG. 3 is a schematic structural diagram corresponding to step S2 in FIG. 1;
FIG. 4 is a schematic structural diagram corresponding to step S2 in FIG. 1;
FIG. 5 is a schematic structural diagram corresponding to step S3 in FIG. 1;
FIG. 6 is a schematic structural diagram corresponding to step S4 in FIG. 1;
FIG. 7 is a schematic structural diagram corresponding to step S5 in FIG. 1;
FIG. 8 is a schematic structural diagram of step S1 according to an embodiment of the present invention;
FIG. 9 is a schematic structural diagram corresponding to step S2 according to an embodiment of the present invention;
FIG. 10 is a schematic structural diagram corresponding to step S1 in another embodiment of the present invention;
FIG. 11 is a schematic structural diagram corresponding to step S2 in another embodiment of the present invention;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The addition of the sub-resolution auxiliary pattern added on the main pattern based on the rule, for example, the addition of the sub-resolution auxiliary pattern based on the rule of 55nm to 90nm, after the optical proximity correction, causes the sub-resolution auxiliary pattern to be exposed and developed on, for example, a wafer due to the fact that the closer the scatterer is to the target pattern, the easier it is to be exposed and developed on the wafer due to the superposition of the intensity of light, thereby reducing the product yield.
Referring to fig. 1, the present invention provides a method for obtaining sub-resolution auxiliary graphics, which at least includes the following steps:
s1, providing an integrated circuit layout, wherein the integrated circuit layout comprises a plurality of first graphs and first sub-resolution auxiliary graphs; the plurality of first sub-resolution auxiliary patterns are arranged on the periphery of the plurality of first patterns, and a minimum distance is reserved between the first sub-resolution auxiliary patterns and the first patterns;
s2, carrying out optical proximity correction on the first graph to obtain a plurality of second graphs;
s3, dividing the first sub-resolution auxiliary graph into a plurality of sub-graphs along a direction perpendicular to the second graph to obtain a second sub-resolution auxiliary graph, wherein a first distance is reserved between every two adjacent sub-graphs;
s4, moving the sub-graph to the second graph by a second distance to obtain the edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph;
s5, adjusting the first distance and the second distance to obtain the minimum edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph;
and S6, obtaining an optimal second sub-resolution auxiliary graph through the minimum edge position placement error.
Referring to fig. 2 to 4, in steps S1 and S2, an integrated circuit layout 1 is first provided, where the integrated circuit layout 1 includes a plurality of first patterns 10 and first sub-resolution auxiliary patterns 20, the plurality of first sub-resolution auxiliary patterns 20 are disposed at the periphery of the plurality of first patterns 10, and a minimum distance is provided between the first sub-resolution auxiliary patterns 20 and the first patterns 10. The second pattern 50 is a pattern obtained by performing model-based optical proximity correction. Model-based optical proximity correction here refers to building an optical model and then simulating the exposure results of the original pattern. The first pattern 10 is a number of isolated or sparsely distributed patterns. By adding the first sub-resolution auxiliary pattern 20, the process window of the isolated or sparsely distributed pattern can be matched with the process window of the dense pattern, the focusing depth of the isolated or sparsely distributed pattern can be increased, the requirements of the imaging process parameters can be reduced, and the exposure accuracy can be improved.
Referring to fig. 2 to 4, in steps S1 and S2, in the present embodiment, the first sub-resolution auxiliary pattern 20 includes two stripe-shaped sub-resolution auxiliary patterns disposed at the periphery of the first pattern 10, i.e., a first sub-resolution auxiliary pattern 21 and a second sub-resolution auxiliary pattern 22, and the addition rule is, for example, 55-90-40-225, which represents that the width of the first sub-resolution auxiliary pattern 21 adjacent to the first pattern 10, i.e., having the smallest distance from the first pattern 10, is, for example, 55nm, the distance between the first sub-resolution auxiliary pattern 21 and the first pattern 10 is, for example, 90nm, the width of the second sub-resolution auxiliary pattern 22 away from the first pattern 10 is, for example, 40nm, and the distance between the second sub-resolution auxiliary pattern 22 and the first pattern 10 is, for example, 225 nm. In this embodiment, the minimum distance is, for example, the distance between the first sub-resolution auxiliary pattern 21 and the first pattern 10. After the optical proximity correction is performed on the first pattern 10, a plurality of second patterns 50 are obtained, the second patterns 50 are larger than the first patterns 10, and the position of the first sub-resolution auxiliary pattern 20 is not changed, so the second patterns 50 are closer to the first sub-resolution auxiliary pattern 20, for example, 47nm, at the minimum distance, because the distance between the first sub-resolution auxiliary pattern 20 and the corrected second patterns 50 is too small, the first sub-resolution auxiliary pattern 20 is exposed and developed onto a wafer, for example, because the intensity of light is overlapped, the closer the scatterer is to the target pattern, the easier the scatterer is exposed and developed onto the wafer.
Referring to fig. 5 and 6, in step S3, the first sub-resolution auxiliary pattern 20 is divided into a plurality of sub-patterns 30 along a direction perpendicular to the second pattern 50 to obtain a second sub-resolution auxiliary pattern 40, wherein a first distance is provided between adjacent sub-patterns 30. In this embodiment, the first sub-resolution auxiliary pattern 21 having the smallest distance from the second pattern 50 is divided into a plurality of sub-patterns 30 along a direction perpendicular to the second pattern 50, specifically, for example, the first sub-resolution auxiliary pattern 21 is divided into, for example, 2 sub-patterns 30, and a first distance a is provided between adjacent sub-patterns 30.
Referring to fig. 6 to 11, in steps S4 and S5, the sub-pattern 30 is moved to the second pattern 50 by a second distance, and the edge position error of the simulated contour 60 of the optical model of the second pattern 50 relative to the first pattern 10 is obtained; by adjusting the first distance and the second distance, a minimum edge placement error of the simulated contour 60 of the optical model of the second graphic 50 relative to the first graphic 10 is obtained. In this embodiment, the sub-pattern 30 is moved to the second pattern 50 by a second distance b, and the value range of the second distance b is set manually. Specifically, a first distance a may be fixed, and a second distance b that the sub-pattern 30 moves toward the second pattern 50 may be adjusted to obtain a plurality of placement errors of the simulated contours 60 of the optical model of the second pattern 50 relative to the edge position of the first pattern 10. Alternatively, the second distance b may be fixed, and then the first distance a between the sub-patterns 30 is adjusted to obtain the edge position error of the simulated contour 60 of the optical model of the second pattern 50 relative to the first pattern 10. By adjusting the first distance a and the second distance b, the minimum edge position placement error of the simulated contour 60 of the optical model of the second feature 50 relative to the first feature 10 is finally obtained.
The first sub-resolution auxiliary pattern 21 is rectangular, and the sub-pattern 30 is divided along a long side of the first sub-resolution auxiliary pattern 21. The first distance a may range from 0 to the length of the long side of the first sub-resolution auxiliary pattern 21, particularly from 1nm to 20nm, the second distance b may range from 0 to the distance from the first sub-resolution auxiliary pattern 21 to the second pattern 50, particularly from 0nm to 25nm, the adjustment interval of the first distance a may range from 0 to the length of the long side of the first sub-resolution auxiliary pattern 21, particularly, the adjustment interval of the first distance a may range from 0.5nm, the adjustment interval of the second distance b may range from 0nm to 5nm, and particularly, the adjustment interval of the second distance b may range from 1 nm. Specifically, the optical model is brought into the second graph 50, the optical model generates a simulated contour 60 according to the second graph 50, the simulated contour 60 of the optical model of the second graph 50 has a first error X in the horizontal direction with respect to the first graph 10, the simulated contour 60 of the optical model of the second graph 50 has a second error Y in the vertical direction with respect to the first graph 10, as shown in table 1, where (X) is a first error between the simulated contour 60 generated by the graph (r) and the graph (r) in the horizontal directionThe difference X, r Y is a second error Y in the direction perpendicular to the graph r of the simulated contour 60 generated by the graph r. X is the first error X of the simulated outline 60 generated by the graph II and the graph II in the horizontal direction, and Y is the second error Y of the simulated outline 60 generated by the graph II and the graph II in the vertical direction. A plurality of groups of first errors X and second errors Y can be obtained by adjusting the first distance a and the second distance b, and then a corresponding edge position placement error is obtained by a value of each group of the first errors X and the second errors Y, where the edge placement error is a difference between an edge of the exposed photoresist pattern and a design pattern simulated by the photolithography software, and in this embodiment, the edge placement error can be represented by, for example, a root mean square, which can be obtained by the following formula:
Figure DEST_PATH_591702DEST_PATH_IMAGE001
wherein, X is a first error of the newly generated graphic simulation outline and the original graphic along the horizontal direction, and Y is a second error of the newly generated graphic simulation outline and the original graphic along the vertical direction.
In the present embodiment, the minimum edge position placement error is selected among all edge position placement errors.
In other embodiments, the edge position placement error may be characterized in other manners, and the method for characterizing the edge position placement error is not limited in the present invention.
TABLE 1
Figure 125648DEST_PATH_IMAGE002
Referring to table 1, in step S6, an optimal second sub-resolution auxiliary pattern is obtained according to the minimum edge position placement error RMS. Specifically, the optimal values of the first distance a and the second distance b of the corresponding second sub-resolution auxiliary pattern are obtained through the minimum edge position placement error RMS, so that the optimal second sub-resolution auxiliary pattern of the pattern i and the pattern ii is obtained, and then the optimal second sub-resolution auxiliary pattern is utilized to perform subsequent processes such as exposure and development.
Referring to table 1, more specifically, for a second sub-resolution auxiliary pattern, for example, let a =1nm and b =1nm, the simulated contour 60 of the second pattern 50 is generated by the optical model, the first error X and the second error Y between the simulated contour 60 and the first pattern 10 are calculated, and the edge position placement error is calculated by the first error X and the second error Y. Similarly, assuming that a =1nm and b =2nm, the simulated contour 60 of the second pattern 50 is generated by the optical model, the first error X and the second error Y between the simulated contour 60 and the first pattern 10 are calculated, and the edge position placement error is calculated from the first error X and the second error Y. Assuming that a =1nm and b =3nm, the simulated contour 60 of the second pattern 50 is generated by the optical model, and the first error X and the second error Y between the simulated contour 60 and the first pattern 10 are calculated, and the edge position placement error is calculated from the first error X and the second error Y. Assuming a =10nm and b =1nm, the simulated contour 60 of the second pattern 50 is generated by the optical model, and the first error X and the second error Y between the simulated contour 60 and the first pattern 10 are calculated, and the edge position placement error is calculated from the first error X and the second error Y. Assuming a =10nm and b =2nm, the simulated contour 60 of the second pattern 50 is generated by the optical model, and the first error X and the second error Y between the simulated contour 60 and the first pattern 10 are calculated, and the edge position placement error is calculated from the first error X and the second error Y. The value ranges of a and b and the interval between each value can be set artificially, for example, the value range of a can be set to be 1-20nm and the interval is 0.5nm, and the value range of b can be set to be 0-25nm and the interval is 1 nm.
As shown in table 1, the minimum edge position placement error is selected from all the edge position placement errors, and a combination of the first distance a and the second distance b is obtained through the minimum edge position placement error, where the sub-resolution auxiliary pattern corresponding to the combination of the first distance a and the second distance b is the optimal second sub-resolution auxiliary pattern. Table 1 shows, for example, that for graph (r), the optimal a, b is, for example, 10, 3, and for graph (r), the optimal a, b is, for example, 10, 4.
TABLE 2
Figure 92336DEST_PATH_IMAGE003
Referring to table 2, the effect of each protocol was analyzed by comparing comparative examples a to D with example E of the present application. Wherein comparative example a is to delete the first sub-resolution auxiliary pattern 20 having the development risk, comparative example B is to retreat the first sub-resolution auxiliary pattern 20 having the development risk by 10nm, comparative example C is to change the distance between the first sub-resolution auxiliary pattern 20 and the first pattern 10 from 90nm to 100nm and then rerun the optical proximity correction method, comparative example D is to change the distance between the first sub-resolution auxiliary pattern 20 and the first pattern 10 to 110nm and rerun the optical proximity correction method, and comparative example E is an embodiment of the present application.
Please refer to table 2, wherein TTL RMS indicates the integrated edge position error of the first and second patterns, SB printing indicates whether the first sub-resolution auxiliary pattern 20 is exposed on the wafer under two conditions of "Normal dose" and "Over dose 10%", respectively, the "Normal dose" indicates the Normal exposure energy, the "Over dose" indicates the exposure energy increased by 10%, the Process window indicates the Process window of the exposure, the "DOF at 8% EM" indicates the range of the focus value when the latitude of the exposure energy is 8%, and the larger the range of the focus value, the larger the Process window is.
Referring to table 2, it can be seen from the results in table 2 that the technical solution of the present application can obtain a better process window while maintaining a lower edge position placement error, and more importantly, the technical solution of the present application only changes the place where the sub-resolution auxiliary pattern is easily developed, and does not affect the process windows in other places. The technical scheme of the application is particularly suitable for adding the 55nm-90nm sub-resolution auxiliary pattern based on rules, and can solve the problem that the sub-resolution auxiliary pattern is easy to expose and develop on the substrate due to the fact that the sub-resolution auxiliary pattern is too close after the optical proximity effect is corrected.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above disclosure of selected embodiments of the invention is intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

Claims (10)

1. A method for obtaining sub-resolution auxiliary graphics is characterized by at least comprising the following steps:
providing an integrated circuit layout, wherein the integrated circuit layout comprises a plurality of first graphs and first sub-resolution auxiliary graphs; the plurality of first sub-resolution auxiliary patterns are arranged on the periphery of the plurality of first patterns, and a minimum distance is reserved between the first sub-resolution auxiliary patterns and the first patterns;
carrying out optical proximity correction on the first graph to obtain a plurality of second graphs;
dividing the first sub-resolution auxiliary graph into a plurality of sub-graphs along the direction vertical to the second graph to obtain a second sub-resolution auxiliary graph, wherein a first distance is reserved between every two adjacent sub-graphs;
moving the sub-graph to the second graph by a second distance to obtain the edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph;
adjusting the first distance and the second distance to obtain the minimum edge position placement error of the simulated outline of the optical model of the second graph relative to the first graph;
and obtaining an optimal second sub-resolution auxiliary graph through the minimum edge position placement error.
2. The method as claimed in claim 1, wherein the simulated contour of the second graphic optical model has a first error in a horizontal direction with respect to the first graphic and a second error in a vertical direction with respect to the first graphic.
3. The method as claimed in claim 1, wherein the second sub-resolution auxiliary pattern comprises two sub-patterns.
4. The method as claimed in claim 1, wherein the first sub-resolution auxiliary pattern is a rectangle, and the sub-patterns are divided along a long side of the rectangle.
5. The method as claimed in claim 3, wherein the first distance is adjusted in a range from 0 to a length of a long side of the first sub-resolution auxiliary pattern.
6. The method as claimed in claim 4, wherein the adjustment interval of the first distance is 0 to a length of a long side of the first sub-resolution auxiliary pattern.
7. The method as claimed in claim 1, wherein the second distance is adjusted in a range from 0 to a distance from the first sub-resolution auxiliary pattern to the second pattern.
8. The method as claimed in claim 6, wherein the adjustment interval of the second distance is 0 to the distance between the first sub-resolution auxiliary pattern and the second pattern.
9. The method as claimed in claim 2, wherein the first error and the second error are obtained according to the first distance and the second distance.
10. The method as claimed in claim 2, wherein the minimum edge position placement error is obtained according to a root mean square of the first error and the second error.
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Address after: 230000 No. 88, xifeihe Road, Hefei comprehensive free trade zone, Xinzhan District, Hefei City, Anhui Province

Patentee after: Hefei crystal integrated circuit Co.,Ltd.

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Patentee before: Nanjing crystal drive integrated circuit Co.,Ltd.

Country or region before: China