CN111970448B - Optical anti-shake drive circuit, drive system, control method of drive system, and electronic device - Google Patents

Optical anti-shake drive circuit, drive system, control method of drive system, and electronic device Download PDF

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Publication number
CN111970448B
CN111970448B CN202010876895.0A CN202010876895A CN111970448B CN 111970448 B CN111970448 B CN 111970448B CN 202010876895 A CN202010876895 A CN 202010876895A CN 111970448 B CN111970448 B CN 111970448B
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circuit
state
driving circuit
host
chip selection
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CN111970448A (en
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吴江波
魏昊
吴绍夫
张聪
张天立
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Shanghai Awinic Technology Co Ltd
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Shanghai Awinic Technology Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/68—Control of cameras or camera modules for stable pick-up of the scene, e.g. compensating for camera body vibrations
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
    • G02B27/64—Imaging systems using optical elements for stabilisation of the lateral and angular position of the image
    • G02B27/646—Imaging systems using optical elements for stabilisation of the lateral and angular position of the image compensating for small deviations, e.g. due to vibration or shake
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
    • G03B5/00—Adjustment of optical system relative to image or object surface other than for focusing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/45—Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/57—Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices

Abstract

The invention provides an optical anti-shake drive circuit, a drive system, a control method thereof and an electronic device.A mode control module controls the drive circuit to be in a host state or a non-host state according to a first control instruction, so that the drive circuit is flexibly switched between being used as a host and being used as a non-host; and when the driving circuit is in the master state, the chip selection processing module outputs a chip selection signal to control other optical anti-shake driving circuits to be in the slave state or the monitoring state, so that the other optical anti-shake driving circuits can be flexibly switched between the slave state and the monitoring state, and when the driving circuit is in the non-master state, the chip selection processing module receives the chip selection signal and controls the driving circuit to be in the slave state or the monitoring state according to the received chip selection signal, so that the driving circuit can be flexibly switched between the slave state and the monitoring state, and the driving circuit can be suitable for more and richer application scenes.

Description

Optical anti-shake drive circuit, drive system, control method of drive system, and electronic device
Technical Field
The present invention relates to the field of data communication technologies, and in particular, to an optical anti-shake driving circuit, a driving system, a control method thereof, and an electronic device.
Background
With the development of science and technology, people have higher and higher requirements on the camera shooting function of the mobile phone, and the camera shooting system of the mobile phone is more and more complex. For example, two cameras can be simultaneously arranged on one camera module, and although the cameras have different functions, the cameras all have the same requirement: optical Image Stabilization (OIS).
In the prior art, the optical anti-shake function of the camera is realized through a special optical anti-shake driving chip, and before the optical anti-shake driving chip realizes the anti-shake function, data of the gyroscope needs to be acquired as original shake data. The number of the optical anti-shake driving chips corresponds to the number of the cameras, and one optical anti-shake driving chip can only perform optical anti-shake on one camera. However, since there is only one gyroscope on the mobile phone, all the optical anti-shake driving chips need to acquire data from the one gyroscope.
However, since the gyroscope is mostly a Serial Peripheral Interface (SPI), a common method at present uses one optical anti-shake driver chip as an SPI master and another optical anti-shake driver chip as an SPI slave, and after the SPI master reads data from the gyroscope, the read data is transmitted to the SPI slave by switching chip selection, but this method may sacrifice the bandwidth of the SPI master. In the other method, one optical anti-shake driving chip is used as an SPI host, the other optical anti-shake driving chip is used as an SPI monitor, the SPI host reads data from the gyroscope, and the SPI monitor acquires data from a data line between the SPI host and the gyroscope so as to reduce the consumption of the bandwidth of the SPI host.
Disclosure of Invention
In view of the above, the present invention provides an optical anti-shake driving circuit, a driving system, a control method thereof, and an electronic device, so as to realize flexible switching between a slave and a monitor.
In order to achieve the purpose, the invention provides the following technical scheme:
an optical anti-shake drive circuit comprises a mode control module and a chip selection processing module;
the mode control module is used for controlling the driving circuit to be in a host state or a non-host state according to a first control instruction input from the outside;
the chip selection processing module is used for outputting a corresponding chip selection signal to other optical anti-shake drive circuits when the drive circuit is in a host state so as to control the other optical anti-shake drive circuits to be in a slave state or a monitoring state in a non-host state, and/or receiving a chip selection signal when the drive circuit is in the non-host state, determining that the state of the drive circuit is the slave state or the monitoring state in the non-host state according to the received chip selection signal, and outputting a corresponding second control instruction to the mode control module;
the mode control module is further used for controlling the driving circuit to be in a slave state or a monitoring state according to the second control instruction.
Optionally, the driving circuit further comprises a host circuit and a non-host circuit;
the mode control module is used for controlling the input port and the output port of the host circuit to be connected with the data end of the drive circuit when the drive circuit is in a host state, controlling the input port and the output port of the non-host circuit to be connected with the data end of the drive circuit when the drive circuit is in a slave state, and controlling the input port of the non-host circuit to be connected with the data end of the drive circuit when the drive circuit is in a monitoring state.
Optionally, the driving circuit comprises a first data terminal (MOSI) and a second data terminal (MISO);
the mode control module is also used for controlling the driving circuit to work in a three-wire mode or a four-wire mode;
when the driving circuit works in a four-wire mode, the mode control module controls the first data terminal (MOSI) to be connected to the output port of the host circuit and the second data terminal (MISO) to be connected to the input port of the host circuit, or controls the first data terminal (MOSI) to be connected to the input port of the non-host circuit and the second data terminal (MISO) to be connected to the output port of the non-host circuit, or controls the first data terminal (MOSI) to be connected to the input port of the non-host circuit; and/or the presence of a gas in the gas,
when the driving circuit works in a three-wire mode, the mode control module controls the first data terminal (MOSI) to be connected with the input port of the host circuit and controls the first data terminal (MOSI) to be connected with the output port of the host circuit, or controls the first data terminal (MOSI) to be connected with the input port of the non-host circuit and controls the first data terminal (MOSI) to be connected with the output port of the non-host circuit, or controls the first data terminal (MOSI) to be connected with the input port of the non-host circuit.
Optionally, the monitoring circuit further comprises a master circuit, a slave circuit and a monitoring circuit;
the mode control module is used for controlling the input port and the output port of the host circuit to be connected with the data end of the drive circuit when the drive circuit is in a host state, controlling the input port and the output port of the slave circuit to be connected with the data end of the drive circuit when the drive circuit is in a slave state, and controlling the input port of the monitoring circuit to be connected with the data end of the drive circuit when the drive circuit is in a monitoring state.
Optionally, the driving circuit comprises a first data terminal (MOSI) and a second data terminal (MISO);
the mode control module is also used for controlling the driving circuit to work in a three-wire mode or a four-wire mode;
when the driving circuit works in a four-wire mode, the mode control module controls the first data terminal (MOSI) to be connected with the output port of the master circuit and the second data terminal (MISO) to be connected with the input port of the master circuit, or controls the first data terminal (MOSI) to be connected with the input port of the slave circuit and the second data terminal (MISO) to be connected with the output port of the slave circuit, or controls the first data terminal (MOSI) to be connected with the input port of the monitoring circuit; and/or the presence of a gas in the gas,
when the driving circuit works in a three-wire mode, the mode control module controls the first data terminal (MOSI) to be connected with the input port of the host circuit and controls the first data terminal (MOSI) to be connected with the output port of the host circuit, or controls the first data terminal (MOSI) to be connected with the input port of the slave circuit and controls the first data terminal (MOSI) to be connected with the output port of the slave circuit, or controls the first data terminal (MOSI) to be connected with the input port of the monitoring circuit.
Optionally, the host circuit is further configured to control the chip selection processing module to generate different chip selection signals according to different preset conditions, and output the different chip selection signals to other optical anti-shake driving circuits to control the other optical anti-shake driving circuits to be in any state other than the host state.
Optionally, the non-host state further includes a standby state;
the chip selection processing module is further configured to output a corresponding chip selection signal to other optical anti-shake driving circuits when the driving circuit is in the master state, so as to control the other optical anti-shake driving circuits to be in the slave state, the monitoring state or the standby state, receive the chip selection signal when the driving circuit is in the non-master state, and determine that the driving circuit is in the slave state, the monitoring state or the standby state according to the received chip selection signal.
Optionally, the driving circuit includes a plurality of chip selection signal terminals, the plurality of chip selection signal terminals are respectively connected to the chip selection processing module, and the chip selection processing module determines that the non-host state is any one of a slave state and a monitoring state through different combinations of a plurality of chip selection signals of the plurality of chip selection signal terminals.
Optionally, the plurality of chip selection signal terminals include a first chip selection signal terminal and a second chip selection signal terminal, a signal of the first chip selection signal terminal is a first chip selection signal, and a signal of the second chip selection signal terminal is a second chip selection signal;
if the first chip selection signal is at a low level and the second chip selection signal is at a high level, the non-host state is a monitoring state; and if the first chip selection signal is at a high level and the second chip selection signal is at a low level, the non-host state is a slave state.
Optionally, the plurality of chip selection signal terminals include a first chip selection signal terminal, a second chip selection signal terminal and a third chip selection signal terminal, a signal of the first chip selection signal terminal is a first chip selection signal, a signal of the second chip selection signal terminal is a second chip selection signal, and a signal of the third chip selection signal terminal is a third chip selection signal;
if the first chip selection signal is at a low level, and the phase of the second chip selection signal and the third chip selection signal is at a high level after the phase is inverted, the non-host state is a monitoring state; if the first chip selection signal is at a high level, and the phase of the second chip selection signal and the third chip selection signal is at a low level after the phase is inverted, the non-host state is a slave state; and if the first chip selection signal is at a high level, and the phase of the second chip selection signal and the third chip selection signal is at a high level after the phase is inverted, the non-host state is a standby state.
An optical anti-shake driving system comprises a first driving circuit and at least one second driving circuit connected with the first driving circuit, wherein the first driving circuit and the second driving circuit are both the optical anti-shake driving circuit;
wherein the first drive circuit and the second drive circuit are both in a host state;
or, the first driving circuit is in a host state, the second driving circuit is in a non-host state, and the second driving circuit is connected to a chip selection signal end of the first driving circuit, so that the first driving circuit controls the second driving circuit to be in any state of the non-host state through a chip selection signal output by the chip selection signal end.
Optionally, when the first driving circuit is in a host state and the plurality of second driving circuits are in a non-host state, different second driving circuits are connected to different chip selection signal terminals of the first driving circuit, so that the first driving circuit controls any one of the second driving circuits to be in any one of the non-host states through a chip selection signal output by the chip selection signal terminal.
Optionally, the display device further includes a third driving circuit, where the third driving circuit is connected to the first driving circuit and the second driving circuit, and is configured to transmit data to the first driving circuit, or transmit data to the first driving circuit and the second driving circuit.
An electronic device comprising an optical anti-shake drive system as described above.
A control method of an optical anti-shake drive system including a first drive circuit and at least one second drive circuit connected to the first drive circuit, the control method comprising:
controlling the first driving circuit to be in a host state and controlling the second driving circuit to be in a non-host state through a first control instruction;
and outputting a chip selection signal to the second drive circuit through the first drive circuit, and controlling the second drive circuit to be in any state of non-host states.
Compared with the prior art, the technical scheme provided by the invention has the following advantages:
according to the optical anti-shake drive circuit, the drive system, the control method of the drive system and the electronic equipment, the mode control module can control the drive circuit to be in a host state or a non-host state according to the first control instruction, so that the drive circuit can be flexibly switched between being used as a host and being used as a non-host; and when the driving circuit is in the master state, the chip selection processing module outputs a chip selection signal to control other optical anti-shake driving circuits to be in the slave state or the monitoring state, so that the other optical anti-shake driving circuits can be flexibly switched between the slave state and the monitoring state, and when the driving circuit is in the non-master state, the chip selection processing module receives the chip selection signal, determines the state of the driving circuit to be the slave state or the monitoring state according to the received chip selection signal, and controls the driving circuit to be in the slave state or the monitoring state so as to realize the flexible switching of the driving circuit between the slave state and the monitoring state, so that the driving circuit can be suitable for more richer application scenes.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an optical anti-shake driving circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an optical anti-shake driving circuit according to another embodiment of the invention;
fig. 3 is a schematic structural diagram of an optical anti-shake driving circuit according to another embodiment of the invention;
FIG. 4 is a schematic diagram illustrating the connection relationship of the optical anti-shake driving circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating the connection relationship of the optical anti-shake driving circuit according to another embodiment of the present invention;
fig. 6 is a schematic structural diagram of an optical anti-shake driving system according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of an optical anti-shake driving system according to another embodiment of the present invention;
fig. 8 is a schematic structural diagram of an optical anti-shake driving system according to another embodiment of the present invention;
fig. 9 is a flowchart illustrating a control method of the optical anti-shake driving system according to an embodiment of the present invention;
fig. 10 is a schematic diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, so that the above is the core idea of the present invention, and the above objects, features and advantages of the present invention can be more clearly understood. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In some embodiments of the present invention, the driving circuit is a driving circuit in an optical anti-shake driving chip, but the present invention is not limited thereto.
As shown in fig. 1, the optical anti-shake driving circuit includes a mode control module 1 and a chip selection processing module 2, and the chip selection processing module 2 is connected to the mode control module 1. It should be noted that the connection in the embodiment of the present invention includes direct connection, indirect connection, electrical connection, and the like.
The mode control module 1 is configured to control the optical anti-shake driving circuit 10 to be in a master state or a non-master state according to a first control instruction input from the outside, where the non-master state includes a slave state or a monitoring state.
It should be noted that the mode control module 1 may analyze the input first control command, if the command indicates that the optical anti-shake driving circuit 10 is the host, the mode control module 1 controls the optical anti-shake driving circuit 10 to be in the host state, and if the command indicates that the optical anti-shake driving circuit 10 is the non-host, the mode control module 1 controls the optical anti-shake driving circuit 10 to be in the non-host state.
In addition, the chip selection processing module 2 is configured to output a corresponding chip selection signal to the other optical anti-shake driving circuit when the optical anti-shake driving circuit 10 is in the master state, so as to control the other optical anti-shake driving circuit to be in the slave state or the monitoring state in the non-master state, and/or receive the chip selection signal when the optical anti-shake driving circuit 10 is in the non-master state, determine that the state of the optical anti-shake driving circuit 10 is the slave state or the monitoring state in the non-master state according to the received chip selection signal, and output a corresponding second control instruction to the mode control module 1;
the mode control module 1 is further configured to control the optical anti-shake driving circuit 10 to be in a slave state or a monitoring state according to the second control instruction when the driving circuit 10 is in the non-master state.
That is, after the mode control module 1 determines that the optical anti-shake driving circuit 10 is in the master state, the mode control module 1 controls the chip selection processing module 2 to output only the chip selection signal and not receive the chip selection signal, so that other optical anti-shake driving circuits connected to the optical anti-shake driving circuit 10 can be controlled to be in the slave state or the monitoring state by outputting the chip selection signal; after the mode control module 1 determines that the optical anti-shake driving circuit 10 is in the non-master state, the mode control module 1 controls the chip selection processing module 2 to receive only the chip selection signal and not output the chip selection signal, and the chip selection processing module 2 determines that the state of the optical anti-shake driving circuit 10 is the slave state or the monitoring state according to the received chip selection signal, and after the non-master state of the optical anti-shake driving circuit 10 is determined, the chip selection processing module 2 outputs a corresponding second control instruction to the mode control module 1, so that the mode control module 1 controls the optical anti-shake driving circuit 10 to be in the slave state or the monitoring state according to the second control instruction.
That is to say, in the embodiment of the present invention, the optical anti-shake driving circuit 10 can be controlled to be flexibly switched between the master state and the non-master state through the first control instruction, and the optical anti-shake driving circuit 10 can be controlled to be flexibly switched between the slave state and the monitoring state through the chip select signal, so that the application scenarios of the optical anti-shake driving circuit 10 are more flexible and changeable.
In addition, the optical anti-shake driving circuit 10 in the embodiment of the present invention can control one or more other optical anti-shake driving circuits to be in the slave state and control another one or more other optical anti-shake driving circuits to be in the monitoring state through the chip select signal, so that not only can communication between three or more optical anti-shake driving circuits be realized, but also the data transmission amount when the plurality of optical anti-shake driving circuits simultaneously acquire data can be reduced by setting the plurality of or even all optical anti-shake driving circuits to be in the monitoring state, and data can be acquired at the lowest cost.
The other optical anti-shake driving circuit is substantially the same as the optical anti-shake driving circuit in the present invention, that is, the other optical anti-shake driving circuit also has a mode control module and a chip selection processing module, and based on this, the other optical anti-shake driving circuit can determine that its own state is a slave state or a monitor state in a non-master state according to the received chip selection signal.
It should be noted that, when the optical anti-shake driving circuit 10 is in a host state, that is, when the optical anti-shake driving circuit 10 serves as a host, the optical anti-shake driving circuit 10 sends an instruction or data to another optical anti-shake driving circuit connected thereto, and receives data output by the other optical anti-shake driving circuit according to the instruction; when the optical anti-shake driving circuit 10 is in a slave state, that is, when the optical anti-shake driving circuit 10 is used as a slave, the optical anti-shake driving circuit 10 can receive an instruction or data and output the data according to the instruction; when the optical anti-shake driving circuit 10 is in a monitoring state, i.e. the optical anti-shake driving circuit 10 is used as a monitor, the optical anti-shake driving circuit 10 can only receive commands or data, and cannot respond to the received commands.
In some embodiments of the present invention, as shown in fig. 2, the optical anti-shake driving circuit further includes a host circuit 3 and a non-host circuit 4.
When the optical anti-shake driving circuit 10 is in a host state, that is, when the optical anti-shake driving circuit 10 is used as a host, the host circuit 3 is in operation, the non-host circuit 4 does not operate, and the mode control module 1 is used for controlling the input port and the output port of the host circuit 3 to be connected with the data terminal of the optical anti-shake driving circuit 10, so that the host circuit 3 outputs instructions or data to other optical anti-shake driving circuits through the output port and the data terminal, and receives data fed back after the instructions are received by other optical anti-shake driving circuits through the input port and the data terminal.
When the optical anti-shake driving circuit 10 is in a slave state, that is, when the optical anti-shake driving circuit 10 is used as a slave, the host circuit 3 does not work, and the non-host circuit 4 works, the mode control module 1 is further configured to control the input port and the output port of the non-host circuit 4 to be connected to the data port of the optical anti-shake driving circuit 10, so that the non-host circuit 4 receives instructions or data of other optical anti-shake driving circuits in the host state through the input port and the data port, and feeds back the data indicated by the instructions to the other optical anti-shake driving circuits in the host state through the output port and the data port.
When the optical anti-shake driving circuit 10 is in a monitoring state, that is, when the optical anti-shake driving circuit 10 is used as a monitor, the host circuit 3 does not work, and the non-host circuit 4 works, the mode control module 1 is further configured to control the input port of the non-host circuit 4 to be connected to the data port of the optical anti-shake driving circuit 10, so that the non-host circuit 4 receives instructions or data of other optical anti-shake driving circuits in the host state through the input port and the data port.
In the monitoring state, the non-host circuit 4 does not respond to the command and does not feed back data to the other optical anti-shake drive circuits in the host state, and only acquires data from the other optical anti-shake drive circuits.
On the basis of the above embodiments, in some embodiments of the present invention, the optical anti-shake driving circuit 10 includes the first data terminal MOSI and the second data terminal MISO, and the mode control module 1 is further configured to control the optical anti-shake driving circuit 10 to operate in the three-wire mode or the four-wire mode.
When the optical anti-shake drive circuit 10 operates in the four-wire mode, the mode control module 1 controls the first data terminal MOSI to be connected to the output port of the host circuit 3 and the second data terminal MISO to be connected to the input port of the host circuit 3, or controls the first data terminal MOSI to be connected to the input port of the non-host circuit 4 and the second data terminal MISO to be connected to the output port of the non-host circuit 4, or controls the first data terminal MOSI to be connected to the input port of the non-host circuit 4.
That is, when the optical anti-shake drive circuit 10 is in the master state, the mode control module 1 controls the first data terminal MOSI to be connected to the output port of the master circuit 3 and controls the second data terminal MISO to be connected to the input port of the master circuit 3, when the optical anti-shake drive circuit 10 is in the slave state, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the non-master circuit 4 and controls the second data terminal MISO to be connected to the output port of the non-master circuit 4, and when the optical anti-shake drive circuit 10 is in the monitor state, the first data terminal MOSI is connected to the input port of the non-master circuit 4.
And/or, when the optical anti-shake driving circuit 10 works in the three-wire mode, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the host circuit 3 and controls the first data terminal MOSI to be connected to the output port of the host circuit 3, or controls the first data terminal MOSI to be connected to the input port of the non-host circuit 4 and controls the first data terminal MOSI to be connected to the output port of the non-host circuit 4, or controls the first data terminal MOSI to be connected to the input port of the non-host circuit 4.
That is, when the optical anti-shake driving circuit 10 is in the master state, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the master circuit 3 and controls the first data terminal MOSI to be connected to the output port of the master circuit 3, when the optical anti-shake driving circuit 10 is in the slave state, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the non-master circuit 4 and controls the first data terminal MOSI to be connected to the output port of the non-master circuit 4, and when the optical anti-shake driving circuit 10 is in the monitor state, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the non-master circuit 4.
It should be noted that, when the optical anti-shake driving circuit 10 operates in the three-wire mode, the mode control module 1 may implement data transmission between the first data terminal MOSI and the input port and the output port by controlling a transmission direction of data.
In other embodiments of the present invention, as shown in fig. 3, the optical anti-shake driving circuit 10 shown in fig. 1 includes a master circuit 3, a slave circuit 5 and a monitoring circuit 6.
The mode control module 1 is configured to control the input port and the output port of the host circuit 3 to be connected to the data port of the optical anti-shake driving circuit 10 when the optical anti-shake driving circuit 10 is in a host state, control the input port and the output port of the slave circuit 5 to be connected to the data port of the optical anti-shake driving circuit 10 when the optical anti-shake driving circuit 10 is in a slave state, and control the input port of the monitoring circuit 6 to be connected to the data port of the optical anti-shake driving circuit 10 when the optical anti-shake driving circuit 10 is in a monitoring state.
On the basis of the above embodiment, the optical anti-shake drive circuit 10 includes the first data terminal MOSI and the second data terminal MISO, and the mode control module 1 is further configured to control the optical anti-shake drive circuit 10 to operate in the three-wire mode or the four-wire mode.
When the optical anti-shake driving circuit 10 operates in the four-wire mode, the mode control module 1 controls the first data terminal MOSI to be connected to the output port of the master circuit 3 and the second data terminal MISO to be connected to the input port of the master circuit 3, or controls the first data terminal MOSI to be connected to the input port of the slave circuit 5 and the second data terminal MISO to be connected to the output port of the slave circuit 5, or controls the first data terminal MOSI to be connected to the input port of the monitoring circuit 6;
that is, when the optical anti-shake driving circuit 10 is in the master state, the mode control module 1 controls the first data terminal MOSI to be connected to the output port of the master circuit 3 and controls the second data terminal MISO to be connected to the input port of the master circuit 3, when the optical anti-shake driving circuit 10 is in the slave state, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the slave circuit 5 and controls the second data terminal MISO to be connected to the output port of the slave circuit 5, and when the optical anti-shake driving circuit 10 is in the monitor state, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the monitor circuit 6.
And/or, when the optical anti-shake driving circuit 10 works in the three-wire mode, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the host circuit 3 and controls the first data terminal MOSI to be connected to the output port of the host circuit 3, or controls the first data terminal MOSI to be connected to the input port of the slave circuit 5 and controls the first data terminal MOSI to be connected to the output port of the slave circuit 5, or controls the first data terminal MOSI to be connected to the input port of the monitoring circuit 6.
That is, when the optical anti-shake driving circuit 10 is in the master state, the master circuit 3 is operated, the slave circuit 5 and the monitoring circuit 6 are not operated, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the master circuit 3 and controls the first data terminal MOSI to be connected to the output port of the master circuit 3, when the optical anti-shake driving circuit 10 is in the slave state, the slave circuit 5 is operated, the master circuit 3 and the monitoring circuit 6 are not operated, the mode control module 1 controls the first data terminal MOSI to be connected to the input port of the slave circuit 5 and controls the first data terminal MOSI to be connected to the output port of the slave circuit 5, and when the optical anti-shake driving circuit 10 is in the monitoring state, the monitoring circuit 6 is operated, the master circuit 3 and the slave circuit 5 are not operated, and controls the first data terminal MOSI to be connected to the input port of the monitoring circuit 6.
It should be noted that, in the embodiment of the present invention, when the optical anti-shake driving circuit 10 is in the master state, the master circuit 3 controls the chip selection processing module 2 to generate different chip selection signals according to different preset conditions, and outputs the different chip selection signals to other optical anti-shake driving circuits, so as to control the other optical anti-shake driving circuits to be in any state of non-master states, such as in the slave state or the monitoring state. For example, under a first preset condition, the host circuit 3 controls the chip selection processing module 2 to generate a first chip selection signal to control the other optical anti-shake driving circuits to be in the slave state, under a second preset condition, the host circuit 3 controls the chip selection processing module 2 to generate a second chip selection signal to control the other optical anti-shake driving circuits to be in the monitoring state, and so on. The specific content of the preset condition can be set according to different application scenarios.
On the basis of any of the above embodiments, in some embodiments of the present invention, the non-host state further includes a standby state; the chip selection processing module 2 is further configured to output a corresponding chip selection signal to the other optical anti-shake driving circuits when the optical anti-shake driving circuit 10 is in the master state, so as to control the other optical anti-shake driving circuits to be in the slave state, the monitoring state or the standby state, receive the chip selection signal when the optical anti-shake driving circuit 10 is in the non-master state, and determine that the optical anti-shake driving circuit 10 is in the slave state, the monitoring state or the standby state according to the received chip selection signal.
In some embodiments of the present invention, the optical anti-shake driving circuit 10 includes a plurality of chip selection signal terminals, the plurality of chip selection signal terminals are respectively connected to the chip selection processing module 2, and the chip selection processing module 2 determines the non-host state through different combinations of the plurality of chip selection signals of the plurality of chip selection signal terminals.
In some embodiments of the present invention, as shown in fig. 4, the plurality of chip select signal terminals include a first chip select signal terminal CS0 and a second chip select signal terminal CS1, where a signal of the first chip select signal terminal is a first chip select signal, and a signal of the second chip select signal terminal is a second chip select signal; if the first chip selection signal is at a low level, namely 0, and the second chip selection signal is at a high level, namely 1, the non-host state is a monitoring state; if the first chip select signal is at a high level, i.e., 1, and the second chip select signal is at a low level, i.e., 0, the non-master state is the slave state.
Of course, the present invention is not limited thereto, and in other embodiments of the present invention, as shown in fig. 5, the plurality of chip select signal terminals include a first chip select signal terminal CS0, a second chip select signal terminal CS1, and a third chip select signal terminal CS2, a signal of the first chip select signal terminal CS0 is a first chip select signal, a signal of the second chip select signal terminal CS1 is a second chip select signal, and a signal of the third chip select signal terminal CS2 is a third chip select signal;
if the first chip selection signal is at a low level, namely 0, and the phase of the second chip selection signal and the third chip selection signal is followed by a high level, namely 1, the non-host state is a monitoring state; if the first chip selection signal is at a high level, namely 1, and the phase of the second chip selection signal and the third chip selection signal is at a low level, namely 0, the non-host state is a slave state; if the first chip selection signal is at a high level, namely 1, and the phase of the second chip selection signal and the third chip selection signal is then at a high level, namely 1, the non-host state is a standby state.
That is, 0 and 1 for CS0 and CS1& CS2, respectively, represent that the non-host state is the monitor state; 1 and 0 for CS0 and CS1& CS2, respectively, represent that the non-master state is a slave state; CS0 and CS1& CS2 are both 1 indicating that the non-host state is a standby state. Wherein the case where both are 0 is not allowed to occur. In the whole process, only one chip selection of the three chip selection signals can be 0.
When the plurality of chip select signal terminals include the first chip select signal terminal CS0, the second chip select signal terminal CS1, and the third chip select signal terminal CS2, the third chip select signal terminal CS2 may be set to 1 to realize chip selection between the optical anti-shake driving circuit 10 and other optical anti-shake driving circuits.
An embodiment of the present invention further provides an optical anti-shake driving system, as shown in fig. 6, including a first driving circuit CHIP1 and at least one second driving circuit CHIP2 connected to the first driving circuit CHIP1, where the first driving circuit CHIP1 and the second driving circuit CHIP2 are both the optical anti-shake driving circuits provided in any of the above embodiments;
wherein both the first drive circuit CHIP1 and the second drive circuit CHIP2 are in the host state; alternatively, the first driving circuit CHIP1 is in a master state, the second driving circuit CHIP2 is in a non-master state, and the second driving circuit CHIP2 is connected to a CHIP select signal terminal of the first driving circuit CHIP1, so that the first driving circuit CHIP1 controls the second driving circuit CHIP2 to be in a slave state or a monitor state in the non-master state according to a CHIP select signal output from the CHIP select signal terminal.
Alternatively, when the first driving circuit CHIP1 is in the host state and the plurality of second driving circuits CHIPs 2 are in the non-host state, different second driving circuits CHIP2 are connected to different CHIP selection signal terminals of the first driving circuit CHIP1, so that the first driving circuit CHIP1 controls any one of the second driving circuits CHIP2 to be in any one of the non-host states through the CHIP selection signal output by the CHIP selection signal terminals.
Some embodiments of the invention may further include a third driving circuit GYRO, as shown in fig. 7, connected to both data terminals and clock signal terminals of the first driving circuit CHIP1 and the second driving circuit CHIP2, for transmitting data to the first driving circuit CHIP1 or transmitting data to the first driving circuit CHIP1 and the second driving circuit CHIP 2. Optionally, the gyroscope includes a third drive circuit GYRO.
As shown in fig. 7, when the first driving circuit CHIP1 is in the host state and the second driving circuit CHIP2 is in the non-host state, the clock signal terminal SCLK, the first data terminal MOSI and the second data terminal MISO of the first driving circuit CHIP1, the second driving circuit CHIP2 and the third driving circuit GYRO are respectively connected, the first CHIP select signal terminal CS0, i.e., SSB terminal, of the first driving circuit CHIP1 and the second driving circuit CHIP2 is connected to the CS pin of the third driving circuit GYRO, and the second CHIP select signal terminal CS1, i.e., SSB1, of the first driving circuit CHIP1 and the second driving circuit CHIP2 is connected. At this time, the first driving circuit CHIP1 only needs to control the two CHIP select signals, i.e., the SSB terminal and the SSB1 terminal, so as to control the state of the second driving circuit CHIP2 to be a slave state, a monitor state, or the like. In addition, in other embodiments of the present invention, both the first driving circuit CHIP1 and the second driving circuit CHIP2 may be in a host state.
As shown in fig. 8, when the first drive circuit CHIP1 is in the host state and the second drive circuit CHIP2 and the second drive circuit CHIP3 are in the non-host state, the clock signal terminal SCLK, the first data terminal MOSI and the second data terminal MISO of the first drive circuit CHIP1, the second drive circuit CHIP2, the second drive circuit CHIP3 and the third drive circuit GYRO are connected to the SSB terminal of the first CHIP1, the second drive circuit CHIP2 and the first CHIP select signal terminal CS0 of the second drive circuit CHIP3, respectively, and are connected to the pin CS of the third drive circuit GYRO. The optical anti-shake driving circuit has a total of six pins, namely, an SSB1 terminal CS1 and a second data terminal MISO terminal CS2, namely, a second data terminal MISO terminal, two pairs of terminals are connected between the first driving circuit CHIP1, the second driving circuit CHIP2 and the second driving circuit CHIP3, for example, the second data terminal MISO terminal of the first driving circuit CHIP1 is connected with the SSB1 terminal of the second CHIP selection signal terminal CS1 of the second driving circuit CHIP3, the second CHIP selection signal terminals CS1 of the first driving circuit CHIP1 and the SSB1 terminals of the second driving circuit CHIP2 are connected, and the second driving circuit CHIP2 is connected with the second data terminal MISO terminal of the second driving circuit CHIP 3.
It should be noted that, because the chip pins are limited, in some embodiments of the present invention, the second data terminal MISO can only be multiplexed as the chip select signal terminal in the three-wire mode, and in other embodiments, the second data terminal MISO may not be multiplexed under the condition of abundant chip pins, which is not described herein again.
An embodiment of the present invention further provides a control method of an optical anti-shake driving system, where the optical anti-shake driving system includes a first driving circuit and at least one second driving circuit connected to the first driving circuit, and as shown in fig. 9, the control method includes:
s101: controlling the first drive circuit to be in a host state and controlling the second drive circuit to be in a non-host state through the first control instruction;
the method specifically comprises the following steps: respectively sending a first control instruction to the first drive circuit and each second drive circuit; after receiving the first control instruction, the first drive circuit controls the first drive circuit to be in a host state according to the corresponding first control instruction; and after receiving the first control instruction, the second drive circuit controls the second drive circuit to be in a non-host state according to the corresponding first control instruction.
It should be noted that, when the host is in the host state, the host circuit in the first driving circuit operates, and the chip selection processing module only outputs the chip selection signal and does not receive the chip selection signal; when the non-host circuit is in the non-host state, the non-host circuit operates, the chip selection processing module only receives the chip selection signal and does not output the chip selection signal, and the specific process is the same as the above embodiment and is not described herein again.
S102: and outputting a chip selection signal to the second drive circuit through the first drive circuit, and controlling the second drive circuit to be in any one of the non-host states.
After controlling the first driving circuit to be in a master state and controlling the second driving circuit to be in a non-master state, the master circuit in the first driving circuit controls the chip selection processing module to generate a chip selection signal and transmits the chip selection signal to the corresponding second driving circuit through the chip selection signal end, and the second driving circuit controls the second driving circuit to be in the corresponding non-master state after receiving the corresponding chip selection signal, such as controlling the second driving circuit to be in a slave state or a monitoring state.
Of course, the control method provided by another embodiment of the present invention further includes: the first control instruction controls the first driving circuit and the second driving circuit to be in the host state, which is not described in detail herein.
The embodiment of the invention also provides electronic equipment, which comprises the communication system provided by any one of the embodiments. Optionally, as shown in fig. 10, the electronic device is a smartphone or a tablet computer. Optionally, the optical anti-shake driving circuit is a driving circuit in an optical anti-shake driving chip, and the third driving circuit is a driving circuit in a gyroscope chip, where each optical anti-shake driving circuit is disposed corresponding to one camera and is used to realize optical anti-shake of the camera.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (15)

1. An optical anti-shake drive circuit is characterized by comprising a mode control module and a chip selection processing module;
the mode control module is used for controlling the driving circuit to be in a host state or a non-host state according to a first control instruction input from the outside;
the chip selection processing module is used for outputting a corresponding chip selection signal to other optical anti-shake drive circuits when the drive circuit is in a host state so as to control the other optical anti-shake drive circuits to be in a slave state or a monitoring state in a non-host state, and/or receiving a chip selection signal when the drive circuit is in the non-host state, determining that the state of the drive circuit is the slave state or the monitoring state in the non-host state according to the received chip selection signal, and outputting a corresponding second control instruction to the mode control module;
the mode control module is further used for controlling the driving circuit to be in a slave state or a monitoring state according to the second control instruction when the driving circuit is in a non-host state;
wherein, in the slave state, the drive circuit can perform data interaction; in the monitoring state, the drive circuit only receives data.
2. The driver circuit of claim 1, further comprising a host circuit and a non-host circuit;
the mode control module is used for controlling the input port and the output port of the host circuit to be connected with the data end of the drive circuit when the drive circuit is in a host state, controlling the input port and the output port of the non-host circuit to be connected with the data end of the drive circuit when the drive circuit is in a slave state, and controlling the input port of the non-host circuit to be connected with the data end of the drive circuit when the drive circuit is in a monitoring state.
3. The driving circuit according to claim 2, wherein the driving circuit comprises a first data terminal (MOSI) and a second data terminal (MISO);
the mode control module is also used for controlling the driving circuit to work in a three-wire mode or a four-wire mode;
when the driving circuit works in a four-wire mode, the mode control module controls the first data terminal (MOSI) to be connected to the output port of the host circuit and the second data terminal (MISO) to be connected to the input port of the host circuit, or controls the first data terminal (MOSI) to be connected to the input port of the non-host circuit and the second data terminal (MISO) to be connected to the output port of the non-host circuit, or controls the first data terminal (MOSI) to be connected to the input port of the non-host circuit; and/or the presence of a gas in the gas,
when the driving circuit works in a three-wire mode, the mode control module controls the first data terminal (MOSI) to be connected with the input port of the host circuit and controls the first data terminal (MOSI) to be connected with the output port of the host circuit, or controls the first data terminal (MOSI) to be connected with the input port of the non-host circuit and controls the first data terminal (MOSI) to be connected with the output port of the non-host circuit, or controls the first data terminal (MOSI) to be connected with the input port of the non-host circuit.
4. The driving circuit of claim 1, further comprising a master circuit, a slave circuit, and a monitor circuit;
the mode control module is used for controlling the input port and the output port of the host circuit to be connected with the data end of the drive circuit when the drive circuit is in a host state, controlling the input port and the output port of the slave circuit to be connected with the data end of the drive circuit when the drive circuit is in a slave state, and controlling the input port of the monitoring circuit to be connected with the data end of the drive circuit when the drive circuit is in a monitoring state.
5. The driving circuit according to claim 4, wherein the driving circuit comprises a first data terminal (MOSI) and a second data terminal (MISO);
the mode control module is also used for controlling the driving circuit to work in a three-wire mode or a four-wire mode;
when the driving circuit works in a four-wire mode, the mode control module controls the first data terminal (MOSI) to be connected with the output port of the master circuit and the second data terminal (MISO) to be connected with the input port of the master circuit, or controls the first data terminal (MOSI) to be connected with the input port of the slave circuit and the second data terminal (MISO) to be connected with the output port of the slave circuit, or controls the first data terminal (MOSI) to be connected with the input port of the monitoring circuit; and/or the presence of a gas in the gas,
when the driving circuit works in a three-wire mode, the mode control module controls the first data terminal (MOSI) to be connected with the input port of the host circuit and controls the first data terminal (MOSI) to be connected with the output port of the host circuit, or controls the first data terminal (MOSI) to be connected with the input port of the slave circuit and controls the first data terminal (MOSI) to be connected with the output port of the slave circuit, or controls the first data terminal (MOSI) to be connected with the input port of the monitoring circuit.
6. The driving circuit according to claim 2 or 4, wherein the host circuit is further configured to control the chip selection processing module to generate different chip selection signals according to different preset conditions, and output the different chip selection signals to the other optical anti-shake driving circuits so as to control the other optical anti-shake driving circuits to be in any one of non-host states.
7. The driving circuit according to any one of claims 1 to 5, wherein the non-host state further comprises a standby state;
the chip selection processing module is further configured to output a corresponding chip selection signal to other optical anti-shake driving circuits when the driving circuit is in the master state, so as to control the other optical anti-shake driving circuits to be in the slave state, the monitoring state or the standby state, receive the chip selection signal when the driving circuit is in the non-master state, and determine that the driving circuit is in the slave state, the monitoring state or the standby state according to the received chip selection signal.
8. The driving circuit according to claim 1, wherein the driving circuit comprises a plurality of chip select signal terminals, the plurality of chip select signal terminals are respectively connected to the chip select processing module, and the chip select processing module determines that the non-master state is any one of a slave state and a monitor state through different combinations of the plurality of chip select signals of the plurality of chip select signal terminals.
9. The driving circuit according to claim 8, wherein the plurality of chip select signal terminals include a first chip select signal terminal and a second chip select signal terminal, a signal of the first chip select signal terminal is a first chip select signal, and a signal of the second chip select signal terminal is a second chip select signal;
if the first chip selection signal is at a low level and the second chip selection signal is at a high level, the non-host state is a monitoring state; and if the first chip selection signal is at a high level and the second chip selection signal is at a low level, the non-host state is a slave state.
10. The driving circuit according to claim 8, wherein the plurality of chip select signal terminals include a first chip select signal terminal, a second chip select signal terminal and a third chip select signal terminal, a signal of the first chip select signal terminal is a first chip select signal, a signal of the second chip select signal terminal is a second chip select signal, and a signal of the third chip select signal terminal is a third chip select signal;
if the first chip selection signal is at a low level, and the phase of the second chip selection signal and the third chip selection signal is at a high level after the phase is inverted, the non-host state is a monitoring state; if the first chip selection signal is at a high level, and the phase of the second chip selection signal and the third chip selection signal is at a low level after the phase is inverted, the non-host state is a slave state; and if the first chip selection signal is at a high level, and the phase of the second chip selection signal and the third chip selection signal is at a high level after the phase is inverted, the non-host state is a standby state.
11. An optical anti-shake driving system, comprising a first driving circuit and at least one second driving circuit connected to the first driving circuit, wherein the first driving circuit and the second driving circuit are the optical anti-shake driving circuit according to any one of claims 1 to 10;
wherein the first drive circuit and the second drive circuit are both in a host state;
or, the first driving circuit is in a host state, the second driving circuit is in a non-host state, and the second driving circuit is connected to a chip selection signal end of the first driving circuit, so that the first driving circuit controls the second driving circuit to be in any state of the non-host state through a chip selection signal output by the chip selection signal end.
12. The optical anti-shake driving system according to claim 11, wherein when the first driving circuit is in a master state and the at least one second driving circuit is in a non-master state, different second driving circuits are connected to different chip selection signal terminals of the first driving circuit, so that the first driving circuit controls any of the second driving circuits to be in any of the non-master states according to a chip selection signal output by the chip selection signal terminals.
13. The optical anti-shake driving system according to claim 11 or 12, further comprising a third driving circuit connected to the first driving circuit and the second driving circuit for transmitting data to the first driving circuit or transmitting data to the first driving circuit and the second driving circuit.
14. An electronic device characterized by comprising the optical anti-shake drive system according to any one of claims 11 to 13.
15. A control method of an optical anti-shake driving system, wherein the optical anti-shake driving system comprises a first driving circuit and at least one second driving circuit connected to the first driving circuit, and the first driving circuit and the second driving circuit are both the optical anti-shake driving circuit according to any one of claims 1 to 10; the control method comprises the following steps:
controlling the first driving circuit to be in a host state and controlling the second driving circuit to be in a non-host state through a first control instruction;
and outputting a chip selection signal to the second drive circuit through the first drive circuit, and controlling the second drive circuit to be in any state of non-host states.
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Publication number Priority date Publication date Assignee Title
CN115174804B (en) * 2019-06-28 2024-02-20 华为技术有限公司 SPI-based data transmission system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012222637A (en) * 2011-04-11 2012-11-12 Mitsubishi Electric Corp Multi-screen display device
CN103729319A (en) * 2013-12-04 2014-04-16 上海斐讯数据通信技术有限公司 Equipment system based on serial bus and data transmission method
CN108418739A (en) * 2018-02-09 2018-08-17 浙江大学 A kind of token ring network-building method based on SPI
CN108446243A (en) * 2018-03-20 2018-08-24 上海奉天电子股份有限公司 A kind of two-way communication and system based on Serial Peripheral Interface (SPI)
CN208506738U (en) * 2018-07-25 2019-02-15 天津光电丰泰科技有限公司 A kind of SPI interface based on interrupting information
CN111031235A (en) * 2019-11-21 2020-04-17 维沃移动通信有限公司 OIS driving circuit structure, data acquisition method and electronic equipment

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007333276A (en) * 2006-06-14 2007-12-27 Rinnai Corp Relay device
US20080282017A1 (en) * 2007-05-09 2008-11-13 Microsoft Corporation Serial Peripheral Interface Switch
DE102008043646A1 (en) * 2008-11-11 2010-05-12 Robert Bosch Gmbh Method and system for controlling communication between a function computer and a monitoring module
CN102821017B (en) * 2011-06-08 2018-03-13 中兴通讯股份有限公司 The method and system of slave addresses order identification in master-slave mode fieldbus
CN103838700A (en) * 2014-02-20 2014-06-04 江苏理工学院 Level multiplexing control serial communication device and method
CN104407556B (en) * 2014-09-26 2017-02-22 浙江中控技术股份有限公司 Hot standby redundancy module switching device
CN105024900B (en) * 2015-08-03 2018-11-27 艾德克斯电子（南京）有限公司 A kind of Multi-Machine Synchronous communication system and method
CN108534298B (en) * 2018-05-03 2023-11-14 珠海格力电器股份有限公司 Slave communication circuit, slave, electrical equipment, master-slave communication circuit and method
CN109358557A (en) * 2018-11-15 2019-02-19 南京铁道职业技术学院 A kind of railway station VIP Room intelligent curtain system
CN110246306A (en) * 2019-06-13 2019-09-17 西安电子科技大学 Underwater exercise safety monitoring system design method based on wireless signal transmission

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012222637A (en) * 2011-04-11 2012-11-12 Mitsubishi Electric Corp Multi-screen display device
CN103729319A (en) * 2013-12-04 2014-04-16 上海斐讯数据通信技术有限公司 Equipment system based on serial bus and data transmission method
CN108418739A (en) * 2018-02-09 2018-08-17 浙江大学 A kind of token ring network-building method based on SPI
CN108446243A (en) * 2018-03-20 2018-08-24 上海奉天电子股份有限公司 A kind of two-way communication and system based on Serial Peripheral Interface (SPI)
CN208506738U (en) * 2018-07-25 2019-02-15 天津光电丰泰科技有限公司 A kind of SPI interface based on interrupting information
CN111031235A (en) * 2019-11-21 2020-04-17 维沃移动通信有限公司 OIS driving circuit structure, data acquisition method and electronic equipment

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